Wed Feb 17 20:12:42 2016 UTC ()
Adapt CI20 HWRNG to synchronous on-demand callback.
Omit needless softint/locking dance.
from riastradh@


(macallan)
diff -r1.3 -r1.4 src/sys/arch/mips/ingenic/ingenic_rng.c

cvs diff -r1.3 -r1.4 src/sys/arch/mips/ingenic/ingenic_rng.c (expand / switch to unified diff)

--- src/sys/arch/mips/ingenic/ingenic_rng.c 2015/11/17 16:53:21 1.3
+++ src/sys/arch/mips/ingenic/ingenic_rng.c 2016/02/17 20:12:42 1.4
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: ingenic_rng.c,v 1.3 2015/11/17 16:53:21 macallan Exp $ */ 1/* $NetBSD: ingenic_rng.c,v 1.4 2016/02/17 20:12:42 macallan Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2015 Michael McConville 4 * Copyright (c) 2015 Michael McConville
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -17,70 +17,61 @@ @@ -17,70 +17,61 @@
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE. 26 * POSSIBILITY OF SUCH DAMAGE.
27 */ 27 */
28 28
29#include <sys/cdefs.h> 29#include <sys/cdefs.h>
30__KERNEL_RCSID(0, "$NetBSD: ingenic_rng.c,v 1.3 2015/11/17 16:53:21 macallan Exp $"); 30__KERNEL_RCSID(0, "$NetBSD: ingenic_rng.c,v 1.4 2016/02/17 20:12:42 macallan Exp $");
31 31
32/* 32/*
33 * adapted from Jared McNeill's amlogic_rng.c 33 * adapted from Jared McNeill's amlogic_rng.c
34 */ 34 */
35 35
36#include <sys/param.h> 36#include <sys/param.h>
37#include <sys/systm.h> 37#include <sys/systm.h>
38#include <sys/device.h> 38#include <sys/device.h>
39#include <sys/mutex.h> 39#include <sys/mutex.h>
40#include <sys/kernel.h> 40#include <sys/kernel.h>
41#include <sys/mutex.h> 41#include <sys/mutex.h>
42#include <sys/callout.h> 
43#include <sys/bus.h> 42#include <sys/bus.h>
44#include <sys/workqueue.h> 
45#include <sys/rndpool.h> 43#include <sys/rndpool.h>
46#include <sys/rndsource.h> 44#include <sys/rndsource.h>
47 45
48#include <mips/ingenic/ingenic_var.h> 46#include <mips/ingenic/ingenic_var.h>
49#include <mips/ingenic/ingenic_regs.h> 47#include <mips/ingenic/ingenic_regs.h>
50 48
51#include "opt_ingenic.h" 49#include "opt_ingenic.h"
52 50
53struct ingenic_rng_softc; 51struct ingenic_rng_softc;
54 52
55static int ingenic_rng_match(device_t, cfdata_t, void *); 53static int ingenic_rng_match(device_t, cfdata_t, void *);
56static void ingenic_rng_attach(device_t, device_t, void *); 54static void ingenic_rng_attach(device_t, device_t, void *);
57 55
58static void ingenic_rng_get(struct ingenic_rng_softc *); 56static void ingenic_rng_get(size_t, void *);
59static void ingenic_rng_get_intr(void *); 
60static void ingenic_rng_get_cb(size_t, void *); 
61 57
62struct ingenic_rng_softc { 58struct ingenic_rng_softc {
63 device_t sc_dev; 59 device_t sc_dev;
64 bus_space_tag_t sc_bst; 60 bus_space_tag_t sc_bst;
65 bus_space_handle_t sc_bsh; 61 bus_space_handle_t sc_bsh;
66 62
67 void * sc_sih; 63 kmutex_t sc_lock;
68 
69 krndsource_t sc_rndsource; 64 krndsource_t sc_rndsource;
70 size_t sc_bytes_wanted; 
71 
72 kmutex_t sc_intr_lock; 
73 kmutex_t sc_rnd_lock; 
74}; 65};
75 66
76CFATTACH_DECL_NEW(ingenic_rng, sizeof(struct ingenic_rng_softc), 67CFATTACH_DECL_NEW(ingenic_rng, sizeof(struct ingenic_rng_softc),
77 ingenic_rng_match, ingenic_rng_attach, NULL, NULL); 68 ingenic_rng_match, ingenic_rng_attach, NULL, NULL);
78 69
79static int 70static int
80ingenic_rng_match(device_t parent, cfdata_t cf, void *aux) 71ingenic_rng_match(device_t parent, cfdata_t cf, void *aux)
81{ 72{
82 const struct apbus_attach_args *aa = aux; 73 const struct apbus_attach_args *aa = aux;
83 74
84 return !(strcmp(aa->aa_name, "jzrng")); 75 return !(strcmp(aa->aa_name, "jzrng"));
85} 76}
86 77
@@ -94,77 +85,42 @@ ingenic_rng_attach(device_t parent, devi @@ -94,77 +85,42 @@ ingenic_rng_attach(device_t parent, devi
94 85
95 sc->sc_dev = self; 86 sc->sc_dev = self;
96 sc->sc_bst = aa->aa_bst; 87 sc->sc_bst = aa->aa_bst;
97 if (addr == 0) 88 if (addr == 0)
98 addr = JZ_RNG; 89 addr = JZ_RNG;
99 90
100 error = bus_space_map(aa->aa_bst, addr, 4, 0, &sc->sc_bsh); 91 error = bus_space_map(aa->aa_bst, addr, 4, 0, &sc->sc_bsh);
101 if (error) { 92 if (error) {
102 aprint_error_dev(self, 93 aprint_error_dev(self,
103 "can't map registers for %s: %d\n", aa->aa_name, error); 94 "can't map registers for %s: %d\n", aa->aa_name, error);
104 return; 95 return;
105 } 96 }
106 97
107 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SERIAL); 98 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
108 mutex_init(&sc->sc_rnd_lock, MUTEX_DEFAULT, IPL_SERIAL); 99
109  
110 aprint_naive(": Ingenic random number generator\n"); 100 aprint_naive(": Ingenic random number generator\n");
111 aprint_normal(": Ingenic random number generator\n"); 101 aprint_normal(": Ingenic random number generator\n");
112 102
113 sc->sc_sih = softint_establish(SOFTINT_SERIAL|SOFTINT_MPSAFE, 103 rndsource_setcb(&sc->sc_rndsource, ingenic_rng_get, sc);
114 ingenic_rng_get_intr, sc); 
115 if (sc->sc_sih == NULL) { 
116 aprint_error_dev(self, "couldn't establish softint\n"); 
117 return; 
118 } 
119 
120 rndsource_setcb(&sc->sc_rndsource, ingenic_rng_get_cb, sc); 
121 rnd_attach_source(&sc->sc_rndsource, device_xname(self), RND_TYPE_RNG, 104 rnd_attach_source(&sc->sc_rndsource, device_xname(self), RND_TYPE_RNG,
122 RND_FLAG_COLLECT_VALUE|RND_FLAG_HASCB); 105 RND_FLAG_COLLECT_VALUE|RND_FLAG_HASCB);
123 106
124 ingenic_rng_get_cb(RND_POOLBITS / NBBY, sc); 107 ingenic_rng_get(RND_POOLBITS / NBBY, sc);
125} 108}
126 109
127static void 110static void
128ingenic_rng_get(struct ingenic_rng_softc *sc) 111ingenic_rng_get(size_t bytes_wanted, void *priv)
129{ 112{
 113 struct ingenic_rng_softc * const sc = priv;
130 uint32_t data; 114 uint32_t data;
131 115
132 mutex_spin_enter(&sc->sc_intr_lock); 116 mutex_spin_enter(&sc->sc_lock);
133 while (sc->sc_bytes_wanted) { 117 while (bytes_wanted) {
134 data = bus_space_read_4(sc->sc_bst, sc->sc_bsh, 0); 118 data = bus_space_read_4(sc->sc_bst, sc->sc_bsh, 0);
135 mutex_spin_exit(&sc->sc_intr_lock); 119 delay(1);
136 mutex_spin_enter(&sc->sc_rnd_lock); 120 rnd_add_data_sync(&sc->sc_rndsource, &data, sizeof(data),
137 rnd_add_data(&sc->sc_rndsource, &data, sizeof(data), 
138 sizeof(data) * NBBY); 121 sizeof(data) * NBBY);
139 mutex_spin_exit(&sc->sc_rnd_lock); 122 bytes_wanted -= MIN(bytes_wanted, sizeof(data));
140 mutex_spin_enter(&sc->sc_intr_lock); 
141 sc->sc_bytes_wanted -= MIN(sc->sc_bytes_wanted, sizeof(data)); 
142 } 123 }
143 explicit_memset(&data, 0, sizeof(data)); 124 explicit_memset(&data, 0, sizeof(data));
144 mutex_spin_exit(&sc->sc_intr_lock); 125 mutex_spin_exit(&sc->sc_lock);
145} 
146 
147static void 
148ingenic_rng_get_cb(size_t bytes_wanted, void *priv) 
149{ 
150 struct ingenic_rng_softc * const sc = priv; 
151 
152 mutex_spin_enter(&sc->sc_intr_lock); 
153 if (sc->sc_bytes_wanted == 0) 
154 softint_schedule(sc->sc_sih); 
155 
156 if (bytes_wanted > (UINT_MAX - sc->sc_bytes_wanted)) 
157 sc->sc_bytes_wanted = UINT_MAX; 
158 else 
159 sc->sc_bytes_wanted += bytes_wanted; 
160 
161 mutex_spin_exit(&sc->sc_intr_lock); 
162} 
163 
164static void 
165ingenic_rng_get_intr(void *priv) 
166{ 
167 struct ingenic_rng_softc * const sc = priv; 
168 
169 ingenic_rng_get(sc); 
170} 126}