 @@ -35,37 +35,51 @@ along with GCC; see the file COPYING3.
 #define PTRDIFF_TYPE "long int"
 /* Profiling routine.  */
 #undef VAX_FUNCTION_PROFILER_NAME
 #define VAX_FUNCTION_PROFILER_NAME "__mcount"
 /*  Let's be re-entrant.  */
 #undef PCC_STATIC_STRUCT_RETURN
 /* Before the prologue, the top of the frame is below the argument
    count pushed by the CALLS and before the start of the saved registers.  */
 #define INCOMING_FRAME_SP_OFFSET 0
-/* We use R2-R3 (call-clobbered) registers for exceptions.  */
+/* Offset from the frame pointer register value to the top of the stack.  */
-#define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? (N) + 2 : INVALID_REGNUM)
+#define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
 /* We use R2-R5 (call-clobbered) registers for exceptions.  */
 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 2 : INVALID_REGNUM)
 /* Place the top of the stack for the DWARF2 EH stackadj value.  */
 #define EH_RETURN_STACKADJ_RTX						\
   gen_rtx_MEM (SImode,							\
 	       plus_constant (Pmode,					\
 			      gen_rtx_REG (Pmode, FRAME_POINTER_REGNUM),\
 			      -4))
 /* Simple store the return handler into the call frame.  */
 #define EH_RETURN_HANDLER_RTX						\
   gen_rtx_MEM (Pmode,							\
 	       plus_constant (Pmode,					\
 			      gen_rtx_REG (Pmode, FRAME_POINTER_REGNUM),\
 ))
 /* Reserve the top of the stack for exception handler stackadj value.  */
 #undef STARTING_FRAME_OFFSET
 #define STARTING_FRAME_OFFSET -4
 /* The VAX wants no space between the case instruction and the jump table.  */
 #undef  ASM_OUTPUT_BEFORE_CASE_LABEL
 #define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE, PREFIX, NUM, TABLE)
 #undef SUBTARGET_OVERRIDE_OPTIONS
 #define SUBTARGET_OVERRIDE_OPTIONS			\
   do							\
     {							\
       /* Turn off function CSE if we're doing PIC.  */	\
       if (flag_pic)					\
 	flag_no_function_cse = 1;			\
     }							\
   while (0)

 @@ -159,32 +159,32 @@ along with GCC; see the file COPYING3.
 /* VAX PSW for DWARF-2 */
 #define PSW_REGNUM VAX_PSW_REGNUM
 /* VAX pc is overloaded on a register.  */
 #define PC_REGNUM VAX_PC_REGNUM
 /* Register to use for pushing function arguments.  */
 #define STACK_POINTER_REGNUM VAX_SP_REGNUM
 /* Base register for access to local variables of the function.  */
 #define FRAME_POINTER_REGNUM VAX_FP_REGNUM
 /* Offset from the frame pointer register value to the top of stack.  */
 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
 /* Base register for access to arguments of the function.  */
 #define ARG_POINTER_REGNUM VAX_AP_REGNUM
 /* Offset from the argument pointer register value to the CFA.  */
 #define ARG_POINTER_CFA_OFFSET(FNDECL) 0
 /* Register in which static-chain is passed to a function.  */
 #define STATIC_CHAIN_REGNUM 0
 /* Register in which address to store a structure value
    is passed to a function.  */
 #define VAX_STRUCT_VALUE_REGNUM 1
 /* Define the classes of registers for register constraints in the
    machine description.  Also define ranges of constants.
    One of the classes must always be named ALL_REGS and include all hard regs.
    If there is more than one class, another class must be named NO_REGS
    and contain no registers.

 @@ -8,31 +8,26 @@
 ;; the Free Software Foundation; either version 3, or (at your option)
 ;; any later version.
 ;; GCC is distributed in the hope that it will be useful,
 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ;; GNU General Public License for more details.
 ;; You should have received a copy of the GNU General Public License
 ;; along with GCC; see the file COPYING3.  If not see
 ;; <http://www.gnu.org/licenses/>.
 ;; Note that operand 1 is total size of args, in bytes,
 ;; and what the call insn wants is the number of words.
 ;; It is used in the call instruction as a byte, but in the addl2 as
 ;; a word.  Since the only time we actually use it in the call instruction
 ;; is when it is a constant, SImode (for addl2) is the proper mode.
 ;;- Instruction patterns.  When multiple patterns apply,
 ;;- the first one in the file is chosen.
 ;;-
 ;;- See file "rtl.def" for documentation on define_insn, match_*, et al.
 ;;-
 ;;- cpp macro #define NOTICE_UPDATE_CC in file tm.h handles condition code
 ;;- updates for most instructions.
 ;; UNSPEC_VOLATILE usage:
 (define_c_enum "unspecv" [
   VUNSPEC_BLOCKAGE 	    ; 'blockage' insn to prevent scheduling across an
 			    ; insn in the code.
 @@ -1304,85 +1299,118 @@
 (define_insn ""
   [(set (pc)
 	(if_then_else
 	 (ne (match_operand:SI 0 "nonimmediate_operand" "+g")
 	     (const_int 0))
 	 (label_ref (match_operand 1 "" ""))
 	 (pc)))
    (set (match_dup 0)
 	(plus:SI (match_dup 0)
 		 (const_int -1)))]
   ""
   "decl %0\;jgequ %l1")
 ;; Note that operand 1 is total size of args, in bytes,
 ;; and what the call insn wants is the number of words.
 ;; It is used in the call instruction as a byte, but in the addl2 as
 ;; a word.  Since the only time we actually use it in the call instruction
 ;; is when it is a constant, SImode (for addl2) is the proper mode.
 (define_expand "call_pop"
   [(parallel [(call (match_operand:QI 0 "memory_operand" "")
 		    (match_operand:SI 1 "const_int_operand" ""))
 	      (set (reg:SI VAX_SP_REGNUM)
 		   (plus:SI (reg:SI VAX_SP_REGNUM)
 			    (match_operand:SI 3 "immediate_operand" "")))])]
   ""
+{
-  gcc_assert (INTVAL (operands[1]) <= 255 * 4);
+  gcc_assert (INTVAL (operands[3]) <= 255 * 4 && INTVAL (operands[3]) % 4 == 0);
   operands[1] = GEN_INT ((INTVAL (operands[1]) + 3) / 4);
   /* Operand 1 is the number of bytes to be popped by DW_CFA_GNU_args_size
      during EH unwinding.  We must include the argument count pushed by
      the calls instruction.  */
   operands[1] = GEN_INT (INTVAL (operands[3]) + 4);
 })
 (define_insn "*call_pop"
   [(call (match_operand:QI 0 "memory_operand" "m")
 	 (match_operand:SI 1 "const_int_operand" "n"))
    (set (reg:SI VAX_SP_REGNUM) (plus:SI (reg:SI VAX_SP_REGNUM)
-			     (match_operand:SI 2 "immediate_operand" "i")))]
+					(match_operand:SI 2 "immediate_operand" "i")))]
   ""
   "calls %1,%0")
   operands[1] = GEN_INT ((INTVAL (operands[1]) - 4) / 4);
   return "calls %1,%0";
 })
 (define_expand "call_value_pop"
   [(parallel [(set (match_operand 0 "" "")
 		   (call (match_operand:QI 1 "memory_operand" "")
 			 (match_operand:SI 2 "const_int_operand" "")))
 	      (set (reg:SI VAX_SP_REGNUM)
 		   (plus:SI (reg:SI VAX_SP_REGNUM)
 			    (match_operand:SI 4 "immediate_operand" "")))])]
   ""
+{
-  gcc_assert (INTVAL (operands[2]) <= 255 * 4);
+  gcc_assert (INTVAL (operands[4]) <= 255 * 4 && INTVAL (operands[4]) % 4 == 0);
   operands[2] = GEN_INT ((INTVAL (operands[2]) + 3) / 4);
   /* Operand 2 is the number of bytes to be popped by DW_CFA_GNU_args_size
      during EH unwinding.  We must include the argument count pushed by
      the calls instruction.  */
   operands[2] = GEN_INT (INTVAL (operands[4]) + 4);
 })
 (define_insn "*call_value_pop"
   [(set (match_operand 0 "" "")
 	(call (match_operand:QI 1 "memory_operand" "m")
 	      (match_operand:SI 2 "const_int_operand" "n")))
    (set (reg:SI VAX_SP_REGNUM) (plus:SI (reg:SI VAX_SP_REGNUM)
 					(match_operand:SI 3 "immediate_operand" "i")))]
   ""
-  "calls %2,%1")
+  "*
+{
   operands[2] = GEN_INT ((INTVAL (operands[2]) - 4) / 4);
   return \"calls %2,%1\";
 }")
-;; Define another set of these for the case of functions with no operands.
+(define_expand "call"
-;; These will allow the optimizers to do a slightly better job.
+  [(call (match_operand:QI 0 "memory_operand" "")
-(define_insn "call"
+      (match_operand:SI 1 "const_int_operand" ""))]
-  [(call (match_operand:QI 0 "memory_operand" "m")
+  ""
 	 (const_int 0))]
+{
   /* Operand 1 is the number of bytes to be popped by DW_CFA_GNU_args_size
      during EH unwinding.  We must include the argument count pushed by
      the calls instruction.  */
   operands[1] = GEN_INT (INTVAL (operands[1]) + 4);
 }")
 (define_insn "*call"
    [(call (match_operand:QI 0 "memory_operand" "m")
 	  (match_operand:SI 1 "const_int_operand" ""))]
   ""
   "calls $0,%0")
-(define_insn "call_value"
+(define_expand "call_value"
   [(set (match_operand 0 "" "")
       (call (match_operand:QI 1 "memory_operand" "")
 	    (match_operand:SI 2 "const_int_operand" "")))]
   ""
+  "
+{
   /* Operand 2 is the number of bytes to be popped by DW_CFA_GNU_args_size
      during EH unwinding.  We must include the argument count pushed by
      the calls instruction.  */
   operands[2] = GEN_INT (INTVAL (operands[2]) + 4);
 }")
 (define_insn "*call_value"
   [(set (match_operand 0 "" "")
 	(call (match_operand:QI 1 "memory_operand" "m")
-	      (const_int 0)))]
+	      (match_operand:SI 2 "const_int_operand" "")))]
   ""
   "calls $0,%1")
 ;; Call subroutine returning any type.
 (define_expand "untyped_call"
   [(parallel [(call (match_operand 0 "" "")
 	      (const_int 0))
 	      (match_operand 1 "" "")
 	      (match_operand 2 "" "")])]
   ""
+  "
+{

 @@ -2278,28 +2278,27 @@ expand_eh_return (void)
   clobber_return_register ();
 #ifdef EH_RETURN_STACKADJ_RTX
   emit_move_insn (EH_RETURN_STACKADJ_RTX, crtl->eh.ehr_stackadj);
 #endif
 #ifdef HAVE_eh_return
   if (HAVE_eh_return)
     emit_insn (gen_eh_return (crtl->eh.ehr_handler));
   else
 #endif
+    {
 #ifdef EH_RETURN_HANDLER_RTX
-      rtx insn = emit_move_insn (EH_RETURN_HANDLER_RTX, crtl->eh.ehr_handler);
+      emit_move_insn (EH_RETURN_HANDLER_RTX, crtl->eh.ehr_handler);
       RTX_FRAME_RELATED_P (insn) = 1;
 #else
       error ("__builtin_eh_return not supported on this target");
 #endif
+    }
   emit_label (around_label);
+}
 /* Convert a ptr_mode address ADDR_TREE to a Pmode address controlled by
    POINTERS_EXTEND_UNSIGNED and return it.  */
 rtx
 expand_builtin_extend_pointer (tree addr_tree)

 @@ -185,28 +185,27 @@ vax_add_reg_cfa_offset (rtx insn, int of
    used in the function.  This function is responsible for knowing
    which registers should not be saved even if used.  */
 void
 vax_expand_prologue (void)
+{
   int regno, offset;
   int mask = 0;
   HOST_WIDE_INT size;
   rtx insn;
   offset = 20;
   for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
-    if ((df_regs_ever_live_p (regno) && !call_used_regs[regno])
+    if (df_regs_ever_live_p (regno) && !call_used_regs[regno])
 	|| (crtl->calls_eh_return && regno >= 2 && regno < 4))
+      {
         mask |= 1 << regno;
         offset += 4;
+      }
   insn = emit_insn (gen_procedure_entry_mask (GEN_INT (mask)));
   RTX_FRAME_RELATED_P (insn) = 1;
   /* The layout of the CALLG/S stack frame is follows:
 		<- CFA, AP
 	r11
 	r10