Sat Apr 2 08:16:54 2016 UTC ()
appease compiler. Fixes options MODULAR build.


(mlelstv)
diff -r1.245 -r1.246 src/sys/arch/amiga/amiga/machdep.c

cvs diff -r1.245 -r1.246 src/sys/arch/amiga/amiga/machdep.c (switch to unified diff)

--- src/sys/arch/amiga/amiga/machdep.c 2015/06/13 07:35:50 1.245
+++ src/sys/arch/amiga/amiga/machdep.c 2016/04/02 08:16:54 1.246
@@ -1,1251 +1,1251 @@ @@ -1,1251 +1,1251 @@
1/* $NetBSD: machdep.c,v 1.245 2015/06/13 07:35:50 mlelstv Exp $ */ 1/* $NetBSD: machdep.c,v 1.246 2016/04/02 08:16:54 mlelstv Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1988 University of Utah. 4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1982, 1986, 1990 The Regents of the University of California. 5 * Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
6 * All rights reserved. 6 * All rights reserved.
7 * 7 *
8 * This code is derived from software contributed to Berkeley by 8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer 9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department. 10 * Science Department.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions 13 * modification, are permitted provided that the following conditions
14 * are met: 14 * are met:
15 * 1. Redistributions of source code must retain the above copyright 15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer. 16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright 17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the 18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution. 19 * documentation and/or other materials provided with the distribution.
20 * 3. Neither the name of the University nor the names of its contributors 20 * 3. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software 21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission. 22 * without specific prior written permission.
23 * 23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE. 34 * SUCH DAMAGE.
35 * 35 *
36 * from: Utah $Hdr: machdep.c 1.63 91/04/24$ 36 * from: Utah $Hdr: machdep.c 1.63 91/04/24$
37 * 37 *
38 * @(#)machdep.c 7.16 (Berkeley) 6/3/91 38 * @(#)machdep.c 7.16 (Berkeley) 6/3/91
39 */ 39 */
40 40
41#include "opt_ddb.h" 41#include "opt_ddb.h"
42#include "opt_compat_netbsd.h" 42#include "opt_compat_netbsd.h"
43#include "opt_fpu_emulate.h" 43#include "opt_fpu_emulate.h"
44#include "opt_lev6_defer.h" 44#include "opt_lev6_defer.h"
45#include "opt_m060sp.h" 45#include "opt_m060sp.h"
46#include "opt_modular.h" 46#include "opt_modular.h"
47#include "opt_panicbutton.h" 47#include "opt_panicbutton.h"
48#include "opt_m68k_arch.h" 48#include "opt_m68k_arch.h"
49 49
50#include "empm.h" 50#include "empm.h"
51 51
52#include <sys/cdefs.h> 52#include <sys/cdefs.h>
53__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.245 2015/06/13 07:35:50 mlelstv Exp $"); 53__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.246 2016/04/02 08:16:54 mlelstv Exp $");
54 54
55#include <sys/param.h> 55#include <sys/param.h>
56#include <sys/systm.h> 56#include <sys/systm.h>
57#include <sys/callout.h> 57#include <sys/callout.h>
58#include <sys/signalvar.h> 58#include <sys/signalvar.h>
59#include <sys/kernel.h> 59#include <sys/kernel.h>
60#include <sys/proc.h> 60#include <sys/proc.h>
61#include <sys/buf.h> 61#include <sys/buf.h>
62#include <sys/reboot.h> 62#include <sys/reboot.h>
63#include <sys/conf.h> 63#include <sys/conf.h>
64#include <sys/file.h> 64#include <sys/file.h>
65#include <sys/malloc.h> 65#include <sys/malloc.h>
66#include <sys/mbuf.h> 66#include <sys/mbuf.h>
67#include <sys/msgbuf.h> 67#include <sys/msgbuf.h>
68#include <sys/vnode.h> 68#include <sys/vnode.h>
69#include <sys/device.h> 69#include <sys/device.h>
70#include <sys/queue.h> 70#include <sys/queue.h>
71#include <sys/mount.h> 71#include <sys/mount.h>
72#include <sys/core.h> 72#include <sys/core.h>
73#include <sys/kcore.h> 73#include <sys/kcore.h>
74#include <sys/ksyms.h> 74#include <sys/ksyms.h>
75#include <sys/module.h> 75#include <sys/module.h>
76#include <sys/cpu.h> 76#include <sys/cpu.h>
77#include <sys/exec.h> 77#include <sys/exec.h>
78 78
79#if defined(DDB) && defined(__ELF__) 79#if defined(DDB) && defined(__ELF__)
80#include <sys/exec_elf.h> 80#include <sys/exec_elf.h>
81#endif 81#endif
82 82
83#include <sys/exec_aout.h> 83#include <sys/exec_aout.h>
84 84
85#undef PS /* XXX netccitt/pk.h conflict with machine/reg.h? */ 85#undef PS /* XXX netccitt/pk.h conflict with machine/reg.h? */
86 86
87#define MAXMEM 64*1024 /* XXX - from cmap.h */ 87#define MAXMEM 64*1024 /* XXX - from cmap.h */
88#include <uvm/uvm_extern.h> 88#include <uvm/uvm_extern.h>
89 89
90#include <sys/sysctl.h> 90#include <sys/sysctl.h>
91 91
92#include <machine/db_machdep.h> 92#include <machine/db_machdep.h>
93#include <ddb/db_sym.h> 93#include <ddb/db_sym.h>
94#include <ddb/db_extern.h> 94#include <ddb/db_extern.h>
95 95
96#include <machine/reg.h> 96#include <machine/reg.h>
97#include <machine/pcb.h> 97#include <machine/pcb.h>
98#include <machine/psl.h> 98#include <machine/psl.h>
99#include <machine/pte.h> 99#include <machine/pte.h>
100#include <machine/kcore.h> 100#include <machine/kcore.h>
101#include <dev/cons.h> 101#include <dev/cons.h>
102#include <dev/mm.h> 102#include <dev/mm.h>
103#include <amiga/amiga/isr.h> 103#include <amiga/amiga/isr.h>
104#include <amiga/amiga/custom.h> 104#include <amiga/amiga/custom.h>
105#ifdef DRACO 105#ifdef DRACO
106#include <amiga/amiga/drcustom.h> 106#include <amiga/amiga/drcustom.h>
107#include <m68k/include/asm_single.h> 107#include <m68k/include/asm_single.h>
108#endif 108#endif
109#include <amiga/amiga/cia.h> 109#include <amiga/amiga/cia.h>
110#include <amiga/amiga/cc.h> 110#include <amiga/amiga/cc.h>
111#include <amiga/amiga/memlist.h> 111#include <amiga/amiga/memlist.h>
112#include <amiga/amiga/device.h> 112#include <amiga/amiga/device.h>
113#if NEMPM > 0 113#if NEMPM > 0
114#include <amiga/pci/empmvar.h> 114#include <amiga/pci/empmvar.h>
115#endif /* NEMPM > 0 */ 115#endif /* NEMPM > 0 */
116 116
117#include "fd.h" 117#include "fd.h"
118#include "ser.h" 118#include "ser.h"
119#include "ksyms.h" 119#include "ksyms.h"
120 120
121/* prototypes */ 121/* prototypes */
122void identifycpu(void); 122void identifycpu(void);
123vm_offset_t reserve_dumppages(vm_offset_t); 123vm_offset_t reserve_dumppages(vm_offset_t);
124void dumpsys(void); 124void dumpsys(void);
125void initcpu(void); 125void initcpu(void);
126void straytrap(int, u_short); 126void straytrap(int, u_short);
127void intrhand(int); 127void intrhand(int);
128#if NSER > 0 128#if NSER > 0
129void ser_outintr(void); 129void ser_outintr(void);
130#endif 130#endif
131#if NFD > 0 131#if NFD > 0
132void fdintr(int); 132void fdintr(int);
133#endif 133#endif
134 134
135volatile unsigned int interrupt_depth = 0; 135volatile unsigned int interrupt_depth = 0;
136 136
137struct vm_map *phys_map = NULL; 137struct vm_map *phys_map = NULL;
138 138
139void * msgbufaddr; 139void * msgbufaddr;
140paddr_t msgbufpa; 140paddr_t msgbufpa;
141 141
142int machineid; 142int machineid;
143int maxmem; /* max memory per process */ 143int maxmem; /* max memory per process */
144extern int physmem; /* max supported memory, changes to actual */ 144extern int physmem; /* max supported memory, changes to actual */
145 145
146extern int freebufspace; 146extern int freebufspace;
147extern u_int lowram; 147extern u_int lowram;
148 148
149/* used in init_main.c */ 149/* used in init_main.c */
150const char *cpu_type = "m68k"; 150const char *cpu_type = "m68k";
151/* the following is used externally (sysctl_hw) */ 151/* the following is used externally (sysctl_hw) */
152char machine[] = MACHINE; /* from <machine/param.h> */ 152char machine[] = MACHINE; /* from <machine/param.h> */
153 153
154/* Our exported CPU info; we can have only one. */ 154/* Our exported CPU info; we can have only one. */
155struct cpu_info cpu_info_store; 155struct cpu_info cpu_info_store;
156 156
157/* 157/*
158 * current open serial device speed; used by some SCSI drivers to reduce 158 * current open serial device speed; used by some SCSI drivers to reduce
159 * DMA transfer lengths. 159 * DMA transfer lengths.
160 */ 160 */
161int ser_open_speed; 161int ser_open_speed;
162 162
163#ifdef DRACO 163#ifdef DRACO
164vaddr_t DRCCADDR; 164vaddr_t DRCCADDR;
165 165
166volatile u_int8_t *draco_intena, *draco_intpen, *draco_intfrc; 166volatile u_int8_t *draco_intena, *draco_intpen, *draco_intfrc;
167volatile u_int8_t *draco_misc; 167volatile u_int8_t *draco_misc;
168volatile struct drioct *draco_ioct; 168volatile struct drioct *draco_ioct;
169#endif 169#endif
170 170
171 /* 171 /*
172 * Console initialization: called early on from main, 172 * Console initialization: called early on from main,
173 * before vm init or startup. Do enough configuration 173 * before vm init or startup. Do enough configuration
174 * to choose and initialize a console. 174 * to choose and initialize a console.
175 */ 175 */
176void 176void
177consinit(void) 177consinit(void)
178{ 178{
179 /* initialize custom chip interface */ 179 /* initialize custom chip interface */
180#ifdef DRACO 180#ifdef DRACO
181 if (is_draco()) { 181 if (is_draco()) {
182 /* XXX to be done */ 182 /* XXX to be done */
183 } else 183 } else
184#endif 184#endif
185 custom_chips_init(); 185 custom_chips_init();
186 186
187 /* preconfigure graphics cards */ 187 /* preconfigure graphics cards */
188 config_console(); 188 config_console();
189 189
190 /* 190 /*
191 * Initialize the console before we print anything out. 191 * Initialize the console before we print anything out.
192 */ 192 */
193 cninit(); 193 cninit();
194 194
195#if NKSYMS || defined(DDB) || defined(MODULAR) 195#if NKSYMS || defined(DDB) || defined(MODULAR)
196 { 196 {
197 extern int end[]; 197 extern int end[];
198 extern int *esym; 198 extern int *esym;
199 199
200 ksyms_addsyms_elf((int)esym - (int)&end - sizeof(Elf32_Ehdr), 200 ksyms_addsyms_elf((int)esym - (int)&end - sizeof(Elf32_Ehdr),
201 (void *)&end, esym); 201 (void *)&end, esym);
202 } 202 }
203#endif 203#endif
204#ifdef DDB 204#ifdef DDB
205 if (boothowto & RB_KDB) 205 if (boothowto & RB_KDB)
206 Debugger(); 206 Debugger();
207#endif 207#endif
208} 208}
209 209
210/* 210/*
211 * cpu_startup: allocate memory for variable-sized tables, 211 * cpu_startup: allocate memory for variable-sized tables,
212 * initialize CPU, and do autoconfiguration. 212 * initialize CPU, and do autoconfiguration.
213 */ 213 */
214void 214void
215cpu_startup(void) 215cpu_startup(void)
216{ 216{
217 u_int i; 217 u_int i;
218#ifdef DEBUG 218#ifdef DEBUG
219 extern int pmapdebug; 219 extern int pmapdebug;
220 int opmapdebug = pmapdebug; 220 int opmapdebug = pmapdebug;
221#endif 221#endif
222 vaddr_t minaddr, maxaddr; 222 vaddr_t minaddr, maxaddr;
223 223
224 /* 224 /*
225 * Initialize error message buffer (at end of core). 225 * Initialize error message buffer (at end of core).
226 */ 226 */
227#ifdef DEBUG 227#ifdef DEBUG
228 pmapdebug = 0; 228 pmapdebug = 0;
229#endif 229#endif
230 /* 230 /*
231 * pmap_bootstrap has positioned this at the end of kernel 231 * pmap_bootstrap has positioned this at the end of kernel
232 * memory segment - map and initialize it now. 232 * memory segment - map and initialize it now.
233 */ 233 */
234 234
235 for (i = 0; i < btoc(MSGBUFSIZE); i++) 235 for (i = 0; i < btoc(MSGBUFSIZE); i++)
236 pmap_enter(pmap_kernel(), (vaddr_t)msgbufaddr + i * PAGE_SIZE, 236 pmap_enter(pmap_kernel(), (vaddr_t)msgbufaddr + i * PAGE_SIZE,
237 msgbufpa + i * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, 237 msgbufpa + i * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE,
238 VM_PROT_READ|VM_PROT_WRITE|PMAP_WIRED); 238 VM_PROT_READ|VM_PROT_WRITE|PMAP_WIRED);
239 pmap_update(pmap_kernel()); 239 pmap_update(pmap_kernel());
240 initmsgbuf(msgbufaddr, m68k_round_page(MSGBUFSIZE)); 240 initmsgbuf(msgbufaddr, m68k_round_page(MSGBUFSIZE));
241 241
242 minaddr = 0; 242 minaddr = 0;
243 243
244 /* 244 /*
245 * Allocate a submap for physio 245 * Allocate a submap for physio
246 */ 246 */
247 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 247 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
248 VM_PHYS_SIZE, 0, false, NULL); 248 VM_PHYS_SIZE, 0, false, NULL);
249 249
250 /* 250 /*
251 * Good {morning,afternoon,evening,night}. 251 * Good {morning,afternoon,evening,night}.
252 */ 252 */
253 banner(); 253 banner();
254 254
255 /* 255 /*
256 * Get MMU/FPU type from bootstrap 256 * Get MMU/FPU type from bootstrap
257 */ 257 */
258 identifycpu(); 258 identifycpu();
259 259
260#ifdef DEBUG 260#ifdef DEBUG
261 pmapdebug = opmapdebug; 261 pmapdebug = opmapdebug;
262#endif 262#endif
263 263
264 /* 264 /*
265 * display memory configuration passed from loadbsd 265 * display memory configuration passed from loadbsd
266 */ 266 */
267 if (memlist->m_nseg > 0 && memlist->m_nseg < 16) 267 if (memlist->m_nseg > 0 && memlist->m_nseg < 16)
268 for (i = 0; i < memlist->m_nseg; i++) 268 for (i = 0; i < memlist->m_nseg; i++)
269 printf("memory segment %d at %08x size %08x\n", i, 269 printf("memory segment %d at %08x size %08x\n", i,
270 memlist->m_seg[i].ms_start, 270 memlist->m_seg[i].ms_start,
271 memlist->m_seg[i].ms_size); 271 memlist->m_seg[i].ms_size);
272 272
273#ifdef DEBUG_KERNEL_START 273#ifdef DEBUG_KERNEL_START
274 printf("calling initcpu...\n"); 274 printf("calling initcpu...\n");
275#endif 275#endif
276 /* 276 /*
277 * Set up CPU-specific registers, cache, etc. 277 * Set up CPU-specific registers, cache, etc.
278 */ 278 */
279 initcpu(); 279 initcpu();
280 280
281#ifdef DEBUG_KERNEL_START 281#ifdef DEBUG_KERNEL_START
282 printf("survived initcpu...\n"); 282 printf("survived initcpu...\n");
283#endif 283#endif
284} 284}
285 285
286/* 286/*
287 * Info for CTL_HW 287 * Info for CTL_HW
288 */ 288 */
289#if defined(M68060) 289#if defined(M68060)
290int m68060_pcr_init = 0x21; /* make this patchable */ 290int m68060_pcr_init = 0x21; /* make this patchable */
291#endif 291#endif
292 292
293 293
294void 294void
295identifycpu(void) 295identifycpu(void)
296{ 296{
297 /* there's alot of XXX in here... */ 297 /* there's alot of XXX in here... */
298 const char *mach, *mmu, *fpu; 298 const char *mach, *mmu, *fpu;
299 299
300#ifdef M68060 300#ifdef M68060
301 char cpubuf[16]; 301 char cpubuf[16];
302 u_int32_t pcr; 302 u_int32_t pcr;
303#endif 303#endif
304 304
305#ifdef DRACO 305#ifdef DRACO
306 char machbuf[16]; 306 char machbuf[16];
307 307
308 if (is_draco()) { 308 if (is_draco()) {
309 snprintf(machbuf, sizeof(machbuf), "DraCo rev.%d", is_draco()); 309 snprintf(machbuf, sizeof(machbuf), "DraCo rev.%d", is_draco());
310 mach = machbuf; 310 mach = machbuf;
311 } else 311 } else
312#endif 312#endif
313 if (is_a4000()) 313 if (is_a4000())
314 mach = "Amiga 4000"; 314 mach = "Amiga 4000";
315 else if (is_a3000()) 315 else if (is_a3000())
316 mach = "Amiga 3000"; 316 mach = "Amiga 3000";
317 else if (is_a1200()) 317 else if (is_a1200())
318 mach = "Amiga 1200"; 318 mach = "Amiga 1200";
319 else if (is_a600()) 319 else if (is_a600())
320 mach = "Amiga 600"; 320 mach = "Amiga 600";
321 else 321 else
322 mach = "Amiga 500/2000"; 322 mach = "Amiga 500/2000";
323 323
324 fpu = NULL; 324 fpu = NULL;
325#ifdef M68060 325#ifdef M68060
326 if (machineid & AMIGA_68060) { 326 if (machineid & AMIGA_68060) {
327 __asm(".word 0x4e7a,0x0808; movl %%d0,%0" : "=d"(pcr) : : "d0"); 327 __asm(".word 0x4e7a,0x0808; movl %%d0,%0" : "=d"(pcr) : : "d0");
328 snprintf(cpubuf, sizeof(cpubuf), "68%s060 rev.%d", 328 snprintf(cpubuf, sizeof(cpubuf), "68%s060 rev.%d",
329 pcr & 0x10000 ? "LC/EC" : "", (pcr>>8)&0xff); 329 pcr & 0x10000 ? "LC/EC" : "", (pcr>>8)&0xff);
330 cpu_type = cpubuf; 330 cpu_type = cpubuf;
331 mmu = "/MMU"; 331 mmu = "/MMU";
332 if (pcr & 2) { 332 if (pcr & 2) {
333 fpu = "/FPU disabled"; 333 fpu = "/FPU disabled";
334 fputype = FPU_NONE; 334 fputype = FPU_NONE;
335 } else if (m68060_pcr_init & 2){ 335 } else if (m68060_pcr_init & 2){
336 fpu = "/FPU will be disabled"; 336 fpu = "/FPU will be disabled";
337 fputype = FPU_NONE; 337 fputype = FPU_NONE;
338 } else if (machineid & AMIGA_FPU40) { 338 } else if (machineid & AMIGA_FPU40) {
339 fpu = "/FPU"; 339 fpu = "/FPU";
340 fputype = FPU_68040; /* XXX */ 340 fputype = FPU_68040; /* XXX */
341 } 341 }
342 } else 342 } else
343#endif 343#endif
344 if (machineid & AMIGA_68040) { 344 if (machineid & AMIGA_68040) {
345 cpu_type = "m68040"; 345 cpu_type = "m68040";
346 mmu = "/MMU"; 346 mmu = "/MMU";
347 fpu = "/FPU"; 347 fpu = "/FPU";
348 fputype = FPU_68040; /* XXX */ 348 fputype = FPU_68040; /* XXX */
349 } else if (machineid & AMIGA_68030) { 349 } else if (machineid & AMIGA_68030) {
350 cpu_type = "m68030"; /* XXX */ 350 cpu_type = "m68030"; /* XXX */
351 mmu = "/MMU"; 351 mmu = "/MMU";
352 } else { 352 } else {
353 cpu_type = "m68020"; 353 cpu_type = "m68020";
354 mmu = " m68851 MMU"; 354 mmu = " m68851 MMU";
355 } 355 }
356 if (fpu == NULL) { 356 if (fpu == NULL) {
357 if (machineid & AMIGA_68882) { 357 if (machineid & AMIGA_68882) {
358 fpu = " m68882 FPU"; 358 fpu = " m68882 FPU";
359 fputype = FPU_68882; 359 fputype = FPU_68882;
360 } else if (machineid & AMIGA_68881) { 360 } else if (machineid & AMIGA_68881) {
361 fpu = " m68881 FPU"; 361 fpu = " m68881 FPU";
362 fputype = FPU_68881; 362 fputype = FPU_68881;
363 } else { 363 } else {
364 fpu = " no FPU"; 364 fpu = " no FPU";
365 fputype = FPU_NONE; 365 fputype = FPU_NONE;
366 } 366 }
367 } 367 }
368 cpu_setmodel("%s (%s CPU%s%s)", mach, cpu_type, mmu, fpu); 368 cpu_setmodel("%s (%s CPU%s%s)", mach, cpu_type, mmu, fpu);
369 printf("%s\n", cpu_getmodel()); 369 printf("%s\n", cpu_getmodel());
370} 370}
371 371
372/* 372/*
373 * machine dependent system variables. 373 * machine dependent system variables.
374 */ 374 */
375SYSCTL_SETUP(sysctl_machdep_setup, "sysctl machdep subtree setup") 375SYSCTL_SETUP(sysctl_machdep_setup, "sysctl machdep subtree setup")
376{ 376{
377 377
378 sysctl_createv(clog, 0, NULL, NULL, 378 sysctl_createv(clog, 0, NULL, NULL,
379 CTLFLAG_PERMANENT, 379 CTLFLAG_PERMANENT,
380 CTLTYPE_NODE, "machdep", NULL, 380 CTLTYPE_NODE, "machdep", NULL,
381 NULL, 0, NULL, 0, 381 NULL, 0, NULL, 0,
382 CTL_MACHDEP, CTL_EOL); 382 CTL_MACHDEP, CTL_EOL);
383 383
384 sysctl_createv(clog, 0, NULL, NULL, 384 sysctl_createv(clog, 0, NULL, NULL,
385 CTLFLAG_PERMANENT, 385 CTLFLAG_PERMANENT,
386 CTLTYPE_STRUCT, "console_device", NULL, 386 CTLTYPE_STRUCT, "console_device", NULL,
387 sysctl_consdev, 0, NULL, sizeof(dev_t), 387 sysctl_consdev, 0, NULL, sizeof(dev_t),
388 CTL_MACHDEP, CPU_CONSDEV, CTL_EOL); 388 CTL_MACHDEP, CPU_CONSDEV, CTL_EOL);
389} 389}
390 390
391static int waittime = -1; 391static int waittime = -1;
392 392
393void 393void
394bootsync(void) 394bootsync(void)
395{ 395{
396 if (waittime < 0) { 396 if (waittime < 0) {
397 waittime = 0; 397 waittime = 0;
398 vfs_shutdown(); 398 vfs_shutdown();
399 /* 399 /*
400 * If we've been adjusting the clock, the todr 400 * If we've been adjusting the clock, the todr
401 * will be out of synch; adjust it now. 401 * will be out of synch; adjust it now.
402 */ 402 */
403 resettodr(); 403 resettodr();
404 } 404 }
405} 405}
406 406
407 407
408void 408void
409cpu_reboot(register int howto, char *bootstr) 409cpu_reboot(register int howto, char *bootstr)
410{ 410{
411 struct pcb *pcb = lwp_getpcb(curlwp); 411 struct pcb *pcb = lwp_getpcb(curlwp);
412#if NEMPM > 0 412#if NEMPM > 0
413 device_t empmdev; 413 device_t empmdev;
414#endif /* NEMPM > 0 */ 414#endif /* NEMPM > 0 */
415 415
416 /* take a snap shot before clobbering any registers */ 416 /* take a snap shot before clobbering any registers */
417 if (pcb != NULL) 417 if (pcb != NULL)
418 savectx(pcb); 418 savectx(pcb);
419 419
420 boothowto = howto; 420 boothowto = howto;
421 if ((howto & RB_NOSYNC) == 0) 421 if ((howto & RB_NOSYNC) == 0)
422 bootsync(); 422 bootsync();
423 423
424 /* Disable interrupts. */ 424 /* Disable interrupts. */
425 spl7(); 425 spl7();
426 426
427 /* If rebooting and a dump is requested do it. */ 427 /* If rebooting and a dump is requested do it. */
428 if (howto & RB_DUMP) 428 if (howto & RB_DUMP)
429 dumpsys(); 429 dumpsys();
430 430
431#if NEMPM > 0 431#if NEMPM > 0
432 if (howto & RB_POWERDOWN) { 432 if (howto & RB_POWERDOWN) {
433 empmdev = device_find_by_xname("empm0"); 433 empmdev = device_find_by_xname("empm0");
434 if (empmdev != NULL) { 434 if (empmdev != NULL) {
435 empm_power_off(device_private(empmdev)); 435 empm_power_off(device_private(empmdev));
436 }  436 }
437 } 437 }
438#endif /* NEMPM > 0 */ 438#endif /* NEMPM > 0 */
439 439
440 if (howto & RB_HALT) { 440 if (howto & RB_HALT) {
441 printf("\n"); 441 printf("\n");
442 printf("The operating system has halted.\n"); 442 printf("The operating system has halted.\n");
443 printf("Please press any key to reboot.\n\n"); 443 printf("Please press any key to reboot.\n\n");
444 cngetc(); 444 cngetc();
445 } 445 }
446 446
447 printf("rebooting...\n"); 447 printf("rebooting...\n");
448 DELAY(1000000); 448 DELAY(1000000);
449 doboot(); 449 doboot();
450 /*NOTREACHED*/ 450 /*NOTREACHED*/
451} 451}
452 452
453 453
454u_int32_t dumpmag = 0x8fca0101; /* magic number for savecore */ 454u_int32_t dumpmag = 0x8fca0101; /* magic number for savecore */
455int dumpsize = 0; /* also for savecore */ 455int dumpsize = 0; /* also for savecore */
456long dumplo = 0; 456long dumplo = 0;
457cpu_kcore_hdr_t cpu_kcore_hdr; 457cpu_kcore_hdr_t cpu_kcore_hdr;
458 458
459#define CHDRSIZE (ALIGN(sizeof(kcore_seg_t)) + ALIGN(sizeof(cpu_kcore_hdr_t))) 459#define CHDRSIZE (ALIGN(sizeof(kcore_seg_t)) + ALIGN(sizeof(cpu_kcore_hdr_t)))
460#define MDHDRSIZE roundup(CHDRSIZE, dbtob(1)) 460#define MDHDRSIZE roundup(CHDRSIZE, dbtob(1))
461 461
462void 462void
463cpu_dumpconf(void) 463cpu_dumpconf(void)
464{ 464{
465 cpu_kcore_hdr_t *h = &cpu_kcore_hdr; 465 cpu_kcore_hdr_t *h = &cpu_kcore_hdr;
466 struct m68k_kcore_hdr *m = &h->un._m68k; 466 struct m68k_kcore_hdr *m = &h->un._m68k;
467 int nblks; 467 int nblks;
468 int i; 468 int i;
469 extern int end[]; 469 extern int end[];
470 470
471 memset(&cpu_kcore_hdr, 0, sizeof(cpu_kcore_hdr)); 471 memset(&cpu_kcore_hdr, 0, sizeof(cpu_kcore_hdr));
472 472
473 /* 473 /*
474 * Intitialize the `dispatcher' portion of the header. 474 * Intitialize the `dispatcher' portion of the header.
475 */ 475 */
476 strcpy(h->name, machine); 476 strcpy(h->name, machine);
477 h->page_size = PAGE_SIZE; 477 h->page_size = PAGE_SIZE;
478 h->kernbase = KERNBASE; 478 h->kernbase = KERNBASE;
479 479
480 /* 480 /*
481 * Fill in information about our MMU configuration. 481 * Fill in information about our MMU configuration.
482 */ 482 */
483 m->mmutype = mmutype; 483 m->mmutype = mmutype;
484 m->sg_v = SG_V; 484 m->sg_v = SG_V;
485 m->sg_frame = SG_FRAME; 485 m->sg_frame = SG_FRAME;
486 m->sg_ishift = SG_ISHIFT; 486 m->sg_ishift = SG_ISHIFT;
487 m->sg_pmask = SG_PMASK; 487 m->sg_pmask = SG_PMASK;
488 m->sg40_shift1 = SG4_SHIFT1; 488 m->sg40_shift1 = SG4_SHIFT1;
489 m->sg40_mask2 = SG4_MASK2; 489 m->sg40_mask2 = SG4_MASK2;
490 m->sg40_shift2 = SG4_SHIFT2; 490 m->sg40_shift2 = SG4_SHIFT2;
491 m->sg40_mask3 = SG4_MASK3; 491 m->sg40_mask3 = SG4_MASK3;
492 m->sg40_shift3 = SG4_SHIFT3; 492 m->sg40_shift3 = SG4_SHIFT3;
493 m->sg40_addr1 = SG4_ADDR1; 493 m->sg40_addr1 = SG4_ADDR1;
494 m->sg40_addr2 = SG4_ADDR2; 494 m->sg40_addr2 = SG4_ADDR2;
495 m->pg_v = PG_V; 495 m->pg_v = PG_V;
496 m->pg_frame = PG_FRAME; 496 m->pg_frame = PG_FRAME;
497 497
498 /* 498 /*
499 * Initialize the pointer to the kernel segment table. 499 * Initialize the pointer to the kernel segment table.
500 */ 500 */
501 m->sysseg_pa = (paddr_t)pmap_kernel()->pm_stpa; 501 m->sysseg_pa = (paddr_t)pmap_kernel()->pm_stpa;
502 502
503 /* 503 /*
504 * Initialize relocation value such that: 504 * Initialize relocation value such that:
505 * 505 *
506 * pa = (va - KERNBASE) + reloc 506 * pa = (va - KERNBASE) + reloc
507 */ 507 */
508 m->reloc = lowram; 508 m->reloc = lowram;
509 509
510 /* 510 /*
511 * Define the end of the relocatable range. 511 * Define the end of the relocatable range.
512 */ 512 */
513 m->relocend = (u_int32_t)&end; 513 m->relocend = (u_int32_t)&end;
514 514
515 /* XXX new corefile format, single segment + chipmem */ 515 /* XXX new corefile format, single segment + chipmem */
516 dumpsize = physmem; 516 dumpsize = physmem;
517 m->ram_segs[0].start = lowram; 517 m->ram_segs[0].start = lowram;
518 m->ram_segs[0].size = ctob(physmem); 518 m->ram_segs[0].size = ctob(physmem);
519 for (i = 0; i < memlist->m_nseg; i++) { 519 for (i = 0; i < memlist->m_nseg; i++) {
520 if ((memlist->m_seg[i].ms_attrib & MEMF_CHIP) == 0) 520 if ((memlist->m_seg[i].ms_attrib & MEMF_CHIP) == 0)
521 continue; 521 continue;
522 dumpsize += btoc(memlist->m_seg[i].ms_size); 522 dumpsize += btoc(memlist->m_seg[i].ms_size);
523 m->ram_segs[1].start = 0; 523 m->ram_segs[1].start = 0;
524 m->ram_segs[1].size = memlist->m_seg[i].ms_size; 524 m->ram_segs[1].size = memlist->m_seg[i].ms_size;
525 break; 525 break;
526 } 526 }
527 if (bdevsw_lookup(dumpdev) == NULL) { 527 if (bdevsw_lookup(dumpdev) == NULL) {
528 dumpdev = NODEV; 528 dumpdev = NODEV;
529 return; 529 return;
530 } 530 }
531 nblks = bdev_size(dumpdev); 531 nblks = bdev_size(dumpdev);
532 if (nblks > 0) { 532 if (nblks > 0) {
533 if (dumpsize > btoc(dbtob(nblks - dumplo))) 533 if (dumpsize > btoc(dbtob(nblks - dumplo)))
534 dumpsize = btoc(dbtob(nblks - dumplo)); 534 dumpsize = btoc(dbtob(nblks - dumplo));
535 else if (dumplo == 0) 535 else if (dumplo == 0)
536 dumplo = nblks - btodb(ctob(dumpsize)); 536 dumplo = nblks - btodb(ctob(dumpsize));
537 } 537 }
538 dumplo -= ctod(btoc(MDHDRSIZE)); 538 dumplo -= ctod(btoc(MDHDRSIZE));
539 /* 539 /*
540 * Don't dump on the first PAGE_SIZE (why PAGE_SIZE?) 540 * Don't dump on the first PAGE_SIZE (why PAGE_SIZE?)
541 * in case the dump device includes a disk label. 541 * in case the dump device includes a disk label.
542 */ 542 */
543 if (dumplo < btodb(PAGE_SIZE)) 543 if (dumplo < btodb(PAGE_SIZE))
544 dumplo = btodb(PAGE_SIZE); 544 dumplo = btodb(PAGE_SIZE);
545} 545}
546 546
547/* 547/*
548 * Doadump comes here after turning off memory management and 548 * Doadump comes here after turning off memory management and
549 * getting on the dump stack, either when called above, or by 549 * getting on the dump stack, either when called above, or by
550 * the auto-restart code. 550 * the auto-restart code.
551 */ 551 */
552#define BYTES_PER_DUMP MAXPHYS /* Must be a multiple of pagesize XXX small */ 552#define BYTES_PER_DUMP MAXPHYS /* Must be a multiple of pagesize XXX small */
553static vm_offset_t dumpspace; 553static vm_offset_t dumpspace;
554 554
555vm_offset_t 555vm_offset_t
556reserve_dumppages(vm_offset_t p) 556reserve_dumppages(vm_offset_t p)
557{ 557{
558 dumpspace = p; 558 dumpspace = p;
559 return (p + BYTES_PER_DUMP); 559 return (p + BYTES_PER_DUMP);
560} 560}
561 561
562void 562void
563dumpsys(void) 563dumpsys(void)
564{ 564{
565 unsigned bytes, i, n, seg; 565 unsigned bytes, i, n, seg;
566 int maddr, psize; 566 int maddr, psize;
567 daddr_t blkno; 567 daddr_t blkno;
568 int (*dump)(dev_t, daddr_t, void *, size_t); 568 int (*dump)(dev_t, daddr_t, void *, size_t);
569 int error = 0; 569 int error = 0;
570 kcore_seg_t *kseg_p; 570 kcore_seg_t *kseg_p;
571 cpu_kcore_hdr_t *chdr_p; 571 cpu_kcore_hdr_t *chdr_p;
572 char dump_hdr[MDHDRSIZE]; 572 char dump_hdr[MDHDRSIZE];
573 const struct bdevsw *bdev; 573 const struct bdevsw *bdev;
574 574
575 if (dumpdev == NODEV) 575 if (dumpdev == NODEV)
576 return; 576 return;
577 bdev = bdevsw_lookup(dumpdev); 577 bdev = bdevsw_lookup(dumpdev);
578 if (bdev == NULL || bdev->d_psize == NULL) 578 if (bdev == NULL || bdev->d_psize == NULL)
579 return; 579 return;
580 /* 580 /*
581 * For dumps during autoconfiguration, 581 * For dumps during autoconfiguration,
582 * if dump device has already configured... 582 * if dump device has already configured...
583 */ 583 */
584 if (dumpsize == 0) 584 if (dumpsize == 0)
585 cpu_dumpconf(); 585 cpu_dumpconf();
586 if (dumplo <= 0) { 586 if (dumplo <= 0) {
587 printf("\ndump to dev %u,%u not possible\n", major(dumpdev), 587 printf("\ndump to dev %u,%u not possible\n", major(dumpdev),
588 minor(dumpdev)); 588 minor(dumpdev));
589 return; 589 return;
590 } 590 }
591 printf("\ndumping to dev %u,%u offset %ld\n", major(dumpdev), 591 printf("\ndumping to dev %u,%u offset %ld\n", major(dumpdev),
592 minor(dumpdev), dumplo); 592 minor(dumpdev), dumplo);
593 593
594 psize = bdev_size(dumpdev); 594 psize = bdev_size(dumpdev);
595 printf("dump "); 595 printf("dump ");
596 if (psize == -1) { 596 if (psize == -1) {
597 printf("area unavailable.\n"); 597 printf("area unavailable.\n");
598 return; 598 return;
599 } 599 }
600 kseg_p = (kcore_seg_t *)dump_hdr; 600 kseg_p = (kcore_seg_t *)dump_hdr;
601 chdr_p = (cpu_kcore_hdr_t *)&dump_hdr[ALIGN(sizeof(*kseg_p))]; 601 chdr_p = (cpu_kcore_hdr_t *)&dump_hdr[ALIGN(sizeof(*kseg_p))];
602 memset(dump_hdr, 0, sizeof(dump_hdr)); 602 memset(dump_hdr, 0, sizeof(dump_hdr));
603 603
604 /* 604 /*
605 * Generate a segment header 605 * Generate a segment header
606 */ 606 */
607 CORE_SETMAGIC(*kseg_p, KCORE_MAGIC, MID_MACHINE, CORE_CPU); 607 CORE_SETMAGIC(*kseg_p, KCORE_MAGIC, MID_MACHINE, CORE_CPU);
608 kseg_p->c_size = MDHDRSIZE - ALIGN(sizeof(*kseg_p)); 608 kseg_p->c_size = MDHDRSIZE - ALIGN(sizeof(*kseg_p));
609 609
610 /* 610 /*
611 * Add the md header 611 * Add the md header
612 */ 612 */
613 613
614 *chdr_p = cpu_kcore_hdr; 614 *chdr_p = cpu_kcore_hdr;
615 615
616 bytes = ctob(dumpsize); 616 bytes = ctob(dumpsize);
617 maddr = cpu_kcore_hdr.un._m68k.ram_segs[0].start; 617 maddr = cpu_kcore_hdr.un._m68k.ram_segs[0].start;
618 seg = 0; 618 seg = 0;
619 blkno = dumplo; 619 blkno = dumplo;
620 dump = bdev->d_dump; 620 dump = bdev->d_dump;
621 error = (*dump) (dumpdev, blkno, (void *)dump_hdr, sizeof(dump_hdr)); 621 error = (*dump) (dumpdev, blkno, (void *)dump_hdr, sizeof(dump_hdr));
622 blkno += btodb(sizeof(dump_hdr)); 622 blkno += btodb(sizeof(dump_hdr));
623 for (i = 0; i < bytes && error == 0; i += n) { 623 for (i = 0; i < bytes && error == 0; i += n) {
624 /* Print out how many MBs we have to go. */ 624 /* Print out how many MBs we have to go. */
625 n = bytes - i; 625 n = bytes - i;
626 if (n && (n % (1024 * 1024)) == 0) 626 if (n && (n % (1024 * 1024)) == 0)
627 printf_nolog("%d ", n / (1024 * 1024)); 627 printf_nolog("%d ", n / (1024 * 1024));
628 628
629 /* Limit size for next transfer. */ 629 /* Limit size for next transfer. */
630 if (n > BYTES_PER_DUMP) 630 if (n > BYTES_PER_DUMP)
631 n = BYTES_PER_DUMP; 631 n = BYTES_PER_DUMP;
632 632
633 if (maddr == 0) { /* XXX kvtop chokes on this */ 633 if (maddr == 0) { /* XXX kvtop chokes on this */
634 maddr += PAGE_SIZE; 634 maddr += PAGE_SIZE;
635 n -= PAGE_SIZE; 635 n -= PAGE_SIZE;
636 i += PAGE_SIZE; 636 i += PAGE_SIZE;
637 ++blkno; /* XXX skip physical page 0 */ 637 ++blkno; /* XXX skip physical page 0 */
638 } 638 }
639 (void) pmap_map(dumpspace, maddr, maddr + n, VM_PROT_READ); 639 (void) pmap_map(dumpspace, maddr, maddr + n, VM_PROT_READ);
640 error = (*dump) (dumpdev, blkno, (void *) dumpspace, n); 640 error = (*dump) (dumpdev, blkno, (void *) dumpspace, n);
641 if (error) 641 if (error)
642 break; 642 break;
643 maddr += n; 643 maddr += n;
644 blkno += btodb(n); /* XXX? */ 644 blkno += btodb(n); /* XXX? */
645 if (maddr >= (cpu_kcore_hdr.un._m68k.ram_segs[seg].start + 645 if (maddr >= (cpu_kcore_hdr.un._m68k.ram_segs[seg].start +
646 cpu_kcore_hdr.un._m68k.ram_segs[seg].size)) { 646 cpu_kcore_hdr.un._m68k.ram_segs[seg].size)) {
647 ++seg; 647 ++seg;
648 maddr = cpu_kcore_hdr.un._m68k.ram_segs[seg].start; 648 maddr = cpu_kcore_hdr.un._m68k.ram_segs[seg].start;
649 if (cpu_kcore_hdr.un._m68k.ram_segs[seg].size == 0) 649 if (cpu_kcore_hdr.un._m68k.ram_segs[seg].size == 0)
650 break; 650 break;
651 } 651 }
652 } 652 }
653 653
654 switch (error) { 654 switch (error) {
655 655
656 case ENXIO: 656 case ENXIO:
657 printf("device bad\n"); 657 printf("device bad\n");
658 break; 658 break;
659 659
660 case EFAULT: 660 case EFAULT:
661 printf("device not ready\n"); 661 printf("device not ready\n");
662 break; 662 break;
663 663
664 case EINVAL: 664 case EINVAL:
665 printf("area improper\n"); 665 printf("area improper\n");
666 break; 666 break;
667 667
668 case EIO: 668 case EIO:
669 printf("i/o error\n"); 669 printf("i/o error\n");
670 break; 670 break;
671 671
672 default: 672 default:
673 printf("succeeded\n"); 673 printf("succeeded\n");
674 break; 674 break;
675 } 675 }
676 printf("\n\n"); 676 printf("\n\n");
677 delay(5000000); /* 5 seconds */ 677 delay(5000000); /* 5 seconds */
678} 678}
679 679
680void 680void
681initcpu(void) 681initcpu(void)
682{ 682{
683 typedef void trapfun(void); 683 typedef void trapfun(void);
684 684
685 /* XXX should init '40 vecs here, too */ 685 /* XXX should init '40 vecs here, too */
686#if defined(M68060) || defined(M68040) || defined(DRACO) || defined(FPU_EMULATE) 686#if defined(M68060) || defined(M68040) || defined(DRACO) || defined(FPU_EMULATE)
687 extern trapfun *vectab[256]; 687 extern trapfun *vectab[256];
688#endif 688#endif
689 689
690#if defined(M68060) || defined(M68040) 690#if defined(M68060) || defined(M68040)
691 extern trapfun addrerr4060; 691 extern trapfun addrerr4060;
692#endif 692#endif
693 693
694#ifdef M68060 694#ifdef M68060
695 extern trapfun buserr60; 695 extern trapfun buserr60;
696#if defined(M060SP) 696#if defined(M060SP)
697 /*extern u_int8_t I_CALL_TOP[];*/ 697 /*extern u_int8_t I_CALL_TOP[];*/
698 extern trapfun intemu60, fpiemu60, fpdemu60, fpeaemu60; 698 extern trapfun intemu60, fpiemu60, fpdemu60, fpeaemu60;
699 extern u_int8_t FP_CALL_TOP[]; 699 extern u_int8_t FP_CALL_TOP[];
700#else 700#else
701 extern trapfun illinst; 701 extern trapfun illinst;
702#endif 702#endif
703 extern trapfun fpfault; 703 extern trapfun fpfault;
704#endif 704#endif
705 705
706#ifdef M68040 706#ifdef M68040
707 extern trapfun buserr40; 707 extern trapfun buserr40;
708#endif 708#endif
709 709
710#ifdef DRACO 710#ifdef DRACO
711 extern trapfun DraCoIntr, DraCoLev1intr, DraCoLev2intr; 711 extern trapfun DraCoIntr, DraCoLev1intr, DraCoLev2intr;
712 u_char dracorev; 712 u_char dracorev;
713#endif 713#endif
714 714
715#ifdef FPU_EMULATE 715#ifdef FPU_EMULATE
716 extern trapfun fpemuli; 716 extern trapfun fpemuli;
717#endif 717#endif
718 718
719#ifdef M68060 719#ifdef M68060
720 if (machineid & AMIGA_68060) { 720 if (machineid & AMIGA_68060) {
721 if (machineid & AMIGA_FPU40 && m68060_pcr_init & 2) { 721 if (machineid & AMIGA_FPU40 && m68060_pcr_init & 2) {
722 /* 722 /*
723 * in this case, we're about to switch the FPU off; 723 * in this case, we're about to switch the FPU off;
724 * do a FNOP to avoid stray FP traps later 724 * do a FNOP to avoid stray FP traps later
725 */ 725 */
726 __asm("fnop"); 726 __asm("fnop");
727 /* ... and mark FPU as absent for identifyfpu() */ 727 /* ... and mark FPU as absent for identifyfpu() */
728 machineid &= ~(AMIGA_FPU40|AMIGA_68882|AMIGA_68881); 728 machineid &= ~(AMIGA_FPU40|AMIGA_68882|AMIGA_68881);
729 } 729 }
730 __asm volatile ("movl %0,%%d0; .word 0x4e7b,0x0808" : : 730 __asm volatile ("movl %0,%%d0; .word 0x4e7b,0x0808" : :
731 "d"(m68060_pcr_init):"d0" ); 731 "d"(m68060_pcr_init):"d0" );
732 732
733 /* bus/addrerr vectors */ 733 /* bus/addrerr vectors */
734 vectab[2] = buserr60; 734 vectab[2] = buserr60;
735 vectab[3] = addrerr4060; 735 vectab[3] = addrerr4060;
736#if defined(M060SP) 736#if defined(M060SP)
737 737
738 /* integer support */ 738 /* integer support */
739 vectab[61] = intemu60/*(trapfun *)&I_CALL_TOP[128 + 0x00]*/; 739 vectab[61] = intemu60/*(trapfun *)&I_CALL_TOP[128 + 0x00]*/;
740 740
741 /* floating point support */ 741 /* floating point support */
742 /* 742 /*
743 * XXX maybe we really should run-time check for the 743 * XXX maybe we really should run-time check for the
744 * stack frame format here: 744 * stack frame format here:
745 */ 745 */
746 vectab[11] = fpiemu60/*(trapfun *)&FP_CALL_TOP[128 + 0x30]*/; 746 vectab[11] = fpiemu60/*(trapfun *)&FP_CALL_TOP[128 + 0x30]*/;
747 747
748 vectab[55] = fpdemu60/*(trapfun *)&FP_CALL_TOP[128 + 0x38]*/; 748 vectab[55] = fpdemu60/*(trapfun *)&FP_CALL_TOP[128 + 0x38]*/;
749 vectab[60] = fpeaemu60/*(trapfun *)&FP_CALL_TOP[128 + 0x40]*/; 749 vectab[60] = fpeaemu60/*(trapfun *)&FP_CALL_TOP[128 + 0x40]*/;
750 750
751 vectab[54] = (trapfun *)&FP_CALL_TOP[128 + 0x00]; 751 vectab[54] = (trapfun *)&FP_CALL_TOP[128 + 0x00];
752 vectab[52] = (trapfun *)&FP_CALL_TOP[128 + 0x08]; 752 vectab[52] = (trapfun *)&FP_CALL_TOP[128 + 0x08];
753 vectab[53] = (trapfun *)&FP_CALL_TOP[128 + 0x10]; 753 vectab[53] = (trapfun *)&FP_CALL_TOP[128 + 0x10];
754 vectab[51] = (trapfun *)&FP_CALL_TOP[128 + 0x18]; 754 vectab[51] = (trapfun *)&FP_CALL_TOP[128 + 0x18];
755 vectab[50] = (trapfun *)&FP_CALL_TOP[128 + 0x20]; 755 vectab[50] = (trapfun *)&FP_CALL_TOP[128 + 0x20];
756 vectab[49] = (trapfun *)&FP_CALL_TOP[128 + 0x28]; 756 vectab[49] = (trapfun *)&FP_CALL_TOP[128 + 0x28];
757 757
758#else 758#else
759 vectab[61] = illinst; 759 vectab[61] = illinst;
760#endif 760#endif
761 vectab[48] = fpfault; 761 vectab[48] = fpfault;
762 } 762 }
763#endif 763#endif
764 764
765/* 765/*
766 * Vector initialization for special motherboards 766 * Vector initialization for special motherboards
767 */ 767 */
768#ifdef M68040 768#ifdef M68040
769#ifdef M68060 769#ifdef M68060
770 else 770 else
771#endif 771#endif
772 if (machineid & AMIGA_68040) { 772 if (machineid & AMIGA_68040) {
773 /* addrerr vector */ 773 /* addrerr vector */
774 vectab[2] = buserr40; 774 vectab[2] = buserr40;
775 vectab[3] = addrerr4060; 775 vectab[3] = addrerr4060;
776 } 776 }
777#endif 777#endif
778 778
779#ifdef FPU_EMULATE 779#ifdef FPU_EMULATE
780 if (!(machineid & (AMIGA_68881|AMIGA_68882|AMIGA_FPU40))) { 780 if (!(machineid & (AMIGA_68881|AMIGA_68882|AMIGA_FPU40))) {
781 vectab[11] = fpemuli; 781 vectab[11] = fpemuli;
782 printf("FPU software emulation initialized.\n"); 782 printf("FPU software emulation initialized.\n");
783 } 783 }
784#endif 784#endif
785 785
786/* 786/*
787 * Vector initialization for special motherboards 787 * Vector initialization for special motherboards
788 */ 788 */
789 789
790#ifdef DRACO 790#ifdef DRACO
791 dracorev = is_draco(); 791 dracorev = is_draco();
792 if (dracorev) { 792 if (dracorev) {
793 if (dracorev >= 4) { 793 if (dracorev >= 4) {
794 vectab[24+1] = DraCoLev1intr; 794 vectab[24+1] = DraCoLev1intr;
795 vectab[24+2] = DraCoIntr; 795 vectab[24+2] = DraCoIntr;
796 } else { 796 } else {
797 vectab[24+1] = DraCoIntr; 797 vectab[24+1] = DraCoIntr;
798 vectab[24+2] = DraCoLev2intr; 798 vectab[24+2] = DraCoLev2intr;
799 } 799 }
800 vectab[24+3] = DraCoIntr; 800 vectab[24+3] = DraCoIntr;
801 vectab[24+4] = DraCoIntr; 801 vectab[24+4] = DraCoIntr;
802 vectab[24+5] = DraCoIntr; 802 vectab[24+5] = DraCoIntr;
803 vectab[24+6] = DraCoIntr; 803 vectab[24+6] = DraCoIntr;
804 } 804 }
805#endif 805#endif
806} 806}
807 807
808void 808void
809straytrap(int pc, u_short evec) 809straytrap(int pc, u_short evec)
810{ 810{
811 printf("unexpected trap format %x (vector offset %x) from %x\n", 811 printf("unexpected trap format %x (vector offset %x) from %x\n",
812 evec>>12, evec & 0xFFF, pc); 812 evec>>12, evec & 0xFFF, pc);
813/*XXX*/ panic("straytrap"); 813/*XXX*/ panic("straytrap");
814} 814}
815 815
816int *nofault; 816int *nofault;
817 817
818int 818int
819badaddr(register void *addr) 819badaddr(register void *addr)
820{ 820{
821 int i; 821 int i;
822 label_t faultbuf; 822 label_t faultbuf;
823 823
824 nofault = (int *) &faultbuf; 824 nofault = (int *) &faultbuf;
825 if (setjmp((label_t *)nofault)) { 825 if (setjmp((label_t *)nofault)) {
826 nofault = NULL; 826 nofault = NULL;
827 return 1; 827 return 1;
828 } 828 }
829 i = *(volatile short *)addr; 829 i = *(volatile short *)addr;
830 __USE(i); 830 __USE(i);
831 nofault = NULL; 831 nofault = NULL;
832 return 0; 832 return 0;
833} 833}
834 834
835int 835int
836badbaddr(register void *addr) 836badbaddr(register void *addr)
837{ 837{
838 int i; 838 int i;
839 label_t faultbuf; 839 label_t faultbuf;
840 840
841 nofault = (int *) &faultbuf; 841 nofault = (int *) &faultbuf;
842 if (setjmp((label_t *)nofault)) { 842 if (setjmp((label_t *)nofault)) {
843 nofault = NULL; 843 nofault = NULL;
844 return 1; 844 return 1;
845 } 845 }
846 i = *(volatile char *)addr; 846 i = *(volatile char *)addr;
847 __USE(i); 847 __USE(i);
848 nofault = NULL; 848 nofault = NULL;
849 return 0; 849 return 0;
850} 850}
851 851
852struct isr *isr_ports; 852struct isr *isr_ports;
853#ifdef DRACO 853#ifdef DRACO
854struct isr *isr_slot3; 854struct isr *isr_slot3;
855struct isr *isr_supio; 855struct isr *isr_supio;
856#endif 856#endif
857struct isr *isr_exter; 857struct isr *isr_exter;
858 858
859void 859void
860add_isr(struct isr *isr) 860add_isr(struct isr *isr)
861{ 861{
862 struct isr **p, *q; 862 struct isr **p, *q;
863 863
864#ifdef DRACO 864#ifdef DRACO
865 switch (isr->isr_ipl) { 865 switch (isr->isr_ipl) {
866 case 2: 866 case 2:
867 p = &isr_ports; 867 p = &isr_ports;
868 break; 868 break;
869 case 3: 869 case 3:
870 p = &isr_slot3; 870 p = &isr_slot3;
871 break; 871 break;
872 case 5: 872 case 5:
873 p = &isr_supio; 873 p = &isr_supio;
874 break; 874 break;
875 default: /* was case 6:; make gcc -Wall quiet */ 875 default: /* was case 6:; make gcc -Wall quiet */
876 p = &isr_exter; 876 p = &isr_exter;
877 break; 877 break;
878 } 878 }
879#else 879#else
880 p = isr->isr_ipl == 2 ? &isr_ports : &isr_exter; 880 p = isr->isr_ipl == 2 ? &isr_ports : &isr_exter;
881#endif 881#endif
882 while ((q = *p) != NULL) 882 while ((q = *p) != NULL)
883 p = &q->isr_forw; 883 p = &q->isr_forw;
884 isr->isr_forw = NULL; 884 isr->isr_forw = NULL;
885 *p = isr; 885 *p = isr;
886 /* enable interrupt */ 886 /* enable interrupt */
887#ifdef DRACO 887#ifdef DRACO
888 if (is_draco()) 888 if (is_draco())
889 switch(isr->isr_ipl) { 889 switch(isr->isr_ipl) {
890 case 6: 890 case 6:
891 single_inst_bset_b(*draco_intena, DRIRQ_INT6); 891 single_inst_bset_b(*draco_intena, DRIRQ_INT6);
892 break; 892 break;
893 case 2: 893 case 2:
894 single_inst_bset_b(*draco_intena, DRIRQ_INT2); 894 single_inst_bset_b(*draco_intena, DRIRQ_INT2);
895 break; 895 break;
896 default: 896 default:
897 break; 897 break;
898 } 898 }
899 else 899 else
900#endif 900#endif
901 custom.intena = isr->isr_ipl == 2 ? 901 custom.intena = isr->isr_ipl == 2 ?
902 INTF_SETCLR | INTF_PORTS : 902 INTF_SETCLR | INTF_PORTS :
903 INTF_SETCLR | INTF_EXTER; 903 INTF_SETCLR | INTF_EXTER;
904} 904}
905 905
906void 906void
907remove_isr(struct isr *isr) 907remove_isr(struct isr *isr)
908{ 908{
909 struct isr **p, *q; 909 struct isr **p, *q;
910 910
911#ifdef DRACO 911#ifdef DRACO
912 switch (isr->isr_ipl) { 912 switch (isr->isr_ipl) {
913 case 2: 913 case 2:
914 p = &isr_ports; 914 p = &isr_ports;
915 break; 915 break;
916 case 3: 916 case 3:
917 p = &isr_slot3; 917 p = &isr_slot3;
918 break; 918 break;
919 case 5: 919 case 5:
920 p = &isr_supio; 920 p = &isr_supio;
921 break; 921 break;
922 default: /* XXX to make gcc -Wall quiet, was 6: */ 922 default: /* XXX to make gcc -Wall quiet, was 6: */
923 p = &isr_exter; 923 p = &isr_exter;
924 break; 924 break;
925 } 925 }
926#else 926#else
927 p = isr->isr_ipl == 6 ? &isr_exter : &isr_ports; 927 p = isr->isr_ipl == 6 ? &isr_exter : &isr_ports;
928#endif 928#endif
929 929
930 while ((q = *p) != NULL && q != isr) 930 while ((q = *p) != NULL && q != isr)
931 p = &q->isr_forw; 931 p = &q->isr_forw;
932 if (q) 932 if (q)
933 *p = q->isr_forw; 933 *p = q->isr_forw;
934 else 934 else
935 panic("remove_isr: handler not registered"); 935 panic("remove_isr: handler not registered");
936 /* disable interrupt if no more handlers */ 936 /* disable interrupt if no more handlers */
937#ifdef DRACO 937#ifdef DRACO
938 switch (isr->isr_ipl) { 938 switch (isr->isr_ipl) {
939 case 2: 939 case 2:
940 p = &isr_ports; 940 p = &isr_ports;
941 break; 941 break;
942 case 3: 942 case 3:
943 p = &isr_slot3; 943 p = &isr_slot3;
944 break; 944 break;
945 case 5: 945 case 5:
946 p = &isr_supio; 946 p = &isr_supio;
947 break; 947 break;
948 case 6: 948 case 6:
949 p = &isr_exter; 949 p = &isr_exter;
950 break; 950 break;
951 } 951 }
952#else 952#else
953 p = isr->isr_ipl == 6 ? &isr_exter : &isr_ports; 953 p = isr->isr_ipl == 6 ? &isr_exter : &isr_ports;
954#endif 954#endif
955 if (*p == NULL) { 955 if (*p == NULL) {
956#ifdef DRACO 956#ifdef DRACO
957 if (is_draco()) { 957 if (is_draco()) {
958 switch(isr->isr_ipl) { 958 switch(isr->isr_ipl) {
959 case 2: 959 case 2:
960 single_inst_bclr_b(*draco_intena, 960 single_inst_bclr_b(*draco_intena,
961 DRIRQ_INT2); 961 DRIRQ_INT2);
962 break; 962 break;
963 case 6: 963 case 6:
964 single_inst_bclr_b(*draco_intena, 964 single_inst_bclr_b(*draco_intena,
965 DRIRQ_INT6); 965 DRIRQ_INT6);
966 break; 966 break;
967 default: 967 default:
968 break; 968 break;
969 } 969 }
970 } else 970 } else
971#endif 971#endif
972 custom.intena = isr->isr_ipl == 6 ? 972 custom.intena = isr->isr_ipl == 6 ?
973 INTF_EXTER : INTF_PORTS; 973 INTF_EXTER : INTF_PORTS;
974 } 974 }
975} 975}
976 976
977static int idepth; 977static int idepth;
978 978
979void 979void
980intrhand(int sr) 980intrhand(int sr)
981{ 981{
982 register unsigned int ipl; 982 register unsigned int ipl;
983 register unsigned short ireq; 983 register unsigned short ireq;
984 register struct isr **p, *q; 984 register struct isr **p, *q;
985 985
986 idepth++; 986 idepth++;
987 ipl = (sr >> 8) & 7; 987 ipl = (sr >> 8) & 7;
988#ifdef REALLYDEBUG 988#ifdef REALLYDEBUG
989 printf("intrhand: got int. %d\n", ipl); 989 printf("intrhand: got int. %d\n", ipl);
990#endif 990#endif
991#ifdef DRACO 991#ifdef DRACO
992 if (is_draco()) 992 if (is_draco())
993 ireq = ((ipl == 1) && (*draco_intfrc & DRIRQ_SOFT) ? 993 ireq = ((ipl == 1) && (*draco_intfrc & DRIRQ_SOFT) ?
994 INTF_SOFTINT : 0); 994 INTF_SOFTINT : 0);
995 else 995 else
996#endif 996#endif
997 ireq = custom.intreqr; 997 ireq = custom.intreqr;
998 998
999 switch (ipl) { 999 switch (ipl) {
1000 case 1: 1000 case 1:
1001#ifdef DRACO 1001#ifdef DRACO
1002 if (is_draco() && (draco_ioct->io_status & DRSTAT_KBDRECV)) 1002 if (is_draco() && (draco_ioct->io_status & DRSTAT_KBDRECV))
1003 drkbdintr(); 1003 drkbdintr();
1004#endif 1004#endif
1005 if (ireq & INTF_TBE) { 1005 if (ireq & INTF_TBE) {
1006#if NSER > 0 1006#if NSER > 0
1007 ser_outintr(); 1007 ser_outintr();
1008#else 1008#else
1009 custom.intreq = INTF_TBE; 1009 custom.intreq = INTF_TBE;
1010#endif 1010#endif
1011 } 1011 }
1012 1012
1013 if (ireq & INTF_DSKBLK) { 1013 if (ireq & INTF_DSKBLK) {
1014#if NFD > 0 1014#if NFD > 0
1015 fdintr(0); 1015 fdintr(0);
1016#endif 1016#endif
1017 custom.intreq = INTF_DSKBLK; 1017 custom.intreq = INTF_DSKBLK;
1018 } 1018 }
1019 if (ireq & INTF_SOFTINT) { 1019 if (ireq & INTF_SOFTINT) {
1020 /* sicallback handling removed */ 1020 /* sicallback handling removed */
1021#ifdef DEBUG 1021#ifdef DEBUG
1022 printf("intrhand: SOFTINT ignored\n"); 1022 printf("intrhand: SOFTINT ignored\n");
1023#endif 1023#endif
1024 custom.intreq = INTF_SOFTINT; 1024 custom.intreq = INTF_SOFTINT;
1025 } 1025 }
1026 break; 1026 break;
1027 1027
1028 case 2: 1028 case 2:
1029 p = &isr_ports; 1029 p = &isr_ports;
1030 while ((q = *p) != NULL) { 1030 while ((q = *p) != NULL) {
1031 if ((q->isr_intr)(q->isr_arg)) 1031 if ((q->isr_intr)(q->isr_arg))
1032 break; 1032 break;
1033 p = &q->isr_forw; 1033 p = &q->isr_forw;
1034 } 1034 }
1035 if (q == NULL) 1035 if (q == NULL)
1036 ciaa_intr (); 1036 ciaa_intr ();
1037#ifdef DRACO 1037#ifdef DRACO
1038 if (is_draco()) 1038 if (is_draco())
1039 single_inst_bclr_b(*draco_intpen, DRIRQ_INT2); 1039 single_inst_bclr_b(*draco_intpen, DRIRQ_INT2);
1040 else 1040 else
1041#endif 1041#endif
1042 custom.intreq = INTF_PORTS; 1042 custom.intreq = INTF_PORTS;
1043 1043
1044 break; 1044 break;
1045 1045
1046#ifdef DRACO 1046#ifdef DRACO
1047 /* only handled here for DraCo */ 1047 /* only handled here for DraCo */
1048 case 6: 1048 case 6:
1049 p = &isr_exter; 1049 p = &isr_exter;
1050 while ((q = *p) != NULL) { 1050 while ((q = *p) != NULL) {
1051 if ((q->isr_intr)(q->isr_arg)) 1051 if ((q->isr_intr)(q->isr_arg))
1052 break; 1052 break;
1053 p = &q->isr_forw; 1053 p = &q->isr_forw;
1054 } 1054 }
1055 single_inst_bclr_b(*draco_intpen, DRIRQ_INT6); 1055 single_inst_bclr_b(*draco_intpen, DRIRQ_INT6);
1056 break; 1056 break;
1057#endif 1057#endif
1058 1058
1059 case 3: 1059 case 3:
1060 /* VBL */ 1060 /* VBL */
1061 if (ireq & INTF_BLIT) 1061 if (ireq & INTF_BLIT)
1062 blitter_handler(); 1062 blitter_handler();
1063 if (ireq & INTF_COPER) 1063 if (ireq & INTF_COPER)
1064 copper_handler(); 1064 copper_handler();
1065 if (ireq & INTF_VERTB) 1065 if (ireq & INTF_VERTB)
1066 vbl_handler(); 1066 vbl_handler();
1067 break; 1067 break;
1068#ifdef DRACO 1068#ifdef DRACO
1069 case 5: 1069 case 5:
1070 p = &isr_supio; 1070 p = &isr_supio;
1071 while ((q = *p) != NULL) { 1071 while ((q = *p) != NULL) {
1072 if ((q->isr_intr)(q->isr_arg)) 1072 if ((q->isr_intr)(q->isr_arg))
1073 break; 1073 break;
1074 p = &q->isr_forw; 1074 p = &q->isr_forw;
1075 } 1075 }
1076 break; 1076 break;
1077#endif 1077#endif
1078#if 0 1078#if 0
1079/* now dealt with in locore.s for speed reasons */ 1079/* now dealt with in locore.s for speed reasons */
1080 case 5: 1080 case 5:
1081 /* check RS232 RBF */ 1081 /* check RS232 RBF */
1082 serintr (0); 1082 serintr (0);
1083 1083
1084 custom.intreq = INTF_DSKSYNC; 1084 custom.intreq = INTF_DSKSYNC;
1085 break; 1085 break;
1086#endif 1086#endif
1087 1087
1088 case 4: 1088 case 4:
1089#ifdef DRACO 1089#ifdef DRACO
1090#include "drsc.h" 1090#include "drsc.h"
1091 if (is_draco()) 1091 if (is_draco())
1092#if NDRSC > 0 1092#if NDRSC > 0
1093 drsc_handler(); 1093 drsc_handler();
1094#else 1094#else
1095 single_inst_bclr_b(*draco_intpen, DRIRQ_SCSI); 1095 single_inst_bclr_b(*draco_intpen, DRIRQ_SCSI);
1096#endif 1096#endif
1097 else 1097 else
1098#endif 1098#endif
1099 audio_handler(); 1099 audio_handler();
1100 break; 1100 break;
1101 default: 1101 default:
1102 printf("intrhand: unexpected sr 0x%x, intreq = 0x%x\n", 1102 printf("intrhand: unexpected sr 0x%x, intreq = 0x%x\n",
1103 sr, ireq); 1103 sr, ireq);
1104 break; 1104 break;
1105 } 1105 }
1106#ifdef REALLYDEBUG 1106#ifdef REALLYDEBUG
1107 printf("intrhand: leaving.\n"); 1107 printf("intrhand: leaving.\n");
1108#endif 1108#endif
1109 idepth--; 1109 idepth--;
1110} 1110}
1111 1111
1112bool 1112bool
1113cpu_intr_p(void) 1113cpu_intr_p(void)
1114{ 1114{
1115 1115
1116 return idepth != 0; 1116 return idepth != 0;
1117} 1117}
1118 1118
1119#if defined(DEBUG) && !defined(PANICBUTTON) 1119#if defined(DEBUG) && !defined(PANICBUTTON)
1120#define PANICBUTTON 1120#define PANICBUTTON
1121#endif 1121#endif
1122 1122
1123#ifdef PANICBUTTON 1123#ifdef PANICBUTTON
1124int panicbutton = 1; /* non-zero if panic buttons are enabled */ 1124int panicbutton = 1; /* non-zero if panic buttons are enabled */
1125int crashandburn = 0; 1125int crashandburn = 0;
1126int candbdelay = 50; /* give em half a second */ 1126int candbdelay = 50; /* give em half a second */
1127void candbtimer(void); 1127void candbtimer(void);
1128callout_t candbtimer_ch; 1128callout_t candbtimer_ch;
1129 1129
1130void 1130void
1131candbtimer(void) 1131candbtimer(void)
1132{ 1132{
1133 crashandburn = 0; 1133 crashandburn = 0;
1134} 1134}
1135#endif 1135#endif
1136 1136
1137#if 0 1137#if 0
1138/* 1138/*
1139 * Level 7 interrupts can be caused by the keyboard or parity errors. 1139 * Level 7 interrupts can be caused by the keyboard or parity errors.
1140 */ 1140 */
1141nmihand(struct frame frame) 1141nmihand(struct frame frame)
1142{ 1142{
1143 if (kbdnmi()) { 1143 if (kbdnmi()) {
1144#ifdef PANICBUTTON 1144#ifdef PANICBUTTON
1145 static int innmihand = 0; 1145 static int innmihand = 0;
1146 1146
1147 /* 1147 /*
1148 * Attempt to reduce the window of vulnerability for recursive 1148 * Attempt to reduce the window of vulnerability for recursive
1149 * NMIs (e.g. someone holding down the keyboard reset button). 1149 * NMIs (e.g. someone holding down the keyboard reset button).
1150 */ 1150 */
1151 if (innmihand == 0) { 1151 if (innmihand == 0) {
1152 innmihand = 1; 1152 innmihand = 1;
1153 printf("Got a keyboard NMI\n"); 1153 printf("Got a keyboard NMI\n");
1154 innmihand = 0; 1154 innmihand = 0;
1155 } 1155 }
1156 if (panicbutton) { 1156 if (panicbutton) {
1157 if (crashandburn) { 1157 if (crashandburn) {
1158 crashandburn = 0; 1158 crashandburn = 0;
1159 panic(panicstr ? 1159 panic(panicstr ?
1160 "forced crash, nosync" : "forced crash"); 1160 "forced crash, nosync" : "forced crash");
1161 } 1161 }
1162 crashandburn++; 1162 crashandburn++;
1163 callout_reset(&candbtimer_ch, candbdelay, 1163 callout_reset(&candbtimer_ch, candbdelay,
1164 candbtimer, NULL); 1164 candbtimer, NULL);
1165 } 1165 }
1166#endif 1166#endif
1167 return; 1167 return;
1168 } 1168 }
1169 if (parityerror(&frame)) 1169 if (parityerror(&frame))
1170 return; 1170 return;
1171 /* panic?? */ 1171 /* panic?? */
1172 printf("unexpected level 7 interrupt ignored\n"); 1172 printf("unexpected level 7 interrupt ignored\n");
1173} 1173}
1174#endif 1174#endif
1175 1175
1176/* 1176/*
1177 * should only get here, if no standard executable. This can currently 1177 * should only get here, if no standard executable. This can currently
1178 * only mean, we're reading an old ZMAGIC file without MID, but since Amiga 1178 * only mean, we're reading an old ZMAGIC file without MID, but since Amiga
1179 * ZMAGIC always worked the `right' way (;-)) just ignore the missing 1179 * ZMAGIC always worked the `right' way (;-)) just ignore the missing
1180 * MID and proceed to new zmagic code ;-) 1180 * MID and proceed to new zmagic code ;-)
1181 */ 1181 */
1182int 1182int
1183cpu_exec_aout_makecmds(struct lwp *l, struct exec_package *epp) 1183cpu_exec_aout_makecmds(struct lwp *l, struct exec_package *epp)
1184{ 1184{
1185 int error = ENOEXEC; 1185 int error = ENOEXEC;
1186#ifdef COMPAT_NOMID 1186#ifdef COMPAT_NOMID
1187 struct exec *execp = epp->ep_hdr; 1187 struct exec *execp = epp->ep_hdr;
1188#endif 1188#endif
1189 1189
1190#ifdef COMPAT_NOMID 1190#ifdef COMPAT_NOMID
1191 if (!((execp->a_midmag >> 16) & 0x0fff) 1191 if (!((execp->a_midmag >> 16) & 0x0fff)
1192 && execp->a_midmag == ZMAGIC) 1192 && execp->a_midmag == ZMAGIC)
1193 return(exec_aout_prep_zmagic(l, epp)); 1193 return(exec_aout_prep_zmagic(l, epp));
1194#endif 1194#endif
1195 return(error); 1195 return(error);
1196} 1196}
1197 1197
1198#ifdef MODULAR 1198#ifdef MODULAR
1199/* 1199/*
1200 * Push any modules loaded by the bootloader etc. 1200 * Push any modules loaded by the bootloader etc.
1201 */ 1201 */
1202void 1202void
1203module_init_md(void) 1203module_init_md(void)
1204{ 1204{
1205} 1205}
1206 1206
1207int _spllkm6(void); 1207int _spllkm6(void);
1208int _spllkm7(void); 1208int _spllkm7(void);
1209 1209
1210#ifdef LEV6_DEFER 1210#ifdef LEV6_DEFER
1211int _spllkm6() { 1211int _spllkm6(void) {
1212 return spl4(); 1212 return spl4();
1213}; 1213};
1214 1214
1215int _spllkm7() { 1215int _spllkm7(void) {
1216 return spl4(); 1216 return spl4();
1217}; 1217};
1218 1218
1219#else 1219#else
1220 1220
1221int _spllkm6() { 1221int _spllkm6(void) {
1222 return spl6(); 1222 return spl6();
1223}; 1223};
1224 1224
1225int _spllkm7() { 1225int _spllkm7(void) {
1226 return spl7(); 1226 return spl7();
1227}; 1227};
1228 1228
1229#endif 1229#endif
1230 1230
1231#endif 1231#endif
1232 1232
1233int ipl2spl_table[_NIPL] = { 1233int ipl2spl_table[_NIPL] = {
1234 [IPL_NONE] = PSL_IPL0|PSL_S, 1234 [IPL_NONE] = PSL_IPL0|PSL_S,
1235 [IPL_SOFTCLOCK] = PSL_IPL1|PSL_S, 1235 [IPL_SOFTCLOCK] = PSL_IPL1|PSL_S,
1236 [IPL_VM] = PSL_IPL4|PSL_S, 1236 [IPL_VM] = PSL_IPL4|PSL_S,
1237#if defined(LEV6_DEFER) 1237#if defined(LEV6_DEFER)
1238 [IPL_SCHED] = PSL_IPL4|PSL_S, 1238 [IPL_SCHED] = PSL_IPL4|PSL_S,
1239 [IPL_HIGH] = PSL_IPL4|PSL_S, 1239 [IPL_HIGH] = PSL_IPL4|PSL_S,
1240#else /* defined(LEV6_DEFER) */ 1240#else /* defined(LEV6_DEFER) */
1241 [IPL_SCHED] = PSL_IPL6|PSL_S, 1241 [IPL_SCHED] = PSL_IPL6|PSL_S,
1242 [IPL_HIGH] = PSL_IPL7|PSL_S, 1242 [IPL_HIGH] = PSL_IPL7|PSL_S,
1243#endif /* defined(LEV6_DEFER) */ 1243#endif /* defined(LEV6_DEFER) */
1244}; 1244};
1245 1245
1246int 1246int
1247mm_md_physacc(paddr_t pa, vm_prot_t prot) 1247mm_md_physacc(paddr_t pa, vm_prot_t prot)
1248{ 1248{
1249 1249
1250 return (pa >= 0xfffffffc || pa < lowram) ? EFAULT : 0; 1250 return (pa >= 0xfffffffc || pa < lowram) ? EFAULT : 0;
1251} 1251}