Tue Apr 12 10:54:30 2016 UTC ()
Alternate UART3 pins a PG6-7, not PG8-9


(bouyer)
diff -r1.86 -r1.87 src/sys/arch/arm/allwinner/awin_reg.h
cvs diff -r1.86 -r1.87 src/sys/arch/arm/allwinner/Attic/awin_reg.h (expand / switch to unified diff)

--- src/sys/arch/arm/allwinner/Attic/awin_reg.h 2016/01/11 17:09:25 1.86
+++ src/sys/arch/arm/allwinner/Attic/awin_reg.h 2016/04/12 10:54:29 1.87
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: awin_reg.h,v 1.86 2016/01/11 17:09:25 macallan Exp $ */ 1/* $NetBSD: awin_reg.h,v 1.87 2016/04/12 10:54:29 bouyer Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2013 The NetBSD Foundation, Inc. 4 * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas of 3am Software Foundry. 8 * by Matt Thomas of 3am Software Foundry.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -1400,27 +1400,27 @@ struct awin_mmc_idma_descriptor { @@ -1400,27 +1400,27 @@ struct awin_mmc_idma_descriptor {
1400#define AWIN_PIO_PF_SDC0_FUNC 2 1400#define AWIN_PIO_PF_SDC0_FUNC 2
1401#define AWIN_PIO_PF_UART0_PINS 0x00000014 /* PF pins 4,2 */ 1401#define AWIN_PIO_PF_UART0_PINS 0x00000014 /* PF pins 4,2 */
1402#define AWIN_PIO_PF_UART0_FUNC 3 1402#define AWIN_PIO_PF_UART0_FUNC 3
1403#define AWIN_PIO_PF_JTAG_PINS 0x0000002b /* PF pins 5,3,1-0 */ 1403#define AWIN_PIO_PF_JTAG_PINS 0x0000002b /* PF pins 5,3,1-0 */
1404#define AWIN_PIO_PF_JTAG_FUNC 4 1404#define AWIN_PIO_PF_JTAG_FUNC 4
1405 1405
1406#define AWIN_PIO_PG_PINS 12 1406#define AWIN_PIO_PG_PINS 12
1407#define AWIN_PIO_PG_TS1_PINS 0x00000fff /* PG pins 11-0 */ 1407#define AWIN_PIO_PG_TS1_PINS 0x00000fff /* PG pins 11-0 */
1408#define AWIN_PIO_PG_TS1_FUNC 2 1408#define AWIN_PIO_PG_TS1_FUNC 2
1409#define AWIN_PIO_PG_CSI1_PINS 0x00000fff /* PG pins 11-0 */ 1409#define AWIN_PIO_PG_CSI1_PINS 0x00000fff /* PG pins 11-0 */
1410#define AWIN_PIO_PG_CSI1_FUNC 3 1410#define AWIN_PIO_PG_CSI1_FUNC 3
1411#define AWIN_PIO_PG_UART4_PINS 0x00000c00 /* PG pins 11-10 */ 1411#define AWIN_PIO_PG_UART4_PINS 0x00000c00 /* PG pins 11-10 */
1412#define AWIN_PIO_PG_UART4_FUNC 4 1412#define AWIN_PIO_PG_UART4_FUNC 4
1413#define AWIN_PIO_PG_UART3_PINS 0x00000300 /* PG pins 9-8 */ 1413#define AWIN_PIO_PG_UART3_PINS 0x000000c0 /* PG pins 6-7 */
1414#define AWIN_PIO_PG_UART3_FUNC 4 1414#define AWIN_PIO_PG_UART3_FUNC 4
1415#define AWIN_PIO_PG_SDC1_PINS 0x0000003f /* PG pins 5-0 */ 1415#define AWIN_PIO_PG_SDC1_PINS 0x0000003f /* PG pins 5-0 */
1416#define AWIN_PIO_PG_SDC1_FUNC 4 1416#define AWIN_PIO_PG_SDC1_FUNC 4
1417#define AWIN_PIO_PG_CSI0_PINS 0x00000ff0 /* PG pins 11-4 */ 1417#define AWIN_PIO_PG_CSI0_PINS 0x00000ff0 /* PG pins 11-4 */
1418#define AWIN_PIO_PG_CSI0_FUNC 5 1418#define AWIN_PIO_PG_CSI0_FUNC 5
1419 1419
1420#define AWIN_PIO_PH_PINS 28 1420#define AWIN_PIO_PH_PINS 28
1421#define AWIN_PIO_PH_LCD1_PINS 0x0fffffff /* PH pins 27-0 */ 1421#define AWIN_PIO_PH_LCD1_PINS 0x0fffffff /* PH pins 27-0 */
1422#define AWIN_PIO_PH_LCD1_FUNC 2 1422#define AWIN_PIO_PH_LCD1_FUNC 2
1423#define AWIN_PIO_PH_PATA_PINS 0x0fffffff /* PH pins 27-0 */ 1423#define AWIN_PIO_PH_PATA_PINS 0x0fffffff /* PH pins 27-0 */
1424#define AWIN_PIO_PH_PATA_FUNC 3 1424#define AWIN_PIO_PH_PATA_FUNC 3
1425#define AWIN_PIO_PH_EMAC_PINS 0x0fffcf00 /* PH pins 27-14,11-8 */ 1425#define AWIN_PIO_PH_EMAC_PINS 0x0fffcf00 /* PH pins 27-14,11-8 */
1426#define AWIN_PIO_PH_EMAC_FUNC 3 1426#define AWIN_PIO_PH_EMAC_FUNC 3