 @@ -1,14 +1,14 @@
-#	$NetBSD: files.awin,v 1.8.10.4 2014/11/23 13:07:04 martin Exp $
+#	$NetBSD: files.awin,v 1.8.10.5 2016/06/22 08:26:05 snj Exp $
+#
 # Configuration info for Allwinner ARM Peripherals
+#
 include "arch/arm/pic/files.pic"
 include "arch/arm/cortex/files.cortex"
 file	arch/arm/arm32/arm32_boot.c
 file	arch/arm/arm32/arm32_kvminit.c
 file	arch/arm/arm32/arm32_reboot.c
 file	arch/arm/arm32/irq_dispatch.S
 file	arch/arm/allwinner/awin_board.c
 @@ -54,27 +54,27 @@ attach	awinrtc at awinio with awin_rtc
 file	arch/arm/allwinner/awin_rtc.c		awin_rtc
 # A10 Timers
 device	awintmr
 attach	awintmr at awinio with awin_tmr
 file	arch/arm/allwinner/awin_tmr.c		awin_tmr
 # A20/A31 64-bit counter
 device	awincnt
 attach	awincnt at awinio with awin_cnt
 file	arch/arm/allwinner/awin_cnt.c		awin_cnt
 # A10/A20 UART
-options 	COM_16750			# for IIR_BUSY
+options 	COM_AWIN			# for IIR_BUSY
 attach	com at awinio with awin_com
 file	arch/arm/allwinner/awin_com.c		awin_com
 # A10/A20 GPIO
 device	awingpio : gpiobus
 attach	awingpio at awinio with awin_gpio
 file	arch/arm/allwinner/awin_gpio.c		awin_gpio | awin_io  needs-flag
 # A10/A20 DMA
 device	awindma
 attach	awindma at awinio with awin_dma
 file	arch/arm/allwinner/awin_dma.c		awin_dma
 file	arch/arm/allwinner/awin_dma_a10.c	awin_dma & (allwinner_a10 | allwinner_a20)

 @@ -1,14 +1,14 @@
-#	$NetBSD: files,v 1.1096.2.6 2015/05/19 04:42:31 snj Exp $
+#	$NetBSD: files,v 1.1096.2.7 2016/06/22 08:26:05 snj Exp $
 #	@(#)files.newconf	7.5 (Berkeley) 5/10/93
 version 	20100430
+#
 # device classes
+#
 devclass disk
 devclass tape
 devclass ifnet
 devclass tty
 devclass audiodev
 devclass displaydev
 @@ -854,27 +854,27 @@ file	dev/ic/tms320av110.c		tms320av110
 # Novell NE2000-compatible Ethernet cards, based on the
 # National Semiconductor DS8390.
+#
 defflag	opt_ipkdb.h		IPKDB_NE			: IPKDB_DP8390
 device	ne: ether, ifnet, arp, dp8390nic, mii
 file	dev/ic/ne2000.c			ne | ipkdb_ne
 # 8250/16[45]50-based "com" ports
+#
 defflag	opt_com.h		COM_DEBUG
 # XXX In a perfect world, this would be done with attributes
 defflag	opt_com.h		COM_16650 COM_16750
 				COM_HAYESP COM_PXA2X0 COM_AU1X00
-				COM_REGMAP COM_FUNCMAP
+				COM_REGMAP COM_FUNCMAP COM_AWIN
 defparam opt_com.h		COM_TOLERANCE
 device	com { } : tty
 file	dev/ic/com.c			com			needs-flag
 # PC-like keyboard controller
+#
 device	pckbc: pckbport
 file	dev/ic/pckbc.c			pckbc			needs-flag
 device	attimer
 file	dev/ic/attimer.c		attimer			needs-flag
 # Cirrus Logic CD240[01] 4-port Multi-Protocol Communications Controller

 @@ -1,14 +1,14 @@
-/* $NetBSD: com.c,v 1.327 2014/08/10 16:44:35 tls Exp $ */
+/* $NetBSD: com.c,v 1.327.2.1 2016/06/22 08:26:05 snj Exp $ */
 /*-
  * Copyright (c) 1998, 1999, 2004, 2008 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Charles M. Hannum.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -56,27 +56,27 @@
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  *	@(#)com.c	7.5 (Berkeley) 5/16/91
  */
 /*
  * COM driver, uses National Semiconductor NS16450/NS16550AF UART
  * Supports automatic hardware flow control on StarTech ST16C650A UART
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: com.c,v 1.327 2014/08/10 16:44:35 tls Exp $");
+__KERNEL_RCSID(0, "$NetBSD: com.c,v 1.327.2.1 2016/06/22 08:26:05 snj Exp $");
 #include "opt_com.h"
 #include "opt_ddb.h"
 #include "opt_kgdb.h"
 #include "opt_lockdebug.h"
 #include "opt_multiprocessor.h"
 #include "opt_ntp.h"
 #include "rnd.h"
 /* The COM16650 option was renamed to COM_16650. */
 #ifdef COM16650
 #error Obsolete COM16650 option; use COM_16650 instead.
 @@ -415,27 +415,27 @@ com_attach_subr(struct com_softc *sc)
 		sc->sc_ier = 0;
 	CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
 	if (bus_space_is_equal(regsp->cr_iot, comcons_info.regs.cr_iot) &&
 	    regsp->cr_iobase == comcons_info.regs.cr_iobase) {
 		comconsattached = 1;
 		if (cn_tab == NULL && comcnreattach() != 0) {
 			printf("can't re-init serial console @%lx\n",
 			    (u_long)comcons_info.regs.cr_iobase);
+		}
-#ifdef COM_16750
+#if defined(COM_16750) || defined(COM_AWIN)
 		/* Use in comintr(). */
  		sc->sc_lcr = cflag2lcr(comcons_info.cflag);
 #endif
 		/* Make sure the console is always "hardwired". */
 		delay(10000);			/* wait for output to finish */
 		if (is_console) {
 			SET(sc->sc_hwflags, COM_HW_CONSOLE);
+		}
 		SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
+	}
 @@ -1526,27 +1526,27 @@ com_iflush(struct com_softc *sc)
 	while (ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)
 	    && --timo)
 #ifdef DIAGNOSTIC
 		reg =
 #else
 		    (void)
 #endif
 		    CSR_READ_1(regsp, COM_REG_RXDATA);
 #ifdef DIAGNOSTIC
 	if (!timo)
 		aprint_error_dev(sc->sc_dev, "com_iflush timeout %02x\n", reg);
 #endif
-#ifdef COM_16750
+#if defined(COM_16750) || defined(COM_AWIN)
 	uint8_t fifo;
 	/*
 	 * Reset all Rx/Tx FIFO, preserve current FIFO length.
 	 * This should prevent triggering busy interrupt while
 	 * manipulating divisors.
 	 */
 	fifo = CSR_READ_1(regsp, COM_REG_FIFO) & (FIFO_TRIGGER_1 |
 	    FIFO_TRIGGER_4 | FIFO_TRIGGER_8 | FIFO_TRIGGER_14);
 	CSR_WRITE_1(regsp, COM_REG_FIFO, fifo | FIFO_ENABLE | FIFO_RCV_RST |
 	    FIFO_XMT_RST);
 	delay(100);
 #endif
+}
 @@ -1968,43 +1968,78 @@ comintr(void *arg)
 	u_int cc;
 	u_char lsr, iir;
 	if (COM_ISALIVE(sc) == 0)
 		return (0);
 	KASSERT(regsp != NULL);
 	mutex_spin_enter(&sc->sc_lock);
 	iir = CSR_READ_1(regsp, COM_REG_IIR);
 	/* Handle ns16750-specific busy interrupt. */
 #ifdef COM_16750
 #ifdef COM_AWIN
 #error "COM_16750 and COM_AWIN are exclusive"
 #endif
 	int timeout;
 	if ((iir & IIR_BUSY) == IIR_BUSY) {
 		for (timeout = 10000;
 		    (CSR_READ_1(regsp, COM_REG_USR) & 0x1) != 0; timeout--)
 			if (timeout <= 0) {
 				aprint_error_dev(sc->sc_dev,
 				    "timeout while waiting for BUSY interrupt "
 				    "acknowledge\n");
 				mutex_spin_exit(&sc->sc_lock);
 				return (0);
+			}
 		CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr);
 		iir = CSR_READ_1(regsp, COM_REG_IIR);
+	}
 #endif /* COM_16750 */
 #ifdef COM_AWIN
 	/* Allwinner BUSY interrupt */
 	if ((iir & IIR_BUSY) == IIR_BUSY) {
 		if ((CSR_READ_1(regsp, COM_REG_USR) & 0x1) != 0) {
 			CSR_WRITE_1(regsp, COM_REG_HALT, HALT_CHCFG_EN);
 			CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr | LCR_DLAB);
 			CSR_WRITE_1(regsp, COM_REG_DLBL, sc->sc_dlbl);
 			CSR_WRITE_1(regsp, COM_REG_DLBH, sc->sc_dlbh);
 			CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr);
 			CSR_WRITE_1(regsp, COM_REG_HALT,
 			    HALT_CHCFG_EN | HALT_CHCFG_UD);
 			for (int timeout = 10000000;
 			    (CSR_READ_1(regsp, COM_REG_HALT) & HALT_CHCFG_UD) != 0;
 			    timeout--) {
 				if (timeout <= 0) {
 					aprint_error_dev(sc->sc_dev,
 					    "timeout while waiting for HALT "
 					    "update acknowledge 0x%x 0x%x\n",
 					    CSR_READ_1(regsp, COM_REG_HALT),
 					    CSR_READ_1(regsp, COM_REG_USR));
 					break;
+				}
+			}
 			CSR_WRITE_1(regsp, COM_REG_HALT, 0);
 			(void)CSR_READ_1(regsp, COM_REG_USR);
 		} else {
 			CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr | LCR_DLAB);
 			CSR_WRITE_1(regsp, COM_REG_DLBL, sc->sc_dlbl);
 			CSR_WRITE_1(regsp, COM_REG_DLBH, sc->sc_dlbh);
 			CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr);
+		}
+	}
 #endif /* COM_AWIN */
 	if (ISSET(iir, IIR_NOPEND)) {
 		mutex_spin_exit(&sc->sc_lock);
 		return (0);
+	}
 	end = sc->sc_ebuf;
 	put = sc->sc_rbput;
 	cc = sc->sc_rbavail;
 again:	do {
 		u_char	msr, delta;

 @@ -1,14 +1,14 @@
-/*	$NetBSD: comreg.h,v 1.22 2013/10/03 13:23:03 kiyohara Exp $	*/
+/*	$NetBSD: comreg.h,v 1.22.4.1 2016/06/22 08:26:05 snj Exp $	*/
 /*-
  * Copyright (c) 1991 The Regents of the University of California.
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -53,27 +53,27 @@
 #define	IER_ERXTOUT	0x10	/* Enable rx timeout interrupt */
 #define	IER_EUART	0x40	/* Enable UART */
 /* interrupt identification register */
 #define	IIR_IMASK	0xf
 #define	IIR_RXTOUT	0xc
 #define	IIR_RLS		0x6	/* Line status change */
 #define	IIR_RXRDY	0x4	/* Receiver ready */
 #define	IIR_TXRDY	0x2	/* Transmitter ready */
 #define	IIR_MLSC	0x0	/* Modem status */
 #define	IIR_NOPEND	0x1	/* No pending interrupts */
 #define	IIR_64B_FIFO	0x20	/* 64byte FIFO Enabled (16750) */
 #define	IIR_FIFO_MASK	0xc0	/* set if FIFOs are enabled */
-#ifdef COM_16750
+#if defined(COM_16750) || defined(COM_AWIN)
 #define IIR_BUSY	0x7	/* Busy indicator */
 #endif
 /* fifo control register */
 #define	FIFO_ENABLE	0x01	/* Turn the FIFO on */
 #define	FIFO_RCV_RST	0x02	/* Reset RX FIFO */
 #define	FIFO_XMT_RST	0x04	/* Reset TX FIFO */
 #define	FIFO_DMA_MODE	0x08
 #define	FIFO_64B_ENABLE	0x20	/* 64byte FIFO Enable (16750) */
 #define	FIFO_TRIGGER_1	0x00	/* Trigger RXRDY intr on 1 character */
 #define	FIFO_TRIGGER_4	0x40	/* ibid 4 */
 #define	FIFO_TRIGGER_8	0x80	/* ibid 8 */
 #define	FIFO_TRIGGER_14	0xc0	/* ibid 14 */
 @@ -146,16 +146,22 @@
 #define MDR1_SIP_MODE			0x40
 #define MDR1_SCT			0x20
 #define MDR1_SET_TXIR			0x10
 #define MDR1_IR_SLEEP			0x08
 #define MDR1_MODE_DISABLE		0x07
 #define MDR1_MODE_FIR			0x05
 #define MDR1_MODE_MIR			0x04
 #define MDR1_MODE_UART_13X		0x03
 #define MDR1_MODE_UART_16X_AUTOBAUD	0x02
 #define MDR1_MODE_SIR			0x01
 #define MDR1_MODE_UART_16X		0x00
 #define MDR1_MODE_MASK			0x07
 #ifdef COM_AWIN
 /* AWIN-specific registers */
 #define HALT_CHCFG_UD			0x04 /* apply updates to LCR/dividors */
 #define HALT_CHCFG_EN			0x02 /* enable change while busy */
 #endif
 /* XXX ISA-specific. */
 #define	COM_NPORTS	8

 @@ -1,14 +1,14 @@
-/*	$NetBSD: comvar.h,v 1.78 2013/10/03 13:23:03 kiyohara Exp $	*/
+/*	$NetBSD: comvar.h,v 1.78.4.1 2016/06/22 08:26:05 snj Exp $	*/
 /*
  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. All advertising materials mentioning features or use of this software
 @@ -85,26 +85,32 @@ int com_is_console(bus_space_tag_t, bus_
 #define	COM_REG_IIR		5
 #define	COM_REG_FIFO		6
 #define	COM_REG_TCR		6
 #define	COM_REG_EFR		7
 #define	COM_REG_TLR		7
 #define	COM_REG_LCR		8
 #define	COM_REG_MDR1		8
 #define	COM_REG_MCR		9
 #define	COM_REG_LSR		10
 #define	COM_REG_MSR		11
 #ifdef	COM_16750
 #define	COM_REG_USR		31
 #endif
 #ifdef	COM_AWIN
 #define	COM_REG_USR		31
 #define	COM_REG_TFL		32
 #define	COM_REG_RFL		33
 #define	COM_REG_HALT		41
 #endif
 struct com_regs {
 	bus_space_tag_t		cr_iot;
 	bus_space_handle_t	cr_ioh;
 	bus_addr_t		cr_iobase;
 	bus_size_t		cr_nports;
 #ifdef COM_16750
 	bus_size_t		cr_map[32];
 #else
 	bus_size_t		cr_map[16];
 #endif
 };
 @@ -132,26 +138,32 @@ extern const bus_size_t com_std_map[16];
 #define	COM_REG_IIR		com_iir
 #define	COM_REG_FIFO		com_fifo
 #define	COM_REG_EFR		com_efr
 #define	COM_REG_LCR		com_lctl
 #define	COM_REG_MCR		com_mcr
 #define	COM_REG_LSR		com_lsr
 #define	COM_REG_MSR		com_msr
 #define	COM_REG_TCR		com_msr
 #define	COM_REG_TLR		com_scratch
 #define	COM_REG_MDR1		8
 #ifdef	COM_16750
 #define COM_REG_USR		com_usr
 #endif
 #ifdef	COM_AWIN
 #define COM_REG_USR		com_usr
 #define	COM_REG_TFL		com_tfl
 #define	COM_REG_RFL		com_rfl
 #define	COM_REG_HALT		com_halt
 #endif
 struct com_regs {
 	bus_space_tag_t		cr_iot;
 	bus_space_handle_t	cr_ioh;
 	bus_addr_t		cr_iobase;
 	bus_size_t		cr_nports;
 };
 #define	COM_INIT_REGS(regs, tag, hdl, addr)		\
 	do {						\
 		regs.cr_iot = tag;			\
 		regs.cr_ioh = hdl;			\
 		regs.cr_iobase = addr;			\

 @@ -1,14 +1,14 @@
-/*	$NetBSD: ns16550reg.h,v 1.10 2013/10/03 13:23:03 kiyohara Exp $	*/
+/*	$NetBSD: ns16550reg.h,v 1.10.4.1 2016/06/22 08:26:05 snj Exp $	*/
 /*-
  * Copyright (c) 1991 The Regents of the University of California.
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -44,14 +44,19 @@
 #define	com_lctl	3	/* line control register (R/W) */
 #define	com_cfcr	3	/* line control register (R/W) */
 #define	com_mcr		4	/* modem control register (R/W) */
 #define	com_lsr		5	/* line status register (R/W) */
 #define	com_msr		6	/* modem status register (R/W) */
 #define	com_scratch	7	/* scratch register (R/W) */
 /*
  * Additional register present in NS16750
  */
 #ifdef COM_16750
 #define com_usr		31	/* status register (R) */
 #endif
 #ifdef	COM_AWIN
 #define	com_usr		31	/* status register (R) */
 #define	com_tfl		32	/* transmit fifo level (R) */
 #define	com_rfl		33	/* receive fifo level (R) */
 #define	com_halt	41	/* halt tx (R/W) */
 #endif