Mon Jul 11 16:18:56 2016 UTC ()
Use pmap_kenter flags to create cached/uncached entries.
#include <mips/locore.h> when appropriate


(matt)
diff -r1.18 -r1.19 src/sys/arch/arc/arc/bus_space_sparse.c
diff -r1.16 -r1.17 src/sys/arch/arc/arc/c_nec_eisa.c
diff -r1.5 -r1.6 src/sys/arch/emips/emips/interrupt.c
diff -r1.3 -r1.4 src/sys/arch/emips/emips/xilinx_ml40x.c
diff -r1.4 -r1.5 src/sys/arch/emips/emips/xs_bee3.c
diff -r1.5 -r1.6 src/sys/arch/evbmips/cavium/machdep.c
diff -r1.18 -r1.19 src/sys/arch/evbmips/gdium/machdep.c
diff -r1.44 -r1.45 src/sys/arch/evbmips/malta/machdep.c
diff -r1.31 -r1.32 src/sys/arch/hpcmips/hpcmips/bus_space.c
diff -r1.44 -r1.45 src/sys/arch/hpcmips/tx/tx3912video.c

cvs diff -r1.18 -r1.19 src/sys/arch/arc/arc/bus_space_sparse.c (expand / switch to unified diff)

--- src/sys/arch/arc/arc/bus_space_sparse.c 2011/07/01 19:28:00 1.18
+++ src/sys/arch/arc/arc/bus_space_sparse.c 2016/07/11 16:18:55 1.19
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: bus_space_sparse.c,v 1.18 2011/07/01 19:28:00 dyoung Exp $ */ 1/* $NetBSD: bus_space_sparse.c,v 1.19 2016/07/11 16:18:55 matt Exp $ */
2/* NetBSD: bus_machdep.c,v 1.1 2000/01/26 18:48:00 drochner Exp */ 2/* NetBSD: bus_machdep.c,v 1.1 2000/01/26 18:48:00 drochner Exp */
3 3
4/*- 4/*-
5 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. 5 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
6 * All rights reserved. 6 * All rights reserved.
7 * 7 *
8 * This code is derived from software contributed to The NetBSD Foundation 8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace 9 * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
10 * Simulation Facility, NASA Ames Research Center. 10 * Simulation Facility, NASA Ames Research Center.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions 13 * modification, are permitted provided that the following conditions
14 * are met: 14 * are met:
@@ -29,114 +29,93 @@ @@ -29,114 +29,93 @@
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE. 31 * POSSIBILITY OF SUCH DAMAGE.
32 */ 32 */
33 33
34/* 34/*
35 * For sparse bus space 35 * For sparse bus space
36 * 36 *
37 * This bus_space uses KSEG2 mapping, if the physical address is not 37 * This bus_space uses KSEG2 mapping, if the physical address is not
38 * accessible via KSEG0/KSEG1. 38 * accessible via KSEG0/KSEG1.
39 */ 39 */
40 40
41#include <sys/cdefs.h> 41#include <sys/cdefs.h>
42__KERNEL_RCSID(0, "$NetBSD: bus_space_sparse.c,v 1.18 2011/07/01 19:28:00 dyoung Exp $"); 42__KERNEL_RCSID(0, "$NetBSD: bus_space_sparse.c,v 1.19 2016/07/11 16:18:55 matt Exp $");
43 43
44#include <sys/param.h> 44#include <sys/param.h>
45#include <sys/systm.h> 45#include <sys/bus.h>
46#include <sys/malloc.h> 
47#include <sys/extent.h> 46#include <sys/extent.h>
 47#include <sys/malloc.h>
 48#include <sys/systm.h>
48 49
49#include <uvm/uvm_extern.h> 50#include <uvm/uvm_extern.h>
50 51
51#include <mips/cpuregs.h> 52#include <mips/locore.h>
52#include <mips/pte.h> 53#include <mips/pte.h>
53 54
54#include <sys/bus.h> 
55 
56extern paddr_t kvtophys(vaddr_t); /* XXX */ 55extern paddr_t kvtophys(vaddr_t); /* XXX */
57 56
58static void arc_kseg2_make_cacheable(vaddr_t vaddr, vsize_t size); 
59 
60static void 
61arc_kseg2_make_cacheable(vaddr_t vaddr, vsize_t size) 
62{ 
63 vaddr_t start, end; 
64 pt_entry_t *pte; 
65 uint32_t entry, mask; 
66 
67 start = mips_trunc_page(vaddr); 
68 end = mips_round_page(vaddr + size); 
69 mask = ~(CPUISMIPS3 ? MIPS3_PG_UNCACHED : MIPS1_PG_N); 
70 for (; start < end; start += PAGE_SIZE) { 
71 pte = kvtopte(start); 
72 entry = pte->pt_entry & mask; 
73 pte->pt_entry &= entry; 
74 tlb_update(start, entry); 
75 } 
76} 
77 
78void 57void
79arc_sparse_bus_space_init(bus_space_tag_t bst, const char *name, paddr_t paddr, 58arc_sparse_bus_space_init(bus_space_tag_t bst, const char *name, paddr_t paddr,
80 bus_addr_t start, bus_size_t size) 59 bus_addr_t start, bus_size_t size)
81{ 60{
82 61
83 arc_bus_space_init(bst, name, paddr, ARC_BUS_SPACE_UNMAPPED, 62 arc_bus_space_init(bst, name, paddr, ARC_BUS_SPACE_UNMAPPED,
84 start, size); 63 start, size);
85 bst->bs_compose_handle = arc_sparse_bus_space_compose_handle; 64 bst->bs_compose_handle = arc_sparse_bus_space_compose_handle;
86 bst->bs_dispose_handle = arc_sparse_bus_space_dispose_handle; 65 bst->bs_dispose_handle = arc_sparse_bus_space_dispose_handle;
87 bst->bs_paddr = arc_sparse_bus_space_paddr; 66 bst->bs_paddr = arc_sparse_bus_space_paddr;
88} 67}
89 68
90int 69int
91arc_sparse_bus_space_compose_handle(bus_space_tag_t bst, bus_addr_t addr, 70arc_sparse_bus_space_compose_handle(bus_space_tag_t bst, bus_addr_t addr,
92 bus_size_t size, int flags, bus_space_handle_t *bshp) 71 bus_size_t size, int flags, bus_space_handle_t *bshp)
93{ 72{
94 bus_size_t offset = addr - bst->bs_start; 73 bus_size_t offset = addr - bst->bs_start;
95 /* 74 /*
96 * Since all buses can be linearly mappable, we don't have to check 75 * Since all buses can be linearly mappable, we don't have to check
97 * BUS_SPACE_MAP_LINEAR and BUS_SPACE_MAP_PREFETCHABLE. 76 * BUS_SPACE_MAP_LINEAR and BUS_SPACE_MAP_PREFETCHABLE.
98 */ 77 */
99 int cacheable = (flags & BUS_SPACE_MAP_CACHEABLE); 78 const u_int pmap_flags = (flags & BUS_SPACE_MAP_CACHEABLE)
 79 ? PMAP_WRITE_BACK
 80 : 0;
100 81
101 /* 82 /*
102 * XXX - `bst->bs_pbase' must be page aligned, 83 * XXX - `bst->bs_pbase' must be page aligned,
103 * mips_trunc/round_page() cannot treat paddr_t due to overflow. 84 * mips_trunc/round_page() cannot treat paddr_t due to overflow.
104 */ 85 */
105 paddr_t start = bst->bs_pbase + mips_trunc_page(offset); 86 paddr_t start = bst->bs_pbase + mips_trunc_page(offset);
106 paddr_t end = bst->bs_pbase + mips_round_page(offset + size); 87 paddr_t end = bst->bs_pbase + mips_round_page(offset + size);
107 88
108 if (end <= MIPS_KSEG1_START - MIPS_KSEG0_START) { 89 if (end <= MIPS_KSEG1_START - MIPS_KSEG0_START) {
109 /* mappable on KSEG0 or KSEG1 */ 90 /* mappable on KSEG0 or KSEG1 */
110 *bshp = (cacheable ? 91 *bshp = (cacheable ?
111 MIPS_PHYS_TO_KSEG0(start) : 92 MIPS_PHYS_TO_KSEG0(start) :
112 MIPS_PHYS_TO_KSEG1(start)); 93 MIPS_PHYS_TO_KSEG1(start));
113 } else { 94 } else {
114 vaddr_t va, 95 vaddr_t vaddr = uvm_km_alloc(kernel_map, (vsize_t)(end - start),
115 vaddr = uvm_km_alloc(kernel_map, (vsize_t)(end - start), 0, 96 0, UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
116 UVM_KMF_VAONLY | UVM_KMF_NOWAIT); 
117 97
118 if (vaddr == 0) 98 if (vaddr == 0)
119 panic("arc_sparse_bus_space_compose_handle: " 99 panic("arc_sparse_bus_space_compose_handle: "
120 "cannot allocate KVA 0x%llx..0x%llx", 100 "cannot allocate KVA 0x%llx..0x%llx",
121 start, end); 101 start, end);
122 for (va = vaddr; start < end; 102 for (vaddr_t va = vaddr; start < end;
123 start += PAGE_SIZE, va += PAGE_SIZE) 103 start += PAGE_SIZE, va += PAGE_SIZE) {
124 pmap_kenter_pa(va, start, 104 pmap_kenter_pa(va, start, VM_PROT_READ|VM_PROT_WRITE,
125 VM_PROT_READ|VM_PROT_WRITE, 0); 105 pmap_flags);
 106 }
126 pmap_update(pmap_kernel()); 107 pmap_update(pmap_kernel());
127 vaddr += (offset & PGOFSET); 108 vaddr += (offset & PGOFSET);
128 if (cacheable) 
129 arc_kseg2_make_cacheable(vaddr, size); 
130 *bshp = vaddr; 109 *bshp = vaddr;
131 } 110 }
132 return 0; 111 return 0;
133} 112}
134 113
135int 114int
136arc_sparse_bus_space_dispose_handle(bus_space_tag_t bst, bus_space_handle_t bsh, 115arc_sparse_bus_space_dispose_handle(bus_space_tag_t bst, bus_space_handle_t bsh,
137 bus_size_t size) 116 bus_size_t size)
138{ 117{
139 vaddr_t start = mips_trunc_page(bsh); 118 vaddr_t start = mips_trunc_page(bsh);
140 vaddr_t end = mips_round_page(bsh + size); 119 vaddr_t end = mips_round_page(bsh + size);
141 120
142 if (start < MIPS_KSEG2_START) /* KSEG0/KSEG1 */ 121 if (start < MIPS_KSEG2_START) /* KSEG0/KSEG1 */

cvs diff -r1.16 -r1.17 src/sys/arch/arc/arc/c_nec_eisa.c (expand / switch to unified diff)

--- src/sys/arch/arc/arc/c_nec_eisa.c 2011/02/20 07:52:42 1.16
+++ src/sys/arch/arc/arc/c_nec_eisa.c 2016/07/11 16:18:55 1.17
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: c_nec_eisa.c,v 1.16 2011/02/20 07:52:42 matt Exp $ */ 1/* $NetBSD: c_nec_eisa.c,v 1.17 2016/07/11 16:18:55 matt Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2003 Izumi Tsutsui. All rights reserved. 4 * Copyright (c) 2003 Izumi Tsutsui. All rights reserved.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions 7 * modification, are permitted provided that the following conditions
8 * are met: 8 * are met:
9 * 1. Redistributions of source code must retain the above copyright 9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer. 10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright 11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the 12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution. 13 * documentation and/or other materials provided with the distribution.
14 * 14 *
@@ -45,37 +45,39 @@ @@ -45,37 +45,39 @@
45 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 45 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
46 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 46 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
47 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 47 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
48 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 48 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
49 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 49 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
50 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 50 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
51 */ 51 */
52 52
53/* 53/*
54 * for NEC EISA generation machines. 54 * for NEC EISA generation machines.
55 */ 55 */
56 56
57#include <sys/cdefs.h> 57#include <sys/cdefs.h>
58__KERNEL_RCSID(0, "$NetBSD: c_nec_eisa.c,v 1.16 2011/02/20 07:52:42 matt Exp $"); 58__KERNEL_RCSID(0, "$NetBSD: c_nec_eisa.c,v 1.17 2016/07/11 16:18:55 matt Exp $");
59 59
60#define __INTR_PRIVATE 60#define __INTR_PRIVATE
61#include <sys/param.h> 61#include <sys/param.h>
62#include <sys/systm.h> 62#include <sys/systm.h>
63#include <sys/kcore.h> 63#include <sys/kcore.h>
64#include <sys/device.h> 64#include <sys/device.h>
65#include <sys/intr.h> 65#include <sys/intr.h>
66 66
67#include <uvm/uvm_extern.h> 67#include <uvm/uvm_extern.h>
68 68
 69#include <mips/locore.h>
 70
69#include <machine/autoconf.h> 71#include <machine/autoconf.h>
70#include <machine/pio.h> 72#include <machine/pio.h>
71#include <machine/platform.h> 73#include <machine/platform.h>
72#include <machine/wired_map.h> 74#include <machine/wired_map.h>
73#include <mips/pte.h> 75#include <mips/pte.h>
74 76
75#include <dev/isa/isavar.h> 77#include <dev/isa/isavar.h>
76 78
77#include <arc/arc/arcbios.h> 79#include <arc/arc/arcbios.h>
78#include <arc/jazz/pica.h> 80#include <arc/jazz/pica.h>
79#include <arc/jazz/rd94.h> 81#include <arc/jazz/rd94.h>
80#include <arc/jazz/jazziovar.h> 82#include <arc/jazz/jazziovar.h>
81#include <arc/isa/isabrvar.h> 83#include <arc/isa/isabrvar.h>

cvs diff -r1.5 -r1.6 src/sys/arch/emips/emips/interrupt.c (expand / switch to unified diff)

--- src/sys/arch/emips/emips/interrupt.c 2012/10/27 17:17:46 1.5
+++ src/sys/arch/emips/emips/interrupt.c 2016/07/11 16:18:56 1.6
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: interrupt.c,v 1.5 2012/10/27 17:17:46 chs Exp $ */ 1/* $NetBSD: interrupt.c,v 1.6 2016/07/11 16:18:56 matt Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2010 The NetBSD Foundation, Inc. 4 * Copyright (c) 2010 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code was written by Alessandro Forin and Neil Pittman 7 * This code was written by Alessandro Forin and Neil Pittman
8 * at Microsoft Research and contributed to The NetBSD Foundation 8 * at Microsoft Research and contributed to The NetBSD Foundation
9 * by Microsoft Corporation. 9 * by Microsoft Corporation.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions 12 * modification, are permitted provided that the following conditions
13 * are met: 13 * are met:
14 * 1. Redistributions of source code must retain the above copyright 14 * 1. Redistributions of source code must retain the above copyright
@@ -21,27 +21,27 @@ @@ -21,27 +21,27 @@
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE. 30 * POSSIBILITY OF SUCH DAMAGE.
31 */ 31 */
32 32
33#include <sys/cdefs.h> 33#include <sys/cdefs.h>
34__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.5 2012/10/27 17:17:46 chs Exp $"); 34__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.6 2016/07/11 16:18:56 matt Exp $");
35 35
36#include <sys/param.h> 36#include <sys/param.h>
37#include <sys/device.h> 37#include <sys/device.h>
38#include <sys/proc.h> 38#include <sys/proc.h>
39 39
40#include <uvm/uvm_extern.h> 40#include <uvm/uvm_extern.h>
41 41
42#include <mips/psl.h> 42#include <mips/psl.h>
43 43
44#include <machine/locore.h> 44#include <machine/locore.h>
45#include <machine/autoconf.h> 45#include <machine/autoconf.h>
46#include <machine/sysconf.h> 46#include <machine/sysconf.h>
47#include <machine/intr.h> 47#include <machine/intr.h>
@@ -74,31 +74,31 @@ intr_init(void) @@ -74,31 +74,31 @@ intr_init(void)
74 for (i = 0; i < MAX_DEV_NCOOKIES; i++) { 74 for (i = 0; i < MAX_DEV_NCOOKIES; i++) {
75 evcnt_attach_dynamic(&intrtab[i].ih_count, 75 evcnt_attach_dynamic(&intrtab[i].ih_count,
76 EVCNT_TYPE_INTR, NULL, "emips", intrnames[i]); 76 EVCNT_TYPE_INTR, NULL, "emips", intrnames[i]);
77 } 77 }
78 78
79 /* I am trying to make this standard so its here. Bah. */ 79 /* I am trying to make this standard so its here. Bah. */
80 struct tlbmask tlb; 80 struct tlbmask tlb;
81 81
82 /* This is ugly but efficient. Sigh. */ 82 /* This is ugly but efficient. Sigh. */
83#define TheAic ((struct _Aic *)INTERRUPT_CONTROLLER_DEFAULT_ADDRESS) 83#define TheAic ((struct _Aic *)INTERRUPT_CONTROLLER_DEFAULT_ADDRESS)
84 84
85 tlb.tlb_hi = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS; 85 tlb.tlb_hi = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS;
86 tlb.tlb_lo0 = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS | 0xf02; 86 tlb.tlb_lo0 = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS | 0xf02;
87 tlb_write_indexed(4, &tlb); 87 tlb_write_entry(4, &tlb);
88 88
89 tlb.tlb_hi = TIMER_DEFAULT_ADDRESS; 89 tlb.tlb_hi = TIMER_DEFAULT_ADDRESS;
90 tlb.tlb_lo0 = TIMER_DEFAULT_ADDRESS | 0xf02; 90 tlb.tlb_lo0 = TIMER_DEFAULT_ADDRESS | 0xf02;
91 tlb_write_indexed(5, &tlb); 91 tlb_write_entry(5, &tlb);
92} 92}
93 93
94/* 94/*
95 * emips uses one line for all I/O interrupts (0x8000). 95 * emips uses one line for all I/O interrupts (0x8000).
96 */ 96 */
97void 97void
98cpu_intr(int ppl, uint32_t status, vaddr_t pc) 98cpu_intr(int ppl, uint32_t status, vaddr_t pc)
99{ 99{
100 uint32_t ipending; 100 uint32_t ipending;
101 int ipl; 101 int ipl;
102 102
103 curcpu()->ci_data.cpu_nintr++; 103 curcpu()->ci_data.cpu_nintr++;
104 104

cvs diff -r1.3 -r1.4 src/sys/arch/emips/emips/xilinx_ml40x.c (expand / switch to unified diff)

--- src/sys/arch/emips/emips/xilinx_ml40x.c 2014/03/24 20:06:31 1.3
+++ src/sys/arch/emips/emips/xilinx_ml40x.c 2016/07/11 16:18:56 1.4
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: xilinx_ml40x.c,v 1.3 2014/03/24 20:06:31 christos Exp $ */ 1/* $NetBSD: xilinx_ml40x.c,v 1.4 2016/07/11 16:18:56 matt Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2010 The NetBSD Foundation, Inc. 4 * Copyright (c) 2010 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code was written by Alessandro Forin and Neil Pittman 7 * This code was written by Alessandro Forin and Neil Pittman
8 * at Microsoft Research and contributed to The NetBSD Foundation 8 * at Microsoft Research and contributed to The NetBSD Foundation
9 * by Microsoft Corporation. 9 * by Microsoft Corporation.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions 12 * modification, are permitted provided that the following conditions
13 * are met: 13 * are met:
14 * 1. Redistributions of source code must retain the above copyright 14 * 1. Redistributions of source code must retain the above copyright
@@ -21,27 +21,27 @@ @@ -21,27 +21,27 @@
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE. 30 * POSSIBILITY OF SUCH DAMAGE.
31 */ 31 */
32 32
33#include <sys/cdefs.h> 33#include <sys/cdefs.h>
34__KERNEL_RCSID(0, "$NetBSD: xilinx_ml40x.c,v 1.3 2014/03/24 20:06:31 christos Exp $"); 34__KERNEL_RCSID(0, "$NetBSD: xilinx_ml40x.c,v 1.4 2016/07/11 16:18:56 matt Exp $");
35 35
36#define __INTR_PRIVATE 36#define __INTR_PRIVATE
37 37
38#include <sys/param.h> 38#include <sys/param.h>
39#include <sys/systm.h> 39#include <sys/systm.h>
40#include <sys/device.h> 40#include <sys/device.h>
41#include <sys/cpu.h> 41#include <sys/cpu.h>
42 42
43#include <uvm/uvm_extern.h> 43#include <uvm/uvm_extern.h>
44 44
45#include <machine/cpu.h> 45#include <machine/cpu.h>
46#include <machine/intr.h> 46#include <machine/intr.h>
47#include <machine/sysconf.h> 47#include <machine/sysconf.h>
@@ -112,18 +112,18 @@ xilinx_ml40x_cons_init(void) @@ -112,18 +112,18 @@ xilinx_ml40x_cons_init(void)
112{ 112{
113 /* 113 /*
114 * Map the USART 1:1, we just turned on the TLB. 114 * Map the USART 1:1, we just turned on the TLB.
115 * NB: This must be a wired TLB entry lest we lose it before autoconf(). 115 * NB: This must be a wired TLB entry lest we lose it before autoconf().
116 */ 116 */
117#if 0 117#if 0
118 pmap_kenter_pa(USART_DEFAULT_ADDRESS, 118 pmap_kenter_pa(USART_DEFAULT_ADDRESS,
119 USART_DEFAULT_ADDRESS,VM_PROT_WRITE|VM_PROT_READ); 119 USART_DEFAULT_ADDRESS,VM_PROT_WRITE|VM_PROT_READ);
120#else 120#else
121 struct tlbmask tlb; 121 struct tlbmask tlb;
122 122
123 tlb.tlb_hi = USART_DEFAULT_ADDRESS; 123 tlb.tlb_hi = USART_DEFAULT_ADDRESS;
124 tlb.tlb_lo0 = USART_DEFAULT_ADDRESS | 0xf02; 124 tlb.tlb_lo0 = USART_DEFAULT_ADDRESS | 0xf02;
125 tlb_write_indexed(3, &tlb); 125 tlb_write_entry(3, &tlb);
126#endif 126#endif
127 127
128 dz_ebus_cnsetup(USART_DEFAULT_ADDRESS); 128 dz_ebus_cnsetup(USART_DEFAULT_ADDRESS);
129} 129}

cvs diff -r1.4 -r1.5 src/sys/arch/emips/emips/xs_bee3.c (expand / switch to unified diff)

--- src/sys/arch/emips/emips/xs_bee3.c 2014/03/24 20:06:31 1.4
+++ src/sys/arch/emips/emips/xs_bee3.c 2016/07/11 16:18:56 1.5
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: xs_bee3.c,v 1.4 2014/03/24 20:06:31 christos Exp $ */ 1/* $NetBSD: xs_bee3.c,v 1.5 2016/07/11 16:18:56 matt Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2010 The NetBSD Foundation, Inc. 4 * Copyright (c) 2010 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code was written by Alessandro Forin and Neil Pittman 7 * This code was written by Alessandro Forin and Neil Pittman
8 * at Microsoft Research and contributed to The NetBSD Foundation 8 * at Microsoft Research and contributed to The NetBSD Foundation
9 * by Microsoft Corporation. 9 * by Microsoft Corporation.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions 12 * modification, are permitted provided that the following conditions
13 * are met: 13 * are met:
14 * 1. Redistributions of source code must retain the above copyright 14 * 1. Redistributions of source code must retain the above copyright
@@ -21,27 +21,27 @@ @@ -21,27 +21,27 @@
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE. 30 * POSSIBILITY OF SUCH DAMAGE.
31 */ 31 */
32 32
33#include <sys/cdefs.h> 33#include <sys/cdefs.h>
34__KERNEL_RCSID(0, "$NetBSD: xs_bee3.c,v 1.4 2014/03/24 20:06:31 christos Exp $"); 34__KERNEL_RCSID(0, "$NetBSD: xs_bee3.c,v 1.5 2016/07/11 16:18:56 matt Exp $");
35 35
36#define __INTR_PRIVATE 36#define __INTR_PRIVATE
37 37
38#include <sys/param.h> 38#include <sys/param.h>
39#include <sys/systm.h> 39#include <sys/systm.h>
40#include <sys/device.h> 40#include <sys/device.h>
41#include <sys/cpu.h> 41#include <sys/cpu.h>
42#include <sys/intr.h> 42#include <sys/intr.h>
43 43
44#include <uvm/uvm_extern.h> 44#include <uvm/uvm_extern.h>
45 45
46#include <machine/sysconf.h> 46#include <machine/sysconf.h>
47#include <machine/locore.h> 47#include <machine/locore.h>
@@ -109,18 +109,18 @@ xs_bee3_cons_init(void) @@ -109,18 +109,18 @@ xs_bee3_cons_init(void)
109 109
110 /* 110 /*
111 * Map the USART 1:1, we just turned on the TLB. 111 * Map the USART 1:1, we just turned on the TLB.
112 * NB: This must be a wired TLB entry lest we lose it before autoconf(). 112 * NB: This must be a wired TLB entry lest we lose it before autoconf().
113 */ 113 */
114#if 0 114#if 0
115 pmap_kenter_pa(USART_DEFAULT_ADDRESS, 115 pmap_kenter_pa(USART_DEFAULT_ADDRESS,
116 USART_DEFAULT_ADDRESS,VM_PROT_WRITE|VM_PROT_READ); 116 USART_DEFAULT_ADDRESS,VM_PROT_WRITE|VM_PROT_READ);
117#else 117#else
118 struct tlbmask tlb; 118 struct tlbmask tlb;
119 119
120 tlb.tlb_hi = USART_DEFAULT_ADDRESS; 120 tlb.tlb_hi = USART_DEFAULT_ADDRESS;
121 tlb.tlb_lo0 = USART_DEFAULT_ADDRESS | 0xf02; 121 tlb.tlb_lo0 = USART_DEFAULT_ADDRESS | 0xf02;
122 tlb_write_indexed(3, &tlb); 122 tlb_write_entry(3, &tlb);
123#endif 123#endif
124 124
125 dz_ebus_cnsetup(USART_DEFAULT_ADDRESS); 125 dz_ebus_cnsetup(USART_DEFAULT_ADDRESS);
126} 126}

cvs diff -r1.5 -r1.6 src/sys/arch/evbmips/cavium/machdep.c (expand / switch to unified diff)

--- src/sys/arch/evbmips/cavium/machdep.c 2015/06/10 22:31:00 1.5
+++ src/sys/arch/evbmips/cavium/machdep.c 2016/07/11 16:18:56 1.6
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: machdep.c,v 1.5 2015/06/10 22:31:00 matt Exp $ */ 1/* $NetBSD: machdep.c,v 1.6 2016/07/11 16:18:56 matt Exp $ */
2 2
3/* 3/*
4 * Copyright 2001, 2002 Wasabi Systems, Inc. 4 * Copyright 2001, 2002 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc. 7 * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -104,27 +104,27 @@ @@ -104,27 +104,27 @@
104 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 104 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
105 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 105 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
106 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 106 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
107 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 107 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
108 * SUCH DAMAGE. 108 * SUCH DAMAGE.
109 * 109 *
110 * @(#)machdep.c 8.3 (Berkeley) 1/12/94 110 * @(#)machdep.c 8.3 (Berkeley) 1/12/94
111 * from: Utah Hdr: machdep.c 1.63 91/04/24 111 * from: Utah Hdr: machdep.c 1.63 91/04/24
112 */ 112 */
113 113
114#include "opt_multiprocessor.h" 114#include "opt_multiprocessor.h"
115 115
116#include <sys/cdefs.h> 116#include <sys/cdefs.h>
117__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.5 2015/06/10 22:31:00 matt Exp $"); 117__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.6 2016/07/11 16:18:56 matt Exp $");
118 118
119#include <sys/param.h> 119#include <sys/param.h>
120#include <sys/systm.h> 120#include <sys/systm.h>
121#include <sys/kernel.h> 121#include <sys/kernel.h>
122#include <sys/buf.h> 122#include <sys/buf.h>
123#include <sys/cpu.h> 123#include <sys/cpu.h>
124#include <sys/reboot.h> 124#include <sys/reboot.h>
125#include <sys/mount.h> 125#include <sys/mount.h>
126#include <sys/kcore.h> 126#include <sys/kcore.h>
127#include <sys/boot_flag.h> 127#include <sys/boot_flag.h>
128#include <sys/termios.h> 128#include <sys/termios.h>
129#include <sys/ksyms.h> 129#include <sys/ksyms.h>
130 130
@@ -169,40 +169,42 @@ int comcnrate = 115200; /* XXX should be @@ -169,40 +169,42 @@ int comcnrate = 115200; /* XXX should be
169/* Maps for VM objects. */ 169/* Maps for VM objects. */
170struct vm_map *phys_map = NULL; 170struct vm_map *phys_map = NULL;
171 171
172int netboot; 172int netboot;
173 173
174phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX]; 174phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
175int mem_cluster_cnt; 175int mem_cluster_cnt;
176 176
177void mach_init(uint64_t, uint64_t, uint64_t, uint64_t); 177void mach_init(uint64_t, uint64_t, uint64_t, uint64_t);
178 178
179struct octeon_config octeon_configuration; 179struct octeon_config octeon_configuration;
180struct octeon_btinfo octeon_btinfo; 180struct octeon_btinfo octeon_btinfo;
181 181
 182char octeon_nmi_stack[PAGE_SIZE] __section(".data1") __aligned(PAGE_SIZE);
 183
182/* 184/*
183 * Do all the stuff that locore normally does before calling main(). 185 * Do all the stuff that locore normally does before calling main().
184 */ 186 */
185void 187void
186mach_init(uint64_t arg0, uint64_t arg1, uint64_t arg2, uint64_t arg3) 188mach_init(uint64_t arg0, uint64_t arg1, uint64_t arg2, uint64_t arg3)
187{ 189{
188 uint64_t btinfo_paddr; 190 uint64_t btinfo_paddr;
189 u_quad_t memsize; 191 u_quad_t memsize;
190 int corefreq; 192 int corefreq;
191 193
192 mach_init_bss(); 194 mach_init_bss();
193 195
194 KASSERT(MIPS_XKPHYS_P(arg3)); 196 KASSERT(MIPS_XKPHYS_P(arg3));
195 btinfo_paddr = mips64_ld_a64(arg3 + OCTEON_BTINFO_PADDR_OFFSET); 197 btinfo_paddr = mips3_ld(arg3 + OCTEON_BTINFO_PADDR_OFFSET);
196 198
197 /* Should be in first 256MB segment */ 199 /* Should be in first 256MB segment */
198 KASSERT(btinfo_paddr < 256 * 1024 * 1024); 200 KASSERT(btinfo_paddr < 256 * 1024 * 1024);
199 memcpy(&octeon_btinfo, 201 memcpy(&octeon_btinfo,
200 (struct octeon_btinfo *)MIPS_PHYS_TO_KSEG0(btinfo_paddr), 202 (struct octeon_btinfo *)MIPS_PHYS_TO_KSEG0(btinfo_paddr),
201 sizeof(octeon_btinfo)); 203 sizeof(octeon_btinfo));
202 204
203 corefreq = octeon_btinfo.obt_eclock_hz; 205 corefreq = octeon_btinfo.obt_eclock_hz;
204 memsize = octeon_btinfo.obt_dram_size * 1024 * 1024; 206 memsize = octeon_btinfo.obt_dram_size * 1024 * 1024;
205 207
206 octeon_cal_timer(corefreq); 208 octeon_cal_timer(corefreq);
207 209
208 switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) { 210 switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
@@ -225,26 +227,38 @@ mach_init(uint64_t arg0, uint64_t arg1,  @@ -225,26 +227,38 @@ mach_init(uint64_t arg0, uint64_t arg1,
225 227
226 mach_init_console(); 228 mach_init_console();
227 229
228 mach_init_memory(memsize); 230 mach_init_memory(memsize);
229 231
230 /* 232 /*
231 * Allocate uarea page for lwp0 and set it. 233 * Allocate uarea page for lwp0 and set it.
232 */ 234 */
233 mips_init_lwp0_uarea(); 235 mips_init_lwp0_uarea();
234 236
235 boothowto = RB_AUTOBOOT; 237 boothowto = RB_AUTOBOOT;
236 boothowto |= AB_VERBOSE; 238 boothowto |= AB_VERBOSE;
237 239
 240#if 0
 241 curcpu()->ci_nmi_stack = octeon_nmi_stack + sizeof(octeon_nmi_stack) - sizeof(struct kernframe);
 242 *(uint64_t *)MIPS_PHYS_TO_KSEG0(0x800) = (intptr_t)octeon_reset_vector;
 243 const uint64_t wdog_reg = MIPS_PHYS_TO_XKPHYS_UNCACHED(CIU_WDOG0);
 244 uint64_t wdog = mips3_ld(wdog_reg);
 245 wdog &= ~(CIU_WDOGX_MODE|CIU_WDOGX_LEN);
 246 wdog |= __SHIFTIN(3, CIU_WDOGX_MODE);
 247 wdog |= CIU_WDOGX_LEN; // max period
 248 mips64_sd_a64(wdog_reg, wdog);
 249 printf("Watchdog enabled!\n");
 250#endif
 251
238#if defined(DDB) 252#if defined(DDB)
239 if (boothowto & RB_KDB) 253 if (boothowto & RB_KDB)
240 Debugger(); 254 Debugger();
241#endif 255#endif
242} 256}
243 257
244void 258void
245consinit(void) 259consinit(void)
246{ 260{
247 261
248 /* 262 /*
249 * Everything related to console initialization is done 263 * Everything related to console initialization is done
250 * in mach_init(). 264 * in mach_init().

cvs diff -r1.18 -r1.19 src/sys/arch/evbmips/gdium/machdep.c (expand / switch to unified diff)

--- src/sys/arch/evbmips/gdium/machdep.c 2016/02/01 17:37:39 1.18
+++ src/sys/arch/evbmips/gdium/machdep.c 2016/07/11 16:18:56 1.19
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: machdep.c,v 1.18 2016/02/01 17:37:39 christos Exp $ */ 1/* $NetBSD: machdep.c,v 1.19 2016/07/11 16:18:56 matt Exp $ */
2 2
3/* 3/*
4 * Copyright 2001, 2002 Wasabi Systems, Inc. 4 * Copyright 2001, 2002 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc. 7 * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -64,27 +64,27 @@ @@ -64,27 +64,27 @@
64 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
65 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
66 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
67 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
68 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
69 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
70 * SUCH DAMAGE. 70 * SUCH DAMAGE.
71 * 71 *
72 * @(#)machdep.c 8.3 (Berkeley) 1/12/94 72 * @(#)machdep.c 8.3 (Berkeley) 1/12/94
73 * from: Utah Hdr: machdep.c 1.63 91/04/24 73 * from: Utah Hdr: machdep.c 1.63 91/04/24
74 */ 74 */
75 75
76#include <sys/cdefs.h> 76#include <sys/cdefs.h>
77__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.18 2016/02/01 17:37:39 christos Exp $"); 77__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.19 2016/07/11 16:18:56 matt Exp $");
78 78
79#include "opt_ddb.h" 79#include "opt_ddb.h"
80#include "opt_execfmt.h" 80#include "opt_execfmt.h"
81#include "opt_modular.h" 81#include "opt_modular.h"
82 82
83#include <sys/param.h> 83#include <sys/param.h>
84#include <sys/boot_flag.h> 84#include <sys/boot_flag.h>
85#include <sys/buf.h> 85#include <sys/buf.h>
86#include <sys/cpu.h> 86#include <sys/cpu.h>
87#include <sys/device.h> 87#include <sys/device.h>
88#include <sys/kcore.h> 88#include <sys/kcore.h>
89#include <sys/kernel.h> 89#include <sys/kernel.h>
90#include <sys/ksyms.h> 90#include <sys/ksyms.h>
@@ -245,27 +245,27 @@ mach_init(int argc, char **argv, char ** @@ -245,27 +245,27 @@ mach_init(int argc, char **argv, char **
245 /* 245 /*
246 * Override the null bonito_pci_attach_hook with our own to we can 246 * Override the null bonito_pci_attach_hook with our own to we can
247 * fix the ralink (device 13). 247 * fix the ralink (device 13).
248 */ 248 */
249 gc->gc_pc.pc_attach_hook = gdium_pci_attach_hook; 249 gc->gc_pc.pc_attach_hook = gdium_pci_attach_hook;
250 gdium_bus_io_init(&gc->gc_iot, gc); 250 gdium_bus_io_init(&gc->gc_iot, gc);
251 gdium_bus_mem_init(&gc->gc_memt, gc); 251 gdium_bus_mem_init(&gc->gc_memt, gc);
252 gdium_dma_init(gc); 252 gdium_dma_init(gc);
253 gdium_cnattach(gc); 253 gdium_cnattach(gc);
254 254
255 /* 255 /*
256 * Disable the 2nd PCI window since we don't need it. 256 * Disable the 2nd PCI window since we don't need it.
257 */ 257 */
258 mips3_sd((uint64_t *)MIPS_PHYS_TO_KSEG1(BONITO_REGBASE + 0x158), 0xe); 258 mips3_sd(MIPS_PHYS_TO_KSEG1(BONITO_REGBASE + 0x158), 0xe);
259 pci_conf_write(&gc->gc_pc, pci_make_tag(&gc->gc_pc, 0, 0, 0), 18, 0); 259 pci_conf_write(&gc->gc_pc, pci_make_tag(&gc->gc_pc, 0, 0, 0), 18, 0);
260 260
261 /* 261 /*
262 * Get the timer from PMON. 262 * Get the timer from PMON.
263 */ 263 */
264 for (i = 0; envp[i] != NULL; i++) { 264 for (i = 0; envp[i] != NULL; i++) {
265 if (!strncmp(envp[i], "cpuclock=", 9)) { 265 if (!strncmp(envp[i], "cpuclock=", 9)) {
266 curcpu()->ci_cpu_freq = 266 curcpu()->ci_cpu_freq =
267 strtoul(&envp[i][9], NULL, 10); 267 strtoul(&envp[i][9], NULL, 10);
268 break; 268 break;
269 } 269 }
270 } 270 }
271 271

cvs diff -r1.44 -r1.45 src/sys/arch/evbmips/malta/machdep.c (expand / switch to unified diff)

--- src/sys/arch/evbmips/malta/machdep.c 2015/06/01 22:55:12 1.44
+++ src/sys/arch/evbmips/malta/machdep.c 2016/07/11 16:18:56 1.45
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: machdep.c,v 1.44 2015/06/01 22:55:12 matt Exp $ */ 1/* $NetBSD: machdep.c,v 1.45 2016/07/11 16:18:56 matt Exp $ */
2 2
3/* 3/*
4 * Copyright 2001, 2002 Wasabi Systems, Inc. 4 * Copyright 2001, 2002 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc. 7 * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -64,27 +64,27 @@ @@ -64,27 +64,27 @@
64 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
65 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
66 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
67 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
68 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
69 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
70 * SUCH DAMAGE. 70 * SUCH DAMAGE.
71 * 71 *
72 * @(#)machdep.c 8.3 (Berkeley) 1/12/94 72 * @(#)machdep.c 8.3 (Berkeley) 1/12/94
73 * from: Utah Hdr: machdep.c 1.63 91/04/24 73 * from: Utah Hdr: machdep.c 1.63 91/04/24
74 */ 74 */
75 75
76#include <sys/cdefs.h> 76#include <sys/cdefs.h>
77__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.44 2015/06/01 22:55:12 matt Exp $"); 77__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.45 2016/07/11 16:18:56 matt Exp $");
78 78
79#include "opt_ddb.h" 79#include "opt_ddb.h"
80#include "opt_execfmt.h" 80#include "opt_execfmt.h"
81#include "opt_modular.h" 81#include "opt_modular.h"
82 82
83#include <sys/param.h> 83#include <sys/param.h>
84#include <sys/boot_flag.h> 84#include <sys/boot_flag.h>
85#include <sys/buf.h> 85#include <sys/buf.h>
86#include <sys/cpu.h> 86#include <sys/cpu.h>
87#include <sys/device.h> 87#include <sys/device.h>
88#include <sys/kcore.h> 88#include <sys/kcore.h>
89#include <sys/kernel.h> 89#include <sys/kernel.h>
90#include <sys/ksyms.h> 90#include <sys/ksyms.h>
@@ -268,27 +268,27 @@ mach_init(int argc, char **argv, yamon_e @@ -268,27 +268,27 @@ mach_init(int argc, char **argv, yamon_e
268 /* 268 /*
269 * Allocate uarea page for lwp0 and set it. 269 * Allocate uarea page for lwp0 and set it.
270 */ 270 */
271 mips_init_lwp0_uarea(); 271 mips_init_lwp0_uarea();
272 272
273 /* 273 /*
274 * Initialize debuggers, and break into them, if appropriate. 274 * Initialize debuggers, and break into them, if appropriate.
275 */ 275 */
276#if defined(DDB) 276#if defined(DDB)
277 if (boothowto & RB_KDB) 277 if (boothowto & RB_KDB)
278 Debugger(); 278 Debugger();
279#endif 279#endif
280 280
281#ifdef MULTIPROCESSOR 281#if defined(MULTIPROCESSOR) && 0
282 /* 282 /*
283 * We can never be running on more than one processor but we can dream. 283 * We can never be running on more than one processor but we can dream.
284 */ 284 */
285 mips_fixup_exceptions(mips_fixup_zero_relative, NULL); 285 mips_fixup_exceptions(mips_fixup_zero_relative, NULL);
286#endif 286#endif
287} 287}
288 288
289void 289void
290consinit(void) 290consinit(void)
291{ 291{
292 292
293 /* 293 /*
294 * Everything related to console initialization is done 294 * Everything related to console initialization is done

cvs diff -r1.31 -r1.32 src/sys/arch/hpcmips/hpcmips/bus_space.c (expand / switch to unified diff)

--- src/sys/arch/hpcmips/hpcmips/bus_space.c 2012/01/27 18:52:56 1.31
+++ src/sys/arch/hpcmips/hpcmips/bus_space.c 2016/07/11 16:18:56 1.32
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: bus_space.c,v 1.31 2012/01/27 18:52:56 para Exp $ */ 1/* $NetBSD: bus_space.c,v 1.32 2016/07/11 16:18:56 matt Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center. 9 * NASA Ames Research Center.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions 12 * modification, are permitted provided that the following conditions
13 * are met: 13 * are met:
14 * 1. Redistributions of source code must retain the above copyright 14 * 1. Redistributions of source code must retain the above copyright
@@ -21,39 +21,40 @@ @@ -21,39 +21,40 @@
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE. 30 * POSSIBILITY OF SUCH DAMAGE.
31 */ 31 */
32 32
33#include <sys/cdefs.h> 33#include <sys/cdefs.h>
34__KERNEL_RCSID(0, "$NetBSD: bus_space.c,v 1.31 2012/01/27 18:52:56 para Exp $"); 34__KERNEL_RCSID(0, "$NetBSD: bus_space.c,v 1.32 2016/07/11 16:18:56 matt Exp $");
35 35
36#include <sys/param.h> 36#include <sys/param.h>
37#include <sys/systm.h> 37#include <sys/systm.h>
38#include <sys/malloc.h> 38#include <sys/malloc.h>
39#include <sys/extent.h> 39#include <sys/extent.h>
 40#include <sys/bus.h>
40 41
41#include <uvm/uvm_extern.h> 42#include <uvm/uvm_extern.h>
42 43
43#include <mips/cache.h> 44#include <mips/cache.h>
44#include <mips/locore.h> 45#include <mips/locore.h>
45#include <mips/pte.h> 46#include <mips/pte.h>
46#include <machine/bus.h> 47
47#include <machine/bus_space_hpcmips.h> 48#include <machine/bus_space_hpcmips.h>
48 49
49#ifdef BUS_SPACE_DEBUG 50#ifdef BUS_SPACE_DEBUG
50#define DPRINTF(arg) printf arg 51#define DPRINTF(arg) printf arg
51#else 52#else
52#define DPRINTF(arg) 53#define DPRINTF(arg)
53#endif 54#endif
54 55
55#define MAX_BUSSPACE_TAG 10 56#define MAX_BUSSPACE_TAG 10
56 57
57/* proto types */ 58/* proto types */
58bus_space_handle_t __hpcmips_cacheable(struct bus_space_tag_hpcmips*, 59bus_space_handle_t __hpcmips_cacheable(struct bus_space_tag_hpcmips*,
59 bus_addr_t, bus_size_t, int); 60 bus_addr_t, bus_size_t, int);
@@ -214,59 +215,57 @@ hpcmips_init_bus_space(struct bus_space_ @@ -214,59 +215,57 @@ hpcmips_init_bus_space(struct bus_space_
214 } 215 }
215 pmap_update(pmap_kernel()); 216 pmap_update(pmap_kernel());
216 } 217 }
217 218
218 t->extent = (void*)extent_create(t->name, t->base,  219 t->extent = (void*)extent_create(t->name, t->base,
219 t->base + t->size, 220 t->base + t->size,
220 0, 0, EX_NOWAIT); 221 0, 0, EX_NOWAIT);
221 if (!t->extent) { 222 if (!t->extent) {
222 panic("hpcmips_init_bus_space_extent:" 223 panic("hpcmips_init_bus_space_extent:"
223 "unable to allocate %s map", t->name); 224 "unable to allocate %s map", t->name);
224 } 225 }
225} 226}
226 227
 228static bool
 229mips_pte_cachechange(struct pmap *pmap, vaddr_t sva, vaddr_t eva,
 230 pt_entry_t *ptep, uintptr_t flags)
 231{
 232 mips_dcache_wbinv_range(sva, eva - sva);
 233
 234 for (; sva < eva; sva += PAGE_SIZE) {
 235 pt_entry_t pte = pte_cached_change(*ptep, flags);
 236 /*
 237 * Update the same virtual address entry.
 238 */
 239 *ptep = pte;
 240 tlb_update_addr(sva, KERNEL_PID, pte, 0);
 241 }
 242
 243 return false;
 244}
 245
227bus_space_handle_t 246bus_space_handle_t
228__hpcmips_cacheable(struct bus_space_tag_hpcmips *t, bus_addr_t bpa, 247__hpcmips_cacheable(struct bus_space_tag_hpcmips *t, bus_addr_t bpa,
229 bus_size_t size, int cacheable) 248 bus_size_t size, int cacheable)
230{ 249{
231 vaddr_t va, endva; 
232 pt_entry_t *pte; 
233 u_int32_t opte, npte; 
234 
235 if (t->base >= MIPS_KSEG2_START) { 250 if (t->base >= MIPS_KSEG2_START) {
236 va = mips_trunc_page(bpa); 251 const vaddr_t sva = mips_trunc_page(bpa);
237 endva = mips_round_page(bpa + size); 252 const vaddr_t eva = mips_round_page(bpa + size);
238 npte = CPUISMIPS3 ? MIPS3_PG_UNCACHED : MIPS1_PG_N; 253 pmap_pte_process(pmap_kernel(), sva, eva,
239  254 mips_pte_cachechange, cacheable);
240 mips_dcache_wbinv_range(va, endva - va); 255 return bpa;
241 
242 for (; va < endva; va += PAGE_SIZE) { 
243 pte = kvtopte(va); 
244 opte = pte->pt_entry; 
245 if (cacheable) { 
246 opte &= ~npte; 
247 } else { 
248 opte |= npte; 
249 } 
250 pte->pt_entry = opte; 
251 /* 
252 * Update the same virtual address entry. 
253 */ 
254 tlb_update(va, opte); 
255 } 
256 return (bpa); 
257 } 256 }
258 257
259 return (cacheable ? MIPS_PHYS_TO_KSEG0(bpa) : MIPS_PHYS_TO_KSEG1(bpa)); 258 return cacheable ? MIPS_PHYS_TO_KSEG0(bpa) : MIPS_PHYS_TO_KSEG1(bpa);
260} 259}
261 260
262/* ARGSUSED */ 261/* ARGSUSED */
263int 262int
264__bs_map(bus_space_tag_t tx, bus_addr_t bpa, bus_size_t size, int flags, 263__bs_map(bus_space_tag_t tx, bus_addr_t bpa, bus_size_t size, int flags,
265 bus_space_handle_t *bshp) 264 bus_space_handle_t *bshp)
266{ 265{
267 struct bus_space_tag_hpcmips *t = (struct bus_space_tag_hpcmips *)tx; 266 struct bus_space_tag_hpcmips *t = (struct bus_space_tag_hpcmips *)tx;
268 int err; 267 int err;
269 int cacheable = flags & BUS_SPACE_MAP_CACHEABLE; 268 int cacheable = flags & BUS_SPACE_MAP_CACHEABLE;
270 269
271 DPRINTF(("\tbus_space_map:%#lx(%#lx)+%#lx\n", 270 DPRINTF(("\tbus_space_map:%#lx(%#lx)+%#lx\n",
272 bpa, bpa + t->base, size)); 271 bpa, bpa + t->base, size));

cvs diff -r1.44 -r1.45 src/sys/arch/hpcmips/tx/tx3912video.c (expand / switch to unified diff)

--- src/sys/arch/hpcmips/tx/tx3912video.c 2016/07/09 06:49:03 1.44
+++ src/sys/arch/hpcmips/tx/tx3912video.c 2016/07/11 16:18:56 1.45
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: tx3912video.c,v 1.44 2016/07/09 06:49:03 skrll Exp $ */ 1/* $NetBSD: tx3912video.c,v 1.45 2016/07/11 16:18:56 matt Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 1999-2002 The NetBSD Foundation, Inc. 4 * Copyright (c) 1999-2002 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi. 8 * by UCHIYAMA Yasushi.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -20,48 +20,50 @@ @@ -20,48 +20,50 @@
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#include <sys/cdefs.h> 32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: tx3912video.c,v 1.44 2016/07/09 06:49:03 skrll Exp $"); 33__KERNEL_RCSID(0, "$NetBSD: tx3912video.c,v 1.45 2016/07/11 16:18:56 matt Exp $");
34 34
35#define TX3912VIDEO_DEBUG 35#define TX3912VIDEO_DEBUG
36 36
37#include "hpcfb.h" 37#include "hpcfb.h"
38#include "bivideo.h" 38#include "bivideo.h"
39 39
40#include <sys/param.h> 40#include <sys/param.h>
41#include <sys/systm.h> 41#include <sys/systm.h>
42#include <sys/buf.h> 42#include <sys/buf.h>
43#include <sys/device.h> 43#include <sys/device.h>
44#include <sys/extent.h> 44#include <sys/extent.h>
45#include <sys/ioctl.h> 45#include <sys/ioctl.h>
46 46
47#include <uvm/uvm_extern.h> 47#include <uvm/uvm_extern.h>
48 48
49#include <dev/cons.h> /* consdev */ 49#include <dev/cons.h> /* consdev */
50 50
51#include <machine/bus.h> 51#include <machine/bus.h>
52#include <machine/bootinfo.h> 52#include <machine/bootinfo.h>
53#include <machine/config_hook.h> 53#include <machine/config_hook.h>
54 54
 55#include <mips/locore.h>
 56
55#include <hpcmips/tx/tx39var.h> 57#include <hpcmips/tx/tx39var.h>
56#include <hpcmips/tx/tx3912videovar.h> 58#include <hpcmips/tx/tx3912videovar.h>
57#include <hpcmips/tx/tx3912videoreg.h> 59#include <hpcmips/tx/tx3912videoreg.h>
58 60
59/* CLUT */ 61/* CLUT */
60#include <dev/wscons/wsdisplayvar.h> 62#include <dev/wscons/wsdisplayvar.h>
61#include <dev/rasops/rasops.h> 63#include <dev/rasops/rasops.h>
62#include <dev/hpc/video_subr.h> 64#include <dev/hpc/video_subr.h>
63 65
64#include <dev/wscons/wsconsio.h> 66#include <dev/wscons/wsconsio.h>
65#include <dev/hpc/hpcfbvar.h> 67#include <dev/hpc/hpcfbvar.h>
66#include <dev/hpc/hpcfbio.h> 68#include <dev/hpc/hpcfbio.h>
67#if NBIVIDEO > 0 69#if NBIVIDEO > 0