Sun Oct 2 09:06:35 2016 UTC ()
Simplify. LOONGSON2 and MIPSNNR2 not possible.


(maya)
diff -r1.93 -r1.94 src/sys/arch/mips/mips/mipsX_subr.S
cvs diff -r1.93 -r1.94 src/sys/arch/mips/mips/mipsX_subr.S (expand / switch to unified diff)

--- src/sys/arch/mips/mips/mipsX_subr.S 2016/08/27 07:22:14 1.93
+++ src/sys/arch/mips/mips/mipsX_subr.S 2016/10/02 09:06:35 1.94
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: mipsX_subr.S,v 1.93 2016/08/27 07:22:14 skrll Exp $ */ 1/* $NetBSD: mipsX_subr.S,v 1.94 2016/10/02 09:06:35 maya Exp $ */
2 2
3/* 3/*
4 * Copyright 2002 Wasabi Systems, Inc. 4 * Copyright 2002 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Simon Burge for Wasabi Systems, Inc. 7 * Written by Simon Burge for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -377,31 +377,27 @@ VECTOR(MIPSX(tlb_miss), unknown) @@ -377,31 +377,27 @@ VECTOR(MIPSX(tlb_miss), unknown)
377 PTR_SRL k1, XSEGSHIFT+XSEGLENGTH+2 #04: clear valid bits 377 PTR_SRL k1, XSEGSHIFT+XSEGLENGTH+2 #04: clear valid bits
378 bnez k1, MIPSX(nopagetable) #05: not legal address 378 bnez k1, MIPSX(nopagetable) #05: not legal address
379 PTR_SRA k0, XSEGSHIFT - PTR_SCALESHIFT #06: k0=seg offset (almost) 379 PTR_SRA k0, XSEGSHIFT - PTR_SCALESHIFT #06: k0=seg offset (almost)
380 bgez k0, 1f #07: k0<0 -> kernel fault 380 bgez k0, 1f #07: k0<0 -> kernel fault
381 lui k1, %hi(CPUVAR(PMAP_SEGTAB)) #08: k1=hi of segtab 381 lui k1, %hi(CPUVAR(PMAP_SEGTAB)) #08: k1=hi of segtab
382 PTR_ADDI k1, 1 << PTR_SCALESHIFT #09: kernel segtab entry 382 PTR_ADDI k1, 1 << PTR_SCALESHIFT #09: kernel segtab entry
3831: 3831:
384 andi k0, (NSEGPG-1)<<PTR_SCALESHIFT #0a: k0=seg offset (mask 0x3) 384 andi k0, (NSEGPG-1)<<PTR_SCALESHIFT #0a: k0=seg offset (mask 0x3)
385 PTR_L k1, %lo(CPUVAR(PMAP_SEGTAB))(k1)#0b: k1=segment tab 385 PTR_L k1, %lo(CPUVAR(PMAP_SEGTAB))(k1)#0b: k1=segment tab
386 PTR_ADDU k1, k0 #0c: k1=seg entry address 386 PTR_ADDU k1, k0 #0c: k1=seg entry address
387 dmfc0 k0, MIPS_COP_0_BAD_VADDR #0d: k0=bad address (again) 387 dmfc0 k0, MIPS_COP_0_BAD_VADDR #0d: k0=bad address (again)
388 PTR_L k1, 0(k1) #0e: k1=seg entry 388 PTR_L k1, 0(k1) #0e: k1=seg entry
389 b MIPSX(tlb_miss_common) #0f 389 b MIPSX(tlb_miss_common) #0f
390#ifdef MIPSNNR2 
391 _EXT k0, k0, SEGSHIFT, SEGLENGTH #10: k0=seg index 
392#else 
393 PTR_SRL k0, SEGSHIFT - PTR_SCALESHIFT #10: k0=seg offset (almost) 390 PTR_SRL k0, SEGSHIFT - PTR_SCALESHIFT #10: k0=seg offset (almost)
394#endif 
395#endif /* LP64 */ 391#endif /* LP64 */
3962: /* handle useg addresses */ 3922: /* handle useg addresses */
397 lui k1, %hi(CPUVAR(PMAP_SEG0TAB)) #11: k1=hi of seg0tab 393 lui k1, %hi(CPUVAR(PMAP_SEG0TAB)) #11: k1=hi of seg0tab
398 dsrl k0, 31 #12: clear low 31 bits 394 dsrl k0, 31 #12: clear low 31 bits
399 bnez k0, MIPSX(nopagetable) #13: not legal address 395 bnez k0, MIPSX(nopagetable) #13: not legal address
400 PTR_L k1, %lo(CPUVAR(PMAP_SEG0TAB))(k1)#14: k1=segment tab base 396 PTR_L k1, %lo(CPUVAR(PMAP_SEG0TAB))(k1)#14: k1=segment tab base
401 dmfc0 k0, MIPS_COP_0_BAD_VADDR #15: k0=bad address (again) 397 dmfc0 k0, MIPS_COP_0_BAD_VADDR #15: k0=bad address (again)
402 nop #16 398 nop #16
403 b MIPSX(tlb_miss_common) #17 399 b MIPSX(tlb_miss_common) #17
404 PTR_SRL k0, 1*(PGSHIFT-PTR_SCALESHIFT)+(PGSHIFT-2) #18: k0=seg offset (almost) 400 PTR_SRL k0, 1*(PGSHIFT-PTR_SCALESHIFT)+(PGSHIFT-2) #18: k0=seg offset (almost)
405_VECTOR_END(MIPSX(tlb_miss)) 401_VECTOR_END(MIPSX(tlb_miss))
406/* dummy xtlb_miss (also a placeholder for tlb_miss_common) */ 402/* dummy xtlb_miss (also a placeholder for tlb_miss_common) */
407VECTOR(MIPSX(xtlb_miss), unknown) 403VECTOR(MIPSX(xtlb_miss), unknown)