 @@ -15,28 +15,26 @@
  * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  * PERFORMANCE OF THIS SOFTWARE.
  */
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
 #ifdef HAVE_XAA_H
 /*
  * When monochrome tiles/stipples are cached on the HiQV chipsets the
  * pitch of the monochrome data is the displayWidth. The HiQV manuals
  * state that the source pitch is ignored with monochrome data, and so
  * "offically" there the XAA cached monochrome data can't be used. But
  * it appears that by not setting the monochrome source alignment in
  * BR03, the monochrome source pitch is forced to the displayWidth!!
+ *
  * To enable the use of this undocumented feature, uncomment the define
  * below.
  */
 #define UNDOCUMENTED_FEATURE
 @@ -59,26 +57,28 @@
 #ifdef CHIPS_MMIO
 #ifdef CHIPS_HIQV
 #include "ct_BltHiQV.h"
 #define CTNAME(subname) CATNAME(CHIPSHiQV,subname)
 #else
 #include "ct_BlitMM.h"
 #define CTNAME(subname) CATNAME(CHIPSMMIO,subname)
 #endif
 #else
 #include "ct_Blitter.h"
 #define CTNAME(subname) CATNAME(CHIPS,subname)
 #endif
 #ifdef HAVE_XAA_H
 #ifdef DEBUG
 # define DEBUG_P(x) ErrorF(x"\n");
 #elif defined X_DEBUG
 # define DEBUG_P(x) snprintf(CTNAME(accel_debug),1024,x"\n");
 #else
 # define DEBUG_P(x) /**/
 #endif
 #ifdef X_DEBUG
 static char CTNAME(accel_debug)[1024];
 #endif
 #ifdef CHIPS_HIQV
 @@ -154,27 +154,27 @@ static void  CTNAME(ReadPixmap)(ScrnInfo
 # define BE_SWAP(pScrn,cPtr,x) \
   if (!BE_SWAP_APRETURE(pScrn,cPtr)) { \
        CARD8 XR0A = cPtr->readXR(cPtr,0x0A); \
        cPtr->writeXR(cPtr, 0x0A, (XR0A & 0xcf) | x); \
+  }
 /* 16 bit Byte Swap */
 # define BE_SWAPON(pScrn,cPtr) BE_SWAP(pScrn,cPtr,0x10)
 # define BE_SWAPOFF(pScrn,cPtr) BE_SWAP(pScrn,cPtr,0x0)
 #else
 # define BE_SWAPON(pScrn,cPtr)
 # define BE_SWAPOFF(pScrn,cPtr)
 #endif
 #endif
 Bool
 CTNAME(AccelInit)(ScreenPtr pScreen)
+{
 #ifdef HAVE_XAA_H
     XAAInfoRecPtr infoPtr;
     ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen);
     CHIPSPtr cPtr = CHIPSPTR(pScrn);
     CHIPSACLPtr cAcl = CHIPSACLPTR(pScrn);
     DEBUG_P("AccelInit");
     cPtr->AccelInfoRec = infoPtr = XAACreateInfoRec();
     if(!infoPtr) return FALSE;
 @@ -1731,18 +1731,16 @@ CTNAME(ReadPixmap)(ScrnInfoPtr pScrn, in
 	ctSETSRCADDR(srcaddr);
 	ctSETHEIGHTWIDTHGO(h, bytesPerLine);
 	BE_SWAPFF(pScrn,cPtr);
 	MoveDataToCPU((unsigned char *)cAcl->BltDataWindow,
 		 (unsigned char *)dst, dstwidth<<1, 16384, h, dwords);
 	BE_SWAPON(pScrn,cPtr);
+    }
     cPtr->AccelInfoRec->NeedToSync = TRUE;
+}
 #endif /* ReadPixmap */
 #endif /* writepixmap */
 #endif
-#endif /* HAVE_XAA_H */
+#endif

 @@ -41,26 +41,95 @@
 #define OPTION1_MASK	0xFFFFFEFF
 #define OPTION2_MASK	0xFFFFFFFF
 #define OPTION3_MASK	0xFFFFFFFF
 #define OPTION1_MASK_PRIMARY	0xFFFC0FF
 static void MGAGRamdacInit(ScrnInfoPtr);
 static void MGAGSave(ScrnInfoPtr, vgaRegPtr, MGARegPtr, Bool);
 static void MGAGRestore(ScrnInfoPtr, vgaRegPtr, MGARegPtr, Bool);
 static Bool MGAGInit(ScrnInfoPtr, DisplayModePtr);
 static void MGAGLoadPalette(ScrnInfoPtr, int, int*, LOCO*, VisualPtr);
 static Bool MGAG_i2cInit(ScrnInfoPtr pScrn);
 #define P_ARRAY_SIZE 9
 void
 MGAG200E4ComputePLLParam(ScrnInfoPtr pScrn, long lFo, int *M, int *N, int *P)
+{
     unsigned int ulComputedFo;
     unsigned int ulFDelta;
     unsigned int ulFPermitedDelta;
     unsigned int ulFTmpDelta;
     unsigned int ulVCOMax, ulVCOMin;
     unsigned int ulTestP;
     unsigned int ulTestM;
     unsigned int ulTestN;
     unsigned int ulFoInternal;
     unsigned int ulPLLFreqRef;
     unsigned int pulPValues[P_ARRAY_SIZE] = {16, 14, 12, 10, 8, 6, 4, 2, 1};
     unsigned int i;
     unsigned int ulVCO;
     unsigned int ulFVV;
     ulVCOMax        = 1600000;
     ulVCOMin        = 800000;
     ulPLLFreqRef    = 25000;
     if(lFo < 25000)
         lFo = 25000;
     ulFoInternal = lFo * 2;
     ulFDelta = 0xFFFFFFFF;
     /* Permited delta is 0.5% as VESA Specification */
     ulFPermitedDelta = ulFoInternal * 5 / 1000;
     for (i = 0 ; i < P_ARRAY_SIZE ; i++)
+    {
         ulTestP = pulPValues[i];
         if ((ulFoInternal * ulTestP) > ulVCOMax) continue;
         if ((ulFoInternal * ulTestP) < ulVCOMin) continue;
         for (ulTestN = 50; ulTestN <= 256; ulTestN++) {
             for (ulTestM = 1; ulTestM <= 32; ulTestM++) {
                 ulComputedFo = (ulPLLFreqRef * ulTestN) / (ulTestM * ulTestP);
                 if (ulComputedFo > ulFoInternal)
                     ulFTmpDelta = ulComputedFo - ulFoInternal;
                 else
                     ulFTmpDelta = ulFoInternal - ulComputedFo;
                 if (ulFTmpDelta < ulFDelta) {
                     ulFDelta = ulFTmpDelta;
                     *M = ulTestM - 1;
                     *N = ulTestN - 1;
                     *P = ulTestP - 1;
+                }
+            }
+        }
+    }
     ulVCO = ulPLLFreqRef * ((*N)+1) / ((*M)+1);
     ulFVV = (ulVCO - 800000) / 50000;
     if (ulFVV > 15)
         ulFVV = 15;
     *P |= (ulFVV << 4);
     *M |= 0x80;
+}
 static void
 MGAG200SEComputePLLParam(ScrnInfoPtr pScrn, long lFo, int *M, int *N, int *P)
+{
     unsigned int ulComputedFo;
     unsigned int ulFDelta;
     unsigned int ulFPermitedDelta;
     unsigned int ulFTmpDelta;
     unsigned int ulVCOMax, ulVCOMin;
     unsigned int ulTestP;
     unsigned int ulTestM;
     unsigned int ulTestN;
     unsigned int ulPLLFreqRef;
 @@ -197,26 +266,94 @@ MGAG200WBComputePLLParam(ScrnInfoPtr pSc
 			*N = (CARD8)(ulTestN - 1);
 			*P = (CARD8)(ulTestP - 1);
+		}
+	    }
+	}
+    }
 #if DEBUG
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 		   "lFo=%ld n=0x%x m=0x%x p=0x%x \n",
 		   lFo, *N, *M, *P );
 #endif
+}
 void
 MGAG200EW3ComputePLLParam(ScrnInfoPtr pScrn ,long lFo, int *M, int *N, int *P)
+{
     unsigned int ulComputedFo;
     unsigned int ulFDelta;
     unsigned int ulFPermitedDelta;
     unsigned int ulFTmpDelta;
     unsigned int ulVCOMax, ulVCOMin;
     unsigned int ulTestP1;
     unsigned int ulTestP2;
     unsigned int ulTestM;
     unsigned int ulTestN;
     unsigned int ulPLLFreqRef;
     unsigned int ulTestP1Start;
     unsigned int ulTestP1End;
     unsigned int ulTestP2Start;
     unsigned int ulTestP2End;
     unsigned int ulTestMStart;
     unsigned int ulTestMEnd;
     unsigned int ulTestNStart;
     unsigned int ulTestNEnd;
     ulVCOMax        = 800000;
     ulVCOMin        = 400000;
     ulPLLFreqRef    = 25000;
     ulTestP1Start   = 1;
     ulTestP1End     = 8;
     ulTestP2Start   = 1;
     ulTestP2End     = 8;
     ulTestMStart    = 1;
     ulTestMEnd      = 26;
     ulTestNStart    = 32;
     ulTestNEnd      = 2048;
     ulFDelta = 0xFFFFFFFF;
     /* Permited delta is 0.5% as VESA Specification */
     ulFPermitedDelta = lFo * 5 / 1000;
     /* Then we need to minimize the M while staying within 0.5% */
     for (ulTestP1 = ulTestP1Start; ulTestP1 < ulTestP1End; ulTestP1++) {
         for (ulTestP2 = ulTestP2Start; ulTestP2 < ulTestP2End; ulTestP2++) {
             if (ulTestP1 < ulTestP2) continue;
             if ((lFo * ulTestP1 * ulTestP2) > ulVCOMax) continue;
             if ((lFo * ulTestP1 * ulTestP2) < ulVCOMin) continue;
             for (ulTestM = ulTestMStart; ulTestM < ulTestMEnd; ulTestM++) {
                 for (ulTestN = ulTestNStart; ulTestN < ulTestNEnd; ulTestN++) {
                     ulComputedFo = (ulPLLFreqRef * ulTestN) / (ulTestM * ulTestP1 * ulTestP2);
                     if (ulComputedFo > lFo)
                         ulFTmpDelta = ulComputedFo - lFo;
                     else
                         ulFTmpDelta = lFo - ulComputedFo;
                     if (ulFTmpDelta < ulFDelta) {
                         ulFDelta = ulFTmpDelta;
                         *M = (CARD8)((ulTestN & 0x100) >> 1) |
                              (CARD8)(ulTestM);
                         *N = (CARD8)(ulTestN & 0xFF);
                         *P = (CARD8)((ulTestN & 0x600) >> 3) |
                              (CARD8)(ulTestP2 << 3) |
                              (CARD8)ulTestP1;
+                    }
+                }
+            }
+        }
+    }
+}
 static void
 MGAG200EHComputePLLParam(ScrnInfoPtr pScrn, long lFo, int *M, int *N, int *P)
+{
     unsigned int ulComputedFo;
     unsigned int ulFDelta;
     unsigned int ulFPermitedDelta;
     unsigned int ulFTmpDelta;
     unsigned int ulTestP;
     unsigned int ulTestM;
     unsigned int ulTestN;
     unsigned int ulVCOMax;
     unsigned int ulVCOMin;
     unsigned int ulPLLFreqRef;
 @@ -882,39 +1019,50 @@ MGAGSetPCLK( ScrnInfoPtr pScrn, long f_o
 		    pReg->Pan_Ctl = 0x20;
 		} else if (f_out < 160000) {
 		    pReg->Pan_Ctl = 0x28;
 		} else if (f_out < 175000) {
 		    pReg->Pan_Ctl = 0x30;
 		} else {
 		    pReg->Pan_Ctl = 0x38;
+		}
+	    }
 	    return;
+	}
 	if (pMga->is_G200SE) {
-	    MGAG200SEComputePLLParam(pScrn, f_out, &m, &n, &p);
+            if (pMga->reg_1e24 >= 0x04) {
                 MGAG200E4ComputePLLParam(pScrn, f_out, &m, &n, &p);
             } else {
                 MGAG200SEComputePLLParam(pScrn, f_out, &m, &n, &p);
+            }
 	    pReg->DacRegs[ MGA1064_PIX_PLLC_M ] = m;
 	    pReg->DacRegs[ MGA1064_PIX_PLLC_N ] = n;
 	    pReg->DacRegs[ MGA1064_PIX_PLLC_P ] = p;
 	} else if (pMga->is_G200EV) {
 	    MGAG200EVComputePLLParam(pScrn, f_out, &m, &n, &p);
 	    pReg->PllM = m;
 	    pReg->PllN = n;
 	    pReg->PllP = p;
 	} else if (pMga->is_G200WB) {
-	    MGAG200WBComputePLLParam(pScrn, f_out, &m, &n, &p);
+            if (pMga->Chipset == PCI_CHIP_MGAG200_EW3_PCI)
+            {
                  MGAG200EW3ComputePLLParam(pScrn, f_out, &m, &n, &p);
+            }
             else
+            {
 	         MGAG200WBComputePLLParam(pScrn, f_out, &m, &n, &p);
+            }
 	    pReg->PllM = m;
 	    pReg->PllN = n;
 	    pReg->PllP = p;
     } else if (pMga->is_G200EH) {
 	    MGAG200EHComputePLLParam(pScrn, f_out, &m, &n, &p);
 	    pReg->PllM = m;
 	    pReg->PllN = n;
 	    pReg->PllP = p;
 	} else if (pMga->is_G200ER) {
 	    MGAG200ERComputePLLParam(pScrn, f_out, &m, &n, &p);
 	    pReg->PllM = m;
 @@ -1084,26 +1232,27 @@ MGAGInit(ScrnInfoPtr pScrn, DisplayModeP
                     MGA1064_PIX_CLK_CTL_SEL_PLL;
                 pReg->DacRegs[MGA1064_MISC_CTL] =
                     MGA1064_MISC_CTL_DAC_EN |
                     MGA1064_MISC_CTL_VGA8 |
                     MGA1064_MISC_CTL_DAC_RAM_CS;
 		if (pMga->HasSDRAM)
 		    pReg->Option = 0x40049120;
 	        pReg->Option2 = 0x00008000;
 		break;
         case PCI_CHIP_MGAG200_WINBOND_PCI:
         case PCI_CHIP_MGAG200_EW3_PCI:
                 pReg->DacRegs[MGA1064_VREF_CTL] = 0x07;
                 pReg->Option = 0x41049120;
                 pReg->Option2 = 0x0000b000;
                 break;
         case PCI_CHIP_MGAG200_EV_PCI:
                 pReg->DacRegs[MGA1064_PIX_CLK_CTL] =
                     MGA1064_PIX_CLK_CTL_SEL_PLL;
                 pReg->DacRegs[MGA1064_MISC_CTL] =
                     MGA1064_MISC_CTL_VGA8 |
                     MGA1064_MISC_CTL_DAC_RAM_CS;
 @@ -1224,27 +1373,27 @@ MGAGInit(ScrnInfoPtr pScrn, DisplayModeP
 				((vd & 0xc00) >> 7) |
 				((vs & 0xc00) >> 5) |
 				((vd & 0x400) >> 3); /* linecomp */
 	if (pLayout->bitsPerPixel == 24)
 		pReg->ExtVga[3]	= (((1 << BppShift) * 3) - 1) | 0x80;
 	else
 		pReg->ExtVga[3]	= ((1 << BppShift) - 1) | 0x80;
         pReg->ExtVga[4]	= 0;
         if (pMga->is_G200WB){
             pReg->ExtVga[1] |= 0x88;
+        }
-	pReg->ExtVga_Index24 = 0x05;
+	pReg->ExtVga_MgaReq = 0x05;
 	pVga->CRTC[0]	= ht - 4;
 	pVga->CRTC[1]	= hd;
 	pVga->CRTC[2]	= hd;
 	pVga->CRTC[3]	= (ht & 0x1F) | 0x80;
 	pVga->CRTC[4]	= hs;
 	pVga->CRTC[5]	= ((ht & 0x20) << 2) | (he & 0x1F);
 	pVga->CRTC[6]	= vt & 0xFF;
 	pVga->CRTC[7]	= ((vt & 0x100) >> 8 ) |
 				((vd & 0x100) >> 7 ) |
 				((vs & 0x100) >> 6 ) |
 				((vd & 0x100) >> 5 ) |
 				((vd & 0x100) >> 4 ) | /* linecomp */
 @@ -1473,27 +1622,32 @@ MGA_NOT_HAL(
 		  && ((i == 0x2C) || (i == 0x2D) || (i == 0x2E)))
 	         continue;
 	      if ( (pMga->is_G200EV || pMga->is_G200WB || pMga->is_G200EH) &&
 		   (i >= 0x44) && (i <= 0x4E))
 	         continue;
 	      outMGAdac(i, mgaReg->DacRegs[i]);
+	   }
 		if (pMga->is_G200ER)
+        {
 			outMGAdac(0x90, mgaReg->Dac_Index90);
+        }
            if (pMga->is_G200SE && (pMga->reg_1e24 >= 0x04)) {
               outMGAdac( 0x1a, 0x09);
               usleep(500);
               outMGAdac( 0x1a, 0x01);
+           }
 	   if (!MGAISGx50(pMga)) {
 	       /* restore pci_option register */
 #ifdef XSERVER_LIBPCIACCESS
 	       pci_device_cfg_write_bits(pMga->PciInfo, optionMask,
 					 mgaReg->Option, PCI_OPTION_REG);
 	      if (pMga->Chipset != PCI_CHIP_MGA1064) {
 		  pci_device_cfg_write_bits(pMga->PciInfo, OPTION2_MASK,
 					    mgaReg->Option2, PCI_MGA_OPTION2);
 		  if (pMga->Chipset == PCI_CHIP_MGAG400
 		      || pMga->Chipset == PCI_CHIP_MGAG550) {
 		      pci_device_cfg_write_bits(pMga->PciInfo, OPTION3_MASK,
 @@ -1520,27 +1674,35 @@ MGA_NOT_HAL(
                MGAG200EVPIXPLLSET(pScrn, mgaReg);
            } else if (pMga->is_G200WB) {
                MGAG200WBPIXPLLSET(pScrn, mgaReg);
            } else if (pMga->is_G200EH) {
                MGAG200EHPIXPLLSET(pScrn, mgaReg);
+           }
 );	/* MGA_NOT_HAL */
 	   /* restore CRTCEXT regs */
            for (i = 0; i < 6; i++)
 	      OUTREG16(MGAREG_CRTCEXT_INDEX, (mgaReg->ExtVga[i] << 8) | i);
            if (pMga->is_G200ER) {
                OUTREG8(MGAREG_CRTCEXT_INDEX, 0x24);
-               OUTREG8(MGAREG_CRTCEXT_DATA,  mgaReg->ExtVga_Index24);
+               OUTREG8(MGAREG_CRTCEXT_DATA,  mgaReg->ExtVga_MgaReq);
+           }
            if (pMga->is_G200WB) {
                if(pMga->Chipset == PCI_CHIP_MGAG200_EW3_PCI)
+               {
                    OUTREG8(MGAREG_CRTCEXT_INDEX, 0x34);
                    OUTREG8(MGAREG_CRTCEXT_DATA,  mgaReg->ExtVga_MgaReq);
+               }
+           }
 	   /* This handles restoring the generic VGA registers. */
 	   if (pMga->is_G200SE) {
  	      MGAG200SERestoreMode(pScrn, vgaReg);
 	      if (restoreFonts)
 	         MGAG200SERestoreFonts(pScrn, vgaReg);
 	   } else {
 	      vgaHWRestore(pScrn, vgaReg,
 			VGA_SR_MODE | (restoreFonts ? VGA_SR_FONTS : 0));
+	   }
   	   MGAGRestorePalette(pScrn, vgaReg->DAC);
 @@ -1709,28 +1871,36 @@ MGAGSave(ScrnInfoPtr pScrn, vgaRegPtr vg
 #else
 	    mgaReg->Option3 = pciReadLong(pMga->PciTag, PCI_MGA_OPTION3);
 #endif
 	);	/* MGA_NOT_HAL */
 	for (i = 0; i < 6; i++)
+	{
 		OUTREG8(MGAREG_CRTCEXT_INDEX, i);
 		mgaReg->ExtVga[i] = INREG8(MGAREG_CRTCEXT_DATA);
+	}
 	if (pMga->is_G200ER)
+	{
 		OUTREG8(MGAREG_CRTCEXT_INDEX, 0x24);
-		mgaReg->ExtVga_Index24 = INREG8(MGAREG_CRTCEXT_DATA);
+		mgaReg->ExtVga_MgaReq = INREG8(MGAREG_CRTCEXT_DATA);
+ 	}
         if (pMga->is_G200WB)
+        {
             if(pMga->Chipset == PCI_CHIP_MGAG200_EW3_PCI)
+            {
                 OUTREG8(MGAREG_CRTCEXT_INDEX, 0x34);
                 mgaReg->ExtVga_MgaReq = INREG8(MGAREG_CRTCEXT_DATA);
+            }
+        }
 #ifdef DEBUG
 	ErrorF("Saved values:\nDAC:");
 	for (i=0; i<DACREGSIZE; i++) {
 #if 1
 		if(!(i%16)) ErrorF("\n%02X: ",i);
 		ErrorF("%02X ", mgaReg->DacRegs[i]);
 #else
 		if(!(i%8)) ErrorF("\n%02X: ",i);
 		ErrorF("0x%02X, ", mgaReg->DacRegs[i]);
 #endif
+	}
 	ErrorF("\nOPTION  = %08lX\n:", mgaReg->Option);

 @@ -305,43 +305,43 @@ static const struct mga_device_attribute
 	    { 256000, 600000 }, /* System VCO frequencies */
 	    { 256000, 600000 }, /* Pixel VCO frequencies */
 	    { 256000, 600000 }, /* Video VCO frequencies */
 ,            /* Memory clock */
 ,             /* PLL reference frequency */
 ,                 /* Supports fast bitblt? */
 	    MGA_HOST_AGP_4x    /* Host interface */
 	},
 , 0x1000,         /* Memory probe size & offset values */
     },
     /* G200SE A PCI */
-    [10] = { 0, 1, 0, 0, 1, 0, 0, 1, new_BARs,
+    [10] = { 0, 1, 0, 0, 1, 0, 0, 0, new_BARs,
             (TRANSC_SOLID_FILL | TWO_PASS_COLOR_EXPAND | USE_LINEAR_EXPANSION),
+	{
 	    { 50000, 230000 }, /* System VCO frequencies */
 	    { 50000, 230000 }, /* Pixel VCO frequencies */
 	    { 0, 0 },          /* Video VCO frequencies */
 ,            /* Memory clock */
 ,             /* PLL reference frequency */
 ,                 /* Supports fast bitblt? */
 	    MGA_HOST_PCI       /* Host interface */
 	},
 , 0x800,           /* Memory probe size & offset values */
     },
     /* G200SE B PCI */
-    [11] = { 0, 1, 0, 0, 1, 0, 0, 1, new_BARs,
+    [11] = { 0, 1, 0, 0, 1, 0, 0, 0, new_BARs,
             (TRANSC_SOLID_FILL | TWO_PASS_COLOR_EXPAND | USE_LINEAR_EXPANSION),
+	{
 	    { 50000, 114000 }, /* System VCO frequencies */
 	    { 50000, 114000 }, /* Pixel VCO frequencies */
 	    { 0, 0 },          /* Video VCO frequencies */
 ,            /* Memory clock */
 ,             /* PLL reference frequency */
 ,                 /* Supports fast bitblt? */
 	    MGA_HOST_PCI       /* Host interface */
 	},
 , 0x800,           /* Memory probe size & offset values */
     },
 @@ -398,26 +398,42 @@ static const struct mga_device_attribute
     [15] = { 0, 1, 0, 0, 1, 0, 0, 0, new_BARs,
             (TRANSC_SOLID_FILL | TWO_PASS_COLOR_EXPAND | USE_LINEAR_EXPANSION),
+	{
 	    { 50000, 230000 }, /* System VCO frequencies */
 	    { 50000, 203400 }, /* Pixel VCO frequencies */
 	    { 0, 0 },          /* Video VCO frequencies */
 ,            /* Memory clock */
 ,             /* PLL reference frequency */
 ,                 /* Supports fast bitblt? */
 	    MGA_HOST_PCI       /* Host interface */
 	},
 , 0x4000,          /* Memory probe size & offset values */
     },
     /* G200WB */
     [16] = { 0, 1, 0, 0, 1, 0, 0, 0, new_BARs,
             (TRANSC_SOLID_FILL | TWO_PASS_COLOR_EXPAND | USE_LINEAR_EXPANSION),
+	{
 	    { 50000, 230000 }, /* System VCO frequencies */
 	    { 50000, 203400 }, /* Pixel VCO frequencies */
 	    { 0, 0 },          /* Video VCO frequencies */
 ,            /* Memory clock */
 ,             /* PLL reference frequency */
 ,                 /* Supports fast bitblt? */
 	    MGA_HOST_PCI       /* Host interface */
 	},
 , 0x4000,          /* Memory probe size & offset values */
+    }
 };
 #ifdef XSERVER_LIBPCIACCESS
 #define MGA_DEVICE_MATCH(d, i) \
     { 0x102B, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0, 0, (i) }
 #define MGA_SUBDEVICE_MATCH(d, s, i) \
     { 0x102B, (d), 0x102B, (s), 0, 0, (i) }
 static const struct pci_id_match mga_device_match[] = {
     MGA_DEVICE_MATCH(PCI_CHIP_MGA2064,     0),
     MGA_DEVICE_MATCH(PCI_CHIP_MGA1064,     1),
     MGA_DEVICE_MATCH(PCI_CHIP_MGA2164,     2),
 @@ -428,72 +444,77 @@ static const struct pci_id_match mga_dev
     MGA_DEVICE_MATCH(PCI_CHIP_MGAG200_PCI, 7),
     MGA_DEVICE_MATCH(PCI_CHIP_MGAG400,     8),
     MGA_DEVICE_MATCH(PCI_CHIP_MGAG550,     9),
     MGA_DEVICE_MATCH(PCI_CHIP_MGAG200_SE_A_PCI, 10),
     MGA_DEVICE_MATCH(PCI_CHIP_MGAG200_SE_B_PCI, 11),
     MGA_DEVICE_MATCH(PCI_CHIP_MGAG200_EV_PCI, 12),
     MGA_DEVICE_MATCH( PCI_CHIP_MGAG200_WINBOND_PCI, 13 ),
     MGA_DEVICE_MATCH( PCI_CHIP_MGAG200_EH_PCI, 14 ),
-	MGA_DEVICE_MATCH(PCI_CHIP_MGAG200_ER_PCI, 15 ),
+    MGA_DEVICE_MATCH(PCI_CHIP_MGAG200_ER_PCI, 15 ),
     MGA_DEVICE_MATCH( PCI_CHIP_MGAG200_EW3_PCI, 16 ),
     { 0, 0, 0 },
 };
 #endif
 /* Supported chipsets */
 static SymTabRec MGAChipsets[] = {
     { PCI_CHIP_MGA2064,		"mga2064w" },
     { PCI_CHIP_MGA1064,		"mga1064sg" },
     { PCI_CHIP_MGA2164,		"mga2164w" },
     { PCI_CHIP_MGA2164_AGP,	"mga2164w AGP" },
     { PCI_CHIP_MGAG100,		"mgag100" },
     { PCI_CHIP_MGAG100_PCI,	"mgag100 PCI" },
     { PCI_CHIP_MGAG200,		"mgag200" },
     { PCI_CHIP_MGAG200_PCI,	"mgag200 PCI" },
     { PCI_CHIP_MGAG200_SE_A_PCI,	"mgag200 SE A PCI" },
     { PCI_CHIP_MGAG200_SE_B_PCI,	"mgag200 SE B PCI" },
     { PCI_CHIP_MGAG200_EV_PCI,	"mgag200 EV Maxim" },
     { PCI_CHIP_MGAG200_ER_PCI,	"mgag200 ER SH7757" },
     { PCI_CHIP_MGAG200_WINBOND_PCI,	"mgag200 eW Nuvoton" },
     { PCI_CHIP_MGAG200_EW3_PCI,	"mgag200 eW3 Nuvoton" },
     { PCI_CHIP_MGAG200_EH_PCI,	"mgag200eH" },
     { PCI_CHIP_MGAG400,		"mgag400" },
     { PCI_CHIP_MGAG550,		"mgag550" },
     {-1,			NULL }
 };
 static PciChipsets MGAPciChipsets[] = {
     { PCI_CHIP_MGA2064,	    PCI_CHIP_MGA2064,	RES_SHARED_VGA },
     { PCI_CHIP_MGA1064,	    PCI_CHIP_MGA1064,	RES_SHARED_VGA },
     { PCI_CHIP_MGA2164,	    PCI_CHIP_MGA2164,	RES_SHARED_VGA },
     { PCI_CHIP_MGA2164_AGP, PCI_CHIP_MGA2164_AGP,RES_SHARED_VGA },
     { PCI_CHIP_MGAG100,	    PCI_CHIP_MGAG100,	RES_SHARED_VGA },
     { PCI_CHIP_MGAG100_PCI, PCI_CHIP_MGAG100_PCI,RES_SHARED_VGA },
     { PCI_CHIP_MGAG200,	    PCI_CHIP_MGAG200,	RES_SHARED_VGA },
     { PCI_CHIP_MGAG200_PCI, PCI_CHIP_MGAG200_PCI,RES_SHARED_VGA },
     { PCI_CHIP_MGAG200_SE_B_PCI, PCI_CHIP_MGAG200_SE_B_PCI,
 	RES_SHARED_VGA },
     { PCI_CHIP_MGAG200_SE_A_PCI, PCI_CHIP_MGAG200_SE_A_PCI,
 	RES_SHARED_VGA },
     { PCI_CHIP_MGAG200_EV_PCI, PCI_CHIP_MGAG200_EV_PCI,
 	RES_SHARED_VGA },
     { PCI_CHIP_MGAG200_ER_PCI, PCI_CHIP_MGAG200_ER_PCI,
 	RES_SHARED_VGA },
     { PCI_CHIP_MGAG200_WINBOND_PCI, PCI_CHIP_MGAG200_WINBOND_PCI,
 	RES_SHARED_VGA },
     { PCI_CHIP_MGAG200_EW3_PCI, PCI_CHIP_MGAG200_EW3_PCI,
 	RES_SHARED_VGA },
     { PCI_CHIP_MGAG200_EH_PCI, PCI_CHIP_MGAG200_EH_PCI,
 	RES_SHARED_VGA },
     { PCI_CHIP_MGAG400,	    PCI_CHIP_MGAG400,	RES_SHARED_VGA },
     { PCI_CHIP_MGAG550,	    PCI_CHIP_MGAG550,	RES_SHARED_VGA },
     { -1,			-1,		RES_UNDEFINED }
 };
 /*
  * This contains the functions needed by the server after loading the
  * driver module.  It must be supplied, and gets added the driver list by
  * the Module Setup funtion in the dynamic case.  In the static case a
  * reference to this is compiled in, and this requires that the name of
  * this DriverRec be an upper-case version of the driver name.
 @@ -913,26 +934,29 @@ MGAProbe(DriverPtr drv, int flags)
             case PCI_CHIP_MGAG200_WINBOND_PCI:
                 attrib_no = 13;
                 break;
             case PCI_CHIP_MGAG200_EH_PCI:
                 attrib_no = 14;
                 break;
             case PCI_CHIP_MGAG200_ER_PCI:
                 attrib_no = 15;
                 break;
             case PCI_CHIP_MGAG200_EW3_PCI:
                 attrib_no = 16;
                 break;
 	    default:
 		return FALSE;
+            }
 	    pMga->chip_attribs = & attribs[attrib_no];
 	    if (pMga->chip_attribs->dual_head_possible) {
 		MGAEntPtr pMgaEnt = NULL;
 		DevUnion *pPriv;
 		xf86SetEntitySharable(usedChips[i]);
 		/* Allocate an entity private if necessary */
 @@ -1531,27 +1555,28 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags)
 	if (pMga->ChipRev >= 0x80)
 	    xf86ErrorF(" (G450)\n");
 	else
 	    xf86ErrorF(" (G400)\n");
     } else {
 	xf86ErrorF("\n");
+    }
     pMga->is_Gx50 = ((pMga->Chipset == PCI_CHIP_MGAG400) && (pMga->ChipRev >= 0x80))
 	|| (pMga->Chipset == PCI_CHIP_MGAG550);
     pMga->is_G200SE = (pMga->Chipset == PCI_CHIP_MGAG200_SE_A_PCI)
 	|| (pMga->Chipset == PCI_CHIP_MGAG200_SE_B_PCI);
     pMga->is_G200EV = (pMga->Chipset == PCI_CHIP_MGAG200_EV_PCI);
-    pMga->is_G200WB = (pMga->Chipset == PCI_CHIP_MGAG200_WINBOND_PCI);
+    pMga->is_G200WB = (pMga->Chipset == PCI_CHIP_MGAG200_WINBOND_PCI)
 	|| (pMga->Chipset ==  PCI_CHIP_MGAG200_EW3_PCI);
     pMga->is_G200EH = (pMga->Chipset == PCI_CHIP_MGAG200_EH_PCI);
     pMga->is_G200ER = (pMga->Chipset == PCI_CHIP_MGAG200_ER_PCI);
     pMga->DualHeadEnabled = FALSE;
     if (xf86IsEntityShared(pScrn->entityList[0])) {/* dual-head mode requested*/
 	if (
 	    !MGA_DH_NEEDS_HAL(pMga)) {
 	    pMga->DualHeadEnabled = TRUE;
 	} else if (xf86IsPrimInitDone(pScrn->entityList[0])) {
 	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 	 "This card requires the \"mga_hal\" module for dual-head operation\n"
 	 "\tIt can be found at the Matrox web site <http://www.matrox.com>\n");
+	}
 @@ -2039,26 +2064,27 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags)
     case PCI_CHIP_MGA2064:
     case PCI_CHIP_MGA2164:
     case PCI_CHIP_MGA2164_AGP:
 	MGA2064SetupFuncs(pScrn);
 	break;
     case PCI_CHIP_MGA1064:
     case PCI_CHIP_MGAG100:
     case PCI_CHIP_MGAG100_PCI:
     case PCI_CHIP_MGAG200:
     case PCI_CHIP_MGAG200_PCI:
     case PCI_CHIP_MGAG200_SE_A_PCI:
     case PCI_CHIP_MGAG200_SE_B_PCI:
     case PCI_CHIP_MGAG200_WINBOND_PCI:
     case PCI_CHIP_MGAG200_EW3_PCI:
     case PCI_CHIP_MGAG200_EV_PCI:
     case PCI_CHIP_MGAG200_EH_PCI:
     case PCI_CHIP_MGAG200_ER_PCI:
     case PCI_CHIP_MGAG400:
     case PCI_CHIP_MGAG550:
 	MGAGSetupFuncs(pScrn);
 	break;
+    }
     /*
      * Read the BIOS data struct
      */
 @@ -2153,28 +2179,29 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags)
+	}
         pMgaEnt->refCount++;
     } else {
         /* Normal Handling of video ram etc */
         pMga->FbMapSize = pScrn->videoRam * 1024;
         switch(pMga->Chipset) {
 	  case PCI_CHIP_MGAG550:
 	  case PCI_CHIP_MGAG400:
 	  case PCI_CHIP_MGAG200:
 	  case PCI_CHIP_MGAG200_PCI:
 	  case PCI_CHIP_MGAG200_SE_A_PCI:
 	  case PCI_CHIP_MGAG200_SE_B_PCI:
           case PCI_CHIP_MGAG200_WINBOND_PCI:
 	  case PCI_CHIP_MGAG200_EW3_PCI:
 	  case PCI_CHIP_MGAG200_EV_PCI:
-      case PCI_CHIP_MGAG200_EH_PCI:
+	  case PCI_CHIP_MGAG200_EH_PCI:
 	  case PCI_CHIP_MGAG200_ER_PCI:
 	    pMga->SrcOrg = 0;
 	    pMga->DstOrg = 0;
 	    break;
 	  default:
 	    break;
+	}
+    }
     xf86DrvMsg(pScrn->scrnIndex, from, "VideoRAM: %d kByte\n",
                pScrn->videoRam);
    /* Set the bpp shift value */
     pMga->BppShifts[0] = 0;
 @@ -2337,26 +2364,27 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags)
 	case PCI_CHIP_MGAG100:
 	case PCI_CHIP_MGAG100_PCI:
 	   maxPitch = 2048;
 	   break;
 	case PCI_CHIP_MGAG200_SE_A_PCI:
            if (pScrn->videoRam < 2048){
                maxPitch = 1280;
+           }
            break;
 	case PCI_CHIP_MGAG200:
 	case PCI_CHIP_MGAG200_PCI:
 	case PCI_CHIP_MGAG200_SE_B_PCI:
         case PCI_CHIP_MGAG200_WINBOND_PCI:
 	case PCI_CHIP_MGAG200_EW3_PCI:
 	case PCI_CHIP_MGAG200_EV_PCI:
     case PCI_CHIP_MGAG200_EH_PCI:
 	case PCI_CHIP_MGAG200_ER_PCI:
 	case PCI_CHIP_MGAG400:
 	case PCI_CHIP_MGAG550:
 	   maxPitch = 4096;
 	   break;
+	}
 	i = xf86ValidateModes(pScrn, pScrn->monitor->Modes,
 			      pScrn->display->modes, clockRanges,
 			      linePitches, minPitch, maxPitch,
 			      pMga->Roundings[(pScrn->bitsPerPixel >> 3) - 1] *
 @@ -2584,27 +2612,28 @@ MGAMapMem(ScrnInfoPtr pScrn)
 #ifdef XSERVER_LIBPCIACCESS
     struct pci_device *const dev = pMga->PciInfo;
     struct pci_mem_region *region;
     int i, err;
 #endif
     if (!pMga->FBDev) {
 #ifdef XSERVER_LIBPCIACCESS
 	pciaddr_t fbaddr = pMga->FbAddress;
 	pciaddr_t fbsize = pMga->FbMapSize;
 	err = pci_device_map_range(dev,
 				   fbaddr, fbsize,
-				   PCI_DEV_MAP_FLAG_WRITABLE,
+				   PCI_DEV_MAP_FLAG_WRITABLE |
 				   PCI_DEV_MAP_FLAG_WRITE_COMBINE,
 				   (void **)&pMga->FbBase);
 	if (err) {
 	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 		       "Unable to map Framebuffer %08llX %llx.  %s (%d)\n",
 		       (long long)fbaddr, (long long)fbsize,
 		       strerror(err), err);
 	    return FALSE;
+	}
 	else
 	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 		       "MAPPED Framebuffer %08llX %llx to %08llX.\n",
 		       (long long)fbaddr, (long long)fbsize,
 @@ -3815,44 +3844,47 @@ MGAValidMode(SCRN_ARG_TYPE arg, DisplayM
     SCRN_INFO_PTR(arg);
     int lace;
     MGAPtr pMga = MGAPTR(pScrn);
     if (pMga->Chipset == PCI_CHIP_MGAG200_SE_A_PCI) {
     	if (pMga->reg_1e24 == 0x01) {
 	        if (mode->HDisplay > 1600)
 	            return MODE_VIRTUAL_X;
 	        if (mode->VDisplay > 1200)
 	            return MODE_VIRTUAL_Y;
 	        if (xf86ModeBandwidth(mode, pScrn->bitsPerPixel) > 244)
 	            return MODE_BANDWIDTH;
         } else {
-            if (pMga->reg_1e24 >= 0x02) {
+            if (pMga->reg_1e24 == 0x02) {
 	            if (mode->HDisplay > 1920)
 	                return MODE_VIRTUAL_X;
 	            if (mode->VDisplay > 1200)
 	                return MODE_VIRTUAL_Y;
 	            if (xf86ModeBandwidth(mode, pScrn->bitsPerPixel) > 301)
 	                return MODE_BANDWIDTH;
+            }
+        }
     } else if (pMga->is_G200WB){
         if (mode->Flags & V_DBLSCAN)
             return MODE_NO_DBLESCAN;
-	if (pMga->KVM && mode->HDisplay > 1280)
+        if (pMga->Chipset != PCI_CHIP_MGAG200_EW3_PCI)
 	    return MODE_VIRTUAL_X;
-	if (pMga->KVM && mode->VDisplay > 1024)
+	    if (pMga->KVM && mode->HDisplay > 1280)
-	    return MODE_VIRTUAL_Y;
+	        return MODE_VIRTUAL_X;
-	if (xf86ModeBandwidth(mode, pScrn->bitsPerPixel) > 318.77)
+	    if (pMga->KVM && mode->VDisplay > 1024)
-	    return MODE_BANDWIDTH;
+	        return MODE_VIRTUAL_Y;
 	    if (xf86ModeBandwidth(mode, pScrn->bitsPerPixel) > 318.77)
 	        return MODE_BANDWIDTH;
+        }
     } else if (pMga->is_G200EV
 	       && (xf86ModeBandwidth(mode, pScrn->bitsPerPixel) > 327)) {
 	return MODE_BANDWIDTH;
     } else if (pMga->is_G200EH
                && (xf86ModeBandwidth(mode, pScrn->bitsPerPixel) > 375)) {
         return MODE_BANDWIDTH;
     } else if (pMga->is_G200ER
                && (xf86ModeBandwidth(mode, pScrn->bitsPerPixel) > 550)) {
         return MODE_BANDWIDTH;
+    }
     lace = 1 + ((mode->Flags & V_INTERLACE) != 0);

 @@ -24,27 +24,26 @@
  *    Tilman Sauerbeck <tilman@code-monkey.de>
  */
 /*
  * Sources:
  * - mga kdrive accel by Anders Carlsson
  * - mga g400 Render accel by Damien Ciabrini
  */
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
 #include "xorg-server.h"
 #include "xf86.h"
 #include "mga.h"
 #include "mga_reg.h"
 #include "mga_macros.h"
 #include "exa.h"
 #ifdef MGADRI
 #include "mga_dri.h"
 #endif
 #if 0
 @@ -309,26 +308,31 @@ mgaGetTexFormat(PicturePtr pPict)
         { 0, 0}
     };
     for (ptr = texformats; ptr->fmt; ptr++)
         if (ptr->fmt == pPict->format)
             return ptr->card_fmt;
     return 0;
+}
 static Bool
 mgaCheckSourceTexture(int tmu, PicturePtr pPict)
+{
     if (!pPict->pDrawable) {
         DEBUG_MSG(("Solid / gradient pictures not supported\n"));
         return FALSE;
+    }
     int w = pPict->pDrawable->width;
     int h = pPict->pDrawable->height;
     if ((w > 2047) || (h > 2047)){
         DEBUG_MSG(("Picture w/h too large (%dx%d)\n", w, h));
         return FALSE;
+    }
     if (!mgaGetTexFormat(pPict)) {
         DEBUG_MSG(("Unsupported picture format 0x%x\n", pPict->format));
         return FALSE;
+    }
 @@ -345,27 +349,27 @@ mgaCheckSourceTexture(int tmu, PicturePt
     if (pPict->filter != PictFilterNearest &&
         pPict->filter != PictFilterBilinear) {
         DEBUG_MSG(("Unsupported filter 0x%x\n", pPict->filter));
         return FALSE;
+    }
     return TRUE;
+}
 static Bool
 mgaCheckComposite(int op, PicturePtr pSrcPict, PicturePtr pMaskPict,
                   PicturePtr pDstPict)
+{
-    MGAPtr pMga = xf86ScreenToScrn(pSrcPict->pDrawable->pScreen)->driverPrivate;
+    MGAPtr pMga = xf86ScreenToScrn(pDstPict->pDrawable->pScreen)->driverPrivate;
     if (op >= sizeof(mgaBlendOp) / sizeof(mgaBlendOp[0])) {
         DEBUG_MSG(("unsupported op %x\n", op));
         return FALSE;
+    }
     if (!mgaCheckSourceTexture(0, pSrcPict))
         return FALSE;
     if (pMaskPict) {
         if (!mgaCheckSourceTexture(1, pMaskPict))
             return FALSE;
 @@ -512,26 +516,27 @@ setTMIncrementsRegs(PixmapPtr pPix, int
 #define A_ARG2_DIFFUSE          MGA_TDS_ALPHA_ARG2_DIFFUSE
 #define A_ARG2_PREV             MGA_TDS_ALPHA_ARG2_PREVSTAGE
 #define ALPHA_MUL               MGA_TDS_ALPHA_SEL_MUL
 #define ALPHA_ARG1              MGA_TDS_ALPHA_SEL_ARG1
 #define ALPHA_ARG2              MGA_TDS_ALPHA_SEL_ARG2
 static Bool
 mgaPrepareComposite(int op, PicturePtr pSrcPict, PicturePtr pMaskPict,
                     PicturePtr pDstPict, PixmapPtr pSrc, PixmapPtr pMask,
                     PixmapPtr pDst)
+{
     PMGA(pDst);
     CARD32 fcol = 0xff000000, ds0 = 0, ds1 = 0, cmd, blendcntl;
     if (!pSrc || !pSrcPict->pDrawable) return FALSE;
     mgaSetup(pMga, pDst, pDstPict, 2);
     OUTREG(MGAREG_DSTORG, exaGetPixmapOffset(pDst));
     OUTREG(MGAREG_PITCH, mgaGetPixmapPitch(pDst));
     PrepareSourceTexture(0, pSrcPict, pSrc);
     if (pMask)
         PrepareSourceTexture(1, pMaskPict, pMask);
     else
         PrepareSourceTexture(1, pSrcPict, pSrc);
     /* For A8 writes, the desired alpha value needs to be replicated
 @@ -714,51 +719,26 @@ mgaUploadToScreen(PixmapPtr pDst, int x,
     OUTREG(MGAREG_FXBNDRY, ((x + w - 1) << 16) | (x & 0xffff));
     OUTREG(MGAREG_YDSTLEN | MGAREG_EXEC, (y << 16) | (h & 0xffff));
     while (h--) {
         memcpy (pMga->ILOADBase, src, bytes_padded);
         src += src_pitch;
+    }
     exaMarkSync(pDst->drawable.pScreen);
     return TRUE;
+}
 static Bool
 mgaDownloadFromScreen(PixmapPtr pSrc, int x, int y, int w, int h,
                       char *dst, int dst_pitch)
     PMGA(pSrc);
     char *src = (char *)(unsigned long) exaGetPixmapFirstPixel(pSrc);
     int src_pitch = exaGetPixmapPitch(pSrc);
     int cpp = (pSrc->drawable.bitsPerPixel + 7) / 8;
     int bytes = w * cpp;
     src += y * src_pitch + x * cpp;
     QUIESCE_DMA(pSrc);
     while (h--) {
 	memcpy (dst, src, bytes);
 	src += src_pitch;
 	dst += dst_pitch;
     return TRUE;
 static void
 mgaWaitMarker(ScreenPtr pScreen, int marker)
+{
     ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen);
     MGAPtr pMga = pScrn->driverPrivate;
     WAITFIFO(1);
     OUTREG(MGAREG_CACHEFLUSH, 0);
     /* wait until the "drawing engine busy" bit is unset */
     while (INREG (MGAREG_Status) & 0x10000);
+}
 @@ -886,22 +866,21 @@ mgaExaInit(ScreenPtr pScreen)
     pExa->PrepareCopy = mgaPrepareCopy;
     pExa->Copy = mgaCopy;
     pExa->DoneCopy = mgaNoopDone;
     if (pMga->Chipset == PCI_CHIP_MGAG400 ||
         pMga->Chipset == PCI_CHIP_MGAG550) {
         pExa->CheckComposite = mgaCheckComposite;
         pExa->PrepareComposite = mgaPrepareComposite;
         pExa->Composite = mgaComposite;
         pExa->DoneComposite = mgaNoopDone;
+    }
     pExa->UploadToScreen = mgaUploadToScreen;
     pExa->DownloadFromScreen = mgaDownloadFromScreen;
 #ifdef MGADRI
     if (pMga->directRenderingEnabled)
         init_dri(pScrn);
 #endif
     return exaDriverInit(pScreen, pExa);
+}

 @@ -937,27 +937,29 @@ GLINTPreInit(ScrnInfoPtr pScrn, int flag
     pScrn->racMemFlags = RAC_FB | RAC_COLORMAP | RAC_CURSOR | RAC_VIEWPORT;
     pScrn->racIoFlags = RAC_FB | RAC_COLORMAP | RAC_CURSOR | RAC_VIEWPORT;
 #endif
     /* Set pScrn->monitor */
     pScrn->monitor = pScrn->confScreen->monitor;
     /*
      * The first thing we should figure out is the depth, bpp, etc.
      * We support both 24bpp and 32bpp layouts, so indicate that.
      */
 #ifndef __NetBSD__
     if (FBDevProbed) {
 	int default_depth, fbbpp;
-	if (!fbdevHWInit(pScrn,NULL,xf86FindOptionValue(pGlint->pEnt->device->options,"fbdev"))) {
+	if (!fbdevHWInit(pScrn, pGlint->PciInfo,
 			 xf86FindOptionValue(pGlint->pEnt->device->options,
 					     "fbdev"))) {
 		xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "fbdevHWInit failed!\n");
 		return FALSE;
+	}
 	default_depth = fbdevHWGetDepth(pScrn,&fbbpp);
 	if (!xf86SetDepthBpp(pScrn, default_depth, default_depth, fbbpp,0))
 		return FALSE;
     } else
 #endif /* __NetBSD__ */
+    {
 	if (!xf86SetDepthBpp(pScrn, 0, 0, 0, Support24bppFb | Support32bppFb
 	 	/*| SupportConvert32to24 | PreferConvert32to24*/))
 		return FALSE;
+    }
 @@ -1076,27 +1078,29 @@ GLINTPreInit(ScrnInfoPtr pScrn, int flag
 			    (1 << 8) |
 			    ((pScrn->mask.blue - 1) << 0);
+    }
 #ifndef __NetBSD__
     /* Check whether to use the FBDev stuff and fill in the rest of pScrn */
     if (xf86ReturnOptValBool(pGlint->Options, OPTION_FBDEV, FALSE)) {
     	if (!FBDevProbed && !xf86LoadSubModule(pScrn, "fbdevhw"))
+    	{
 		xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "couldn't load fbdevHW module!\n");
 		return FALSE;
+	}
-	if (!fbdevHWInit(pScrn,NULL,xf86FindOptionValue(pGlint->pEnt->device->options,"fbdev")))
+	if (!fbdevHWInit(pScrn, pGlint->PciInfo,
 			 xf86FindOptionValue(pGlint->pEnt->device->options,
 					     "fbdev")))
+	{
 		xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "fbdevHWInit failed!\n");
 		return FALSE;
+	}
 	pGlint->FBDev = TRUE;
         from = X_CONFIG;
 	pScrn->AdjustFrame	= fbdevHWAdjustFrameWeak();
 	pScrn->LeaveVT		= fbdevHWLeaveVTWeak();
 	pScrn->ValidMode	= fbdevHWValidModeWeak();
     } else

 @@ -467,34 +467,29 @@ Permedia2I2CUDelay(I2CBusPtr b, int usec
     GLINTPtr pGlint = (GLINTPtr) b->DriverPrivate.ptr;
     CARD32 ct1 = GLINT_READ_REG(PMCount);
     CARD32 ct2 = usec * 100;
     if (GLINT_READ_REG(PMCount) != ct1)
 	while ((GLINT_READ_REG(PMCount) - ct1) < ct2);
+}
 void
 Permedia2I2CPutBits(I2CBusPtr b, int scl, int sda)
+{
     GLINTPtr pGlint = (GLINTPtr) b->DriverPrivate.ptr;
     int r = (pGlint->DDCBus == b) ? PMDDCData : VSSerialBusControl;
 /*
     This is bogus.
     All this line does is to preserve the USE_MONID bit if set which prevents
     the i2c bits from doing anything
     CARD32 v = GLINT_READ_REG(r) & ~(ClkOut | DataOut);
 */
     CARD32 v = 0;
     if (scl > 0) v |= ClkOut;
     if (sda > 0) v |= DataOut;
     GLINT_WRITE_REG(v, r);
+}
 void
 Permedia2I2CGetBits(I2CBusPtr b, int *scl, int *sda)
+{
     GLINTPtr pGlint = (GLINTPtr) b->DriverPrivate.ptr;
     CARD32 v = GLINT_READ_REG((pGlint->DDCBus == b) ?
 	    PMDDCData : VSSerialBusControl);

 @@ -844,27 +844,27 @@ MGA3026Save(ScrnInfoPtr pScrn, vgaRegPtr
 	outTi3026(TVP3026_PLL_ADDR, 0, 0x00);
 	for (i = 3; i < 6; i++)
 		outTi3026(TVP3026_LOAD_CLK_DATA, 0, mgaReg->DacClk[i] =
 					inTi3026(TVP3026_LOAD_CLK_DATA));
 	);	/* MGA_NOT_HAL */
 	for (i = 0; i < DACREGSIZE; i++)
 		mgaReg->DacRegs[i]	 = inTi3026(MGADACregs[i]);
 #ifdef XSERVER_LIBPCIACCESS
+    {
 	uint32_t Option;
 	pci_device_cfg_read_u32(pMga->PciInfo, & Option,
 				PCI_OPTION_REG);
         mgaReg->Option = Option;
+    }
 #else
 	mgaReg->Option = pciReadLong(pMga->PciTag, PCI_OPTION_REG);
 #endif
 #ifdef DEBUG
 	ErrorF("read: %02X %02X %02X	%02X %02X %02X	%08lX\n",
 		mgaReg->DacClk[0], mgaReg->DacClk[1], mgaReg->DacClk[2], mgaReg->DacClk[3], mgaReg->DacClk[4], mgaReg->DacClk[5], mgaReg->Option);
 	for (i=0; i<sizeof(MGADACregs); i++) ErrorF("%02X ", mgaReg->DacRegs[i]);
 	for (i=0; i<6; i++) ErrorF(" %02X", mgaReg->ExtVga[i]);
 	ErrorF("\n");

 @@ -1506,30 +1506,26 @@ Bool R128PreInit(ScrnInfoPtr pScrn, int
 				/* Free the video bios (if applicable) */
     if (info->VBIOS) {
 	free(info->VBIOS);
 	info->VBIOS = NULL;
+    }
 				/* Free int10 info */
     if (pInt10)
 	xf86FreeInt10(pInt10);
     if (info->MMIO) R128UnmapMMIO(pScrn);
     info->MMIO = NULL;
     xf86DrvMsg(pScrn->scrnIndex, X_NOTICE,
 	"For information on using the multimedia capabilities\n\tof this"
 	" adapter, please see http://gatos.sf.net.\n");
     return TRUE;
   fail:
 				/* Pre-init failed. */
 				/* Free the video bios (if applicable) */
     if (info->VBIOS) {
 	free(info->VBIOS);
 	info->VBIOS = NULL;
+    }
 				/* Free int10 info */
     if (pInt10)

 @@ -43,38 +43,38 @@
    */
 #define LT_OBJDIR ".libs/"
 /* Name of package */
 #define PACKAGE "xf86-video-glint"
 /* Define to the address where bug reports for this package should be sent. */
 #define PACKAGE_BUGREPORT "https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/glint"
 /* Define to the full name of this package. */
 #define PACKAGE_NAME "xf86-video-glint"
 /* Define to the full name and version of this package. */
-#define PACKAGE_STRING "xf86-video-glint 1.2.8"
+#define PACKAGE_STRING "xf86-video-glint 1.2.9"
 /* Define to the one symbol short name of this package. */
 #define PACKAGE_TARNAME "xf86-video-glint"
 /* Define to the home page for this package. */
 #define PACKAGE_URL ""
 /* Define to the version of this package. */
-#define PACKAGE_VERSION "1.2.8"
+#define PACKAGE_VERSION "1.2.9"
 /* Major version of this package */
 #define PACKAGE_VERSION_MAJOR 1
 /* Minor version of this package */
 #define PACKAGE_VERSION_MINOR 2
 /* Patch version of this package */
-#define PACKAGE_VERSION_PATCHLEVEL 8
+#define PACKAGE_VERSION_PATCHLEVEL 9
 /* Define to 1 if you have the ANSI C header files. */
 #define STDC_HEADERS 1
 /* Version number of package */
-#define VERSION "1.2.8"
+#define VERSION "1.2.9"

 @@ -25,27 +25,33 @@
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
 #include <string.h>
 #include <stdio.h>
 #include "xf86.h"
 #include "xf86Modes.h"
 #ifdef HAVE_XEXTPROTO_71
 #include "X11/extensions/dpmsconst.h"
 #else
 #define DPMS_SERVER
 #include "X11/extensions/dpms.h"
 #endif
 #include "r128.h"
 #include "r128_probe.h"
 #include "r128_reg.h"
 #include "xf86Priv.h"
 #include "xf86Privstr.h"
 #ifdef __NetBSD__
 #include <sys/time.h>
 #include <sys/ioctl.h>
 #include <dev/wscons/wsconsio.h>
 #endif