| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
1 | /* $NetBSD: soc_tegra124.c,v 1.13 2017/04/13 21:20:44 jmcneill Exp $ */ | | 1 | /* $NetBSD: soc_tegra124.c,v 1.14 2017/04/16 12:26:04 jmcneill Exp $ */ |
2 | | | 2 | |
3 | /*- | | 3 | /*- |
4 | * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> | | 4 | * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> |
5 | * All rights reserved. | | 5 | * All rights reserved. |
6 | * | | 6 | * |
7 | * Redistribution and use in source and binary forms, with or without | | 7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions | | 8 | * modification, are permitted provided that the following conditions |
9 | * are met: | | 9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright | | 10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. | | 11 | * notice, this list of conditions and the following disclaimer. |
12 | * 2. Redistributions in binary form must reproduce the above copyright | | 12 | * 2. Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the | | 13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. | | 14 | * documentation and/or other materials provided with the distribution. |
| @@ -20,27 +20,27 @@ | | | @@ -20,27 +20,27 @@ |
20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | | 20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
21 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | | 21 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED | | 22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
23 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | | 23 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
24 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | | 24 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | | 25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
26 | * SUCH DAMAGE. | | 26 | * SUCH DAMAGE. |
27 | */ | | 27 | */ |
28 | | | 28 | |
29 | #include "opt_tegra.h" | | 29 | #include "opt_tegra.h" |
30 | #include "opt_multiprocessor.h" | | 30 | #include "opt_multiprocessor.h" |
31 | | | 31 | |
32 | #include <sys/cdefs.h> | | 32 | #include <sys/cdefs.h> |
33 | __KERNEL_RCSID(0, "$NetBSD: soc_tegra124.c,v 1.13 2017/04/13 21:20:44 jmcneill Exp $"); | | 33 | __KERNEL_RCSID(0, "$NetBSD: soc_tegra124.c,v 1.14 2017/04/16 12:26:04 jmcneill Exp $"); |
34 | | | 34 | |
35 | #include <sys/param.h> | | 35 | #include <sys/param.h> |
36 | #include <sys/bus.h> | | 36 | #include <sys/bus.h> |
37 | #include <sys/cpu.h> | | 37 | #include <sys/cpu.h> |
38 | #include <sys/device.h> | | 38 | #include <sys/device.h> |
39 | | | 39 | |
40 | #include <uvm/uvm_extern.h> | | 40 | #include <uvm/uvm_extern.h> |
41 | | | 41 | |
42 | #include <dev/clk/clk.h> | | 42 | #include <dev/clk/clk.h> |
43 | #include <dev/i2c/i2cvar.h> | | 43 | #include <dev/i2c/i2cvar.h> |
44 | #include <dev/fdt/fdtvar.h> | | 44 | #include <dev/fdt/fdtvar.h> |
45 | | | 45 | |
46 | #include <arm/cpufunc.h> | | 46 | #include <arm/cpufunc.h> |
| @@ -106,54 +106,56 @@ static struct tegra124_speedo { | | | @@ -106,54 +106,56 @@ static struct tegra124_speedo { |
106 | u_int soc_speedo_id; | | 106 | u_int soc_speedo_id; |
107 | u_int gpu_speedo_id; | | 107 | u_int gpu_speedo_id; |
108 | } tegra124_speedo = { | | 108 | } tegra124_speedo = { |
109 | .cpu_speedo_id = 0, | | 109 | .cpu_speedo_id = 0, |
110 | .soc_speedo_id = 0, | | 110 | .soc_speedo_id = 0, |
111 | .gpu_speedo_id = 0 | | 111 | .gpu_speedo_id = 0 |
112 | }; | | 112 | }; |
113 | | | 113 | |
114 | static struct clk *tegra124_clk_pllx = NULL; | | 114 | static struct clk *tegra124_clk_pllx = NULL; |
115 | | | 115 | |
116 | void | | 116 | void |
117 | tegra124_cpuinit(void) | | 117 | tegra124_cpuinit(void) |
118 | { | | 118 | { |
119 | int node = OF_finddevice("/i2c@7000d000"); | | 119 | int i2c_node = OF_finddevice("/i2c@7000d000"); |
120 | if (node == -1) | | 120 | if (i2c_node == -1) |
121 | node = OF_finddevice("/i2c@0,7000d000"); /* old DTB */ | | 121 | i2c_node = OF_finddevice("/i2c@0,7000d000"); /* old DTB */ |
122 | if (node == -1) { | | 122 | if (i2c_node == -1) { |
123 | aprint_error("cpufreq: ERROR: couldn't find i2c@7000d000\n"); | | 123 | aprint_error("cpufreq: ERROR: couldn't find i2c@7000d000\n"); |
124 | return; | | 124 | return; |
125 | } | | 125 | } |
126 | i2c_tag_t ic = fdtbus_get_i2c_tag(node); | | 126 | i2c_tag_t ic = fdtbus_get_i2c_tag(i2c_node); |
127 | | | 127 | |
128 | /* Set VDD_CPU voltage to 1.4V */ | | 128 | /* Set VDD_CPU voltage to 1.4V */ |
129 | const u_int target_mv = 1400; | | 129 | const u_int target_mv = 1400; |
130 | const u_int sd0_vsel = (target_mv - 600) / 10; | | 130 | const u_int sd0_vsel = (target_mv - 600) / 10; |
131 | uint8_t data[2] = { 0x00, sd0_vsel }; | | 131 | uint8_t data[2] = { 0x00, sd0_vsel }; |
132 | | | 132 | |
133 | iic_acquire_bus(ic, I2C_F_POLL); | | 133 | iic_acquire_bus(ic, I2C_F_POLL); |
134 | const int error = iic_exec(ic, I2C_OP_WRITE_WITH_STOP, 0x40, | | 134 | const int error = iic_exec(ic, I2C_OP_WRITE_WITH_STOP, 0x40, |
135 | NULL, 0, data, sizeof(data), I2C_F_POLL); | | 135 | NULL, 0, data, sizeof(data), I2C_F_POLL); |
136 | iic_release_bus(ic, I2C_F_POLL); | | 136 | iic_release_bus(ic, I2C_F_POLL); |
137 | if (error) { | | 137 | if (error) { |
138 | aprint_error("cpufreq: ERROR: couldn't set VDD_CPU: %d\n", | | 138 | aprint_error("cpufreq: ERROR: couldn't set VDD_CPU: %d\n", |
139 | error); | | 139 | error); |
140 | return; | | 140 | return; |
141 | } | | 141 | } |
142 | delay(10000); | | 142 | delay(10000); |
143 | | | 143 | |
144 | tegra124_speedo_init(); | | 144 | tegra124_speedo_init(); |
145 | | | 145 | |
146 | tegra124_clk_pllx = clk_get("pll_x"); | | 146 | int cpu_node = OF_finddevice("/cpus/cpu@0"); |
| | | 147 | if (cpu_node != -1) |
| | | 148 | tegra124_clk_pllx = fdtbus_clock_get(cpu_node, "pll_x"); |
147 | if (tegra124_clk_pllx == NULL) { | | 149 | if (tegra124_clk_pllx == NULL) { |
148 | aprint_error("cpufreq: ERROR: couldn't find pll_x\n"); | | 150 | aprint_error("cpufreq: ERROR: couldn't find pll_x\n"); |
149 | return; | | 151 | return; |
150 | } | | 152 | } |
151 | | | 153 | |
152 | tegra_cpufreq_register(&tegra124_cpufreq_func); | | 154 | tegra_cpufreq_register(&tegra124_cpufreq_func); |
153 | } | | 155 | } |
154 | | | 156 | |
155 | static void | | 157 | static void |
156 | tegra124_speedo_init(void) | | 158 | tegra124_speedo_init(void) |
157 | { | | 159 | { |
158 | uint32_t sku_id; | | 160 | uint32_t sku_id; |
159 | | | 161 | |