Wed Apr 26 08:00:03 2017 UTC ()
 Disable ppb(4)'s interrupt for a while. It causes hangup on some environment.
Define PPB_USEINTR if you'd like to use interrupt.


(msaitoh)
diff -r1.59 -r1.60 src/sys/dev/pci/ppb.c

cvs diff -r1.59 -r1.60 src/sys/dev/pci/ppb.c (expand / switch to unified diff)

--- src/sys/dev/pci/ppb.c 2017/04/26 03:54:37 1.59
+++ src/sys/dev/pci/ppb.c 2017/04/26 08:00:03 1.60
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: ppb.c,v 1.59 2017/04/26 03:54:37 msaitoh Exp $ */ 1/* $NetBSD: ppb.c,v 1.60 2017/04/26 08:00:03 msaitoh Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1996, 1998 Christopher G. Demetriou. All rights reserved. 4 * Copyright (c) 1996, 1998 Christopher G. Demetriou. All rights reserved.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions 7 * modification, are permitted provided that the following conditions
8 * are met: 8 * are met:
9 * 1. Redistributions of source code must retain the above copyright 9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer. 10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright 11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the 12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution. 13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software 14 * 3. All advertising materials mentioning features or use of this software
@@ -21,27 +21,27 @@ @@ -21,27 +21,27 @@
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */ 31 */
32 32
33#include <sys/cdefs.h> 33#include <sys/cdefs.h>
34__KERNEL_RCSID(0, "$NetBSD: ppb.c,v 1.59 2017/04/26 03:54:37 msaitoh Exp $"); 34__KERNEL_RCSID(0, "$NetBSD: ppb.c,v 1.60 2017/04/26 08:00:03 msaitoh Exp $");
35 35
36#include <sys/param.h> 36#include <sys/param.h>
37#include <sys/systm.h> 37#include <sys/systm.h>
38#include <sys/kernel.h> 38#include <sys/kernel.h>
39#include <sys/device.h> 39#include <sys/device.h>
40#include <sys/evcnt.h> 40#include <sys/evcnt.h>
41 41
42#include <dev/pci/pcireg.h> 42#include <dev/pci/pcireg.h>
43#include <dev/pci/pcivar.h> 43#include <dev/pci/pcivar.h>
44#include <dev/pci/ppbreg.h> 44#include <dev/pci/ppbreg.h>
45#include <dev/pci/ppbvar.h> 45#include <dev/pci/ppbvar.h>
46#include <dev/pci/pcidevs.h> 46#include <dev/pci/pcidevs.h>
47 47
@@ -50,27 +50,29 @@ __KERNEL_RCSID(0, "$NetBSD: ppb.c,v 1.59 @@ -50,27 +50,29 @@ __KERNEL_RCSID(0, "$NetBSD: ppb.c,v 1.59
50 PCIE_SLCSR_PDE | PCIE_SLCSR_CCE | PCIE_SLCSR_HPE | \ 50 PCIE_SLCSR_PDE | PCIE_SLCSR_CCE | PCIE_SLCSR_HPE | \
51 PCIE_SLCSR_DLLSCE) 51 PCIE_SLCSR_DLLSCE)
52 52
53static const char pcie_linkspeed_strings[4][5] = { 53static const char pcie_linkspeed_strings[4][5] = {
54 "1.25", "2.5", "5.0", "8.0", 54 "1.25", "2.5", "5.0", "8.0",
55}; 55};
56 56
57int ppb_printevent = 0; /* Print event type if the value is not 0 */ 57int ppb_printevent = 0; /* Print event type if the value is not 0 */
58 58
59static int ppbmatch(device_t, cfdata_t, void *); 59static int ppbmatch(device_t, cfdata_t, void *);
60static void ppbattach(device_t, device_t, void *); 60static void ppbattach(device_t, device_t, void *);
61static int ppbdetach(device_t, int); 61static int ppbdetach(device_t, int);
62static void ppbchilddet(device_t, device_t); 62static void ppbchilddet(device_t, device_t);
 63#ifdef PPB_USEINTR
63static int ppb_intr(void *); 64static int ppb_intr(void *);
 65#endif
64static bool ppb_resume(device_t, const pmf_qual_t *); 66static bool ppb_resume(device_t, const pmf_qual_t *);
65static bool ppb_suspend(device_t, const pmf_qual_t *); 67static bool ppb_suspend(device_t, const pmf_qual_t *);
66 68
67CFATTACH_DECL3_NEW(ppb, sizeof(struct ppb_softc), 69CFATTACH_DECL3_NEW(ppb, sizeof(struct ppb_softc),
68 ppbmatch, ppbattach, ppbdetach, NULL, NULL, ppbchilddet, 70 ppbmatch, ppbattach, ppbdetach, NULL, NULL, ppbchilddet,
69 DVF_DETACH_SHUTDOWN); 71 DVF_DETACH_SHUTDOWN);
70 72
71static int 73static int
72ppbmatch(device_t parent, cfdata_t match, void *aux) 74ppbmatch(device_t parent, cfdata_t match, void *aux)
73{ 75{
74 struct pci_attach_args *pa = aux; 76 struct pci_attach_args *pa = aux;
75 77
76 /* 78 /*
@@ -193,28 +195,30 @@ ppb_print_pcie(device_t self) @@ -193,28 +195,30 @@ ppb_print_pcie(device_t self)
193 default: 195 default:
194 aprint_normal(">\n"); 196 aprint_normal(">\n");
195 break; 197 break;
196 } 198 }
197} 199}
198 200
199static void 201static void
200ppbattach(device_t parent, device_t self, void *aux) 202ppbattach(device_t parent, device_t self, void *aux)
201{ 203{
202 struct ppb_softc *sc = device_private(self); 204 struct ppb_softc *sc = device_private(self);
203 struct pci_attach_args *pa = aux; 205 struct pci_attach_args *pa = aux;
204 pci_chipset_tag_t pc = pa->pa_pc; 206 pci_chipset_tag_t pc = pa->pa_pc;
205 struct pcibus_attach_args pba; 207 struct pcibus_attach_args pba;
 208#ifdef PPB_USEINTR
206 char const *intrstr; 209 char const *intrstr;
207 char intrbuf[PCI_INTRSTR_LEN]; 210 char intrbuf[PCI_INTRSTR_LEN];
 211#endif
208 pcireg_t busdata, reg; 212 pcireg_t busdata, reg;
209 213
210 pci_aprint_devinfo(pa, NULL); 214 pci_aprint_devinfo(pa, NULL);
211 215
212 sc->sc_pc = pc; 216 sc->sc_pc = pc;
213 sc->sc_tag = pa->pa_tag; 217 sc->sc_tag = pa->pa_tag;
214 sc->sc_dev = self; 218 sc->sc_dev = self;
215 219
216 busdata = pci_conf_read(pc, pa->pa_tag, PPB_REG_BUSINFO); 220 busdata = pci_conf_read(pc, pa->pa_tag, PPB_REG_BUSINFO);
217 221
218 if (PPB_BUSINFO_SECONDARY(busdata) == 0) { 222 if (PPB_BUSINFO_SECONDARY(busdata) == 0) {
219 aprint_normal_dev(self, "not configured by system firmware\n"); 223 aprint_normal_dev(self, "not configured by system firmware\n");
220 return; 224 return;
@@ -227,26 +231,27 @@ ppbattach(device_t parent, device_t self @@ -227,26 +231,27 @@ ppbattach(device_t parent, device_t self
227 * XXX can't do this, because we're not given our bus number 231 * XXX can't do this, because we're not given our bus number
228 * (we shouldn't need it), and because we've no way to 232 * (we shouldn't need it), and because we've no way to
229 * decompose our tag. 233 * decompose our tag.
230 */ 234 */
231 /* sanity check. */ 235 /* sanity check. */
232 if (pa->pa_bus != PPB_BUSINFO_PRIMARY(busdata)) 236 if (pa->pa_bus != PPB_BUSINFO_PRIMARY(busdata))
233 panic("ppbattach: bus in tag (%d) != bus in reg (%d)", 237 panic("ppbattach: bus in tag (%d) != bus in reg (%d)",
234 pa->pa_bus, PPB_BUSINFO_PRIMARY(busdata)); 238 pa->pa_bus, PPB_BUSINFO_PRIMARY(busdata));
235#endif 239#endif
236 240
237 /* Check for PCI Express capabilities and setup hotplug support. */ 241 /* Check for PCI Express capabilities and setup hotplug support. */
238 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PCIEXPRESS, 242 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PCIEXPRESS,
239 &sc->sc_pciecapoff, &reg) && (reg & PCIE_XCAP_SI)) { 243 &sc->sc_pciecapoff, &reg) && (reg & PCIE_XCAP_SI)) {
 244#ifdef PPB_USEINTR
240#if 0 245#if 0
241 /* 246 /*
242 * XXX Initialize workqueue or something else for 247 * XXX Initialize workqueue or something else for
243 * HotPlug support. 248 * HotPlug support.
244 */ 249 */
245#endif 250#endif
246 251
247 if (pci_intr_alloc(pa, &sc->sc_pihp, NULL, 0) == 0) 252 if (pci_intr_alloc(pa, &sc->sc_pihp, NULL, 0) == 0)
248 sc->sc_intrhand = pci_intr_establish_xname(pc, 253 sc->sc_intrhand = pci_intr_establish_xname(pc,
249 sc->sc_pihp[0], IPL_BIO, ppb_intr, sc, 254 sc->sc_pihp[0], IPL_BIO, ppb_intr, sc,
250 device_xname(sc->sc_dev)); 255 device_xname(sc->sc_dev));
251 256
252 if (sc->sc_intrhand) { 257 if (sc->sc_intrhand) {
@@ -294,99 +299,116 @@ ppbattach(device_t parent, device_t self @@ -294,99 +299,116 @@ ppbattach(device_t parent, device_t self
294 val |= __SHIFTIN(PCIE_SLCSR_IND_OFF, 299 val |= __SHIFTIN(PCIE_SLCSR_IND_OFF,
295 PCIE_SLCSR_PIC); 300 PCIE_SLCSR_PIC);
296 else 301 else
297 val |= __SHIFTIN(PCIE_SLCSR_IND_ON, 302 val |= __SHIFTIN(PCIE_SLCSR_IND_ON,
298 PCIE_SLCSR_PIC); 303 PCIE_SLCSR_PIC);
299 } 304 }
300 305
301 val |= PCIE_SLCSR_DLLSCE | PCIE_SLCSR_HPE 306 val |= PCIE_SLCSR_DLLSCE | PCIE_SLCSR_HPE
302 | PCIE_SLCSR_PDE; 307 | PCIE_SLCSR_PDE;
303 slcsr = val; 308 slcsr = val;
304 pci_conf_write(pc, pa->pa_tag, 309 pci_conf_write(pc, pa->pa_tag,
305 sc->sc_pciecapoff + PCIE_SLCSR, slcsr); 310 sc->sc_pciecapoff + PCIE_SLCSR, slcsr);
306 } 311 }
 312#else
 313 reg = pci_conf_read(sc->sc_pc, sc->sc_tag,
 314 sc->sc_pciecapoff + PCIE_SLCSR);
 315 if (reg & PCIE_SLCSR_NOTIFY_MASK) {
 316 aprint_debug_dev(self,
 317 "disabling notification events\n");
 318 reg &= ~PCIE_SLCSR_NOTIFY_MASK;
 319 pci_conf_write(sc->sc_pc, sc->sc_tag,
 320 sc->sc_pciecapoff + PCIE_SLCSR, reg);
 321 }
 322#endif /* PPB_USEINTR */
307 } 323 }
308 324
309 if (!pmf_device_register(self, ppb_suspend, ppb_resume)) 325 if (!pmf_device_register(self, ppb_suspend, ppb_resume))
310 aprint_error_dev(self, "couldn't establish power handler\n"); 326 aprint_error_dev(self, "couldn't establish power handler\n");
311 327
312 /* 328 /*
313 * Attach the PCI bus than hangs off of it. 329 * Attach the PCI bus than hangs off of it.
314 * 330 *
315 * XXX Don't pass-through Memory Read Multiple. Should we? 331 * XXX Don't pass-through Memory Read Multiple. Should we?
316 * XXX Consult the spec... 332 * XXX Consult the spec...
317 */ 333 */
318 pba.pba_iot = pa->pa_iot; 334 pba.pba_iot = pa->pa_iot;
319 pba.pba_memt = pa->pa_memt; 335 pba.pba_memt = pa->pa_memt;
320 pba.pba_dmat = pa->pa_dmat; 336 pba.pba_dmat = pa->pa_dmat;
321 pba.pba_dmat64 = pa->pa_dmat64; 337 pba.pba_dmat64 = pa->pa_dmat64;
322 pba.pba_pc = pc; 338 pba.pba_pc = pc;
323 pba.pba_flags = pa->pa_flags & ~PCI_FLAGS_MRM_OKAY; 339 pba.pba_flags = pa->pa_flags & ~PCI_FLAGS_MRM_OKAY;
324 pba.pba_bus = PPB_BUSINFO_SECONDARY(busdata); 340 pba.pba_bus = PPB_BUSINFO_SECONDARY(busdata);
325 pba.pba_sub = PPB_BUSINFO_SUBORDINATE(busdata); 341 pba.pba_sub = PPB_BUSINFO_SUBORDINATE(busdata);
326 pba.pba_bridgetag = &sc->sc_tag; 342 pba.pba_bridgetag = &sc->sc_tag;
327 pba.pba_intrswiz = pa->pa_intrswiz; 343 pba.pba_intrswiz = pa->pa_intrswiz;
328 pba.pba_intrtag = pa->pa_intrtag; 344 pba.pba_intrtag = pa->pa_intrtag;
329 345
 346#ifdef PPB_USEINTR
330 /* Attach event counters */ 347 /* Attach event counters */
331 evcnt_attach_dynamic(&sc->sc_ev_intr, EVCNT_TYPE_INTR, NULL, 348 evcnt_attach_dynamic(&sc->sc_ev_intr, EVCNT_TYPE_INTR, NULL,
332 device_xname(sc->sc_dev), "Interrupt"); 349 device_xname(sc->sc_dev), "Interrupt");
333 evcnt_attach_dynamic(&sc->sc_ev_abp, EVCNT_TYPE_MISC, NULL, 350 evcnt_attach_dynamic(&sc->sc_ev_abp, EVCNT_TYPE_MISC, NULL,
334 device_xname(sc->sc_dev), "Attention Button Pressed"); 351 device_xname(sc->sc_dev), "Attention Button Pressed");
335 evcnt_attach_dynamic(&sc->sc_ev_pfd, EVCNT_TYPE_MISC, NULL, 352 evcnt_attach_dynamic(&sc->sc_ev_pfd, EVCNT_TYPE_MISC, NULL,
336 device_xname(sc->sc_dev), "Power Fault Detected"); 353 device_xname(sc->sc_dev), "Power Fault Detected");
337 evcnt_attach_dynamic(&sc->sc_ev_msc, EVCNT_TYPE_MISC, NULL, 354 evcnt_attach_dynamic(&sc->sc_ev_msc, EVCNT_TYPE_MISC, NULL,
338 device_xname(sc->sc_dev), "MRL Sensor Changed"); 355 device_xname(sc->sc_dev), "MRL Sensor Changed");
339 evcnt_attach_dynamic(&sc->sc_ev_pdc, EVCNT_TYPE_MISC, NULL, 356 evcnt_attach_dynamic(&sc->sc_ev_pdc, EVCNT_TYPE_MISC, NULL,
340 device_xname(sc->sc_dev), "Presence Detect Changed"); 357 device_xname(sc->sc_dev), "Presence Detect Changed");
341 evcnt_attach_dynamic(&sc->sc_ev_cc, EVCNT_TYPE_MISC, NULL, 358 evcnt_attach_dynamic(&sc->sc_ev_cc, EVCNT_TYPE_MISC, NULL,
342 device_xname(sc->sc_dev), "Command Completed"); 359 device_xname(sc->sc_dev), "Command Completed");
343 evcnt_attach_dynamic(&sc->sc_ev_lacs, EVCNT_TYPE_MISC, NULL, 360 evcnt_attach_dynamic(&sc->sc_ev_lacs, EVCNT_TYPE_MISC, NULL,
344 device_xname(sc->sc_dev), "Data Link Layer State Changed"); 361 device_xname(sc->sc_dev), "Data Link Layer State Changed");
 362#endif
345 363
346 config_found_ia(self, "pcibus", &pba, pcibusprint); 364 config_found_ia(self, "pcibus", &pba, pcibusprint);
347} 365}
348 366
349static int 367static int
350ppbdetach(device_t self, int flags) 368ppbdetach(device_t self, int flags)
351{ 369{
 370#ifdef PPB_USEINTR
352 struct ppb_softc *sc = device_private(self); 371 struct ppb_softc *sc = device_private(self);
353 pcireg_t slcsr; 372 pcireg_t slcsr;
 373#endif
354 int rc; 374 int rc;
355 375
356 if ((rc = config_detach_children(self, flags)) != 0) 376 if ((rc = config_detach_children(self, flags)) != 0)
357 return rc; 377 return rc;
358 378
 379#ifdef PPB_USEINTR
359 /* Detach event counters */ 380 /* Detach event counters */
360 evcnt_detach(&sc->sc_ev_intr); 381 evcnt_detach(&sc->sc_ev_intr);
361 evcnt_detach(&sc->sc_ev_abp); 382 evcnt_detach(&sc->sc_ev_abp);
362 evcnt_detach(&sc->sc_ev_pfd); 383 evcnt_detach(&sc->sc_ev_pfd);
363 evcnt_detach(&sc->sc_ev_msc); 384 evcnt_detach(&sc->sc_ev_msc);
364 evcnt_detach(&sc->sc_ev_pdc); 385 evcnt_detach(&sc->sc_ev_pdc);
365 evcnt_detach(&sc->sc_ev_cc); 386 evcnt_detach(&sc->sc_ev_cc);
366 evcnt_detach(&sc->sc_ev_lacs); 387 evcnt_detach(&sc->sc_ev_lacs);
367 388
368 /* Clear any pending events and disable interrupt */ 389 /* Clear any pending events and disable interrupt */
369 slcsr = pci_conf_read(sc->sc_pc, sc->sc_tag, 390 slcsr = pci_conf_read(sc->sc_pc, sc->sc_tag,
370 sc->sc_pciecapoff + PCIE_SLCSR); 391 sc->sc_pciecapoff + PCIE_SLCSR);
371 slcsr &= ~PCIE_SLCSR_NOTIFY_MASK; 392 slcsr &= ~PCIE_SLCSR_NOTIFY_MASK;
372 pci_conf_write(sc->sc_pc, sc->sc_tag, 393 pci_conf_write(sc->sc_pc, sc->sc_tag,
373 sc->sc_pciecapoff + PCIE_SLCSR, slcsr); 394 sc->sc_pciecapoff + PCIE_SLCSR, slcsr);
374 395
375 /* Disestablish the interrupt handler */ 396 /* Disestablish the interrupt handler */
376 if (sc->sc_intrhand != NULL) { 397 if (sc->sc_intrhand != NULL) {
377 pci_intr_disestablish(sc->sc_pc, sc->sc_intrhand); 398 pci_intr_disestablish(sc->sc_pc, sc->sc_intrhand);
378 pci_intr_release(sc->sc_pc, sc->sc_pihp, 1); 399 pci_intr_release(sc->sc_pc, sc->sc_pihp, 1);
379 } 400 }
 401#endif
380 402
381 pmf_device_deregister(self); 403 pmf_device_deregister(self);
382 return 0; 404 return 0;
383} 405}
384 406
385static bool 407static bool
386ppb_resume(device_t dv, const pmf_qual_t *qual) 408ppb_resume(device_t dv, const pmf_qual_t *qual)
387{ 409{
388 struct ppb_softc *sc = device_private(dv); 410 struct ppb_softc *sc = device_private(dv);
389 int off; 411 int off;
390 pcireg_t val; 412 pcireg_t val;
391 413
392 for (off = 0x40; off <= 0xff; off += 4) { 414 for (off = 0x40; off <= 0xff; off += 4) {
@@ -408,26 +430,27 @@ ppb_suspend(device_t dv, const pmf_qual_ @@ -408,26 +430,27 @@ ppb_suspend(device_t dv, const pmf_qual_
408 for (off = 0x40; off <= 0xff; off += 4) 430 for (off = 0x40; off <= 0xff; off += 4)
409 sc->sc_pciconfext[(off - 0x40) / 4] = 431 sc->sc_pciconfext[(off - 0x40) / 4] =
410 pci_conf_read(sc->sc_pc, sc->sc_tag, off); 432 pci_conf_read(sc->sc_pc, sc->sc_tag, off);
411 433
412 return true; 434 return true;
413} 435}
414 436
415static void 437static void
416ppbchilddet(device_t self, device_t child) 438ppbchilddet(device_t self, device_t child)
417{ 439{
418 /* we keep no references to child devices, so do nothing */ 440 /* we keep no references to child devices, so do nothing */
419} 441}
420 442
 443#ifdef PPB_USEINTR
421static int 444static int
422ppb_intr(void *arg) 445ppb_intr(void *arg)
423{ 446{
424 struct ppb_softc *sc = arg; 447 struct ppb_softc *sc = arg;
425 device_t dev = sc->sc_dev; 448 device_t dev = sc->sc_dev;
426 pcireg_t reg; 449 pcireg_t reg;
427 450
428 sc->sc_ev_intr.ev_count++; 451 sc->sc_ev_intr.ev_count++;
429 reg = pci_conf_read(sc->sc_pc, sc->sc_tag, 452 reg = pci_conf_read(sc->sc_pc, sc->sc_tag,
430 sc->sc_pciecapoff + PCIE_SLCSR); 453 sc->sc_pciecapoff + PCIE_SLCSR);
431 454
432 /* Clear interrupts. */ 455 /* Clear interrupts. */
433 pci_conf_write(sc->sc_pc, sc->sc_tag, 456 pci_conf_write(sc->sc_pc, sc->sc_tag,
@@ -472,13 +495,14 @@ ppb_intr(void *arg) @@ -472,13 +495,14 @@ ppb_intr(void *arg)
472 if (ppb_printevent) 495 if (ppb_printevent)
473 device_printf(dev, "Command Completed\n"); 496 device_printf(dev, "Command Completed\n");
474 } 497 }
475 498
476 /* Data Link Layer State Changed */ 499 /* Data Link Layer State Changed */
477 if (reg & PCIE_SLCSR_LACS) { 500 if (reg & PCIE_SLCSR_LACS) {
478 sc->sc_ev_lacs.ev_count++; 501 sc->sc_ev_lacs.ev_count++;
479 if (ppb_printevent) 502 if (ppb_printevent)
480 device_printf(dev, "Data Link Layer State Changed\n"); 503 device_printf(dev, "Data Link Layer State Changed\n");
481 } 504 }
482 505
483 return 0; 506 return 0;
484} 507}
 508#endif /* PPB_USEINTR */