| @@ -1,348 +1,350 @@ | | | @@ -1,348 +1,350 @@ |
1 | /* $NetBSD: fdt_intr.c,v 1.10 2017/06/02 13:12:33 jmcneill Exp $ */ | | 1 | /* $NetBSD: fdt_intr.c,v 1.11 2017/06/11 12:56:36 jmcneill Exp $ */ |
2 | | | 2 | |
3 | /*- | | 3 | /*- |
4 | * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> | | 4 | * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> |
5 | * All rights reserved. | | 5 | * All rights reserved. |
6 | * | | 6 | * |
7 | * Redistribution and use in source and binary forms, with or without | | 7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions | | 8 | * modification, are permitted provided that the following conditions |
9 | * are met: | | 9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright | | 10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. | | 11 | * notice, this list of conditions and the following disclaimer. |
12 | * 2. Redistributions in binary form must reproduce the above copyright | | 12 | * 2. Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the | | 13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. | | 14 | * documentation and/or other materials provided with the distribution. |
15 | * | | 15 | * |
16 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | | 16 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | | 17 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | | 18 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | | 19 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | | 20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
21 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | | 21 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED | | 22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
23 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | | 23 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
24 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | | 24 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | | 25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
26 | * SUCH DAMAGE. | | 26 | * SUCH DAMAGE. |
27 | */ | | 27 | */ |
28 | | | 28 | |
29 | #include <sys/cdefs.h> | | 29 | #include <sys/cdefs.h> |
30 | __KERNEL_RCSID(0, "$NetBSD: fdt_intr.c,v 1.10 2017/06/02 13:12:33 jmcneill Exp $"); | | 30 | __KERNEL_RCSID(0, "$NetBSD: fdt_intr.c,v 1.11 2017/06/11 12:56:36 jmcneill Exp $"); |
31 | | | 31 | |
32 | #include <sys/param.h> | | 32 | #include <sys/param.h> |
33 | #include <sys/bus.h> | | 33 | #include <sys/bus.h> |
34 | #include <sys/kmem.h> | | 34 | #include <sys/kmem.h> |
35 | | | 35 | |
36 | #include <libfdt.h> | | 36 | #include <libfdt.h> |
37 | #include <dev/fdt/fdtvar.h> | | 37 | #include <dev/fdt/fdtvar.h> |
38 | | | 38 | |
39 | struct fdtbus_interrupt_controller { | | 39 | struct fdtbus_interrupt_controller { |
40 | device_t ic_dev; | | 40 | device_t ic_dev; |
41 | int ic_phandle; | | 41 | int ic_phandle; |
42 | const struct fdtbus_interrupt_controller_func *ic_funcs; | | 42 | const struct fdtbus_interrupt_controller_func *ic_funcs; |
43 | | | 43 | |
44 | struct fdtbus_interrupt_controller *ic_next; | | 44 | struct fdtbus_interrupt_controller *ic_next; |
45 | }; | | 45 | }; |
46 | | | 46 | |
| | | 47 | struct fdtbus_interrupt_cookie { |
| | | 48 | struct fdtbus_interrupt_controller *c_ic; |
| | | 49 | void *c_ih; |
| | | 50 | }; |
| | | 51 | |
47 | static struct fdtbus_interrupt_controller *fdtbus_ic = NULL; | | 52 | static struct fdtbus_interrupt_controller *fdtbus_ic = NULL; |
48 | | | 53 | |
49 | static bool has_interrupt_map(int); | | 54 | static bool has_interrupt_map(int); |
50 | static u_int * get_specifier_by_index(int, int, int *); | | 55 | static u_int * get_specifier_by_index(int, int, int *); |
51 | static u_int * get_specifier_from_map(int, int, int *); | | 56 | static u_int * get_specifier_from_map(int, int, int *); |
52 | | | 57 | |
53 | static int | | 58 | static int |
54 | fdtbus_get_interrupt_parent(int phandle) | | 59 | fdtbus_get_interrupt_parent(int phandle) |
55 | { | | 60 | { |
56 | u_int interrupt_parent; | | 61 | u_int interrupt_parent; |
57 | | | 62 | |
58 | while (phandle >= 0) { | | 63 | while (phandle >= 0) { |
59 | if (of_getprop_uint32(phandle, "interrupt-parent", | | 64 | if (of_getprop_uint32(phandle, "interrupt-parent", |
60 | &interrupt_parent) == 0) { | | 65 | &interrupt_parent) == 0) { |
61 | break; | | 66 | break; |
62 | } | | 67 | } |
63 | if (phandle == 0) { | | 68 | if (phandle == 0) { |
64 | return -1; | | 69 | return -1; |
65 | } | | 70 | } |
66 | phandle = OF_parent(phandle); | | 71 | phandle = OF_parent(phandle); |
67 | } | | 72 | } |
68 | if (phandle < 0) { | | 73 | if (phandle < 0) { |
69 | return -1; | | 74 | return -1; |
70 | } | | 75 | } |
71 | | | 76 | |
72 | const void *data = fdtbus_get_data(); | | 77 | const void *data = fdtbus_get_data(); |
73 | const int off = fdt_node_offset_by_phandle(data, interrupt_parent); | | 78 | const int off = fdt_node_offset_by_phandle(data, interrupt_parent); |
74 | if (off < 0) { | | 79 | if (off < 0) { |
75 | return -1; | | 80 | return -1; |
76 | } | | 81 | } |
77 | | | 82 | |
78 | return fdtbus_offset2phandle(off); | | 83 | return fdtbus_offset2phandle(off); |
79 | } | | 84 | } |
80 | | | 85 | |
81 | static struct fdtbus_interrupt_controller * | | 86 | static struct fdtbus_interrupt_controller * |
82 | fdtbus_get_interrupt_controller_ic(int phandle) | | 87 | fdtbus_get_interrupt_controller(int phandle) |
83 | { | | 88 | { |
84 | struct fdtbus_interrupt_controller * ic; | | 89 | struct fdtbus_interrupt_controller * ic; |
85 | for (ic = fdtbus_ic; ic; ic = ic->ic_next) { | | 90 | for (ic = fdtbus_ic; ic; ic = ic->ic_next) { |
86 | if (ic->ic_phandle == phandle) { | | 91 | if (ic->ic_phandle == phandle) { |
87 | return ic; | | 92 | return ic; |
88 | } | | 93 | } |
89 | } | | 94 | } |
90 | return NULL; | | 95 | return NULL; |
91 | } | | 96 | } |
92 | | | 97 | |
93 | static struct fdtbus_interrupt_controller * | | | |
94 | fdtbus_get_interrupt_controller(int phandle) | | | |
95 | { | | | |
96 | const int ic_phandle = fdtbus_get_interrupt_parent(phandle); | | | |
97 | if (ic_phandle < 0) { | | | |
98 | return NULL; | | | |
99 | } | | | |
100 | | | | |
101 | return fdtbus_get_interrupt_controller_ic(ic_phandle); | | | |
102 | } | | | |
103 | | | | |
104 | int | | 98 | int |
105 | fdtbus_register_interrupt_controller(device_t dev, int phandle, | | 99 | fdtbus_register_interrupt_controller(device_t dev, int phandle, |
106 | const struct fdtbus_interrupt_controller_func *funcs) | | 100 | const struct fdtbus_interrupt_controller_func *funcs) |
107 | { | | 101 | { |
108 | struct fdtbus_interrupt_controller *ic; | | 102 | struct fdtbus_interrupt_controller *ic; |
109 | | | 103 | |
110 | ic = kmem_alloc(sizeof(*ic), KM_SLEEP); | | 104 | ic = kmem_alloc(sizeof(*ic), KM_SLEEP); |
111 | ic->ic_dev = dev; | | 105 | ic->ic_dev = dev; |
112 | ic->ic_phandle = phandle; | | 106 | ic->ic_phandle = phandle; |
113 | ic->ic_funcs = funcs; | | 107 | ic->ic_funcs = funcs; |
114 | | | 108 | |
115 | ic->ic_next = fdtbus_ic; | | 109 | ic->ic_next = fdtbus_ic; |
116 | fdtbus_ic = ic; | | 110 | fdtbus_ic = ic; |
117 | | | 111 | |
118 | return 0; | | 112 | return 0; |
119 | } | | 113 | } |
120 | | | 114 | |
121 | void * | | 115 | void * |
122 | fdtbus_intr_establish(int phandle, u_int index, int ipl, int flags, | | 116 | fdtbus_intr_establish(int phandle, u_int index, int ipl, int flags, |
123 | int (*func)(void *), void *arg) | | 117 | int (*func)(void *), void *arg) |
124 | { | | 118 | { |
125 | struct fdtbus_interrupt_controller *ic; | | 119 | struct fdtbus_interrupt_controller *ic; |
| | | 120 | struct fdtbus_interrupt_cookie *c = NULL; |
126 | u_int *specifier; | | 121 | u_int *specifier; |
127 | int ihandle; | | 122 | int ihandle; |
| | | 123 | void *ih; |
128 | | | 124 | |
129 | specifier = get_specifier_by_index(phandle, index, &ihandle); | | 125 | specifier = get_specifier_by_index(phandle, index, &ihandle); |
130 | if (specifier == NULL) | | 126 | if (specifier == NULL) |
131 | return NULL; | | 127 | return NULL; |
132 | | | 128 | |
133 | ic = fdtbus_get_interrupt_controller(ihandle); | | 129 | ic = fdtbus_get_interrupt_controller(ihandle); |
134 | if (ic == NULL) | | 130 | if (ic == NULL) |
135 | return NULL; | | 131 | return NULL; |
136 | | | 132 | |
137 | return ic->ic_funcs->establish(ic->ic_dev, specifier, | | 133 | ih = ic->ic_funcs->establish(ic->ic_dev, specifier, |
138 | ipl, flags, func, arg); | | 134 | ipl, flags, func, arg); |
| | | 135 | if (ih != NULL) { |
| | | 136 | c = kmem_alloc(sizeof(*c), KM_SLEEP); |
| | | 137 | c->c_ic = ic; |
| | | 138 | c->c_ih = ih; |
| | | 139 | } |
| | | 140 | |
| | | 141 | return c; |
139 | } | | 142 | } |
140 | | | 143 | |
141 | void | | 144 | void |
142 | fdtbus_intr_disestablish(int phandle, void *ih) | | 145 | fdtbus_intr_disestablish(int phandle, void *cookie) |
143 | { | | 146 | { |
144 | struct fdtbus_interrupt_controller *ic; | | 147 | struct fdtbus_interrupt_cookie *c = cookie; |
145 | | | 148 | struct fdtbus_interrupt_controller *ic = c->c_ic; |
146 | ic = fdtbus_get_interrupt_controller(phandle); | | 149 | void *ih = c->c_ih; |
147 | KASSERT(ic != NULL); | | | |
148 | | | 150 | |
149 | return ic->ic_funcs->disestablish(ic->ic_dev, ih); | | 151 | return ic->ic_funcs->disestablish(ic->ic_dev, ih); |
150 | } | | 152 | } |
151 | | | 153 | |
152 | bool | | 154 | bool |
153 | fdtbus_intr_str(int phandle, u_int index, char *buf, size_t buflen) | | 155 | fdtbus_intr_str(int phandle, u_int index, char *buf, size_t buflen) |
154 | { | | 156 | { |
155 | struct fdtbus_interrupt_controller *ic; | | 157 | struct fdtbus_interrupt_controller *ic; |
156 | u_int *specifier; | | 158 | u_int *specifier; |
157 | int ihandle; | | 159 | int ihandle; |
158 | | | 160 | |
159 | specifier = get_specifier_by_index(phandle, index, &ihandle); | | 161 | specifier = get_specifier_by_index(phandle, index, &ihandle); |
160 | | | 162 | |
161 | ic = fdtbus_get_interrupt_controller(ihandle); | | 163 | ic = fdtbus_get_interrupt_controller(ihandle); |
162 | if (ic == NULL) | | 164 | if (ic == NULL) |
163 | return false; | | 165 | return false; |
164 | | | 166 | |
165 | return ic->ic_funcs->intrstr(ic->ic_dev, specifier, buf, buflen); | | 167 | return ic->ic_funcs->intrstr(ic->ic_dev, specifier, buf, buflen); |
166 | } | | 168 | } |
167 | | | 169 | |
168 | static int | | 170 | static int |
169 | find_interrupt_map(int phandle) | | 171 | find_interrupt_map(int phandle) |
170 | { | | 172 | { |
171 | while (phandle > 0) { | | 173 | while (phandle > 0) { |
172 | if (of_hasprop(phandle, "interrupt-map")) | | 174 | if (of_hasprop(phandle, "interrupt-map")) |
173 | return phandle; | | 175 | return phandle; |
174 | phandle = OF_parent(phandle); | | 176 | phandle = OF_parent(phandle); |
175 | } | | 177 | } |
176 | return -1; | | 178 | return -1; |
177 | } | | 179 | } |
178 | | | 180 | |
179 | static int | | 181 | static int |
180 | find_address_cells(int phandle) | | 182 | find_address_cells(int phandle) |
181 | { | | 183 | { |
182 | uint32_t cells; | | 184 | uint32_t cells; |
183 | | | 185 | |
184 | if (of_getprop_uint32(phandle, "#address-cells", &cells) != 0) | | 186 | if (of_getprop_uint32(phandle, "#address-cells", &cells) != 0) |
185 | cells = 2; | | 187 | cells = 2; |
186 | | | 188 | |
187 | return cells; | | 189 | return cells; |
188 | } | | 190 | } |
189 | | | 191 | |
190 | static int | | 192 | static int |
191 | find_interrupt_cells(int phandle) | | 193 | find_interrupt_cells(int phandle) |
192 | { | | 194 | { |
193 | uint32_t cells; | | 195 | uint32_t cells; |
194 | | | 196 | |
195 | while (phandle > 0) { | | 197 | while (phandle > 0) { |
196 | if (of_getprop_uint32(phandle, "#interrupt-cells", &cells) == 0) | | 198 | if (of_getprop_uint32(phandle, "#interrupt-cells", &cells) == 0) |
197 | return cells; | | 199 | return cells; |
198 | phandle = OF_parent(phandle); | | 200 | phandle = OF_parent(phandle); |
199 | } | | 201 | } |
200 | return 0; | | 202 | return 0; |
201 | } | | 203 | } |
202 | | | 204 | |
203 | static bool | | 205 | static bool |
204 | has_interrupt_map(int phandle) | | 206 | has_interrupt_map(int phandle) |
205 | { | | 207 | { |
206 | return find_interrupt_map(OF_parent(phandle)) != -1; | | 208 | return find_interrupt_map(OF_parent(phandle)) != -1; |
207 | } | | 209 | } |
208 | | | 210 | |
209 | static u_int * | | 211 | static u_int * |
210 | get_specifier_from_map(int phandle, int pindex, int *piphandle) | | 212 | get_specifier_from_map(int phandle, int pindex, int *piphandle) |
211 | { | | 213 | { |
212 | const u_int *node_specifier = NULL; | | 214 | const u_int *node_specifier = NULL; |
213 | u_int *result = NULL; | | 215 | u_int *result = NULL; |
214 | int len, resid; | | 216 | int len, resid; |
215 | | | 217 | |
216 | const u_int interrupt_cells = find_interrupt_cells(phandle); | | 218 | const u_int interrupt_cells = find_interrupt_cells(phandle); |
217 | if (interrupt_cells < 1) | | 219 | if (interrupt_cells < 1) |
218 | return NULL; | | 220 | return NULL; |
219 | | | 221 | |
220 | node_specifier = fdt_getprop(fdtbus_get_data(), fdtbus_phandle2offset(phandle), | | 222 | node_specifier = fdt_getprop(fdtbus_get_data(), fdtbus_phandle2offset(phandle), |
221 | "interrupts", &len); | | 223 | "interrupts", &len); |
222 | if (node_specifier == NULL) | | 224 | if (node_specifier == NULL) |
223 | return NULL; | | 225 | return NULL; |
224 | | | 226 | |
225 | const u_int spec_length = len / 4; | | 227 | const u_int spec_length = len / 4; |
226 | const u_int nintr = spec_length / interrupt_cells; | | 228 | const u_int nintr = spec_length / interrupt_cells; |
227 | if (pindex >= nintr) | | 229 | if (pindex >= nintr) |
228 | return NULL; | | 230 | return NULL; |
229 | | | 231 | |
230 | node_specifier += (interrupt_cells * pindex); | | 232 | node_specifier += (interrupt_cells * pindex); |
231 | | | 233 | |
232 | const int nexus_phandle = find_interrupt_map(OF_parent(phandle)); | | 234 | const int nexus_phandle = find_interrupt_map(OF_parent(phandle)); |
233 | | | 235 | |
234 | const u_int *data = fdt_getprop(fdtbus_get_data(), fdtbus_phandle2offset(nexus_phandle), | | 236 | const u_int *data = fdt_getprop(fdtbus_get_data(), fdtbus_phandle2offset(nexus_phandle), |
235 | "interrupt-map", &len); | | 237 | "interrupt-map", &len); |
236 | if (data == NULL || len <= 0) { | | 238 | if (data == NULL || len <= 0) { |
237 | printf("%s: can't get property interrupt-map.\n", __func__); | | 239 | printf("%s: can't get property interrupt-map.\n", __func__); |
238 | return NULL; | | 240 | return NULL; |
239 | } | | 241 | } |
240 | resid = len; | | 242 | resid = len; |
241 | | | 243 | |
242 | /* child unit address: #address-cells prop of child bus node */ | | 244 | /* child unit address: #address-cells prop of child bus node */ |
243 | const int cua_cells = find_address_cells(nexus_phandle); | | 245 | const int cua_cells = find_address_cells(nexus_phandle); |
244 | /* child interrupt specifier: #interrupt-cells of the nexus node */ | | 246 | /* child interrupt specifier: #interrupt-cells of the nexus node */ |
245 | const int cis_cells = find_interrupt_cells(nexus_phandle); | | 247 | const int cis_cells = find_interrupt_cells(nexus_phandle); |
246 | | | 248 | |
247 | /* Offset (in cells) from map entry to child unit address specifier */ | | 249 | /* Offset (in cells) from map entry to child unit address specifier */ |
248 | const u_int cua_off = 0; | | 250 | const u_int cua_off = 0; |
249 | /* Offset (in cells) from map entry to child interrupt specifier */ | | 251 | /* Offset (in cells) from map entry to child interrupt specifier */ |
250 | const u_int cis_off = cua_off + cua_cells; | | 252 | const u_int cis_off = cua_off + cua_cells; |
251 | /* Offset (in cells) from map entry to interrupt parent phandle */ | | 253 | /* Offset (in cells) from map entry to interrupt parent phandle */ |
252 | const u_int ip_off = cis_off + cis_cells; | | 254 | const u_int ip_off = cis_off + cis_cells; |
253 | /* Offset (in cells) from map entry to parent unit specifier */ | | 255 | /* Offset (in cells) from map entry to parent unit specifier */ |
254 | const u_int pus_off = ip_off + 1; | | 256 | const u_int pus_off = ip_off + 1; |
255 | | | 257 | |
256 | #ifdef FDT_INTR_DEBUG | | 258 | #ifdef FDT_INTR_DEBUG |
257 | printf("%s: phandle=%s nexus_phandle=%s\n", __func__, | | 259 | printf("%s: phandle=%s nexus_phandle=%s\n", __func__, |
258 | fdt_get_name(fdtbus_get_data(), fdtbus_phandle2offset(phandle), NULL), | | 260 | fdt_get_name(fdtbus_get_data(), fdtbus_phandle2offset(phandle), NULL), |
259 | fdt_get_name(fdtbus_get_data(), fdtbus_phandle2offset(nexus_phandle), NULL)); | | 261 | fdt_get_name(fdtbus_get_data(), fdtbus_phandle2offset(nexus_phandle), NULL)); |
260 | printf("cua_cells: %d, cis_cells: %d, ip_off = %d\n", cua_cells, cis_cells, ip_off); | | 262 | printf("cua_cells: %d, cis_cells: %d, ip_off = %d\n", cua_cells, cis_cells, ip_off); |
261 | printf("searching for interrupt in map (data %p, len %d):", data, len); | | 263 | printf("searching for interrupt in map (data %p, len %d):", data, len); |
262 | for (int i = 0; i < interrupt_cells; i++) | | 264 | for (int i = 0; i < interrupt_cells; i++) |
263 | printf(" %08x", node_specifier[i]); | | 265 | printf(" %08x", node_specifier[i]); |
264 | printf("\n"); | | 266 | printf("\n"); |
265 | #endif | | 267 | #endif |
266 | | | 268 | |
267 | const u_int *p = (const u_int *)data; | | 269 | const u_int *p = (const u_int *)data; |
268 | while (resid > 0) { | | 270 | while (resid > 0) { |
269 | /* Interrupt parent phandle */ | | 271 | /* Interrupt parent phandle */ |
270 | const u_int iparent = fdtbus_get_phandle_from_native(be32toh(p[ip_off])); | | 272 | const u_int iparent = fdtbus_get_phandle_from_native(be32toh(p[ip_off])); |
271 | | | 273 | |
272 | /* parent unit specifier: #address-cells of the interrupt parent */ | | 274 | /* parent unit specifier: #address-cells of the interrupt parent */ |
273 | const u_int pus_cells = find_address_cells(iparent); | | 275 | const u_int pus_cells = find_address_cells(iparent); |
274 | /* parent interrupt specifier: #interrupt-cells of the interrupt parent */ | | 276 | /* parent interrupt specifier: #interrupt-cells of the interrupt parent */ |
275 | const u_int pis_cells = find_interrupt_cells(iparent); | | 277 | const u_int pis_cells = find_interrupt_cells(iparent); |
276 | | | 278 | |
277 | /* Offset (in cells) from map entry to parent interrupt specifier */ | | 279 | /* Offset (in cells) from map entry to parent interrupt specifier */ |
278 | const u_int pis_off = pus_off + pus_cells; | | 280 | const u_int pis_off = pus_off + pus_cells; |
279 | | | 281 | |
280 | #ifdef FDT_INTR_DEBUG | | 282 | #ifdef FDT_INTR_DEBUG |
281 | printf(" intr map (len %d):", pis_off + pis_cells); | | 283 | printf(" intr map (len %d):", pis_off + pis_cells); |
282 | for (int i = 0; i < pis_off + pis_cells; i++) | | 284 | for (int i = 0; i < pis_off + pis_cells; i++) |
283 | printf(" %08x", p[i]); | | 285 | printf(" %08x", p[i]); |
284 | printf("\n"); | | 286 | printf("\n"); |
285 | #endif | | 287 | #endif |
286 | | | 288 | |
287 | if (cis_cells == interrupt_cells && memcmp(&p[cis_off], node_specifier, interrupt_cells * 4) == 0) { | | 289 | if (cis_cells == interrupt_cells && memcmp(&p[cis_off], node_specifier, interrupt_cells * 4) == 0) { |
288 | const int slen = pus_cells + pis_cells; | | 290 | const int slen = pus_cells + pis_cells; |
289 | #ifdef FDT_INTR_DEBUG | | 291 | #ifdef FDT_INTR_DEBUG |
290 | printf(" intr map match iparent %08x slen %d:", iparent, slen); | | 292 | printf(" intr map match iparent %08x slen %d:", iparent, slen); |
291 | for (int i = 0; i < slen; i++) | | 293 | for (int i = 0; i < slen; i++) |
292 | printf(" %08x", p[pus_off + i]); | | 294 | printf(" %08x", p[pus_off + i]); |
293 | printf("\n"); | | 295 | printf("\n"); |
294 | #endif | | 296 | #endif |
295 | result = kmem_alloc(slen, KM_SLEEP); | | 297 | result = kmem_alloc(slen, KM_SLEEP); |
296 | memcpy(result, &p[pus_off], slen * 4); | | 298 | memcpy(result, &p[pus_off], slen * 4); |
297 | *piphandle = iparent; | | 299 | *piphandle = iparent; |
298 | goto done; | | 300 | goto done; |
299 | } | | 301 | } |
300 | /* Determine the length of the entry and skip that many | | 302 | /* Determine the length of the entry and skip that many |
301 | * 32 bit words | | 303 | * 32 bit words |
302 | */ | | 304 | */ |
303 | const u_int reclen = pis_off + pis_cells; | | 305 | const u_int reclen = pis_off + pis_cells; |
304 | resid -= reclen * sizeof(u_int); | | 306 | resid -= reclen * sizeof(u_int); |
305 | p += reclen; | | 307 | p += reclen; |
306 | } | | 308 | } |
307 | | | 309 | |
308 | done: | | 310 | done: |
309 | return result; | | 311 | return result; |
310 | } | | 312 | } |
311 | | | 313 | |
312 | static u_int * | | 314 | static u_int * |
313 | get_specifier_by_index(int phandle, int pindex, int *piphandle) | | 315 | get_specifier_by_index(int phandle, int pindex, int *piphandle) |
314 | { | | 316 | { |
315 | const u_int *node_specifier; | | 317 | const u_int *node_specifier; |
316 | u_int *specifier; | | 318 | u_int *specifier; |
317 | int interrupt_parent, interrupt_cells, len; | | 319 | int interrupt_parent, interrupt_cells, len; |
318 | | | 320 | |
319 | if (has_interrupt_map(phandle)) | | 321 | if (has_interrupt_map(phandle)) |
320 | return get_specifier_from_map(phandle, pindex, piphandle); | | 322 | return get_specifier_from_map(phandle, pindex, piphandle); |
321 | | | 323 | |
322 | interrupt_parent = fdtbus_get_interrupt_parent(phandle); | | 324 | interrupt_parent = fdtbus_get_interrupt_parent(phandle); |
323 | if (interrupt_parent <= 0) | | 325 | if (interrupt_parent <= 0) |
324 | return NULL; | | 326 | return NULL; |
325 | | | 327 | |
326 | interrupt_cells = find_interrupt_cells(interrupt_parent); | | 328 | interrupt_cells = find_interrupt_cells(interrupt_parent); |
327 | if (interrupt_cells <= 0) | | 329 | if (interrupt_cells <= 0) |
328 | return NULL; | | 330 | return NULL; |
329 | | | 331 | |
330 | node_specifier = fdt_getprop(fdtbus_get_data(), fdtbus_phandle2offset(phandle), | | 332 | node_specifier = fdt_getprop(fdtbus_get_data(), fdtbus_phandle2offset(phandle), |
331 | "interrupts", &len); | | 333 | "interrupts", &len); |
332 | if (node_specifier == NULL) | | 334 | if (node_specifier == NULL) |
333 | return NULL; | | 335 | return NULL; |
334 | | | 336 | |
335 | const u_int spec_length = len / 4; | | 337 | const u_int spec_length = len / 4; |
336 | const u_int nintr = spec_length / interrupt_cells; | | 338 | const u_int nintr = spec_length / interrupt_cells; |
337 | if (pindex >= nintr) | | 339 | if (pindex >= nintr) |
338 | return NULL; | | 340 | return NULL; |
339 | | | 341 | |
340 | node_specifier += (interrupt_cells * pindex); | | 342 | node_specifier += (interrupt_cells * pindex); |
341 | | | 343 | |
342 | specifier = kmem_alloc(interrupt_cells * sizeof(u_int), KM_SLEEP); | | 344 | specifier = kmem_alloc(interrupt_cells * sizeof(u_int), KM_SLEEP); |
343 | memcpy(specifier, node_specifier, interrupt_cells * 4); | | 345 | memcpy(specifier, node_specifier, interrupt_cells * 4); |
344 | | | 346 | |
345 | *piphandle = interrupt_parent; | | 347 | *piphandle = interrupt_parent; |
346 | | | 348 | |
347 | return specifier; | | 349 | return specifier; |
348 | } | | 350 | } |