 @@ -1,14 +1,14 @@
-/* $NetBSD: siisata.c,v 1.30.4.14 2017/04/24 21:19:21 jakllsch Exp $ */
+/* $NetBSD: siisata.c,v 1.30.4.15 2017/06/13 00:02:19 jakllsch Exp $ */
 /* from ahcisata_core.c */
 /*
  * Copyright (c) 2006 Manuel Bouyer.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
 @@ -69,27 +69,27 @@
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: siisata.c,v 1.30.4.14 2017/04/24 21:19:21 jakllsch Exp $");
+__KERNEL_RCSID(0, "$NetBSD: siisata.c,v 1.30.4.15 2017/06/13 00:02:19 jakllsch Exp $");
 #include <sys/types.h>
 #include <sys/param.h>
 #include <sys/kernel.h>
 #include <sys/malloc.h>
 #include <sys/systm.h>
 #include <sys/syslog.h>
 #include <sys/disklabel.h>
 #include <sys/buf.h>
 #include <sys/proc.h>
 #include <dev/ata/atareg.h>
 #include <dev/ata/satavar.h>
 @@ -138,27 +138,27 @@ static void siisata_intr_port(struct sii
 void siisata_probe_drive(struct ata_channel *);
 void siisata_setup_channel(struct ata_channel *);
 int siisata_ata_bio(struct ata_drive_datas *, struct ata_xfer *);
 void siisata_reset_drive(struct ata_drive_datas *, int, uint32_t *);
 void siisata_reset_channel(struct ata_channel *, int);
 int siisata_ata_addref(struct ata_drive_datas *);
 void siisata_ata_delref(struct ata_drive_datas *);
 void siisata_killpending(struct ata_drive_datas *);
 void siisata_cmd_start(struct ata_channel *, struct ata_xfer *);
 int siisata_cmd_complete(struct ata_channel *, struct ata_xfer *, int);
-void siisata_cmd_done(struct ata_channel *, struct ata_xfer *, int);
+void siisata_cmd_done(struct ata_channel *, struct ata_xfer *);
 void siisata_cmd_kill_xfer(struct ata_channel *, struct ata_xfer *, int);
 void siisata_bio_start(struct ata_channel *, struct ata_xfer *);
 int siisata_bio_complete(struct ata_channel *, struct ata_xfer *, int);
 void siisata_bio_kill_xfer(struct ata_channel *, struct ata_xfer *, int);
 int siisata_exec_command(struct ata_drive_datas *, struct ata_xfer *);
 void siisata_timeout(void *);
 static void siisata_reinit_port(struct ata_channel *);
 static void siisata_device_reset(struct ata_channel *);
 static void siisata_activate_prb(struct siisata_channel *, int);
 static void siisata_deactivate_prb(struct siisata_channel *, int);
 @@ -199,27 +199,27 @@ static const struct scsipi_bustype siisa
 	NULL,
 };
 #endif /* NATAPIBUS */
 void
 siisata_attach(struct siisata_softc *sc)
+{
 	int i;
 	SIISATA_DEBUG_PRINT(("%s: %s: GR_GC: 0x%08x\n",
 	    SIISATANAME(sc), __func__, GRREAD(sc, GR_GC)), DEBUG_FUNCS);
-	sc->sc_atac.atac_cap = ATAC_CAP_DMA | ATAC_CAP_UDMA;
+	sc->sc_atac.atac_cap = ATAC_CAP_DMA | ATAC_CAP_UDMA | ATAC_CAP_NCQ;
 	sc->sc_atac.atac_pio_cap = 4;
 	sc->sc_atac.atac_dma_cap = 2;
 	sc->sc_atac.atac_udma_cap = 6;
 	sc->sc_atac.atac_channels = sc->sc_chanarray;
 	sc->sc_atac.atac_probe = siisata_probe_drive;
 	sc->sc_atac.atac_bustype_ata = &siisata_ata_bustype;
 	sc->sc_atac.atac_set_modes = siisata_setup_channel;
 #if NATAPIBUS > 0
 	sc->sc_atac.atac_atapibus_attach = siisata_atapibus_attach;
 #endif
 	/* come out of reset state */
 	GRWRITE(sc, GR_GC, 0);
 @@ -236,46 +236,46 @@ siisata_attach(struct siisata_softc *sc)
 static void
 siisata_disable_port_interrupt(struct ata_channel *chp)
+{
 	struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
 	PRWRITE(sc, PRX(chp->ch_channel, PRO_PIEC), 0xffffffff);
+}
 static void
 siisata_enable_port_interrupt(struct ata_channel *chp)
+{
 	struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
-	/* clear any interrupts */
+	/* enable CmdErrr+CmdCmpl interrupting */
 	(void)PRREAD(sc, PRX(chp->ch_channel, PRO_PSS));
 	PRWRITE(sc, PRX(chp->ch_channel, PRO_PIS), 0xffffffff);
 	/* and enable CmdErrr+CmdCmpl interrupting */
 	PRWRITE(sc, PRX(chp->ch_channel, PRO_PIES),
 	    PR_PIS_CMDERRR | PR_PIS_CMDCMPL);
+}
 static void
 siisata_init_port(struct siisata_softc *sc, int port)
+{
 	struct siisata_channel *schp;
 	struct ata_channel *chp;
 	schp = &sc->sc_channels[port];
 	chp = (struct ata_channel *)schp;
-	/* come out of reset, 64-bit activation */
+	/*
 	 * Come out of reset. Disable no clearing of PR_PIS_CMDCMPL on read
 	 * of PR_PSS. Disable 32-bit PRB activation, we use 64-bit activation.
 	 */
 	PRWRITE(sc, PRX(chp->ch_channel, PRO_PCC),
-	    PR_PC_32BA | PR_PC_PORT_RESET);
+	    PR_PC_32BA | PR_PC_INCOR | PR_PC_PORT_RESET);
 	/* initialize port */
 	siisata_reinit_port(chp);
 	/* enable CmdErrr+CmdCmpl interrupting */
 	siisata_enable_port_interrupt(chp);
 	/* enable port interrupt */
 	GRWRITE(sc, GR_GC, GRREAD(sc, GR_GC) | GR_GC_PXIE(chp->ch_channel));
+}
 static void
 siisata_attach_port(struct siisata_softc *sc, int port)
+{
 	int j;
 	int dmasize;
 @@ -463,145 +463,201 @@ siisata_intr(void *v)
 		for (i = 0; i < sc->sc_atac.atac_nchannels; i++)
 			if (is & GR_GIS_PXIS(i))
 				siisata_intr_port(&sc->sc_channels[i]);
+	}
 	return r;
+}
 static void
 siisata_intr_port(struct siisata_channel *schp)
+{
 	struct siisata_softc *sc;
 	struct ata_channel *chp;
 	struct ata_xfer *xfer;
-	int slot;
+	u_int slot;
 	uint32_t pss, pis;
 	uint32_t prbfis;
 	sc = (struct siisata_softc *)schp->ata_channel.ch_atac;
 	chp = &schp->ata_channel;
 	xfer = ata_queue_hwslot_to_xfer(chp->ch_queue, 0); /* XXX slot */
-	slot = SIISATA_NON_NCQ_SLOT;
+	/* get slot status, clearing completion interrupt (PR_PIS_CMDCMPL) */
 	pss = PRREAD(sc, PRX(chp->ch_channel, PRO_PSS));
 	SIISATA_DEBUG_PRINT(("%s: %s port %d, pss 0x%x\n",
 	    SIISATANAME(sc), __func__, chp->ch_channel, pss), DEBUG_INTR);
 	for (slot = 0; slot < SIISATA_MAX_SLOTS; slot++) {
 		if (((schp->sch_active_slots >> slot) & 1) == 0)
 			/* there's nothing executing here, skip */
 			continue;
 		if (((pss >> slot) & 1) != 0)
 			/* execution is incomplete or unsuccessful, skip for now */
 			continue;
 		xfer = ata_queue_hwslot_to_xfer(chp->ch_queue, slot);
 		if (xfer->c_intr == NULL) {
 			wakeup(schp);
 			continue;
+		}
 		KASSERT(xfer != NULL);
 		KASSERT(xfer->c_intr != NULL);
 		xfer->c_intr(chp, xfer, 0);
+	}
 	/* if no errors, we're done now */
 	if ((pss & PR_PSS_ATTENTION) == 0) {
 		pis = PRREAD(sc, PRX(chp->ch_channel, PRO_PIS));
 		pis &= 0xffff;
 		if (pis) {
 			PRWRITE(sc, PRX(chp->ch_channel, PRO_PIS),
 			    pis & 0xfffcfffc);
+		}
 		return;
+	}
 	pis = PRREAD(sc, PRX(chp->ch_channel, PRO_PIS));
 	SIISATA_DEBUG_PRINT(("%s: %s port %d, pis 0x%x ", SIISATANAME(sc),
 	    __func__, chp->ch_channel, pis), DEBUG_INTR);
-	if (pis & PR_PIS_CMDCMPL) {
+	if (pis & PR_PIS_CMDERRR) {
 		/* get slot status, clearing completion interrupt */
 		pss = PRREAD(sc, PRX(chp->ch_channel, PRO_PSS));
 		SIISATA_DEBUG_PRINT(("pss 0x%x\n", pss), DEBUG_INTR);
 		/* is this expected? */
 		/* XXX improve */
 		if ((schp->sch_active_slots & __BIT(slot)) == 0) {
 			aprint_error( "%s: unexpected command "
 			    "completion on port %d\n",
 			    SIISATANAME(sc), chp->ch_channel);
 			return;
 		if ((~pss & __BIT(slot)) == 0) {
 			aprint_error( "%s: unknown slot "
 			    "completion on port %d, pss 0x%x\n",
 			    SIISATANAME(sc), chp->ch_channel, pss);
 			return;
 	} else if (pis & PR_PIS_CMDERRR) {
 		uint32_t ec;
 		uint32_t ps;
 		ps = PRREAD(sc, PRX(chp->ch_channel, PRO_PS));
 		ec = PRREAD(sc, PRX(chp->ch_channel, PRO_PCE));
 		SIISATA_DEBUG_PRINT(("ec %d\n", ec), DEBUG_INTR);
 		slot = PR_PS_ACTIVE_SLOT(ps); /* XXX invalid for NCQ? */
 		/* emulate a CRC error by default */
 		chp->ch_status = WDCS_ERR;
 		chp->ch_error = WDCE_CRC;
 		ec = PRREAD(sc, PRX(chp->ch_channel, PRO_PCE));
 		SIISATA_DEBUG_PRINT(("ec %d\n", ec), DEBUG_INTR);
 		if (ec <= PR_PCE_DATAFISERROR) {
-			if (ec == PR_PCE_DEVICEERROR && xfer != NULL) {
+			if (ec == PR_PCE_DEVICEERROR) {
 				/* read in specific information about error */
 				prbfis = bus_space_read_stream_4(
 				    sc->sc_prt, sc->sc_prh,
-				    PRSX(chp->ch_channel, slot, PRSO_FIS));
+		    		    PRSX(chp->ch_channel, slot,
 				    PRSO_FIS));
 				/* set ch_status and ch_error */
 				satafis_rdh_parse(chp, (uint8_t *)&prbfis);
+			}
 			siisata_reinit_port(chp);
 		} else {
 			aprint_error_dev(sc->sc_atac.atac_dev, "fatal error %d"
 			    " on channel %d (ctx 0x%x), resetting\n",
 			    ec, chp->ch_channel,
 			    PRREAD(sc, PRX(chp->ch_channel, PRO_PCR)));
 			/* okay, we have a "Fatal Error" */
 			siisata_device_reset(chp);
+		}
 		for (slot = 0; slot < SIISATA_MAX_SLOTS; slot++) {
 			/* there's nothing executing here, skip */
 			if (((schp->sch_active_slots >> slot) & 1) == 0)
 				continue;
 			xfer = ata_queue_hwslot_to_xfer(chp->ch_queue, slot);
 			if (xfer == NULL)
 				continue;
 			xfer->c_intr(chp, xfer, 0);
+		}
+	}
-	/* clear some (ok, all) ints */
+	/* clear */
-	PRWRITE(sc, PRX(chp->ch_channel, PRO_PIS), 0xffffffff);
+	PRWRITE(sc, PRX(chp->ch_channel, PRO_PIS), pis);
 	if (xfer && xfer->c_intr)
 		xfer->c_intr(chp, xfer, 0);
 	return;
+}
 void
 siisata_reset_drive(struct ata_drive_datas *drvp, int flags, uint32_t *sigp)
+{
 	struct ata_channel *chp = drvp->chnl_softc;
 	struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
 	struct siisata_channel *schp = (struct siisata_channel *)chp;
 	struct siisata_prb *prb;
-	int slot = SIISATA_NON_NCQ_SLOT;
+	struct ata_xfer *xfer;
 	uint32_t pss, pis;
 	int i;
 	/* wait for ready */
 	while (!(PRREAD(sc, PRX(chp->ch_channel, PRO_PS)) & PR_PS_PORT_READY))
 		DELAY(10);
-	prb = schp->sch_prb[slot];
+	xfer = ata_get_xfer(chp);  /* Is this right?  What if the slots are full? */
 	if (xfer == NULL)
 		return;
 	prb = schp->sch_prb[xfer->c_slot];
 	memset(prb, 0, SIISATA_CMD_SIZE);
 	prb->prb_control =
-	    htole16(PRB_CF_SOFT_RESET | PRB_CF_INTERRUPT_MASK);
+	    htole16(PRB_CF_SOFT_RESET /* | PRB_CF_INTERRUPT_MASK */);
 	KASSERT(drvp->drive <= PMP_PORT_CTL);
 	prb->prb_fis[rhd_c] = drvp->drive;
-	siisata_activate_prb(schp, slot);
+	ata_activate_xfer(chp, xfer);
 	siisata_activate_prb(schp, xfer->c_slot);
 	for(i = 0; i < 3100; i++) {
-		if ((PRREAD(sc, PRX(chp->ch_channel, PRO_PSS)) &
+#if 0		/* XXX-jak-jd-ncq this block needs re-work... XXX */
-		    PR_PXSS(slot)) == 0)
+		PRWRITE(sc, PRX(chp->ch_channel, PRO_PCS), PR_PC_INCOR);
 		pss = PRREAD(sc, PRX(chp->ch_channel, PRO_PSS));
 		PRWRITE(sc, PRX(chp->ch_channel, PRO_PCC), PR_PC_INCOR);
 		if ((pss & PR_PXSS(xfer->c_slot)) == 0)
 			break;
 		if (pss & PR_PSS_ATTENTION)
 			break;
-		if (flags & AT_WAIT)
+#else
 		pss = PR_PXSS(xfer->c_slot);
 		/* XXX DO NOT MERGE UNTIL THIS IS FIXED XXX */
 #endif
 		if ((flags & AT_POLL) == 0)
 			tsleep(schp, PRIBIO, "siiprb", mstohz(10));
 		else
 			DELAY(10000);
+	}
-	siisata_deactivate_prb(schp, slot);
+	siisata_deactivate_prb(schp, xfer->c_slot);
 	if ((pss & PR_PSS_ATTENTION) != 0) {
 		pis = PRREAD(sc, PRX(chp->ch_channel, PRO_PIS));
 		const uint32_t ps = PRREAD(sc, PRX(chp->ch_channel, PRO_PS));
 		const u_int slot = PR_PS_ACTIVE_SLOT(ps);
 		if (slot != xfer->c_slot)
 			device_printf(sc->sc_atac.atac_dev, "%s port %d "
 			    "drive %d slot %d c_slot %d", __func__,
 			    chp->ch_channel, drvp->drive, slot, xfer->c_slot);
 		PRWRITE(sc, PRX(chp->ch_channel, PRO_PIS), pis &
 		    PR_PIS_CMDERRR);
+	}
 	if (i == 3100) {
 		/* timeout */
-		siisata_device_reset(chp);
+		siisata_device_reset(chp);	/* XXX is this right? */
 		if (sigp)
 			*sigp = 0xffffffff;
 	} else {
 		/* read the signature out of the FIS */
 		if (sigp) {
 			*sigp = 0;
-			*sigp |= (PRREAD(sc, PRSX(chp->ch_channel, slot,
+			*sigp |= (PRREAD(sc, PRSX(chp->ch_channel, xfer->c_slot,
 			    PRSO_FIS+0x4)) & 0x00ffffff) << 8;
-			*sigp |= PRREAD(sc, PRSX(chp->ch_channel, slot,
+			*sigp |= PRREAD(sc, PRSX(chp->ch_channel, xfer->c_slot,
 			    PRSO_FIS+0xc)) & 0xff;
+		}
+	}
 	ata_deactivate_xfer(chp, xfer);
 	ata_free_xfer(chp, xfer);
 #if 1
 	/* attempt to downgrade signaling in event of CRC error */
 	/* XXX should be part of the MI (S)ATA subsystem */
 	if (chp->ch_status == 0x51 && chp->ch_error == 0x84) {
 		bus_space_write_4(sc->sc_prt, schp->sch_scontrol, 0,
 		    SControl_IPM_NONE | SControl_SPD_G1 | SControl_DET_INIT);
 		DELAY(10);
 		bus_space_write_4(sc->sc_prt, schp->sch_scontrol, 0,
 		    SControl_IPM_NONE | SControl_SPD_G1);
 		DELAY(10);
 		for (;;) {
 			if ((bus_space_read_4(sc->sc_prt, schp->sch_sstatus, 0)
 			    & SStatus_DET_mask) == SStatus_DET_DEV)
 @@ -614,28 +670,28 @@ siisata_reset_drive(struct ata_drive_dat
 #if 1
 	chp->ch_status = 0;
 	chp->ch_error = 0;
 #endif
 	return;
+}
 void
 siisata_reset_channel(struct ata_channel *chp, int flags)
+{
 	struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
 	struct siisata_channel *schp = (struct siisata_channel *)chp;
-	SIISATA_DEBUG_PRINT(("%s: %s\n", SIISATANAME(sc), __func__),
+	SIISATA_DEBUG_PRINT(("%s: %s channel %d\n", SIISATANAME(sc), __func__,
-	    DEBUG_FUNCS);
+	    chp->ch_channel), DEBUG_FUNCS);
 	if (sata_reset_interface(chp, sc->sc_prt, schp->sch_scontrol,
 	    schp->sch_sstatus, flags) != SStatus_DET_DEV) {
 		aprint_error("%s port %d: reset failed\n",
 		    SIISATANAME(sc), chp->ch_channel);
 		/* XXX and then ? */
+	}
 	/* wait for ready */
 	while (!(PRREAD(sc, PRX(chp->ch_channel, PRO_PS)) & PR_PS_PORT_READY))
 		DELAY(10);
 	PRWRITE(sc, PRX(chp->ch_channel, PRO_SERROR),
 	    PRREAD(sc, PRX(chp->ch_channel, PRO_SERROR)));
 	ata_kill_active(chp, KILL_RESET);
 @@ -658,89 +714,92 @@ siisata_ata_delref(struct ata_drive_data
 void
 siisata_killpending(struct ata_drive_datas *drvp)
+{
 	return;
+}
 void
 siisata_probe_drive(struct ata_channel *chp)
+{
 	struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
 	struct siisata_channel *schp = (struct siisata_channel *)chp;
 	int i;
 	uint32_t sig;
 	int slot = SIISATA_NON_NCQ_SLOT;
 	struct siisata_prb *prb;
 	bool timed_out;
 	const u_int slot0 = 0; /* XXX this is a problem */
 	SIISATA_DEBUG_PRINT(("%s: %s: port %d start\n", SIISATANAME(sc),
 	    __func__, chp->ch_channel), DEBUG_FUNCS);
 	/*
 	 * disable port interrupt as we're polling for PHY up and
 	 * prb completion
 	 */
 	siisata_disable_port_interrupt(chp);
 	switch(sata_reset_interface(chp, sc->sc_prt, schp->sch_scontrol,
 		schp->sch_sstatus, AT_WAIT)) {
 	case SStatus_DET_DEV:
 #if 0		/* XXX Including this seems to cause problems. */
 		/* XXX DO NOT MERGE UNTIL THIS IS ADDRESSED PROPERLY XXX */
 		/* clear any interrupts */
 		(void)PRREAD(sc, PRX(chp->ch_channel, PRO_PSS));
 		PRWRITE(sc, PRX(chp->ch_channel, PRO_PIS), 0xffffffff);
 #endif
 		/* wait for ready */
 		while (!(PRREAD(sc, PRX(chp->ch_channel, PRO_PS))
 		    & PR_PS_PORT_READY))
 			DELAY(10);
-		prb = schp->sch_prb[slot];
+		prb = schp->sch_prb[slot0];
 		memset(prb, 0, SIISATA_CMD_SIZE);
 		prb->prb_control = htole16(PRB_CF_SOFT_RESET);
 		prb->prb_fis[rhd_c] = PMP_PORT_CTL;
-		siisata_activate_prb(schp, slot);
+		siisata_activate_prb(schp, slot0);
 		timed_out = 1;
 		for(i = 0; i < 3100; i++) {
 			if ((PRREAD(sc, PRX(chp->ch_channel, PRO_PSS)) &
-			    PR_PXSS(slot)) == 0) {
+			    PR_PXSS(slot0)) == 0) {
 				/* prb completed */
 				timed_out = 0;
 				break;
+			}
 			if (PRREAD(sc, PRX(chp->ch_channel, PRO_PIS)) &
 			    (PR_PIS_CMDERRR << 16)) {
 				/* we got an error; handle as timeout */
 				break;
+			}
 			tsleep(schp, PRIBIO, "siiprb", mstohz(10));
+		}
-		siisata_deactivate_prb(schp, slot);
+		siisata_deactivate_prb(schp, slot0);
 		if (timed_out) {
 			aprint_error_dev(sc->sc_atac.atac_dev,
 			    "SOFT_RESET failed on port %d (error %d PSS 0x%x), "
 			    "resetting\n", chp->ch_channel,
 			    PRREAD(sc, PRX(chp->ch_channel, PRO_PCE)),
 			    PRREAD(sc, PRX(chp->ch_channel, PRO_PSS)));
 			siisata_reinit_port(chp);
 			break;
+		}
 		/* read the signature out of the FIS */
 		sig = 0;
-		sig |= (PRREAD(sc, PRSX(chp->ch_channel, slot,
+		sig |= (PRREAD(sc, PRSX(chp->ch_channel, slot0,
 		    PRSO_FIS+0x4)) & 0x00ffffff) << 8;
-		sig |= PRREAD(sc, PRSX(chp->ch_channel, slot,
+		sig |= PRREAD(sc, PRSX(chp->ch_channel, slot0,
 		    PRSO_FIS+0xc)) & 0xff;
 		SIISATA_DEBUG_PRINT(("%s: %s: sig=0x%08x\n", SIISATANAME(sc),
 		    __func__, sig), DEBUG_PROBE);
 		if (sig == 0x96690101)
 			PRWRITE(sc, PRX(chp->ch_channel, PRO_PCS),
 			    PR_PC_PMP_ENABLE);
 		sata_interpret_sig(chp, 0, sig);
 		break;
 	default:
 		break;
+	}
 @@ -804,67 +863,66 @@ siisata_exec_command(struct ata_drive_da
+	}
 	splx(s);
 	SIISATA_DEBUG_PRINT( ("%s: %s ends\n",
 	    SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__),
 	    DEBUG_FUNCS);
 	return ret;
+}
 void
 siisata_cmd_start(struct ata_channel *chp, struct ata_xfer *xfer)
+{
 	struct siisata_channel *schp = (struct siisata_channel *)chp;
 	struct ata_command *ata_c = &xfer->c_ata_c;
 	int slot = SIISATA_NON_NCQ_SLOT;
 	struct siisata_prb *prb;
 	int i;
 	SIISATA_DEBUG_PRINT(("%s: %s port %d drive %d command 0x%x, slot %d\n",
 	    SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__,
-	    chp->ch_channel, xfer->c_drive, ata_c->r_command, slot),
+	    chp->ch_channel, xfer->c_drive, ata_c->r_command, xfer->c_slot),
 	    DEBUG_FUNCS|DEBUG_XFERS);
 	chp->ch_status = 0;
 	chp->ch_error = 0;
-	prb = schp->sch_prb[slot];
+	prb = schp->sch_prb[xfer->c_slot];
 	memset(prb, 0, SIISATA_CMD_SIZE);
 	satafis_rhd_construct_cmd(ata_c, prb->prb_fis);
 	KASSERT(xfer->c_drive <= PMP_PORT_CTL);
 	prb->prb_fis[rhd_c] |= xfer->c_drive;
 	if (ata_c->r_command == ATA_DATA_SET_MANAGEMENT) {
 		prb->prb_control |= htole16(PRB_CF_PROTOCOL_OVERRIDE);
 		prb->prb_protocol_override |= htole16(PRB_PO_WRITE);
+	}
-	if (siisata_dma_setup(chp, slot,
+	if (siisata_dma_setup(chp, xfer->c_slot,
 	    (ata_c->flags & (AT_READ | AT_WRITE)) ? ata_c->data : NULL,
 	    ata_c->bcount,
 	    (ata_c->flags & AT_READ) ? BUS_DMA_READ : BUS_DMA_WRITE)) {
 		ata_c->flags |= AT_DF;
 		siisata_cmd_complete(chp, xfer, 0);
 		return;
+	}
 	if (xfer->c_flags & C_POLL) {
 		/* polled command, disable interrupts */
 		prb->prb_control = htole16(PRB_CF_INTERRUPT_MASK);
 		siisata_disable_port_interrupt(chp);
+	}
 	/* go for it */
-	siisata_activate_prb(schp, slot);
+	siisata_activate_prb(schp, xfer->c_slot);
 	if ((ata_c->flags & AT_POLL) == 0) {
 		chp->ch_flags |= ATACH_IRQ_WAIT; /* wait for interrupt */
 		callout_reset(&xfer->c_timo_callout, mstohz(ata_c->timeout),
 		    siisata_timeout, xfer);
 		goto out;
+	}
 	/*
 	 * polled command
 	 */
 	for (i = 0; i < ata_c->timeout / 10; i++) {
 		if (ata_c->flags & AT_DONE)
 @@ -880,118 +938,122 @@ siisata_cmd_start(struct ata_channel *ch
 	/* reenable interrupts */
 	siisata_enable_port_interrupt(chp);
 out:
 	SIISATA_DEBUG_PRINT(("%s: %s: done\n",
 	    SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__),
 	    DEBUG_FUNCS);
 	return;
+}
 void
 siisata_cmd_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer,
     int reason)
+{
 	int slot = SIISATA_NON_NCQ_SLOT;
 	struct ata_command *ata_c = &xfer->c_ata_c;
 	struct siisata_channel *schp = (struct siisata_channel *)chp;
 	siisata_deactivate_prb(schp, xfer->c_slot);
 	switch (reason) {
 	case KILL_GONE:
 		ata_c->flags |= AT_GONE;
 		break;
 	case KILL_RESET:
 		ata_c->flags |= AT_RESET;
 		break;
 	default:
 		panic("%s: port %d: unknown reason %d",
 		   __func__, chp->ch_channel, reason);
+	}
-	siisata_cmd_done(chp, xfer, slot);
+	siisata_cmd_done(chp, xfer);
+}
 int
 siisata_cmd_complete(struct ata_channel *chp, struct ata_xfer *xfer, int is)
+{
 	struct siisata_channel *schp = (struct siisata_channel *)chp;
 	struct ata_command *ata_c = &xfer->c_ata_c;
 #ifdef SIISATA_DEBUG
 	struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
 #endif
 	int slot = SIISATA_NON_NCQ_SLOT;
 	SIISATA_DEBUG_PRINT(("%s: %s: port %d slot %d\n",
 	    SIISATANAME(sc), __func__,
 	    chp->ch_channel, xfer->c_slot), DEBUG_FUNCS);
 	SIISATA_DEBUG_PRINT(("%s: %s\n", SIISATANAME(sc), __func__),
 	    DEBUG_FUNCS|DEBUG_XFERS);
 	siisata_deactivate_prb(schp, xfer->c_slot);
 	chp->ch_flags &= ~ATACH_IRQ_WAIT;
 	if (xfer->c_flags & C_TIMEOU)
 		ata_c->flags |= AT_TIMEOU;
 	else
 		callout_stop(&xfer->c_timo_callout);
 	if (chp->ch_status & WDCS_BSY) {
 		ata_c->flags |= AT_TIMEOU;
 	} else if (chp->ch_status & WDCS_ERR) {
 		ata_c->r_error = chp->ch_error;
 		ata_c->flags |= AT_ERROR;
+	}
 	ata_deactivate_xfer(chp, xfer);
 	if (!ata_waitdrain_xfer_check(chp, xfer)) {
-		siisata_cmd_done(chp, xfer, slot);
+		siisata_cmd_done(chp, xfer);
+	}
 	return 0;
+}
 void
-siisata_cmd_done(struct ata_channel *chp, struct ata_xfer *xfer, int slot)
+siisata_cmd_done(struct ata_channel *chp, struct ata_xfer *xfer)
+{
 	uint32_t fis[howmany(RDH_FISLEN,sizeof(uint32_t))];
 	struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
 	struct siisata_channel *schp = (struct siisata_channel *)chp;
 	struct ata_command *ata_c = &xfer->c_ata_c;
 	uint16_t *idwordbuf;
 	int i;
 	SIISATA_DEBUG_PRINT(("%s: %s flags 0x%x error 0x%x\n", SIISATANAME(sc),
 	    __func__, ata_c->flags, ata_c->r_error), DEBUG_FUNCS|DEBUG_XFERS);
 	siisata_deactivate_prb(schp, slot);
 	if (ata_c->flags & (AT_READ | AT_WRITE)) {
-		bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[slot], 0,
+		bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[xfer->c_slot], 0,
-		    schp->sch_datad[slot]->dm_mapsize,
+		    schp->sch_datad[xfer->c_slot]->dm_mapsize,
 		    (ata_c->flags & AT_READ) ? BUS_DMASYNC_POSTREAD :
 		    BUS_DMASYNC_POSTWRITE);
-		bus_dmamap_unload(sc->sc_dmat, schp->sch_datad[slot]);
+		bus_dmamap_unload(sc->sc_dmat, schp->sch_datad[xfer->c_slot]);
+	}
 	if (ata_c->flags & AT_READREG) {
 		bus_space_read_region_stream_4(sc->sc_prt, sc->sc_prh,
-		    PRSX(chp->ch_channel, slot, PRSO_FIS),
+		    PRSX(chp->ch_channel, xfer->c_slot, PRSO_FIS),
 		    fis, __arraycount(fis));
 		satafis_rdh_cmd_readreg(ata_c, (uint8_t *)fis);
+	}
 	/* correct the endianess of IDENTIFY data */
 	if (ata_c->r_command == WDCC_IDENTIFY ||
 	    ata_c->r_command == ATAPI_IDENTIFY_DEVICE) {
 		idwordbuf = xfer->c_databuf;
 		for (i = 0; i < (xfer->c_bcount / sizeof(*idwordbuf)); i++) {
 			idwordbuf[i] = le16toh(idwordbuf[i]);
+		}
+	}
 	ata_c->flags |= AT_DONE;
-	if (PRREAD(sc, PRSX(chp->ch_channel, slot, PRSO_RTC)))
+	if (PRREAD(sc, PRSX(chp->ch_channel, xfer->c_slot, PRSO_RTC)))
 		ata_c->flags |= AT_XFDONE;
 	if (ata_c->flags & AT_WAIT)
 		wakeup(ata_c);
 	else if (ata_c->callback)
 		ata_c->callback(ata_c->callback_arg);
 	atastart(chp);
 	return;
+}
 int
 siisata_ata_bio(struct ata_drive_datas *drvp, struct ata_xfer *xfer)
+{
 @@ -1013,58 +1075,57 @@ siisata_ata_bio(struct ata_drive_datas *
 	xfer->c_intr = siisata_bio_complete;
 	xfer->c_kill_xfer = siisata_bio_kill_xfer;
 	ata_exec_xfer(chp, xfer);
 	return (ata_bio->flags & ATA_ITSDONE) ?
 	    ATACMD_COMPLETE : ATACMD_QUEUED;
+}
 void
 siisata_bio_start(struct ata_channel *chp, struct ata_xfer *xfer)
+{
 	struct siisata_channel *schp = (struct siisata_channel *)chp;
 	struct siisata_prb *prb;
 	struct ata_bio *ata_bio = &xfer->c_bio;
 	int slot = SIISATA_NON_NCQ_SLOT;
 	int i;
-	SIISATA_DEBUG_PRINT(("%s: %s port %d, slot %d\n",
+	SIISATA_DEBUG_PRINT(("%s: %s port %d slot %d drive %d\n",
 	    SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__,
-	    chp->ch_channel, slot), DEBUG_FUNCS);
+	    chp->ch_channel, xfer->c_slot, xfer->c_drive), DEBUG_FUNCS);
 	chp->ch_status = 0;
 	chp->ch_error = 0;
-	prb = schp->sch_prb[slot];
+	prb = schp->sch_prb[xfer->c_slot];
 	memset(prb, 0, SIISATA_CMD_SIZE);
 	satafis_rhd_construct_bio(xfer, prb->prb_fis);
 	KASSERT(xfer->c_drive <= PMP_PORT_CTL);
 	prb->prb_fis[rhd_c] |= xfer->c_drive;
-	if (siisata_dma_setup(chp, slot, ata_bio->databuf, ata_bio->bcount,
+	if (siisata_dma_setup(chp, xfer->c_slot, ata_bio->databuf, ata_bio->bcount,
 	    (ata_bio->flags & ATA_READ) ? BUS_DMA_READ : BUS_DMA_WRITE)) {
 		ata_bio->error = ERR_DMA;
 		ata_bio->r_error = 0;
 		siisata_bio_complete(chp, xfer, 0);
 		return;
+	}
 	if (xfer->c_flags & C_POLL) {
 		/* polled command, disable interrupts */
 		prb->prb_control = htole16(PRB_CF_INTERRUPT_MASK);
 		siisata_disable_port_interrupt(chp);
+	}
-	siisata_activate_prb(schp, slot);
+	siisata_activate_prb(schp, xfer->c_slot);
 	if ((ata_bio->flags & ATA_POLL) == 0) {
 		chp->ch_flags |= ATACH_IRQ_WAIT; /* wait for interrupt */
 		callout_reset(&xfer->c_timo_callout, mstohz(ATA_DELAY),
 		    siisata_timeout, xfer);
 		goto out;
+	}
 	/*
 	 * polled command
 	 */
 	for (i = 0; i < ATA_DELAY / 10; i++) {
 		if (ata_bio->flags & ATA_ITSDONE)
 @@ -1078,95 +1139,97 @@ out:
 	SIISATA_DEBUG_PRINT(("%s: %s: done\n",
 	    SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__),
 	    DEBUG_FUNCS);
 	return;
+}
 void
 siisata_bio_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer,
     int reason)
+{
 	struct siisata_channel *schp = (struct siisata_channel *)chp;
 	struct ata_bio *ata_bio = &xfer->c_bio;
 	int drive = xfer->c_drive;
 	int slot = SIISATA_NON_NCQ_SLOT;
-	SIISATA_DEBUG_PRINT(("%s: %s: port %d\n",
+	SIISATA_DEBUG_PRINT(("%s: %s: port %d slot %d\n",
 	    SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__,
-	    chp->ch_channel), DEBUG_FUNCS);
+	    chp->ch_channel, xfer->c_slot), DEBUG_FUNCS);
-	siisata_deactivate_prb(schp, slot);
+	siisata_deactivate_prb(schp, xfer->c_slot);
 	ata_bio->flags |= ATA_ITSDONE;
 	switch (reason) {
 	case KILL_GONE:
 		ata_bio->error = ERR_NODEV;
 		break;
 	case KILL_RESET:
 		ata_bio->error = ERR_RESET;
 		break;
 	default:
 		panic("%s: port %d: unknown reason %d",
 		   __func__, chp->ch_channel, reason);
+	}
 	ata_bio->r_error = WDCE_ABRT;
 	(*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc, xfer);
+}
 int
 siisata_bio_complete(struct ata_channel *chp, struct ata_xfer *xfer, int is)
+{
 	struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
 	struct siisata_channel *schp = (struct siisata_channel *)chp;
 	struct ata_bio *ata_bio = &xfer->c_bio;
 	int drive = xfer->c_drive;
 	int slot = SIISATA_NON_NCQ_SLOT;
-	schp->sch_active_slots &= ~__BIT(slot);
+	SIISATA_DEBUG_PRINT(("%s: %s: port %d slot %d drive %d\n",
 	    SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__,
 	    chp->ch_channel, xfer->c_slot, xfer->c_drive), DEBUG_FUNCS);
 	siisata_deactivate_prb(schp, xfer->c_slot);
 	chp->ch_flags &= ~ATACH_IRQ_WAIT;
 	if (xfer->c_flags & C_TIMEOU) {
 		ata_bio->error = TIMEOUT;
 	} else {
 		callout_stop(&xfer->c_timo_callout);
 		ata_bio->error = NOERROR;
+	}
-	bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[slot], 0,
+	bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[xfer->c_slot], 0,
-	    schp->sch_datad[slot]->dm_mapsize,
+	    schp->sch_datad[xfer->c_slot]->dm_mapsize,
 	    (ata_bio->flags & ATA_READ) ? BUS_DMASYNC_POSTREAD :
 	    BUS_DMASYNC_POSTWRITE);
-	bus_dmamap_unload(sc->sc_dmat, schp->sch_datad[slot]);
+	bus_dmamap_unload(sc->sc_dmat, schp->sch_datad[xfer->c_slot]);
 	ata_deactivate_xfer(chp, xfer);
 	if (ata_waitdrain_xfer_check(chp, xfer)) {
 		return 0;
+	}
 	ata_bio->flags |= ATA_ITSDONE;
 	if (chp->ch_status & WDCS_DWF) {
 		ata_bio->error = ERR_DF;
 	} else if (chp->ch_status & WDCS_ERR) {
 		ata_bio->error = ERROR;
 		ata_bio->r_error = chp->ch_error;
 	} else if (chp->ch_status & WDCS_CORR)
 		ata_bio->flags |= ATA_CORR;
 	SIISATA_DEBUG_PRINT(("%s: %s bcount: %ld", SIISATANAME(sc), __func__,
 	    ata_bio->bcount), DEBUG_XFERS);
 	if (ata_bio->error == NOERROR) {
 		if (ata_bio->flags & ATA_READ)
 			ata_bio->bcount -=
-			    PRREAD(sc, PRSX(chp->ch_channel, slot, PRSO_RTC));
+			    PRREAD(sc, PRSX(chp->ch_channel, xfer->c_slot, PRSO_RTC));
 		else
 			ata_bio->bcount = 0;
+	}
 	SIISATA_DEBUG_PRINT((" now %ld\n", ata_bio->bcount), DEBUG_XFERS);
 	if (ata_bio->flags & ATA_POLL)
 		return 1;
 	(*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc, xfer);
 	atastart(chp);
 	return 0;
+}
 void
 siisata_timeout(void *v)
 @@ -1346,26 +1409,29 @@ siisata_atapi_kill_pending(struct scsipi
 	struct atac_softc *atac =
 	    device_private(periph->periph_channel->chan_adapter->adapt_dev);
 	struct ata_channel *chp =
 	    atac->atac_channels[periph->periph_channel->chan_channel];
 	ata_kill_pending(&chp->ch_drive[periph->periph_target]);
+}
 void
 siisata_atapi_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer,
     int reason)
+{
 	struct scsipi_xfer *sc_xfer = xfer->c_scsipi;
 	struct siisata_channel *schp = (struct siisata_channel *)chp;
 	siisata_deactivate_prb(schp, xfer->c_slot);
 	/* remove this command from xfer queue */
 	switch (reason) {
 	case KILL_GONE:
 		sc_xfer->error = XS_DRIVER_STUFFUP;
 		break;
 	case KILL_RESET:
 		sc_xfer->error = XS_RESET;
 		break;
 	default:
 		panic("%s: port %d: unknown reason %d",
 		   __func__, chp->ch_channel, reason);
+	}
 @@ -1543,70 +1609,68 @@ siisata_atapi_scsipi_request(struct scsi
 	default:
 		/* Not supported, nothing to do. */
+		;
+	}
+}
 void
 siisata_atapi_start(struct ata_channel *chp, struct ata_xfer *xfer)
+{
 	struct siisata_channel *schp = (struct siisata_channel *)chp;
 	struct siisata_prb *prbp;
 	struct scsipi_xfer *sc_xfer = xfer->c_scsipi;
 	int slot = SIISATA_NON_NCQ_SLOT;
 	int i;
 	SIISATA_DEBUG_PRINT( ("%s: %s:%d:%d, scsi flags 0x%x\n", __func__,
 	    SIISATANAME((struct siisata_softc *)chp->ch_atac), chp->ch_channel,
 	    chp->ch_drive[xfer->c_drive].drive, sc_xfer->xs_control),
 	    DEBUG_XFERS);
 	chp->ch_status = 0;
 	chp->ch_error = 0;
-	prbp = schp->sch_prb[slot];
+	prbp = schp->sch_prb[xfer->c_slot];
 	memset(prbp, 0, SIISATA_CMD_SIZE);
 	/* fill in direction for ATAPI command */
 	if ((sc_xfer->xs_control & XS_CTL_DATA_IN))
 		prbp->prb_control |= htole16(PRB_CF_PACKET_READ);
 	if ((sc_xfer->xs_control & XS_CTL_DATA_OUT))
 		prbp->prb_control |= htole16(PRB_CF_PACKET_WRITE);
 	satafis_rhd_construct_atapi(xfer, prbp->prb_fis);
 	KASSERT(xfer->c_drive <= PMP_PORT_CTL);
 	prbp->prb_fis[rhd_c] |= xfer->c_drive;
 	/* copy over ATAPI command */
 	memcpy(prbp->prb_atapi, sc_xfer->cmd, sc_xfer->cmdlen);
-	if (siisata_dma_setup(chp, slot,
+	if (siisata_dma_setup(chp, xfer->c_slot,
 		(sc_xfer->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) ?
 		xfer->c_databuf : NULL,
 		xfer->c_bcount,
 		(sc_xfer->xs_control & XS_CTL_DATA_IN) ?
 		BUS_DMA_READ : BUS_DMA_WRITE)
+	)
 		panic("%s", __func__);
 	if (xfer->c_flags & C_POLL) {
 		/* polled command, disable interrupts */
 		prbp->prb_control = htole16(PRB_CF_INTERRUPT_MASK);
 		siisata_disable_port_interrupt(chp);
+	}
-	siisata_activate_prb(schp, slot);
+	siisata_activate_prb(schp, xfer->c_slot);
 	if ((xfer->c_flags & C_POLL) == 0) {
 		chp->ch_flags |= ATACH_IRQ_WAIT; /* wait for interrupt */
 		callout_reset(&xfer->c_timo_callout, mstohz(sc_xfer->timeout),
 		    siisata_timeout, xfer);
 		goto out;
+	}
 	/*
 	 * polled command
 	 */
 	for (i = 0; i < ATA_DELAY / 10; i++) {
 		if (sc_xfer->xs_status & XS_STS_DONE)
 @@ -1623,57 +1687,57 @@ out:
 	SIISATA_DEBUG_PRINT(("%s: %s: done\n",
 	    SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__),
 	    DEBUG_FUNCS);
 	return;
+}
 int
 siisata_atapi_complete(struct ata_channel *chp, struct ata_xfer *xfer,
     int is)
+{
 	struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
 	struct siisata_channel *schp = (struct siisata_channel *)chp;
 	struct scsipi_xfer *sc_xfer = xfer->c_scsipi;
 	int slot = SIISATA_NON_NCQ_SLOT;
 	SIISATA_DEBUG_PRINT(("%s: %s()\n", SIISATANAME(sc), __func__),
 	    DEBUG_INTR);
 	/* this command is not active any more */
-	schp->sch_active_slots &= ~__BIT(slot);
+	siisata_deactivate_prb(schp, xfer->c_slot);
 	chp->ch_flags &= ~ATACH_IRQ_WAIT;
 	if (xfer->c_flags & C_TIMEOU) {
 		sc_xfer->error = XS_TIMEOUT;
 	} else {
 		callout_stop(&xfer->c_timo_callout);
 		sc_xfer->error = XS_NOERROR;
+	}
-	bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[slot], 0,
+	bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[xfer->c_slot], 0,
-	    schp->sch_datad[slot]->dm_mapsize,
+	    schp->sch_datad[xfer->c_slot]->dm_mapsize,
 	    (sc_xfer->xs_control & XS_CTL_DATA_IN) ?
 	    BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
-	bus_dmamap_unload(sc->sc_dmat, schp->sch_datad[slot]);
+	bus_dmamap_unload(sc->sc_dmat, schp->sch_datad[xfer->c_slot]);
 	ata_deactivate_xfer(chp, xfer);
 	if (ata_waitdrain_xfer_check(chp, xfer)) {
 		sc_xfer->error = XS_DRIVER_STUFFUP;
 		return 0; /* XXX verify */
+	}
 	ata_free_xfer(chp, xfer);
 	sc_xfer->resid = sc_xfer->datalen;
-	sc_xfer->resid -= PRREAD(sc, PRSX(chp->ch_channel, slot, PRSO_RTC));
+	sc_xfer->resid -= PRREAD(sc, PRSX(chp->ch_channel, xfer->c_slot,
 	    PRSO_RTC));
 	SIISATA_DEBUG_PRINT(("%s: %s datalen %d resid %d\n", SIISATANAME(sc),
 	    __func__, sc_xfer->datalen, sc_xfer->resid), DEBUG_XFERS);
 	if ((chp->ch_status & WDCS_ERR) &&
 	    ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 ||
 	    sc_xfer->resid == sc_xfer->datalen)) {
 		sc_xfer->error = XS_SHORTSENSE;
 		sc_xfer->sense.atapi_sense = chp->ch_error;
 		if ((sc_xfer->xs_periph->periph_quirks &
 		    PQUIRK_NOSENSE) == 0) {
 			/* request sense */
 			sc_xfer->error = XS_BUSY;
 			sc_xfer->status = SCSI_CHECK;
+		}

 @@ -1,19 +1,19 @@
 Bugs
 ----
 test crashdump with ahci
-siisata - fix all 'XXX slot' -- jakllsch has this done but uncommited
+siisata - fix all new XXX and unmergable bits
 test crashdump with siisata
 test wd* at umass?, confirm the ata_channel kludge works
 is ata_exec_xfer() + POLL safe wrt. more outstanding I/Os? why is it waiting
 until xfer is head of queue? also layer violation with the ata_xfer_free() call
 further test port multipliers (currently appears to not work)
 test device error handling (currently appears to not work well, at least in NCQ case)
 do proper NCQ error recovery (currently not even really attempted)

 @@ -1,14 +1,14 @@
-/* $NetBSD: siisatavar.h,v 1.6 2010/07/26 15:41:33 jakllsch Exp $ */
+/* $NetBSD: siisatavar.h,v 1.6.48.1 2017/06/13 00:02:19 jakllsch Exp $ */
 /* from ahcisatavar.h */
 /*
  * Copyright (c) 2006 Manuel Bouyer.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
 @@ -104,21 +104,19 @@ struct siisata_softc {
 	} sc_channels[SIISATA_MAX_PORTS];
 };
 #define SIISATANAME(sc) (device_xname((sc)->sc_atac.atac_dev))
 #define GRREAD(sc, reg) bus_space_read_4((sc)->sc_grt, (sc)->sc_grh, (reg))
 #define GRWRITE(sc, reg, val) bus_space_write_4((sc)->sc_grt, (sc)->sc_grh, (reg), (val))
 #define PRREAD(sc, reg) bus_space_read_4((sc)->sc_prt, (sc)->sc_prh, (reg))
 #define PRWRITE(sc, reg, val) bus_space_write_4((sc)->sc_prt, (sc)->sc_prh, (reg), (val))
 #define SIISATA_PRB_SYNC(sc, schp, slot, op) bus_dmamap_sync((sc)->sc_dmat, \
     (schp)->sch_prbd, slot * SIISATA_CMD_SIZE, SIISATA_CMD_SIZE, (op))
 #define SIISATA_NON_NCQ_SLOT 27
 void siisata_attach(struct siisata_softc *);
 int siisata_detach(struct siisata_softc *, int);
 void siisata_resume(struct siisata_softc *);
 int siisata_intr(void *);
 #endif  /* !_IC_SIISATAVAR_H_ */