| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
1 | /* $NetBSD: mipsX_subr.S,v 1.101 2017/08/08 09:33:41 maya Exp $ */ | | 1 | /* $NetBSD: mipsX_subr.S,v 1.102 2017/08/08 09:34:59 maya Exp $ */ |
2 | | | 2 | |
3 | /* | | 3 | /* |
4 | * Copyright 2002 Wasabi Systems, Inc. | | 4 | * Copyright 2002 Wasabi Systems, Inc. |
5 | * All rights reserved. | | 5 | * All rights reserved. |
6 | * | | 6 | * |
7 | * Written by Simon Burge for Wasabi Systems, Inc. | | 7 | * Written by Simon Burge for Wasabi Systems, Inc. |
8 | * | | 8 | * |
9 | * Redistribution and use in source and binary forms, with or without | | 9 | * Redistribution and use in source and binary forms, with or without |
10 | * modification, are permitted provided that the following conditions | | 10 | * modification, are permitted provided that the following conditions |
11 | * are met: | | 11 | * are met: |
12 | * 1. Redistributions of source code must retain the above copyright | | 12 | * 1. Redistributions of source code must retain the above copyright |
13 | * notice, this list of conditions and the following disclaimer. | | 13 | * notice, this list of conditions and the following disclaimer. |
14 | * 2. Redistributions in binary form must reproduce the above copyright | | 14 | * 2. Redistributions in binary form must reproduce the above copyright |
| @@ -1279,27 +1279,27 @@ NESTED_NOPROFILE(MIPSX(kern_intr), KERNF | | | @@ -1279,27 +1279,27 @@ NESTED_NOPROFILE(MIPSX(kern_intr), KERNF |
1279 | END(MIPSX(kern_intr)) | | 1279 | END(MIPSX(kern_intr)) |
1280 | | | 1280 | |
1281 | /* | | 1281 | /* |
1282 | * | | 1282 | * |
1283 | */ | | 1283 | */ |
1284 | .p2align 5 | | 1284 | .p2align 5 |
1285 | NESTED_NOPROFILE(MIPSX(user_reserved_insn), CALLFRAME_SIZ, ra) | | 1285 | NESTED_NOPROFILE(MIPSX(user_reserved_insn), CALLFRAME_SIZ, ra) |
1286 | .set noat | | 1286 | .set noat |
1287 | .mask 0x80000000, -4 | | 1287 | .mask 0x80000000, -4 |
1288 | /* | | 1288 | /* |
1289 | * Save a minimum of registers to see if this is rdhwr $3,$29 | | 1289 | * Save a minimum of registers to see if this is rdhwr $3,$29 |
1290 | */ | | 1290 | */ |
1291 | #ifdef MIPS3_LOONGSON2 | | 1291 | #ifdef MIPS3_LOONGSON2 |
1292 | li k0, MIPS_DIAG_BTB_CLEAR | MIPS_DIAG_RAS_DISABLE | | 1292 | li k0, MIPS_DIAG_BTB_CLEAR | MIPS_DIAG_RAS_DISABLE |
1293 | mtc0 k0, MIPS_COP_0_DIAG | | 1293 | mtc0 k0, MIPS_COP_0_DIAG |
1294 | #endif | | 1294 | #endif |
1295 | /* K1 already has CURLWP */ | | 1295 | /* K1 already has CURLWP */ |
1296 | PTR_L k0, L_PCB(k1) # XXXuvm_lwp_getuarea | | 1296 | PTR_L k0, L_PCB(k1) # XXXuvm_lwp_getuarea |
1297 | PTR_ADDU k0, USPACE - TF_SIZ - CALLFRAME_SIZ | | 1297 | PTR_ADDU k0, USPACE - TF_SIZ - CALLFRAME_SIZ |
1298 | | | 1298 | |
1299 | /* Need two working registers */ | | 1299 | /* Need two working registers */ |
1300 | REG_S AT, CALLFRAME_SIZ+TF_REG_AST(k0) | | 1300 | REG_S AT, CALLFRAME_SIZ+TF_REG_AST(k0) |
1301 | REG_S v0, CALLFRAME_SIZ+TF_REG_V0(k0) | | 1301 | REG_S v0, CALLFRAME_SIZ+TF_REG_V0(k0) |
1302 | | | 1302 | |
1303 | /* If this was in a branch delay slot, take the slow path. */ | | 1303 | /* If this was in a branch delay slot, take the slow path. */ |
1304 | mfc0 v0, MIPS_COP_0_CAUSE | | 1304 | mfc0 v0, MIPS_COP_0_CAUSE |
1305 | MFC0_HAZARD | | 1305 | MFC0_HAZARD |