| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
1 | /* $NetBSD: db_interface.c,v 1.72 2017/05/23 08:54:38 nonaka Exp $ */ | | 1 | /* $NetBSD: db_interface.c,v 1.73 2017/08/15 06:57:53 maxv Exp $ */ |
2 | | | 2 | |
3 | /* | | 3 | /* |
4 | * Mach Operating System | | 4 | * Mach Operating System |
5 | * Copyright (c) 1991,1990 Carnegie Mellon University | | 5 | * Copyright (c) 1991,1990 Carnegie Mellon University |
6 | * All Rights Reserved. | | 6 | * All Rights Reserved. |
7 | * | | 7 | * |
8 | * Permission to use, copy, modify and distribute this software and its | | 8 | * Permission to use, copy, modify and distribute this software and its |
9 | * documentation is hereby granted, provided that both the copyright | | 9 | * documentation is hereby granted, provided that both the copyright |
10 | * notice and this permission notice appear in all copies of the | | 10 | * notice and this permission notice appear in all copies of the |
11 | * software, derivative works or modified versions, and any portions | | 11 | * software, derivative works or modified versions, and any portions |
12 | * thereof, and that both notices appear in supporting documentation. | | 12 | * thereof, and that both notices appear in supporting documentation. |
13 | * | | 13 | * |
14 | * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" | | 14 | * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" |
| @@ -23,94 +23,90 @@ | | | @@ -23,94 +23,90 @@ |
23 | * Pittsburgh PA 15213-3890 | | 23 | * Pittsburgh PA 15213-3890 |
24 | * | | 24 | * |
25 | * any improvements or extensions that they make and grant Carnegie the | | 25 | * any improvements or extensions that they make and grant Carnegie the |
26 | * rights to redistribute these changes. | | 26 | * rights to redistribute these changes. |
27 | * | | 27 | * |
28 | * db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU) | | 28 | * db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU) |
29 | */ | | 29 | */ |
30 | | | 30 | |
31 | /* | | 31 | /* |
32 | * Interface to new debugger. | | 32 | * Interface to new debugger. |
33 | */ | | 33 | */ |
34 | | | 34 | |
35 | #include <sys/cdefs.h> | | 35 | #include <sys/cdefs.h> |
36 | __KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.72 2017/05/23 08:54:38 nonaka Exp $"); | | 36 | __KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.73 2017/08/15 06:57:53 maxv Exp $"); |
37 | | | 37 | |
38 | #include "opt_ddb.h" | | 38 | #include "opt_ddb.h" |
39 | #include "opt_multiprocessor.h" | | 39 | #include "opt_multiprocessor.h" |
40 | | | 40 | |
41 | #include "ioapic.h" | | 41 | #include "ioapic.h" |
42 | #include "lapic.h" | | 42 | #include "lapic.h" |
43 | | | 43 | |
44 | #include <sys/param.h> | | 44 | #include <sys/param.h> |
45 | #include <sys/proc.h> | | 45 | #include <sys/proc.h> |
46 | #include <sys/reboot.h> | | 46 | #include <sys/reboot.h> |
47 | #include <sys/systm.h> | | 47 | #include <sys/systm.h> |
48 | #include <sys/atomic.h> | | 48 | #include <sys/atomic.h> |
49 | #include <sys/cpu.h> | | 49 | #include <sys/cpu.h> |
50 | | | 50 | |
51 | #include <uvm/uvm_extern.h> | | | |
52 | | | | |
53 | #include <dev/cons.h> | | 51 | #include <dev/cons.h> |
54 | | | 52 | |
55 | #include <machine/cpufunc.h> | | 53 | #include <machine/cpufunc.h> |
56 | #include <machine/db_machdep.h> | | 54 | #include <machine/db_machdep.h> |
57 | #include <machine/cpuvar.h> | | 55 | #include <machine/cpuvar.h> |
58 | #if NIOAPIC > 0 | | 56 | #if NIOAPIC > 0 |
59 | #include <machine/i82093var.h> | | 57 | #include <machine/i82093var.h> |
60 | #endif | | 58 | #endif |
61 | #if NLAPIC > 0 | | 59 | #if NLAPIC > 0 |
62 | #include <machine/i82489reg.h> | | 60 | #include <machine/i82489reg.h> |
63 | #include <machine/i82489var.h> | | 61 | #include <machine/i82489var.h> |
64 | #endif | | 62 | #endif |
65 | | | 63 | |
66 | #include <ddb/db_sym.h> | | 64 | #include <ddb/db_sym.h> |
67 | #include <ddb/db_command.h> | | 65 | #include <ddb/db_command.h> |
68 | #include <ddb/db_extern.h> | | 66 | #include <ddb/db_extern.h> |
69 | #include <ddb/db_access.h> | | 67 | #include <ddb/db_access.h> |
70 | #include <ddb/db_output.h> | | 68 | #include <ddb/db_output.h> |
71 | #include <ddb/ddbvar.h> | | 69 | #include <ddb/ddbvar.h> |
72 | | | 70 | |
73 | extern const char *const trap_type[]; | | 71 | extern const char *const trap_type[]; |
74 | extern int trap_types; | | 72 | extern int trap_types; |
75 | | | 73 | |
76 | int db_active = 0; | | 74 | int db_active = 0; |
77 | db_regs_t ddb_regs; /* register state */ | | 75 | db_regs_t ddb_regs; /* register state */ |
| | | 76 | db_regs_t *ddb_regp = NULL; |
78 | | | 77 | |
79 | void db_mach_cpu (db_expr_t, bool, db_expr_t, const char *); | | 78 | void db_mach_cpu (db_expr_t, bool, db_expr_t, const char *); |
80 | | | 79 | |
81 | const struct db_command db_machine_command_table[] = { | | 80 | const struct db_command db_machine_command_table[] = { |
82 | #ifdef MULTIPROCESSOR | | 81 | #ifdef MULTIPROCESSOR |
83 | { DDB_ADD_CMD("cpu", db_mach_cpu, 0, | | 82 | { DDB_ADD_CMD("cpu", db_mach_cpu, 0, |
84 | "switch to another cpu", "cpu-no", NULL) }, | | 83 | "switch to another cpu", "cpu-no", NULL) }, |
85 | #endif | | 84 | #endif |
86 | | | 85 | { DDB_ADD_CMD(NULL, NULL, 0, NULL, NULL, NULL) }, |
87 | { DDB_ADD_CMD(NULL, NULL, 0, NULL,NULL,NULL) }, | | | |
88 | }; | | 86 | }; |
89 | | | 87 | |
90 | void kdbprinttrap(int, int); | | 88 | void kdbprinttrap(int, int); |
91 | #ifdef MULTIPROCESSOR | | 89 | #ifdef MULTIPROCESSOR |
92 | extern void ddb_ipi(int, struct trapframe); | | 90 | extern void ddb_ipi(int, struct trapframe); |
93 | extern void ddb_ipi_tss(struct i386tss *); | | 91 | extern void ddb_ipi_tss(struct i386tss *); |
94 | static void ddb_suspend(struct trapframe *); | | 92 | static void ddb_suspend(struct trapframe *); |
95 | #ifndef XEN | | 93 | #ifndef XEN |
96 | int ddb_vec; | | 94 | int ddb_vec; |
97 | #endif /* XEN */ | | 95 | #endif /* XEN */ |
98 | static bool ddb_mp_online; | | 96 | static bool ddb_mp_online; |
99 | #endif | | 97 | #endif |
100 | | | 98 | |
101 | db_regs_t *ddb_regp = 0; | | 99 | #define NOCPU -1 |
102 | | | | |
103 | #define NOCPU -1 | | | |
104 | | | 100 | |
105 | int ddb_cpu = NOCPU; | | 101 | int ddb_cpu = NOCPU; |
106 | | | 102 | |
107 | typedef void (vector)(void); | | 103 | typedef void (vector)(void); |
108 | extern vector Xintrddbipi, Xx2apic_intrddbipi; | | 104 | extern vector Xintrddbipi, Xx2apic_intrddbipi; |
109 | | | 105 | |
110 | void | | 106 | void |
111 | db_machine_init(void) | | 107 | db_machine_init(void) |
112 | { | | 108 | { |
113 | | | 109 | |
114 | #ifdef MULTIPROCESSOR | | 110 | #ifdef MULTIPROCESSOR |
115 | #ifndef XEN | | 111 | #ifndef XEN |
116 | vector *handler = &Xintrddbipi; | | 112 | vector *handler = &Xintrddbipi; |
| @@ -236,26 +232,27 @@ kdb_trap(int type, int code, db_regs_t * | | | @@ -236,26 +232,27 @@ kdb_trap(int type, int code, db_regs_t * |
236 | /* | | 232 | /* |
237 | * Kernel mode - esp and ss not saved | | 233 | * Kernel mode - esp and ss not saved |
238 | */ | | 234 | */ |
239 | ddb_regs.tf_esp = (int)®s->tf_esp; /* kernel stack pointer */ | | 235 | ddb_regs.tf_esp = (int)®s->tf_esp; /* kernel stack pointer */ |
240 | ddb_regs.tf_ss = x86_getss(); | | 236 | ddb_regs.tf_ss = x86_getss(); |
241 | } | | 237 | } |
242 | | | 238 | |
243 | ddb_regs.tf_cs &= 0xffff; | | 239 | ddb_regs.tf_cs &= 0xffff; |
244 | ddb_regs.tf_ds &= 0xffff; | | 240 | ddb_regs.tf_ds &= 0xffff; |
245 | ddb_regs.tf_es &= 0xffff; | | 241 | ddb_regs.tf_es &= 0xffff; |
246 | ddb_regs.tf_fs &= 0xffff; | | 242 | ddb_regs.tf_fs &= 0xffff; |
247 | ddb_regs.tf_gs &= 0xffff; | | 243 | ddb_regs.tf_gs &= 0xffff; |
248 | ddb_regs.tf_ss &= 0xffff; | | 244 | ddb_regs.tf_ss &= 0xffff; |
| | | 245 | |
249 | s = splhigh(); | | 246 | s = splhigh(); |
250 | db_active++; | | 247 | db_active++; |
251 | cnpollc(true); | | 248 | cnpollc(true); |
252 | db_trap(type, code); | | 249 | db_trap(type, code); |
253 | cnpollc(false); | | 250 | cnpollc(false); |
254 | db_active--; | | 251 | db_active--; |
255 | splx(s); | | 252 | splx(s); |
256 | #ifdef MULTIPROCESSOR | | 253 | #ifdef MULTIPROCESSOR |
257 | db_resume_others(); | | 254 | db_resume_others(); |
258 | } | | 255 | } |
259 | #endif | | 256 | #endif |
260 | ddb_regp = &dbreg; | | 257 | ddb_regp = &dbreg; |
261 | | | 258 | |
| @@ -346,41 +343,38 @@ ddb_suspend(struct trapframe *frame) | | | @@ -346,41 +343,38 @@ ddb_suspend(struct trapframe *frame) |
346 | flags = regs.tf_err & TC_FLAGMASK; | | 343 | flags = regs.tf_err & TC_FLAGMASK; |
347 | regs.tf_err &= ~TC_FLAGMASK; | | 344 | regs.tf_err &= ~TC_FLAGMASK; |
348 | if (!(flags & TC_TSS) && KERNELMODE(regs.tf_cs, regs.tf_eflags)) { | | 345 | if (!(flags & TC_TSS) && KERNELMODE(regs.tf_cs, regs.tf_eflags)) { |
349 | /* | | 346 | /* |
350 | * Kernel mode - esp and ss not saved | | 347 | * Kernel mode - esp and ss not saved |
351 | */ | | 348 | */ |
352 | regs.tf_esp = (int)&frame->tf_esp; /* kernel stack pointer */ | | 349 | regs.tf_esp = (int)&frame->tf_esp; /* kernel stack pointer */ |
353 | regs.tf_ss = x86_getss(); | | 350 | regs.tf_ss = x86_getss(); |
354 | } | | 351 | } |
355 | | | 352 | |
356 | ci->ci_ddb_regs = ®s; | | 353 | ci->ci_ddb_regs = ®s; |
357 | | | 354 | |
358 | atomic_or_32(&ci->ci_flags, CPUF_PAUSE); | | 355 | atomic_or_32(&ci->ci_flags, CPUF_PAUSE); |
| | | 356 | |
359 | while (ci->ci_flags & CPUF_PAUSE) | | 357 | while (ci->ci_flags & CPUF_PAUSE) |
360 | ; | | 358 | ; |
361 | ci->ci_ddb_regs = 0; | | 359 | ci->ci_ddb_regs = 0; |
362 | tlbflushg(); | | 360 | tlbflushg(); |
363 | } | | 361 | } |
364 | | | 362 | |
365 | | | 363 | |
366 | extern void cpu_debug_dump(void); /* XXX */ | | 364 | extern void cpu_debug_dump(void); /* XXX */ |
367 | | | 365 | |
368 | void | | 366 | void |
369 | db_mach_cpu( | | 367 | db_mach_cpu(db_expr_t addr, bool have_addr, db_expr_t count, const char *modif) |
370 | db_expr_t addr, | | | |
371 | bool have_addr, | | | |
372 | db_expr_t count, | | | |
373 | const char * modif) | | | |
374 | { | | 368 | { |
375 | struct cpu_info *ci; | | 369 | struct cpu_info *ci; |
376 | if (!have_addr) { | | 370 | if (!have_addr) { |
377 | cpu_debug_dump(); | | 371 | cpu_debug_dump(); |
378 | return; | | 372 | return; |
379 | } | | 373 | } |
380 | | | 374 | |
381 | if (addr < 0) { | | 375 | if (addr < 0) { |
382 | db_printf("%ld: CPU out of range\n", addr); | | 376 | db_printf("%ld: CPU out of range\n", addr); |
383 | return; | | 377 | return; |
384 | } | | 378 | } |
385 | ci = cpu_lookup(addr); | | 379 | ci = cpu_lookup(addr); |
386 | if (ci == NULL) { | | 380 | if (ci == NULL) { |
| @@ -391,15 +385,14 @@ db_mach_cpu( | | | @@ -391,15 +385,14 @@ db_mach_cpu( |
391 | if (!(ci->ci_flags & CPUF_PAUSE)) { | | 385 | if (!(ci->ci_flags & CPUF_PAUSE)) { |
392 | db_printf("CPU %ld not paused\n", addr); | | 386 | db_printf("CPU %ld not paused\n", addr); |
393 | return; | | 387 | return; |
394 | } | | 388 | } |
395 | } | | 389 | } |
396 | if (ci->ci_ddb_regs == 0) { | | 390 | if (ci->ci_ddb_regs == 0) { |
397 | db_printf("CPU %ld has no saved regs\n", addr); | | 391 | db_printf("CPU %ld has no saved regs\n", addr); |
398 | return; | | 392 | return; |
399 | } | | 393 | } |
400 | db_printf("using CPU %ld", addr); | | 394 | db_printf("using CPU %ld", addr); |
401 | ddb_regp = ci->ci_ddb_regs; | | 395 | ddb_regp = ci->ci_ddb_regs; |
402 | } | | 396 | } |
403 | | | 397 | |
404 | | | | |
405 | #endif | | 398 | #endif |