Wed Aug 16 22:49:05 2017 UTC ()
add cpu_set_onfault glue


(nisimura)
diff -r1.1 -r1.2 src/sys/arch/aarch64/aarch64/locore.S

cvs diff -r1.1 -r1.2 src/sys/arch/aarch64/aarch64/locore.S (expand / switch to unified diff)

--- src/sys/arch/aarch64/aarch64/locore.S 2014/08/10 05:47:37 1.1
+++ src/sys/arch/aarch64/aarch64/locore.S 2017/08/16 22:49:05 1.2
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: locore.S,v 1.1 2014/08/10 05:47:37 matt Exp $ */ 1/* $NetBSD: locore.S,v 1.2 2017/08/16 22:49:05 nisimura Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2014 The NetBSD Foundation, Inc. 4 * Copyright (c) 2014 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas of 3am Software Foundry. 8 * by Matt Thomas of 3am Software Foundry.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -24,27 +24,30 @@ @@ -24,27 +24,30 @@
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#include <aarch64/asm.h> 32#include <aarch64/asm.h>
33#include "assym.h" 33#include "assym.h"
34 34
35#include "opt_ddb.h" 35#include "opt_ddb.h"
36 36
37RCSID("$NetBSD: locore.S,v 1.1 2014/08/10 05:47:37 matt Exp $") 37RCSID("$NetBSD: locore.S,v 1.2 2017/08/16 22:49:05 nisimura Exp $")
 38
 39// XXX:AARCH64
 40lr .req x30
38 41
39/* 42/*
40 * At IPL_SCHED: 43 * At IPL_SCHED:
41 * x0 = oldlwp (maybe be NULL) 44 * x0 = oldlwp (maybe be NULL)
42 * x1 = newlwp 45 * x1 = newlwp
43 * x2 = returning 46 * x2 = returning
44 * returns x0-x2 unchanged 47 * returns x0-x2 unchanged
45 */ 48 */
46ENTRY_NP(cpu_switchto) 49ENTRY_NP(cpu_switchto)
47 cbz x0, .Lrestore_lwp 50 cbz x0, .Lrestore_lwp
48 51
49 /* 52 /*
50 * Store the callee saved register on the stack in a trapframe 53 * Store the callee saved register on the stack in a trapframe
@@ -106,26 +109,38 @@ ENTRY_NP(cpu_switchto) @@ -106,26 +109,38 @@ ENTRY_NP(cpu_switchto)
106 */ 109 */
107 ldp x19, x20, [sp, #TF_X19] 110 ldp x19, x20, [sp, #TF_X19]
108 ldp x21, x22, [sp, #TF_X21] 111 ldp x21, x22, [sp, #TF_X21]
109 ldp x23, x24, [sp, #TF_X23] 112 ldp x23, x24, [sp, #TF_X23]
110 ldp x25, x26, [sp, #TF_X25] 113 ldp x25, x26, [sp, #TF_X25]
111 ldp x27, x28, [sp, #TF_X27] 114 ldp x27, x28, [sp, #TF_X27]
112 ldp x29, x30, [sp, #TF_X29] 115 ldp x29, x30, [sp, #TF_X29]
113 add sp, sp, #TF_SIZE /* pop trapframe from stack */ 116 add sp, sp, #TF_SIZE /* pop trapframe from stack */
114 117
115 ret 118 ret
116END(cpu_switchto) 119END(cpu_switchto)
117 120
118/* 121/*
 122 * x0 = lwp
 123 * x1 = ipl
 124 */
 125ENTRY_NP(cpu_switchto_softint)
 126//
 127//XXXAARCH64
 128//
 129 ret
 130END(cpu_switchto_softint)
 131
 132
 133/*
119 * Called at IPL_SCHED 134 * Called at IPL_SCHED
120 * x0 = old lwp (from cpu_switchto) 135 * x0 = old lwp (from cpu_switchto)
121 * x1 = new lwp (from cpu_switchto) 136 * x1 = new lwp (from cpu_switchto)
122 * x27 = func 137 * x27 = func
123 * x28 = arg 138 * x28 = arg
124 */ 139 */
125ENTRY_NP(lwp_trampoline) 140ENTRY_NP(lwp_trampoline)
126#if defined(MULTIPROCESSOR) 141#if defined(MULTIPROCESSOR)
127 mov x19, x0 142 mov x19, x0
128 mov x20, x1 143 mov x20, x1
129 bl _C_LABEL(proc_trampoline_mp) 144 bl _C_LABEL(proc_trampoline_mp)
130 mov x1, x20 145 mov x1, x20
131 mov x0, x19 146 mov x0, x19
@@ -180,26 +195,49 @@ exception_syscall_exit: @@ -180,26 +195,49 @@ exception_syscall_exit:
180 * Don't adjust the stack for the trapframe since we would 195 * Don't adjust the stack for the trapframe since we would
181 * just add subtract it again upon exception entry. 196 * just add subtract it again upon exception entry.
182 */ 197 */
183 eret 198 eret
184END(exception_trap_exit) 199END(exception_trap_exit)
185 200
186#ifdef DDB 201#ifdef DDB
187ENTRY(cpu_Debugger) 202ENTRY(cpu_Debugger)
188 brk #0xffff 203 brk #0xffff
189 ret 204 ret
190END(cpu_Debugger) 205END(cpu_Debugger)
191#endif /* DDB */ 206#endif /* DDB */
192 207
 208/*
 209 * int cpu_set_onfault(struct faultbuf *fb, register_t retval)
 210 */
 211ENTRY(cpu_set_onfault)
 212 mov x9, sp
 213 stp x19, x20, [x0, #0]
 214 stp x21, x22, [x0, #16]
 215 stp x23, x24, [x0, #32]
 216 stp x25, x26, [x0, #48]
 217 stp x27, x28, [x0, #64]
 218 stp x29, x9, [x0, #80]
 219 stp lr, x1, [x0, #96]
 220 mrs x3, tpidr_el1 /* curcpu */
 221 ldr x2, [x3, #CI_CURLWP] /* curlwp */
 222 str x0, [x2, #L_MD_ONFAULT] /* l_md.md_onfault = fb */
 223 mov x0, #0
 224END(cpu_set_onfault)
 225
 226/*
 227 * setjmp(9)
 228 * int setjmp(label_t *label);
 229 * void longjmp(label_t *label);
 230 */
193ENTRY(setjmp) 231ENTRY(setjmp)
194 stp x19, x20, [x0, #0] 232 stp x19, x20, [x0, #0]
195 stp x21, x22, [x0, #16] 233 stp x21, x22, [x0, #16]
196 stp x23, x24, [x0, #32] 234 stp x23, x24, [x0, #32]
197 stp x25, x26, [x0, #48] 235 stp x25, x26, [x0, #48]
198 stp x27, x28, [x0, #64] 236 stp x27, x28, [x0, #64]
199 stp x29, x30, [x0, #80] 237 stp x29, x30, [x0, #80]
200 mov x1, sp 238 mov x1, sp
201 str x1, [x0, #96] 239 str x1, [x0, #96]
202 mov x0, #0 240 mov x0, #0
203 ret 241 ret
204END(setjmp) 242END(setjmp)
205 243