Sun Aug 20 09:21:54 2017 UTC ()
Don't need the errata workaround on user return
It's reported that the MMU will block such invalid reads in userland,
and it's only needed on entry.


(maya)
diff -r1.102 -r1.103 src/sys/arch/mips/mips/mipsX_subr.S
cvs diff -r1.102 -r1.103 src/sys/arch/mips/mips/mipsX_subr.S (expand / switch to unified diff)

--- src/sys/arch/mips/mips/mipsX_subr.S 2017/08/08 09:34:59 1.102
+++ src/sys/arch/mips/mips/mipsX_subr.S 2017/08/20 09:21:54 1.103
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: mipsX_subr.S,v 1.102 2017/08/08 09:34:59 maya Exp $ */ 1/* $NetBSD: mipsX_subr.S,v 1.103 2017/08/20 09:21:54 maya Exp $ */
2 2
3/* 3/*
4 * Copyright 2002 Wasabi Systems, Inc. 4 * Copyright 2002 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Simon Burge for Wasabi Systems, Inc. 7 * Written by Simon Burge for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -2645,30 +2645,26 @@ LEAF(MIPSX(lwp_trampoline)) @@ -2645,30 +2645,26 @@ LEAF(MIPSX(lwp_trampoline))
2645 # saved if EXL=1. 2645 # saved if EXL=1.
2646 # 2646 #
2647 .set noat 2647 .set noat
2648MIPSX(user_return): 2648MIPSX(user_return):
2649 REG_L s0, CALLFRAME_SIZ+TF_REG_S0(sp) # $16 2649 REG_L s0, CALLFRAME_SIZ+TF_REG_S0(sp) # $16
2650 REG_L s1, CALLFRAME_SIZ+TF_REG_S1(sp) # $17 2650 REG_L s1, CALLFRAME_SIZ+TF_REG_S1(sp) # $17
2651 REG_L s2, CALLFRAME_SIZ+TF_REG_S2(sp) # $18 2651 REG_L s2, CALLFRAME_SIZ+TF_REG_S2(sp) # $18
2652 REG_L s3, CALLFRAME_SIZ+TF_REG_S3(sp) # $19 2652 REG_L s3, CALLFRAME_SIZ+TF_REG_S3(sp) # $19
2653 REG_L s4, CALLFRAME_SIZ+TF_REG_S4(sp) # $20 2653 REG_L s4, CALLFRAME_SIZ+TF_REG_S4(sp) # $20
2654 REG_L s5, CALLFRAME_SIZ+TF_REG_S5(sp) # $21 2654 REG_L s5, CALLFRAME_SIZ+TF_REG_S5(sp) # $21
2655 REG_L s6, CALLFRAME_SIZ+TF_REG_S6(sp) # $22 2655 REG_L s6, CALLFRAME_SIZ+TF_REG_S6(sp) # $22
2656 REG_L s7, CALLFRAME_SIZ+TF_REG_S7(sp) # $23 2656 REG_L s7, CALLFRAME_SIZ+TF_REG_S7(sp) # $23
2657 REG_L s8, CALLFRAME_SIZ+TF_REG_S8(sp) # $30 2657 REG_L s8, CALLFRAME_SIZ+TF_REG_S8(sp) # $30
2658#ifdef MIPS3_LOONGSON2 
2659 li t0, (MIPS_DIAG_ITLB_CLEAR | MIPS_DIAG_BTB_CLEAR | MIPS_DIAG_RAS_DISABLE) 
2660 mtc0 t0, MIPS_COP_0_DIAG 
2661#endif 
2662MIPSX(user_intr_return): 2658MIPSX(user_intr_return):
2663#ifdef PARANOIA 2659#ifdef PARANOIA
2664 PTR_L t0, L_CPU(MIPS_CURLWP) 2660 PTR_L t0, L_CPU(MIPS_CURLWP)
2665 INT_L t1, CPU_INFO_CPL(t0) # get curcpu()->ci_cpl 2661 INT_L t1, CPU_INFO_CPL(t0) # get curcpu()->ci_cpl
26662: bnez t1, 2b 26622: bnez t1, 2b
2667 nop 2663 nop
2668#endif 2664#endif
2669 RESET_EXCEPTION_LEVEL_DISABLE_INTERRUPTS(v0) 2665 RESET_EXCEPTION_LEVEL_DISABLE_INTERRUPTS(v0)
2670 COP0_SYNC 2666 COP0_SYNC
2671 SET_EXCEPTION_LEVEL(v0) # set exception level 2667 SET_EXCEPTION_LEVEL(v0) # set exception level
2672 COP0_SYNC 2668 COP0_SYNC
2673 REG_L t0, CALLFRAME_SIZ+TF_REG_MULLO(sp) 2669 REG_L t0, CALLFRAME_SIZ+TF_REG_MULLO(sp)
2674 REG_L t1, CALLFRAME_SIZ+TF_REG_MULHI(sp) 2670 REG_L t1, CALLFRAME_SIZ+TF_REG_MULHI(sp)