| @@ -1,547 +1,549 @@ | | | @@ -1,547 +1,549 @@ |
1 | /* $NetBSD: cpu.h,v 1.82 2017/11/27 09:10:12 maxv Exp $ */ | | 1 | /* $NetBSD: cpu.h,v 1.83 2017/12/02 21:04:59 christos Exp $ */ |
2 | | | 2 | |
3 | /*- | | 3 | /*- |
4 | * Copyright (c) 1990 The Regents of the University of California. | | 4 | * Copyright (c) 1990 The Regents of the University of California. |
5 | * All rights reserved. | | 5 | * All rights reserved. |
6 | * | | 6 | * |
7 | * This code is derived from software contributed to Berkeley by | | 7 | * This code is derived from software contributed to Berkeley by |
8 | * William Jolitz. | | 8 | * William Jolitz. |
9 | * | | 9 | * |
10 | * Redistribution and use in source and binary forms, with or without | | 10 | * Redistribution and use in source and binary forms, with or without |
11 | * modification, are permitted provided that the following conditions | | 11 | * modification, are permitted provided that the following conditions |
12 | * are met: | | 12 | * are met: |
13 | * 1. Redistributions of source code must retain the above copyright | | 13 | * 1. Redistributions of source code must retain the above copyright |
14 | * notice, this list of conditions and the following disclaimer. | | 14 | * notice, this list of conditions and the following disclaimer. |
15 | * 2. Redistributions in binary form must reproduce the above copyright | | 15 | * 2. Redistributions in binary form must reproduce the above copyright |
16 | * notice, this list of conditions and the following disclaimer in the | | 16 | * notice, this list of conditions and the following disclaimer in the |
17 | * documentation and/or other materials provided with the distribution. | | 17 | * documentation and/or other materials provided with the distribution. |
18 | * 3. Neither the name of the University nor the names of its contributors | | 18 | * 3. Neither the name of the University nor the names of its contributors |
19 | * may be used to endorse or promote products derived from this software | | 19 | * may be used to endorse or promote products derived from this software |
20 | * without specific prior written permission. | | 20 | * without specific prior written permission. |
21 | * | | 21 | * |
22 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND | | 22 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND |
23 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | | 23 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
25 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE | | 25 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE |
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
28 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | | 28 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
29 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | | 29 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
30 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | | 30 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
31 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | | 31 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
32 | * SUCH DAMAGE. | | 32 | * SUCH DAMAGE. |
33 | * | | 33 | * |
34 | * @(#)cpu.h 5.4 (Berkeley) 5/9/91 | | 34 | * @(#)cpu.h 5.4 (Berkeley) 5/9/91 |
35 | */ | | 35 | */ |
36 | | | 36 | |
37 | #ifndef _X86_CPU_H_ | | 37 | #ifndef _X86_CPU_H_ |
38 | #define _X86_CPU_H_ | | 38 | #define _X86_CPU_H_ |
39 | | | 39 | |
40 | #if defined(_KERNEL) || defined(_STANDALONE) | | 40 | #if defined(_KERNEL) || defined(_STANDALONE) |
41 | #include <sys/types.h> | | 41 | #include <sys/types.h> |
42 | #else | | 42 | #else |
43 | #include <stdint.h> | | 43 | #include <stdint.h> |
44 | #include <stdbool.h> | | 44 | #include <stdbool.h> |
45 | #endif /* _KERNEL || _STANDALONE */ | | 45 | #endif /* _KERNEL || _STANDALONE */ |
46 | | | 46 | |
47 | #if defined(_KERNEL) || defined(_KMEMUSER) | | 47 | #if defined(_KERNEL) || defined(_KMEMUSER) |
48 | #if defined(_KERNEL_OPT) | | 48 | #if defined(_KERNEL_OPT) |
49 | #include "opt_xen.h" | | 49 | #include "opt_xen.h" |
50 | #ifdef i386 | | 50 | #ifdef i386 |
51 | #include "opt_user_ldt.h" | | 51 | #include "opt_user_ldt.h" |
52 | #endif | | 52 | #endif |
53 | #endif | | 53 | #endif |
54 | | | 54 | |
55 | /* | | 55 | /* |
56 | * Definitions unique to x86 cpu support. | | 56 | * Definitions unique to x86 cpu support. |
57 | */ | | 57 | */ |
58 | #include <machine/frame.h> | | 58 | #include <machine/frame.h> |
59 | #include <machine/pte.h> | | 59 | #include <machine/pte.h> |
60 | #include <machine/segments.h> | | 60 | #include <machine/segments.h> |
61 | #include <machine/tss.h> | | 61 | #include <machine/tss.h> |
62 | #include <machine/intrdefs.h> | | 62 | #include <machine/intrdefs.h> |
63 | | | 63 | |
64 | #include <x86/cacheinfo.h> | | 64 | #include <x86/cacheinfo.h> |
65 | | | 65 | |
66 | #include <sys/cpu_data.h> | | 66 | #include <sys/cpu_data.h> |
67 | #include <sys/evcnt.h> | | 67 | #include <sys/evcnt.h> |
68 | #include <sys/device_if.h> /* for device_t */ | | 68 | #include <sys/device_if.h> /* for device_t */ |
69 | | | 69 | |
70 | #ifdef XEN | | 70 | #ifdef XEN |
71 | #include <xen/xen-public/xen.h> | | 71 | #include <xen/xen-public/xen.h> |
72 | #include <xen/xen-public/event_channel.h> | | 72 | #include <xen/xen-public/event_channel.h> |
73 | #include <sys/mutex.h> | | 73 | #include <sys/mutex.h> |
74 | #endif /* XEN */ | | 74 | #endif /* XEN */ |
75 | | | 75 | |
76 | struct intrsource; | | 76 | struct intrsource; |
77 | struct pmap; | | 77 | struct pmap; |
78 | | | 78 | |
79 | #ifdef __x86_64__ | | 79 | #ifdef __x86_64__ |
80 | #define i386tss x86_64_tss | | 80 | #define i386tss x86_64_tss |
81 | #endif | | 81 | #endif |
82 | | | 82 | |
83 | #define NIOPORTS 1024 /* # of ports we allow to be mapped */ | | 83 | #define NIOPORTS 1024 /* # of ports we allow to be mapped */ |
84 | #define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */ | | 84 | #define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */ |
85 | | | 85 | |
86 | /* | | 86 | /* |
87 | * a bunch of this belongs in cpuvar.h; move it later.. | | 87 | * a bunch of this belongs in cpuvar.h; move it later.. |
88 | */ | | 88 | */ |
89 | | | 89 | |
90 | struct cpu_info { | | 90 | struct cpu_info { |
91 | struct cpu_data ci_data; /* MI per-cpu data */ | | 91 | struct cpu_data ci_data; /* MI per-cpu data */ |
92 | device_t ci_dev; /* pointer to our device */ | | 92 | device_t ci_dev; /* pointer to our device */ |
93 | struct cpu_info *ci_self; /* self-pointer */ | | 93 | struct cpu_info *ci_self; /* self-pointer */ |
94 | volatile struct vcpu_info *ci_vcpu; /* for XEN */ | | 94 | volatile struct vcpu_info *ci_vcpu; /* for XEN */ |
95 | | | 95 | |
96 | /* | | 96 | /* |
97 | * Will be accessed by other CPUs. | | 97 | * Will be accessed by other CPUs. |
98 | */ | | 98 | */ |
99 | struct cpu_info *ci_next; /* next cpu */ | | 99 | struct cpu_info *ci_next; /* next cpu */ |
100 | struct lwp *ci_curlwp; /* current owner of the processor */ | | 100 | struct lwp *ci_curlwp; /* current owner of the processor */ |
101 | struct lwp *ci_fpcurlwp; /* current owner of the FPU */ | | 101 | struct lwp *ci_fpcurlwp; /* current owner of the FPU */ |
102 | cpuid_t ci_cpuid; /* our CPU ID */ | | 102 | cpuid_t ci_cpuid; /* our CPU ID */ |
103 | uint32_t ci_acpiid; /* our ACPI/MADT ID */ | | 103 | uint32_t ci_acpiid; /* our ACPI/MADT ID */ |
104 | uint32_t ci_initapicid; /* our intitial APIC ID */ | | 104 | uint32_t ci_initapicid; /* our intitial APIC ID */ |
105 | | | 105 | |
106 | /* | | 106 | /* |
107 | * Private members. | | 107 | * Private members. |
108 | */ | | 108 | */ |
109 | struct pmap *ci_pmap; /* current pmap */ | | 109 | struct pmap *ci_pmap; /* current pmap */ |
110 | int ci_want_pmapload; /* pmap_load() is needed */ | | 110 | int ci_want_pmapload; /* pmap_load() is needed */ |
111 | volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ | | 111 | volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ |
112 | #define TLBSTATE_VALID 0 /* all user tlbs are valid */ | | 112 | #define TLBSTATE_VALID 0 /* all user tlbs are valid */ |
113 | #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ | | 113 | #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ |
114 | #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ | | 114 | #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ |
115 | int ci_curldt; /* current LDT descriptor */ | | 115 | int ci_curldt; /* current LDT descriptor */ |
116 | int ci_nintrhand; /* number of H/W interrupt handlers */ | | 116 | int ci_nintrhand; /* number of H/W interrupt handlers */ |
117 | uint64_t ci_scratch; | | 117 | uint64_t ci_scratch; |
118 | uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)]; | | 118 | uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)]; |
119 | | | 119 | |
120 | #ifdef XEN | | 120 | #ifdef XEN |
121 | u_long ci_evtmask[NR_EVENT_CHANNELS]; /* events allowed on this CPU */ | | 121 | u_long ci_evtmask[NR_EVENT_CHANNELS]; /* events allowed on this CPU */ |
122 | #endif | | 122 | #endif |
123 | struct intrsource *ci_isources[MAX_INTR_SOURCES]; | | 123 | struct intrsource *ci_isources[MAX_INTR_SOURCES]; |
124 | | | 124 | |
125 | volatile int ci_mtx_count; /* Negative count of spin mutexes */ | | 125 | volatile int ci_mtx_count; /* Negative count of spin mutexes */ |
126 | volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ | | 126 | volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ |
127 | | | 127 | |
128 | #ifndef __HAVE_DIRECT_MAP | | 128 | #ifndef __HAVE_DIRECT_MAP |
129 | #define VPAGE_SRC 0 | | 129 | #define VPAGE_SRC 0 |
130 | #define VPAGE_DST 1 | | 130 | #define VPAGE_DST 1 |
131 | #define VPAGE_ZER 2 | | 131 | #define VPAGE_ZER 2 |
132 | #define VPAGE_PTP 3 | | 132 | #define VPAGE_PTP 3 |
133 | #define VPAGE_MAX 4 | | 133 | #define VPAGE_MAX 4 |
134 | vaddr_t vpage[VPAGE_MAX]; | | 134 | vaddr_t vpage[VPAGE_MAX]; |
135 | pt_entry_t *vpage_pte[VPAGE_MAX]; | | 135 | pt_entry_t *vpage_pte[VPAGE_MAX]; |
136 | #endif | | 136 | #endif |
137 | | | 137 | |
138 | /* The following must be aligned for cmpxchg8b. */ | | 138 | /* The following must be aligned for cmpxchg8b. */ |
139 | struct { | | 139 | struct { |
140 | uint32_t ipending; | | 140 | uint32_t ipending; |
141 | int ilevel; | | 141 | int ilevel; |
142 | } ci_istate __aligned(8); | | 142 | } ci_istate __aligned(8); |
143 | #define ci_ipending ci_istate.ipending | | 143 | #define ci_ipending ci_istate.ipending |
144 | #define ci_ilevel ci_istate.ilevel | | 144 | #define ci_ilevel ci_istate.ilevel |
145 | | | 145 | |
146 | int ci_idepth; | | 146 | int ci_idepth; |
147 | void * ci_intrstack; | | 147 | void * ci_intrstack; |
148 | uint32_t ci_imask[NIPL]; | | 148 | uint32_t ci_imask[NIPL]; |
149 | uint32_t ci_iunmask[NIPL]; | | 149 | uint32_t ci_iunmask[NIPL]; |
150 | | | 150 | |
151 | uint32_t ci_flags; /* flags; see below */ | | 151 | uint32_t ci_flags; /* flags; see below */ |
152 | uint32_t ci_ipis; /* interprocessor interrupts pending */ | | 152 | uint32_t ci_ipis; /* interprocessor interrupts pending */ |
153 | | | 153 | |
154 | uint32_t ci_signature; /* X86 cpuid type (cpuid.1.%eax) */ | | 154 | uint32_t ci_signature; /* X86 cpuid type (cpuid.1.%eax) */ |
155 | uint32_t ci_vendor[4]; /* vendor string */ | | 155 | uint32_t ci_vendor[4]; /* vendor string */ |
156 | uint32_t ci_max_cpuid; /* cpuid.0:%eax */ | | 156 | uint32_t ci_max_cpuid; /* cpuid.0:%eax */ |
157 | uint32_t ci_max_ext_cpuid; /* cpuid.80000000:%eax */ | | 157 | uint32_t ci_max_ext_cpuid; /* cpuid.80000000:%eax */ |
158 | volatile uint32_t ci_lapic_counter; | | 158 | volatile uint32_t ci_lapic_counter; |
159 | | | 159 | |
160 | uint32_t ci_feat_val[7]; /* X86 CPUID feature bits */ | | 160 | uint32_t ci_feat_val[7]; /* X86 CPUID feature bits */ |
161 | /* [0] basic features cpuid.1:%edx | | 161 | /* [0] basic features cpuid.1:%edx |
162 | * [1] basic features cpuid.1:%ecx (CPUID2_xxx bits) | | 162 | * [1] basic features cpuid.1:%ecx (CPUID2_xxx bits) |
163 | * [2] extended features cpuid:80000001:%edx | | 163 | * [2] extended features cpuid:80000001:%edx |
164 | * [3] extended features cpuid:80000001:%ecx | | 164 | * [3] extended features cpuid:80000001:%ecx |
165 | * [4] VIA padlock features | | 165 | * [4] VIA padlock features |
166 | * [5] structured extended features cpuid.7:%ebx | | 166 | * [5] structured extended features cpuid.7:%ebx |
167 | * [6] structured extended features cpuid.7:%ecx | | 167 | * [6] structured extended features cpuid.7:%ecx |
168 | */ | | 168 | */ |
169 | | | 169 | |
170 | const struct cpu_functions *ci_func; /* start/stop functions */ | | 170 | const struct cpu_functions *ci_func; /* start/stop functions */ |
171 | struct trapframe *ci_ddb_regs; | | 171 | struct trapframe *ci_ddb_regs; |
172 | | | 172 | |
173 | u_int ci_cflush_lsize; /* CLFLUSH insn line size */ | | 173 | u_int ci_cflush_lsize; /* CLFLUSH insn line size */ |
174 | struct x86_cache_info ci_cinfo[CAI_COUNT]; | | 174 | struct x86_cache_info ci_cinfo[CAI_COUNT]; |
175 | | | 175 | |
176 | union descriptor *ci_gdt; | | 176 | union descriptor *ci_gdt; |
177 | | | 177 | |
178 | #ifdef i386 | | 178 | #ifdef i386 |
179 | struct i386tss ci_doubleflt_tss; | | 179 | struct i386tss ci_doubleflt_tss; |
180 | struct i386tss ci_ddbipi_tss; | | 180 | struct i386tss ci_ddbipi_tss; |
181 | #endif | | 181 | #endif |
182 | | | 182 | |
183 | #ifdef PAE | | 183 | #ifdef PAE |
184 | uint32_t ci_pae_l3_pdirpa; /* PA of L3 PD */ | | 184 | uint32_t ci_pae_l3_pdirpa; /* PA of L3 PD */ |
185 | pd_entry_t * ci_pae_l3_pdir; /* VA pointer to L3 PD */ | | 185 | pd_entry_t * ci_pae_l3_pdir; /* VA pointer to L3 PD */ |
186 | #endif | | 186 | #endif |
187 | | | 187 | |
188 | #if defined(XEN) && (defined(PAE) || defined(__x86_64__)) | | 188 | #if defined(XEN) && (defined(PAE) || defined(__x86_64__)) |
189 | /* Currently active user PGD (can't use rcr3() with Xen) */ | | 189 | /* Currently active user PGD (can't use rcr3() with Xen) */ |
190 | pd_entry_t * ci_kpm_pdir; /* per-cpu PMD (va) */ | | 190 | pd_entry_t * ci_kpm_pdir; /* per-cpu PMD (va) */ |
191 | paddr_t ci_kpm_pdirpa; /* per-cpu PMD (pa) */ | | 191 | paddr_t ci_kpm_pdirpa; /* per-cpu PMD (pa) */ |
192 | kmutex_t ci_kpm_mtx; | | 192 | kmutex_t ci_kpm_mtx; |
193 | #if defined(__x86_64__) | | 193 | #if defined(__x86_64__) |
194 | /* per-cpu version of normal_pdes */ | | 194 | /* per-cpu version of normal_pdes */ |
195 | pd_entry_t * ci_normal_pdes[3]; /* Ok to hardcode. only for x86_64 && XEN */ | | 195 | pd_entry_t * ci_normal_pdes[3]; /* Ok to hardcode. only for x86_64 && XEN */ |
196 | paddr_t ci_xen_current_user_pgd; | | 196 | paddr_t ci_xen_current_user_pgd; |
197 | #endif /* __x86_64__ */ | | 197 | #endif /* __x86_64__ */ |
198 | #endif /* XEN et.al */ | | 198 | #endif /* XEN et.al */ |
199 | | | 199 | |
200 | #ifdef XEN | | 200 | #ifdef XEN |
201 | size_t ci_xpq_idx; | | 201 | size_t ci_xpq_idx; |
202 | #endif | | 202 | #endif |
203 | | | 203 | |
204 | #ifndef XEN | | 204 | #ifndef XEN |
205 | struct evcnt ci_ipi_events[X86_NIPI]; | | 205 | struct evcnt ci_ipi_events[X86_NIPI]; |
206 | #else /* XEN */ | | 206 | #else /* XEN */ |
207 | struct evcnt ci_ipi_events[XEN_NIPIS]; | | 207 | struct evcnt ci_ipi_events[XEN_NIPIS]; |
208 | evtchn_port_t ci_ipi_evtchn; | | 208 | evtchn_port_t ci_ipi_evtchn; |
209 | #endif /* XEN */ | | 209 | #endif /* XEN */ |
210 | | | 210 | |
211 | device_t ci_frequency; /* Frequency scaling technology */ | | 211 | device_t ci_frequency; /* Frequency scaling technology */ |
212 | device_t ci_padlock; /* VIA PadLock private storage */ | | 212 | device_t ci_padlock; /* VIA PadLock private storage */ |
213 | device_t ci_temperature; /* Intel coretemp(4) or equivalent */ | | 213 | device_t ci_temperature; /* Intel coretemp(4) or equivalent */ |
214 | device_t ci_vm; /* Virtual machine guest driver */ | | 214 | device_t ci_vm; /* Virtual machine guest driver */ |
215 | | | 215 | |
216 | struct i386tss ci_tss; /* Per-cpu TSS; shared among LWPs */ | | 216 | struct i386tss ci_tss; /* Per-cpu TSS; shared among LWPs */ |
217 | char ci_iomap[IOMAPSIZE]; /* I/O Bitmap */ | | 217 | char ci_iomap[IOMAPSIZE]; /* I/O Bitmap */ |
218 | int ci_tss_sel; /* TSS selector of this cpu */ | | 218 | int ci_tss_sel; /* TSS selector of this cpu */ |
219 | | | 219 | |
220 | /* | | 220 | /* |
221 | * The following two are actually region_descriptors, | | 221 | * The following two are actually region_descriptors, |
222 | * but that would pollute the namespace. | | 222 | * but that would pollute the namespace. |
223 | */ | | 223 | */ |
224 | uintptr_t ci_suspend_gdt; | | 224 | uintptr_t ci_suspend_gdt; |
225 | uint16_t ci_suspend_gdt_padding; | | 225 | uint16_t ci_suspend_gdt_padding; |
226 | uintptr_t ci_suspend_idt; | | 226 | uintptr_t ci_suspend_idt; |
227 | uint16_t ci_suspend_idt_padding; | | 227 | uint16_t ci_suspend_idt_padding; |
228 | | | 228 | |
229 | uint16_t ci_suspend_tr; | | 229 | uint16_t ci_suspend_tr; |
230 | uint16_t ci_suspend_ldt; | | 230 | uint16_t ci_suspend_ldt; |
231 | uintptr_t ci_suspend_fs; | | 231 | uintptr_t ci_suspend_fs; |
232 | uintptr_t ci_suspend_gs; | | 232 | uintptr_t ci_suspend_gs; |
233 | uintptr_t ci_suspend_kgs; | | 233 | uintptr_t ci_suspend_kgs; |
234 | uintptr_t ci_suspend_efer; | | 234 | uintptr_t ci_suspend_efer; |
235 | uintptr_t ci_suspend_reg[12]; | | 235 | uintptr_t ci_suspend_reg[12]; |
236 | uintptr_t ci_suspend_cr0; | | 236 | uintptr_t ci_suspend_cr0; |
237 | uintptr_t ci_suspend_cr2; | | 237 | uintptr_t ci_suspend_cr2; |
238 | uintptr_t ci_suspend_cr3; | | 238 | uintptr_t ci_suspend_cr3; |
239 | uintptr_t ci_suspend_cr4; | | 239 | uintptr_t ci_suspend_cr4; |
240 | uintptr_t ci_suspend_cr8; | | 240 | uintptr_t ci_suspend_cr8; |
241 | | | 241 | |
242 | /* The following must be in a single cache line. */ | | 242 | /* The following must be in a single cache line. */ |
243 | int ci_want_resched __aligned(64); | | 243 | int ci_want_resched __aligned(64); |
244 | int ci_padout __aligned(64); | | 244 | int ci_padout __aligned(64); |
245 | }; | | 245 | }; |
246 | | | 246 | |
247 | /* | | 247 | /* |
248 | * Macros to handle (some) trapframe registers for common x86 code. | | 248 | * Macros to handle (some) trapframe registers for common x86 code. |
249 | */ | | 249 | */ |
250 | #ifdef __x86_64__ | | 250 | #ifdef __x86_64__ |
251 | #define X86_TF_RAX(tf) tf->tf_rax | | 251 | #define X86_TF_RAX(tf) tf->tf_rax |
252 | #define X86_TF_RDX(tf) tf->tf_rdx | | 252 | #define X86_TF_RDX(tf) tf->tf_rdx |
253 | #define X86_TF_RSP(tf) tf->tf_rsp | | 253 | #define X86_TF_RSP(tf) tf->tf_rsp |
254 | #define X86_TF_RIP(tf) tf->tf_rip | | 254 | #define X86_TF_RIP(tf) tf->tf_rip |
255 | #define X86_TF_RFLAGS(tf) tf->tf_rflags | | 255 | #define X86_TF_RFLAGS(tf) tf->tf_rflags |
256 | #else | | 256 | #else |
257 | #define X86_TF_RAX(tf) tf->tf_eax | | 257 | #define X86_TF_RAX(tf) tf->tf_eax |
258 | #define X86_TF_RDX(tf) tf->tf_edx | | 258 | #define X86_TF_RDX(tf) tf->tf_edx |
259 | #define X86_TF_RSP(tf) tf->tf_esp | | 259 | #define X86_TF_RSP(tf) tf->tf_esp |
260 | #define X86_TF_RIP(tf) tf->tf_eip | | 260 | #define X86_TF_RIP(tf) tf->tf_eip |
261 | #define X86_TF_RFLAGS(tf) tf->tf_eflags | | 261 | #define X86_TF_RFLAGS(tf) tf->tf_eflags |
262 | #endif | | 262 | #endif |
263 | | | 263 | |
264 | /* | | 264 | /* |
265 | * Processor flag notes: The "primary" CPU has certain MI-defined | | 265 | * Processor flag notes: The "primary" CPU has certain MI-defined |
266 | * roles (mostly relating to hardclock handling); we distinguish | | 266 | * roles (mostly relating to hardclock handling); we distinguish |
267 | * betwen the processor which booted us, and the processor currently | | 267 | * betwen the processor which booted us, and the processor currently |
268 | * holding the "primary" role just to give us the flexibility later to | | 268 | * holding the "primary" role just to give us the flexibility later to |
269 | * change primaries should we be sufficiently twisted. | | 269 | * change primaries should we be sufficiently twisted. |
270 | */ | | 270 | */ |
271 | | | 271 | |
272 | #define CPUF_BSP 0x0001 /* CPU is the original BSP */ | | 272 | #define CPUF_BSP 0x0001 /* CPU is the original BSP */ |
273 | #define CPUF_AP 0x0002 /* CPU is an AP */ | | 273 | #define CPUF_AP 0x0002 /* CPU is an AP */ |
274 | #define CPUF_SP 0x0004 /* CPU is only processor */ | | 274 | #define CPUF_SP 0x0004 /* CPU is only processor */ |
275 | #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ | | 275 | #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ |
276 | | | 276 | |
277 | #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ | | 277 | #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ |
278 | #define CPUF_PRESENT 0x1000 /* CPU is present */ | | 278 | #define CPUF_PRESENT 0x1000 /* CPU is present */ |
279 | #define CPUF_RUNNING 0x2000 /* CPU is running */ | | 279 | #define CPUF_RUNNING 0x2000 /* CPU is running */ |
280 | #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ | | 280 | #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ |
281 | #define CPUF_GO 0x8000 /* CPU should start running */ | | 281 | #define CPUF_GO 0x8000 /* CPU should start running */ |
282 | | | 282 | |
283 | #endif /* _KERNEL || __KMEMUSER */ | | 283 | #endif /* _KERNEL || __KMEMUSER */ |
284 | | | 284 | |
285 | #ifdef _KERNEL | | 285 | #ifdef _KERNEL |
286 | /* | | 286 | /* |
287 | * We statically allocate the CPU info for the primary CPU (or, | | 287 | * We statically allocate the CPU info for the primary CPU (or, |
288 | * the only CPU on uniprocessors), and the primary CPU is the | | 288 | * the only CPU on uniprocessors), and the primary CPU is the |
289 | * first CPU on the CPU info list. | | 289 | * first CPU on the CPU info list. |
290 | */ | | 290 | */ |
291 | extern struct cpu_info cpu_info_primary; | | 291 | extern struct cpu_info cpu_info_primary; |
292 | extern struct cpu_info *cpu_info_list; | | 292 | extern struct cpu_info *cpu_info_list; |
293 | | | 293 | |
294 | #define CPU_INFO_ITERATOR int __unused | | 294 | #define CPU_INFO_ITERATOR int __unused |
295 | #define CPU_INFO_FOREACH(cii, ci) ci = cpu_info_list; \ | | 295 | #define CPU_INFO_FOREACH(cii, ci) ci = cpu_info_list; \ |
296 | ci != NULL; ci = ci->ci_next | | 296 | ci != NULL; ci = ci->ci_next |
297 | | | 297 | |
298 | #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) | | 298 | #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) |
299 | #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) | | 299 | #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) |
300 | #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) | | 300 | #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) |
301 | | | 301 | |
302 | #if !defined(__GNUC__) || defined(_MODULE) | | 302 | #if !defined(__GNUC__) || defined(_MODULE) |
303 | /* For non-GCC and modules */ | | 303 | /* For non-GCC and modules */ |
304 | struct cpu_info *x86_curcpu(void); | | 304 | struct cpu_info *x86_curcpu(void); |
305 | void cpu_set_curpri(int); | | 305 | void cpu_set_curpri(int); |
306 | # ifdef __GNUC__ | | 306 | # ifdef __GNUC__ |
307 | lwp_t *x86_curlwp(void) __attribute__ ((const)); | | 307 | lwp_t *x86_curlwp(void) __attribute__ ((const)); |
308 | # else | | 308 | # else |
309 | lwp_t *x86_curlwp(void); | | 309 | lwp_t *x86_curlwp(void); |
310 | # endif | | 310 | # endif |
311 | #endif | | 311 | #endif |
312 | | | 312 | |
313 | #define cpu_number() (cpu_index(curcpu())) | | 313 | #define cpu_number() (cpu_index(curcpu())) |
314 | | | 314 | |
315 | #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) | | 315 | #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) |
316 | | | 316 | |
317 | #define X86_AST_GENERIC 0x01 | | 317 | #define X86_AST_GENERIC 0x01 |
318 | #define X86_AST_PREEMPT 0x02 | | 318 | #define X86_AST_PREEMPT 0x02 |
319 | | | 319 | |
320 | #define aston(l, why) ((l)->l_md.md_astpending |= (why)) | | 320 | #define aston(l, why) ((l)->l_md.md_astpending |= (why)) |
321 | #define cpu_did_resched(l) ((l)->l_md.md_astpending &= ~X86_AST_PREEMPT) | | 321 | #define cpu_did_resched(l) ((l)->l_md.md_astpending &= ~X86_AST_PREEMPT) |
322 | | | 322 | |
323 | void cpu_boot_secondary_processors(void); | | 323 | void cpu_boot_secondary_processors(void); |
324 | void cpu_init_idle_lwps(void); | | 324 | void cpu_init_idle_lwps(void); |
325 | void cpu_init_msrs(struct cpu_info *, bool); | | 325 | void cpu_init_msrs(struct cpu_info *, bool); |
326 | void cpu_load_pmap(struct pmap *, struct pmap *); | | 326 | void cpu_load_pmap(struct pmap *, struct pmap *); |
327 | void cpu_broadcast_halt(void); | | 327 | void cpu_broadcast_halt(void); |
328 | void cpu_kick(struct cpu_info *); | | 328 | void cpu_kick(struct cpu_info *); |
329 | | | 329 | |
330 | #define curcpu() x86_curcpu() | | 330 | #define curcpu() x86_curcpu() |
331 | #define curlwp x86_curlwp() | | 331 | #define curlwp x86_curlwp() |
332 | #define curpcb ((struct pcb *)lwp_getpcb(curlwp)) | | 332 | #define curpcb ((struct pcb *)lwp_getpcb(curlwp)) |
333 | | | 333 | |
334 | /* | | 334 | /* |
335 | * Arguments to hardclock, softclock and statclock | | 335 | * Arguments to hardclock, softclock and statclock |
336 | * encapsulate the previous machine state in an opaque | | 336 | * encapsulate the previous machine state in an opaque |
337 | * clockframe; for now, use generic intrframe. | | 337 | * clockframe; for now, use generic intrframe. |
338 | */ | | 338 | */ |
339 | struct clockframe { | | 339 | struct clockframe { |
340 | struct intrframe cf_if; | | 340 | struct intrframe cf_if; |
341 | }; | | 341 | }; |
342 | | | 342 | |
343 | /* | | 343 | /* |
344 | * Give a profiling tick to the current process when the user profiling | | 344 | * Give a profiling tick to the current process when the user profiling |
345 | * buffer pages are invalid. On the i386, request an ast to send us | | 345 | * buffer pages are invalid. On the i386, request an ast to send us |
346 | * through trap(), marking the proc as needing a profiling tick. | | 346 | * through trap(), marking the proc as needing a profiling tick. |
347 | */ | | 347 | */ |
348 | extern void cpu_need_proftick(struct lwp *l); | | 348 | extern void cpu_need_proftick(struct lwp *l); |
349 | | | 349 | |
350 | /* | | 350 | /* |
351 | * Notify the LWP l that it has a signal pending, process as soon as | | 351 | * Notify the LWP l that it has a signal pending, process as soon as |
352 | * possible. | | 352 | * possible. |
353 | */ | | 353 | */ |
354 | extern void cpu_signotify(struct lwp *); | | 354 | extern void cpu_signotify(struct lwp *); |
355 | | | 355 | |
356 | /* | | 356 | /* |
357 | * We need a machine-independent name for this. | | 357 | * We need a machine-independent name for this. |
358 | */ | | 358 | */ |
359 | extern void (*delay_func)(unsigned int); | | 359 | extern void (*delay_func)(unsigned int); |
360 | struct timeval; | | 360 | struct timeval; |
361 | | | 361 | |
362 | #ifndef __HIDE_DELAY | | 362 | #ifndef __HIDE_DELAY |
363 | #define DELAY(x) (*delay_func)(x) | | 363 | #define DELAY(x) (*delay_func)(x) |
364 | #define delay(x) (*delay_func)(x) | | 364 | #define delay(x) (*delay_func)(x) |
365 | #endif | | 365 | #endif |
366 | | | 366 | |
367 | extern int biosbasemem; | | 367 | extern int biosbasemem; |
368 | extern int biosextmem; | | 368 | extern int biosextmem; |
369 | extern int cputype; | | 369 | extern int cputype; |
370 | extern int cpuid_level; | | 370 | extern int cpuid_level; |
371 | extern int cpu_class; | | 371 | extern int cpu_class; |
372 | extern char cpu_brand_string[]; | | 372 | extern char cpu_brand_string[]; |
373 | extern int use_pae; | | 373 | extern int use_pae; |
374 | | | 374 | |
375 | #ifdef __i386__ | | 375 | #ifdef __i386__ |
376 | #define i386_fpu_present 1 | | 376 | #define i386_fpu_present 1 |
377 | int npx586bug1(int, int); | | 377 | int npx586bug1(int, int); |
378 | extern int i386_fpu_fdivbug; | | 378 | extern int i386_fpu_fdivbug; |
379 | extern int i386_use_fxsave; | | 379 | extern int i386_use_fxsave; |
380 | extern int i386_has_sse; | | 380 | extern int i386_has_sse; |
381 | extern int i386_has_sse2; | | 381 | extern int i386_has_sse2; |
382 | #else | | 382 | #else |
383 | #define i386_fpu_present 1 | | 383 | #define i386_fpu_present 1 |
384 | #define i386_fpu_fdivbug 0 | | 384 | #define i386_fpu_fdivbug 0 |
385 | #define i386_use_fxsave 1 | | 385 | #define i386_use_fxsave 1 |
386 | #define i386_has_sse 1 | | 386 | #define i386_has_sse 1 |
387 | #define i386_has_sse2 1 | | 387 | #define i386_has_sse2 1 |
388 | #endif | | 388 | #endif |
389 | | | 389 | |
390 | extern int x86_fpu_save; | | 390 | extern int x86_fpu_save; |
391 | #define FPU_SAVE_FSAVE 0 | | 391 | #define FPU_SAVE_FSAVE 0 |
392 | #define FPU_SAVE_FXSAVE 1 | | 392 | #define FPU_SAVE_FXSAVE 1 |
393 | #define FPU_SAVE_XSAVE 2 | | 393 | #define FPU_SAVE_XSAVE 2 |
394 | #define FPU_SAVE_XSAVEOPT 3 | | 394 | #define FPU_SAVE_XSAVEOPT 3 |
395 | extern unsigned int x86_fpu_save_size; | | 395 | extern unsigned int x86_fpu_save_size; |
396 | extern uint64_t x86_xsave_features; | | 396 | extern uint64_t x86_xsave_features; |
397 | | | 397 | |
398 | extern void (*x86_cpu_idle)(void); | | 398 | extern void (*x86_cpu_idle)(void); |
399 | #define cpu_idle() (*x86_cpu_idle)() | | 399 | #define cpu_idle() (*x86_cpu_idle)() |
400 | | | 400 | |
401 | /* machdep.c */ | | 401 | /* machdep.c */ |
402 | #ifdef i386 | | 402 | #ifdef i386 |
403 | void cpu_set_tss_gates(struct cpu_info *); | | 403 | void cpu_set_tss_gates(struct cpu_info *); |
404 | #endif | | 404 | #endif |
405 | void cpu_reset(void); | | 405 | void cpu_reset(void); |
406 | | | 406 | |
407 | /* longrun.c */ | | 407 | /* longrun.c */ |
408 | u_int tmx86_get_longrun_mode(void); | | 408 | u_int tmx86_get_longrun_mode(void); |
409 | void tmx86_get_longrun_status(u_int *, u_int *, u_int *); | | 409 | void tmx86_get_longrun_status(u_int *, u_int *, u_int *); |
410 | void tmx86_init_longrun(void); | | 410 | void tmx86_init_longrun(void); |
411 | | | 411 | |
412 | /* identcpu.c */ | | 412 | /* identcpu.c */ |
413 | void cpu_probe(struct cpu_info *); | | 413 | void cpu_probe(struct cpu_info *); |
414 | void cpu_identify(struct cpu_info *); | | 414 | void cpu_identify(struct cpu_info *); |
415 | void identify_hypervisor(void); | | 415 | void identify_hypervisor(void); |
416 | | | 416 | |
417 | typedef enum vm_guest { | | 417 | typedef enum vm_guest { |
418 | VM_GUEST_NO = 0, | | 418 | VM_GUEST_NO = 0, |
419 | VM_GUEST_VM, | | 419 | VM_GUEST_VM, |
420 | VM_GUEST_XEN, | | 420 | VM_GUEST_XEN, |
421 | VM_GUEST_HV, | | 421 | VM_GUEST_HV, |
422 | VM_GUEST_VMWARE, | | 422 | VM_GUEST_VMWARE, |
423 | VM_GUEST_KVM, | | 423 | VM_GUEST_KVM, |
424 | VM_LAST | | 424 | VM_LAST |
425 | } vm_guest_t; | | 425 | } vm_guest_t; |
426 | extern vm_guest_t vm_guest; | | 426 | extern vm_guest_t vm_guest; |
427 | | | 427 | |
428 | /* cpu_topology.c */ | | 428 | /* cpu_topology.c */ |
429 | void x86_cpu_topology(struct cpu_info *); | | 429 | void x86_cpu_topology(struct cpu_info *); |
430 | | | 430 | |
431 | /* locore.s */ | | 431 | /* locore.s */ |
432 | struct region_descriptor; | | 432 | struct region_descriptor; |
433 | void lgdt(struct region_descriptor *); | | 433 | void lgdt(struct region_descriptor *); |
434 | #ifdef XEN | | 434 | #ifdef XEN |
435 | void lgdt_finish(void); | | 435 | void lgdt_finish(void); |
436 | #endif | | 436 | #endif |
437 | | | 437 | |
438 | struct pcb; | | 438 | struct pcb; |
439 | void savectx(struct pcb *); | | 439 | void savectx(struct pcb *); |
440 | void lwp_trampoline(void); | | 440 | void lwp_trampoline(void); |
441 | #ifdef XEN | | 441 | #ifdef XEN |
442 | void startrtclock(void); | | 442 | void startrtclock(void); |
443 | void xen_delay(unsigned int); | | 443 | void xen_delay(unsigned int); |
444 | void xen_initclocks(void); | | 444 | void xen_initclocks(void); |
445 | void xen_suspendclocks(struct cpu_info *); | | 445 | void xen_suspendclocks(struct cpu_info *); |
446 | void xen_resumeclocks(struct cpu_info *); | | 446 | void xen_resumeclocks(struct cpu_info *); |
447 | #else | | 447 | #else |
448 | /* clock.c */ | | 448 | /* clock.c */ |
449 | void initrtclock(u_long); | | 449 | void initrtclock(u_long); |
450 | void startrtclock(void); | | 450 | void startrtclock(void); |
451 | void i8254_delay(unsigned int); | | 451 | void i8254_delay(unsigned int); |
452 | void i8254_microtime(struct timeval *); | | 452 | void i8254_microtime(struct timeval *); |
453 | void i8254_initclocks(void); | | 453 | void i8254_initclocks(void); |
454 | #endif | | 454 | #endif |
455 | | | 455 | |
456 | /* cpu.c */ | | 456 | /* cpu.c */ |
457 | void cpu_probe_features(struct cpu_info *); | | 457 | void cpu_probe_features(struct cpu_info *); |
458 | | | 458 | |
459 | /* vm_machdep.c */ | | 459 | /* vm_machdep.c */ |
460 | void cpu_proc_fork(struct proc *, struct proc *); | | 460 | void cpu_proc_fork(struct proc *, struct proc *); |
461 | paddr_t kvtop(void *); | | 461 | paddr_t kvtop(void *); |
462 | | | 462 | |
463 | #ifdef USER_LDT | | 463 | #ifdef USER_LDT |
464 | /* sys_machdep.h */ | | 464 | /* sys_machdep.h */ |
465 | int x86_get_ldt(struct lwp *, void *, register_t *); | | 465 | int x86_get_ldt(struct lwp *, void *, register_t *); |
466 | int x86_set_ldt(struct lwp *, void *, register_t *); | | 466 | int x86_set_ldt(struct lwp *, void *, register_t *); |
467 | #endif | | 467 | #endif |
468 | | | 468 | |
469 | /* isa_machdep.c */ | | 469 | /* isa_machdep.c */ |
470 | void isa_defaultirq(void); | | 470 | void isa_defaultirq(void); |
471 | int isa_nmi(void); | | 471 | int isa_nmi(void); |
472 | | | 472 | |
473 | /* consinit.c */ | | 473 | /* consinit.c */ |
474 | void kgdb_port_init(void); | | 474 | void kgdb_port_init(void); |
475 | | | 475 | |
476 | /* bus_machdep.c */ | | 476 | /* bus_machdep.c */ |
477 | void x86_bus_space_init(void); | | 477 | void x86_bus_space_init(void); |
478 | void x86_bus_space_mallocok(void); | | 478 | void x86_bus_space_mallocok(void); |
479 | | | 479 | |
480 | #endif /* _KERNEL */ | | 480 | #endif /* _KERNEL */ |
481 | | | 481 | |
482 | #if defined(_KERNEL) || defined(_KMEMUSER) | | 482 | #if defined(_KERNEL) || defined(_KMEMUSER) |
483 | #include <machine/psl.h> /* Must be after struct cpu_info declaration */ | | 483 | #include <machine/psl.h> /* Must be after struct cpu_info declaration */ |
484 | #endif /* _KERNEL || __KMEMUSER */ | | 484 | #endif /* _KERNEL || __KMEMUSER */ |
485 | | | 485 | |
486 | /* | | 486 | /* |
487 | * CTL_MACHDEP definitions. | | 487 | * CTL_MACHDEP definitions. |
488 | */ | | 488 | */ |
489 | #define CPU_CONSDEV 1 /* dev_t: console terminal device */ | | 489 | #define CPU_CONSDEV 1 /* dev_t: console terminal device */ |
490 | #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ | | 490 | #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ |
491 | #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ | | 491 | #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ |
492 | /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ | | 492 | /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ |
493 | #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ | | 493 | #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ |
494 | #define CPU_DISKINFO 6 /* struct disklist *: | | 494 | #define CPU_DISKINFO 6 /* struct disklist *: |
495 | * disk geometry information */ | | 495 | * disk geometry information */ |
496 | #define CPU_FPU_PRESENT 7 /* int: FPU is present */ | | 496 | #define CPU_FPU_PRESENT 7 /* int: FPU is present */ |
497 | #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ | | 497 | #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ |
498 | #define CPU_SSE 9 /* int: OS/CPU supports SSE */ | | 498 | #define CPU_SSE 9 /* int: OS/CPU supports SSE */ |
499 | #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ | | 499 | #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ |
500 | #define CPU_TMLR_MODE 11 /* int: longrun mode | | 500 | #define CPU_TMLR_MODE 11 /* int: longrun mode |
501 | * 0: minimum frequency | | 501 | * 0: minimum frequency |
502 | * 1: economy | | 502 | * 1: economy |
503 | * 2: performance | | 503 | * 2: performance |
504 | * 3: maximum frequency | | 504 | * 3: maximum frequency |
505 | */ | | 505 | */ |
506 | #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ | | 506 | #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ |
507 | #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */ | | 507 | #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */ |
508 | #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ | | 508 | #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ |
509 | #define CPU_FPU_SAVE 15 /* int: FPU Instructions layout | | 509 | #define CPU_FPU_SAVE 15 /* int: FPU Instructions layout |
510 | * to use this, CPU_OSFXSR must be true | | 510 | * to use this, CPU_OSFXSR must be true |
511 | * 0: FSAVE | | 511 | * 0: FSAVE |
512 | * 1: FXSAVE | | 512 | * 1: FXSAVE |
513 | * 2: XSAVE | | 513 | * 2: XSAVE |
514 | * 3: XSAVEOPT | | 514 | * 3: XSAVEOPT |
515 | */ | | 515 | */ |
516 | #define CPU_FPU_SAVE_SIZE 16 /* int: FPU Instruction layout size */ | | 516 | #define CPU_FPU_SAVE_SIZE 16 /* int: FPU Instruction layout size */ |
517 | #define CPU_XSAVE_FEATURES 17 /* quad: XSAVE features */ | | 517 | #define CPU_XSAVE_FEATURES 17 /* quad: XSAVE features */ |
518 | | | 518 | |
519 | #define CPU_MAXID 18 /* number of valid machdep ids */ | | 519 | #define CPU_MAXID 18 /* number of valid machdep ids */ |
520 | | | 520 | |
521 | /* | | 521 | /* |
522 | * Structure for CPU_DISKINFO sysctl call. | | 522 | * Structure for CPU_DISKINFO sysctl call. |
523 | * XXX this should be somewhere else. | | 523 | * XXX this should be somewhere else. |
524 | */ | | 524 | */ |
525 | #define MAX_BIOSDISKS 16 | | 525 | #define MAX_BIOSDISKS 16 |
526 | | | 526 | |
527 | struct disklist { | | 527 | struct disklist { |
528 | int dl_nbiosdisks; /* number of bios disks */ | | 528 | int dl_nbiosdisks; /* number of bios disks */ |
| | | 529 | int dl_unused; |
529 | struct biosdisk_info { | | 530 | struct biosdisk_info { |
530 | int bi_dev; /* BIOS device # (0x80 ..) */ | | 531 | int bi_dev; /* BIOS device # (0x80 ..) */ |
531 | int bi_cyl; /* cylinders on disk */ | | 532 | int bi_cyl; /* cylinders on disk */ |
532 | int bi_head; /* heads per track */ | | 533 | int bi_head; /* heads per track */ |
533 | int bi_sec; /* sectors per track */ | | 534 | int bi_sec; /* sectors per track */ |
534 | uint64_t bi_lbasecs; /* total sec. (iff ext13) */ | | 535 | uint64_t bi_lbasecs; /* total sec. (iff ext13) */ |
535 | #define BIFLAG_INVALID 0x01 | | 536 | #define BIFLAG_INVALID 0x01 |
536 | #define BIFLAG_EXTINT13 0x02 | | 537 | #define BIFLAG_EXTINT13 0x02 |
537 | int bi_flags; | | 538 | int bi_flags; |
| | | 539 | int bi_unused; |
538 | } dl_biosdisks[MAX_BIOSDISKS]; | | 540 | } dl_biosdisks[MAX_BIOSDISKS]; |
539 | | | 541 | |
540 | int dl_nnativedisks; /* number of native disks */ | | 542 | int dl_nnativedisks; /* number of native disks */ |
541 | struct nativedisk_info { | | 543 | struct nativedisk_info { |
542 | char ni_devname[16]; /* native device name */ | | 544 | char ni_devname[16]; /* native device name */ |
543 | int ni_nmatches; /* # of matches w/ BIOS */ | | 545 | int ni_nmatches; /* # of matches w/ BIOS */ |
544 | int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ | | 546 | int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ |
545 | } dl_nativedisks[1]; /* actually longer */ | | 547 | } dl_nativedisks[1]; /* actually longer */ |
546 | }; | | 548 | }; |
547 | #endif /* !_X86_CPU_H_ */ | | 549 | #endif /* !_X86_CPU_H_ */ |