Tue Dec 12 09:12:53 2017 UTC ()
Pull up following revision(s) (requested by maxv in ticket #1540):
	sys/arch/x86/x86/fpu.c: 1.19 via patch
Mask mxcsr, otherwise userland could set reserved bits to 1 and make
xrstor fault.


(snj)
diff -r1.9 -r1.9.16.1 src/sys/arch/x86/x86/fpu.c
cvs diff -r1.9 -r1.9.16.1 src/sys/arch/x86/x86/fpu.c (expand / switch to unified diff)

--- src/sys/arch/x86/x86/fpu.c 2014/02/25 22:16:52 1.9
+++ src/sys/arch/x86/x86/fpu.c 2017/12/12 09:12:53 1.9.16.1
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: fpu.c,v 1.9 2014/02/25 22:16:52 dsl Exp $ */ 1/* $NetBSD: fpu.c,v 1.9.16.1 2017/12/12 09:12:53 snj Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2008 The NetBSD Foundation, Inc. All 4 * Copyright (c) 2008 The NetBSD Foundation, Inc. All
5 * rights reserved. 5 * rights reserved.
6 * 6 *
7 * This code is derived from software developed for The NetBSD Foundation 7 * This code is derived from software developed for The NetBSD Foundation
8 * by Andrew Doran. 8 * by Andrew Doran.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -90,27 +90,27 @@ @@ -90,27 +90,27 @@
90 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 90 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
91 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 91 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
92 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 92 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
93 * SUCH DAMAGE. 93 * SUCH DAMAGE.
94 * 94 *
95 * @(#)npx.c 7.2 (Berkeley) 5/12/91 95 * @(#)npx.c 7.2 (Berkeley) 5/12/91
96 */ 96 */
97 97
98/* 98/*
99 * XXXfvdl update copyright notice. this started out as a stripped isa/npx.c 99 * XXXfvdl update copyright notice. this started out as a stripped isa/npx.c
100 */ 100 */
101 101
102#include <sys/cdefs.h> 102#include <sys/cdefs.h>
103__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.9 2014/02/25 22:16:52 dsl Exp $"); 103__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.9.16.1 2017/12/12 09:12:53 snj Exp $");
104 104
105#include "opt_multiprocessor.h" 105#include "opt_multiprocessor.h"
106 106
107#include <sys/param.h> 107#include <sys/param.h>
108#include <sys/systm.h> 108#include <sys/systm.h>
109#include <sys/conf.h> 109#include <sys/conf.h>
110#include <sys/cpu.h> 110#include <sys/cpu.h>
111#include <sys/file.h> 111#include <sys/file.h>
112#include <sys/proc.h> 112#include <sys/proc.h>
113#include <sys/kernel.h> 113#include <sys/kernel.h>
114 114
115#include <machine/cpu.h> 115#include <machine/cpu.h>
116#include <machine/intr.h> 116#include <machine/intr.h>
@@ -607,26 +607,27 @@ fpu_save_area_fork(struct pcb *pcb2, con @@ -607,26 +607,27 @@ fpu_save_area_fork(struct pcb *pcb2, con
607void 607void
608process_write_fpregs_xmm(struct lwp *lwp, const struct fxsave *fpregs) 608process_write_fpregs_xmm(struct lwp *lwp, const struct fxsave *fpregs)
609{ 609{
610 union savefpu *fpu_save; 610 union savefpu *fpu_save;
611 611
612 fpusave_lwp(lwp, false); 612 fpusave_lwp(lwp, false);
613 fpu_save = process_fpframe(lwp); 613 fpu_save = process_fpframe(lwp);
614 614
615 if (i386_use_fxsave) { 615 if (i386_use_fxsave) {
616 memcpy(&fpu_save->sv_xmm, fpregs, 616 memcpy(&fpu_save->sv_xmm, fpregs,
617 sizeof fpu_save->sv_xmm); 617 sizeof fpu_save->sv_xmm);
618 /* Invalid bits in the mxcsr_mask will cause faults */ 618 /* Invalid bits in the mxcsr_mask will cause faults */
619 fpu_save->sv_xmm.fx_mxcsr_mask &= __INITIAL_MXCSR_MASK__; 619 fpu_save->sv_xmm.fx_mxcsr_mask &= __INITIAL_MXCSR_MASK__;
 620 fpu_save->sv_xmm.fx_mxcsr &= fpu_save->sv_xmm.fx_mxcsr_mask;
620 } else { 621 } else {
621 process_xmm_to_s87(fpregs, &fpu_save->sv_87); 622 process_xmm_to_s87(fpregs, &fpu_save->sv_87);
622 } 623 }
623} 624}
624 625
625/* We need to use x87 format for 32bit ptrace */ 626/* We need to use x87 format for 32bit ptrace */
626void 627void
627process_write_fpregs_s87(struct lwp *lwp, const struct save87 *fpregs) 628process_write_fpregs_s87(struct lwp *lwp, const struct save87 *fpregs)
628{ 629{
629 630
630 if (i386_use_fxsave) { 631 if (i386_use_fxsave) {
631 /* Save so we don't lose the xmm registers */ 632 /* Save so we don't lose the xmm registers */
632 fpusave_lwp(lwp, true); 633 fpusave_lwp(lwp, true);