| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
1 | /* $NetBSD: omap_gpio.c,v 1.7 2012/11/12 18:00:37 skrll Exp $ */ | | 1 | /* $NetBSD: omap_gpio.c,v 1.8 2018/03/13 06:41:53 ryo Exp $ */ |
2 | | | 2 | |
3 | /* | | 3 | /* |
4 | * The OMAP GPIO Controller interface is inspired by pxa2x0_gpio.c | | 4 | * The OMAP GPIO Controller interface is inspired by pxa2x0_gpio.c |
5 | * | | 5 | * |
6 | * Copyright 2003 Wasabi Systems, Inc. | | 6 | * Copyright 2003 Wasabi Systems, Inc. |
7 | * All rights reserved. | | 7 | * All rights reserved. |
8 | * | | 8 | * |
9 | * Written by Steve C. Woodford for Wasabi Systems, Inc. | | 9 | * Written by Steve C. Woodford for Wasabi Systems, Inc. |
10 | * | | 10 | * |
11 | * Redistribution and use in source and binary forms, with or without | | 11 | * Redistribution and use in source and binary forms, with or without |
12 | * modification, are permitted provided that the following conditions | | 12 | * modification, are permitted provided that the following conditions |
13 | * are met: | | 13 | * are met: |
14 | * 1. Redistributions of source code must retain the above copyright | | 14 | * 1. Redistributions of source code must retain the above copyright |
| @@ -28,27 +28,27 @@ | | | @@ -28,27 +28,27 @@ |
28 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | | 28 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
29 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | | 29 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
30 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC | | 30 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC |
31 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | | 31 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
32 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | | 32 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
33 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | | 33 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
34 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | | 34 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
35 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | | 35 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
36 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | | 36 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
37 | * POSSIBILITY OF SUCH DAMAGE. | | 37 | * POSSIBILITY OF SUCH DAMAGE. |
38 | */ | | 38 | */ |
39 | | | 39 | |
40 | #include <sys/cdefs.h> | | 40 | #include <sys/cdefs.h> |
41 | __KERNEL_RCSID(0, "$NetBSD: omap_gpio.c,v 1.7 2012/11/12 18:00:37 skrll Exp $"); | | 41 | __KERNEL_RCSID(0, "$NetBSD: omap_gpio.c,v 1.8 2018/03/13 06:41:53 ryo Exp $"); |
42 | | | 42 | |
43 | #include <sys/param.h> | | 43 | #include <sys/param.h> |
44 | #include <sys/systm.h> | | 44 | #include <sys/systm.h> |
45 | #include <sys/device.h> | | 45 | #include <sys/device.h> |
46 | #include <sys/malloc.h> | | 46 | #include <sys/malloc.h> |
47 | | | 47 | |
48 | #include <machine/intr.h> | | 48 | #include <machine/intr.h> |
49 | #include <sys/bus.h> | | 49 | #include <sys/bus.h> |
50 | | | 50 | |
51 | #include <arm/omap/omap_tipb.h> | | 51 | #include <arm/omap/omap_tipb.h> |
52 | #include <arm/omap/omap_gpio.h> | | 52 | #include <arm/omap/omap_gpio.h> |
53 | #include <arm/omap/omap_gpioreg.h> | | 53 | #include <arm/omap/omap_gpioreg.h> |
54 | | | 54 | |
| @@ -378,70 +378,73 @@ void | | | @@ -378,70 +378,73 @@ void |
378 | omap_gpio_intr_mask(void *cookie) | | 378 | omap_gpio_intr_mask(void *cookie) |
379 | { | | 379 | { |
380 | struct omapgpio_softc *sc; | | 380 | struct omapgpio_softc *sc; |
381 | struct gpio_irq_handler *gh = cookie; | | 381 | struct gpio_irq_handler *gh = cookie; |
382 | uint32_t bit; | | 382 | uint32_t bit; |
383 | u_int gpio, relnum; | | 383 | u_int gpio, relnum; |
384 | | | 384 | |
385 | KDASSERT(cookie != NULL); | | 385 | KDASSERT(cookie != NULL); |
386 | | | 386 | |
387 | gpio = gh->gh_gpio; | | 387 | gpio = gh->gh_gpio; |
388 | sc = device_lookup_private(&omapgpio_cd, GPIO_MODULE(gpio)); | | 388 | sc = device_lookup_private(&omapgpio_cd, GPIO_MODULE(gpio)); |
389 | bit = GPIO_BIT(gpio); | | 389 | bit = GPIO_BIT(gpio); |
390 | relnum = GPIO_RELNUM(gpio); | | 390 | relnum = GPIO_RELNUM(gpio); |
| | | 391 | __USE(relnum); |
391 | | | 392 | |
392 | /* Disable interrupt generation for that gpio. */ | | 393 | /* Disable interrupt generation for that gpio. */ |
393 | bus_space_write_4(sc->sc_bust, sc->sc_bush, GPIO_CLEAR_IRQENABLE, | | 394 | bus_space_write_4(sc->sc_bust, sc->sc_bush, GPIO_CLEAR_IRQENABLE, |
394 | bit); | | 395 | bit); |
395 | | | 396 | |
396 | sc->sc_mask &= ~bit; | | 397 | sc->sc_mask &= ~bit; |
397 | } | | 398 | } |
398 | | | 399 | |
399 | void | | 400 | void |
400 | omap_gpio_intr_unmask(void *cookie) | | 401 | omap_gpio_intr_unmask(void *cookie) |
401 | { | | 402 | { |
402 | struct omapgpio_softc *sc; | | 403 | struct omapgpio_softc *sc; |
403 | struct gpio_irq_handler *gh = cookie; | | 404 | struct gpio_irq_handler *gh = cookie; |
404 | uint32_t bit; | | 405 | uint32_t bit; |
405 | u_int gpio, relnum; | | 406 | u_int gpio, relnum; |
406 | | | 407 | |
407 | KDASSERT(cookie != NULL); | | 408 | KDASSERT(cookie != NULL); |
408 | | | 409 | |
409 | gpio = gh->gh_gpio; | | 410 | gpio = gh->gh_gpio; |
410 | sc = device_lookup_private(&omapgpio_cd, GPIO_MODULE(gpio)); | | 411 | sc = device_lookup_private(&omapgpio_cd, GPIO_MODULE(gpio)); |
411 | bit = GPIO_BIT(gpio); | | 412 | bit = GPIO_BIT(gpio); |
412 | relnum = GPIO_RELNUM(gpio); | | 413 | relnum = GPIO_RELNUM(gpio); |
| | | 414 | __USE(relnum); |
413 | | | 415 | |
414 | /* Enable interrupt generation for that pin. */ | | 416 | /* Enable interrupt generation for that pin. */ |
415 | bus_space_write_4(sc->sc_bust, sc->sc_bush, GPIO_SET_IRQENABLE, | | 417 | bus_space_write_4(sc->sc_bust, sc->sc_bush, GPIO_SET_IRQENABLE, |
416 | bit); | | 418 | bit); |
417 | | | 419 | |
418 | sc->sc_mask |= bit; | | 420 | sc->sc_mask |= bit; |
419 | } | | 421 | } |
420 | | | 422 | |
421 | void | | 423 | void |
422 | omap_gpio_intr_wakeup(void *cookie, int enable) | | 424 | omap_gpio_intr_wakeup(void *cookie, int enable) |
423 | { | | 425 | { |
424 | struct omapgpio_softc *sc; | | 426 | struct omapgpio_softc *sc; |
425 | struct gpio_irq_handler *gh = cookie; | | 427 | struct gpio_irq_handler *gh = cookie; |
426 | uint32_t bit; | | 428 | uint32_t bit; |
427 | u_int gpio, relnum; | | 429 | u_int gpio, relnum; |
428 | | | 430 | |
429 | KDASSERT(cookie != NULL); | | 431 | KDASSERT(cookie != NULL); |
430 | | | 432 | |
431 | gpio = gh->gh_gpio; | | 433 | gpio = gh->gh_gpio; |
432 | sc = device_lookup_private(&omapgpio_cd, GPIO_MODULE(gpio)); | | 434 | sc = device_lookup_private(&omapgpio_cd, GPIO_MODULE(gpio)); |
433 | bit = GPIO_BIT(gpio); | | 435 | bit = GPIO_BIT(gpio); |
434 | relnum = GPIO_RELNUM(gpio); | | 436 | relnum = GPIO_RELNUM(gpio); |
| | | 437 | __USE(relnum); |
435 | | | 438 | |
436 | if (enable) | | 439 | if (enable) |
437 | bus_space_write_4(sc->sc_bust, sc->sc_bush, | | 440 | bus_space_write_4(sc->sc_bust, sc->sc_bush, |
438 | GPIO_SET_WAKEUPENA, bit); | | 441 | GPIO_SET_WAKEUPENA, bit); |
439 | else | | 442 | else |
440 | bus_space_write_4(sc->sc_bust, sc->sc_bush, | | 443 | bus_space_write_4(sc->sc_bust, sc->sc_bush, |
441 | GPIO_CLEAR_WAKEUPENA, bit); | | 444 | GPIO_CLEAR_WAKEUPENA, bit); |
442 | } | | 445 | } |
443 | | | 446 | |
444 | static int | | 447 | static int |
445 | omapgpio_intr(void *arg) | | 448 | omapgpio_intr(void *arg) |
446 | { | | 449 | { |
447 | struct omapgpio_softc *sc = arg; | | 450 | struct omapgpio_softc *sc = arg; |