Sat Apr 28 18:26:53 2018 UTC ()

Cover all pic_maxsources lines for armgic_cpu_init_priorities() and
armgic_cpu_update_priorities().

Previously only the first 32 lines were covered, which is significantly
less than the 1000-some interrupt lines possible.

Only relevant to MULTIPROCESSOR configurations.


(jakllsch)

diff -r1.33 -r1.34 src/sys/arch/arm/cortex/gic.c

--- src/sys/arch/arm/cortex/gic.c 2018/04/01 04:35:04	1.33
+++ src/sys/arch/arm/cortex/gic.c 2018/04/28 18:26:53	1.34

 @@ -1,14 +1,14 @@
-/*	$NetBSD: gic.c,v 1.33 2018/04/01 04:35:04 ryo Exp $	*/
+/*	$NetBSD: gic.c,v 1.34 2018/04/28 18:26:53 jakllsch Exp $	*/
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Matt Thomas of 3am Software Foundry.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -24,27 +24,27 @@
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include "opt_ddb.h"
 #include "opt_multiprocessor.h"
 #define _INTR_PRIVATE
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.33 2018/04/01 04:35:04 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.34 2018/04/28 18:26:53 jakllsch Exp $");
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/cpu.h>
 #include <sys/device.h>
 #include <sys/evcnt.h>
 #include <sys/intr.h>
 #include <sys/proc.h>
 #include <arm/armreg.h>
 #include <arm/atomic.h>
 #include <arm/cpufunc.h>
 #include <arm/locore.h>
 @@ -392,37 +392,37 @@ armgic_establish_irq(struct pic_softc *p
 	 */
 	const bus_size_t priority_reg = GICD_IPRIORITYRn(is->is_irq / 4);
 	uint32_t priority = gicd_read(sc, priority_reg);
 	priority &= ~(0xff << byte_shift);
 	priority |= armgic_ipl_to_priority(is->is_ipl) << byte_shift;
 	gicd_write(sc, priority_reg, priority);
+}
 #ifdef MULTIPROCESSOR
 static void
 armgic_cpu_init_priorities(struct armgic_softc *sc)
+{
 	/* Set lowest priority, i.e. disable interrupts */
-	for (size_t i = 0; i < 32; i += 4) {
+	for (size_t i = 0; i < sc->sc_pic.pic_maxsources; i += 4) {
 		const bus_size_t priority_reg = GICD_IPRIORITYRn(i / 4);
 		gicd_write(sc, priority_reg, ~0);
+	}
+}
 static void
 armgic_cpu_update_priorities(struct armgic_softc *sc)
+{
 	uint32_t enabled = sc->sc_enabled_local;
-	for (size_t i = 0; i < 32; i += 4, enabled >>= 4) {
+	for (size_t i = 0; i < sc->sc_pic.pic_maxsources; i += 4, enabled >>= 4) {
 		const bus_size_t priority_reg = GICD_IPRIORITYRn(i / 4);
 		uint32_t priority = gicd_read(sc, priority_reg);
 		uint32_t byte_mask = 0xff;
 		size_t byte_shift = 0;
 		for (size_t j = 0; j < 4; j++, byte_mask <<= 8, byte_shift += 8) {
 			struct intrsource * const is = sc->sc_pic.pic_sources[i+j];
 			priority |= byte_mask;
 			if (is == NULL || is == &armgic_dummy_source)
 				continue;
 			priority &= ~byte_mask;
 			priority |= armgic_ipl_to_priority(is->is_ipl) << byte_shift;
+		}
 		gicd_write(sc, priority_reg, priority);