Rename ARM A9 Global Timer driver name to support fdt. - Rename a9tmr to arma9tmr. - Add a9tmr_fdt.c based gtmr_fdt.c.diff -r1.23 -r1.24 src/sys/arch/arm/broadcom/bcm53xx_board.c
(hkenken)
--- src/sys/arch/arm/broadcom/bcm53xx_board.c 2016/10/20 09:53:07 1.23
+++ src/sys/arch/arm/broadcom/bcm53xx_board.c 2018/06/05 08:03:28 1.24
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: bcm53xx_board.c,v 1.23 2016/10/20 09:53:07 skrll Exp $ */ | 1 | /* $NetBSD: bcm53xx_board.c,v 1.24 2018/06/05 08:03:28 hkenken Exp $ */ | |
2 | /*- | 2 | /*- | |
3 | * Copyright (c) 2012 The NetBSD Foundation, Inc. | 3 | * Copyright (c) 2012 The NetBSD Foundation, Inc. | |
4 | * All rights reserved. | 4 | * All rights reserved. | |
5 | * | 5 | * | |
6 | * This code is derived from software contributed to The NetBSD Foundation | 6 | * This code is derived from software contributed to The NetBSD Foundation | |
7 | * by Matt Thomas of 3am Software Foundry. | 7 | * by Matt Thomas of 3am Software Foundry. | |
8 | * | 8 | * | |
9 | * Redistribution and use in source and binary forms, with or without | 9 | * Redistribution and use in source and binary forms, with or without | |
10 | * modification, are permitted provided that the following conditions | 10 | * modification, are permitted provided that the following conditions | |
11 | * are met: | 11 | * are met: | |
12 | * 1. Redistributions of source code must retain the above copyright | 12 | * 1. Redistributions of source code must retain the above copyright | |
13 | * notice, this list of conditions and the following disclaimer. | 13 | * notice, this list of conditions and the following disclaimer. | |
14 | * 2. Redistributions in binary form must reproduce the above copyright | 14 | * 2. Redistributions in binary form must reproduce the above copyright | |
@@ -25,27 +25,27 @@ | @@ -25,27 +25,27 @@ | |||
25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | |
26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | |
27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
28 | * POSSIBILITY OF SUCH DAMAGE. | 28 | * POSSIBILITY OF SUCH DAMAGE. | |
29 | */ | 29 | */ | |
30 | 30 | |||
31 | #include "opt_broadcom.h" | 31 | #include "opt_broadcom.h" | |
32 | #include "arml2cc.h" | 32 | #include "arml2cc.h" | |
33 | 33 | |||
34 | #define _ARM32_BUS_DMA_PRIVATE | 34 | #define _ARM32_BUS_DMA_PRIVATE | |
35 | 35 | |||
36 | #include <sys/cdefs.h> | 36 | #include <sys/cdefs.h> | |
37 | 37 | |||
38 | __KERNEL_RCSID(1, "$NetBSD: bcm53xx_board.c,v 1.23 2016/10/20 09:53:07 skrll Exp $"); | 38 | __KERNEL_RCSID(1, "$NetBSD: bcm53xx_board.c,v 1.24 2018/06/05 08:03:28 hkenken Exp $"); | |
39 | 39 | |||
40 | #include <sys/param.h> | 40 | #include <sys/param.h> | |
41 | #include <sys/bus.h> | 41 | #include <sys/bus.h> | |
42 | #include <sys/cpu.h> | 42 | #include <sys/cpu.h> | |
43 | #include <sys/device.h> | 43 | #include <sys/device.h> | |
44 | 44 | |||
45 | #include <prop/proplib.h> | 45 | #include <prop/proplib.h> | |
46 | 46 | |||
47 | #include <net/if.h> | 47 | #include <net/if.h> | |
48 | #include <net/if_ether.h> | 48 | #include <net/if_ether.h> | |
49 | 49 | |||
50 | #define CCA_PRIVATE | 50 | #define CCA_PRIVATE | |
51 | #define CRU_PRIVATE | 51 | #define CRU_PRIVATE | |
@@ -605,27 +605,27 @@ bcm53xx_device_register(device_t self, v | @@ -605,27 +605,27 @@ bcm53xx_device_register(device_t self, v | |||
605 | * The iot mainbus supplies is completely wrong since it scales | 605 | * The iot mainbus supplies is completely wrong since it scales | |
606 | * addresses by 2. The simplest remedy is to replace with our | 606 | * addresses by 2. The simplest remedy is to replace with our | |
607 | * bus space used for the armcore registers (which armperiph uses). | 607 | * bus space used for the armcore registers (which armperiph uses). | |
608 | */ | 608 | */ | |
609 | struct mainbus_attach_args * const mb = aux; | 609 | struct mainbus_attach_args * const mb = aux; | |
610 | mb->mb_iot = bcm53xx_armcore_bst; | 610 | mb->mb_iot = bcm53xx_armcore_bst; | |
611 | return; | 611 | return; | |
612 | } | 612 | } | |
613 | 613 | |||
614 | /* | 614 | /* | |
615 | * We need to tell the A9 Global/Watchdog Timer | 615 | * We need to tell the A9 Global/Watchdog Timer | |
616 | * what frequency it runs at. | 616 | * what frequency it runs at. | |
617 | */ | 617 | */ | |
618 | if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) { | 618 | if (device_is_a(self, "arma9tmr") || device_is_a(self, "a9wdt")) { | |
619 | /* | 619 | /* | |
620 | * This clock always runs at (arm_clk div 2) and only goes | 620 | * This clock always runs at (arm_clk div 2) and only goes | |
621 | * to timers that are part of the A9 MP core subsystem. | 621 | * to timers that are part of the A9 MP core subsystem. | |
622 | */ | 622 | */ | |
623 | prop_dictionary_set_uint32(dict, "frequency", | 623 | prop_dictionary_set_uint32(dict, "frequency", | |
624 | cpu_softc.cpu_clk.clk_cpu / 2); | 624 | cpu_softc.cpu_clk.clk_cpu / 2); | |
625 | return; | 625 | return; | |
626 | } | 626 | } | |
627 | 627 | |||
628 | if (device_is_a(self, "bcmeth")) { | 628 | if (device_is_a(self, "bcmeth")) { | |
629 | const struct bcmccb_attach_args * const ccbaa = aux; | 629 | const struct bcmccb_attach_args * const ccbaa = aux; | |
630 | const uint8_t enaddr[ETHER_ADDR_LEN] = { | 630 | const uint8_t enaddr[ETHER_ADDR_LEN] = { | |
631 | 0x00, 0x01, 0x02, 0x03, 0x04, | 631 | 0x00, 0x01, 0x02, 0x03, 0x04, |
--- src/sys/arch/arm/cortex/a9tmr.c 2015/07/24 05:20:01 1.14
+++ src/sys/arch/arm/cortex/a9tmr.c 2018/06/05 08:03:28 1.15
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: a9tmr.c,v 1.14 2015/07/24 05:20:01 ryo Exp $ */ | 1 | /* $NetBSD: a9tmr.c,v 1.15 2018/06/05 08:03:28 hkenken Exp $ */ | |
2 | 2 | |||
3 | /*- | 3 | /*- | |
4 | * Copyright (c) 2012 The NetBSD Foundation, Inc. | 4 | * Copyright (c) 2012 The NetBSD Foundation, Inc. | |
5 | * All rights reserved. | 5 | * All rights reserved. | |
6 | * | 6 | * | |
7 | * This code is derived from software contributed to The NetBSD Foundation | 7 | * This code is derived from software contributed to The NetBSD Foundation | |
8 | * by Matt Thomas | 8 | * by Matt Thomas | |
9 | * | 9 | * | |
10 | * Redistribution and use in source and binary forms, with or without | 10 | * Redistribution and use in source and binary forms, with or without | |
11 | * modification, are permitted provided that the following conditions | 11 | * modification, are permitted provided that the following conditions | |
12 | * are met: | 12 | * are met: | |
13 | * 1. Redistributions of source code must retain the above copyright | 13 | * 1. Redistributions of source code must retain the above copyright | |
14 | * notice, this list of conditions and the following disclaimer. | 14 | * notice, this list of conditions and the following disclaimer. | |
@@ -20,66 +20,64 @@ | @@ -20,66 +20,64 @@ | |||
20 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | 20 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | |
21 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | 21 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | |
22 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS | 22 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS | |
23 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | 23 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
24 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | 24 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
25 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | 25 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | |
26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | 26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | |
27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | 27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | |
28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | 28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
29 | * POSSIBILITY OF SUCH DAMAGE. | 29 | * POSSIBILITY OF SUCH DAMAGE. | |
30 | */ | 30 | */ | |
31 | 31 | |||
32 | #include <sys/cdefs.h> | 32 | #include <sys/cdefs.h> | |
33 | __KERNEL_RCSID(0, "$NetBSD: a9tmr.c,v 1.14 2015/07/24 05:20:01 ryo Exp $"); | 33 | __KERNEL_RCSID(0, "$NetBSD: a9tmr.c,v 1.15 2018/06/05 08:03:28 hkenken Exp $"); | |
34 | 34 | |||
35 | #include <sys/param.h> | 35 | #include <sys/param.h> | |
36 | #include <sys/bus.h> | 36 | #include <sys/bus.h> | |
37 | #include <sys/device.h> | 37 | #include <sys/device.h> | |
38 | #include <sys/intr.h> | 38 | #include <sys/intr.h> | |
39 | #include <sys/kernel.h> | 39 | #include <sys/kernel.h> | |
40 | #include <sys/proc.h> | 40 | #include <sys/proc.h> | |
41 | #include <sys/systm.h> | 41 | #include <sys/systm.h> | |
42 | #include <sys/timetc.h> | 42 | #include <sys/timetc.h> | |
43 | #include <sys/xcall.h> | 43 | #include <sys/xcall.h> | |
44 | 44 | |||
45 | #include <prop/proplib.h> | 45 | #include <prop/proplib.h> | |
46 | 46 | |||
47 | #include <arm/cortex/a9tmr_reg.h> | 47 | #include <arm/cortex/a9tmr_reg.h> | |
48 | #include <arm/cortex/a9tmr_var.h> | 48 | #include <arm/cortex/a9tmr_var.h> | |
49 | 49 | |||
50 | #include <arm/cortex/mpcore_var.h> | 50 | #include <arm/cortex/mpcore_var.h> | |
51 | 51 | |||
52 | static int a9tmr_match(device_t, cfdata_t, void *); | 52 | static int a9tmr_match(device_t, cfdata_t, void *); | |
53 | static void a9tmr_attach(device_t, device_t, void *); | 53 | static void a9tmr_attach(device_t, device_t, void *); | |
54 | 54 | |||
55 | static int clockhandler(void *); | |||
56 | ||||
57 | static u_int a9tmr_get_timecount(struct timecounter *); | 55 | static u_int a9tmr_get_timecount(struct timecounter *); | |
58 | 56 | |||
59 | static struct a9tmr_softc a9tmr_sc; | 57 | static struct a9tmr_softc a9tmr_sc; | |
60 | 58 | |||
61 | static struct timecounter a9tmr_timecounter = { | 59 | static struct timecounter a9tmr_timecounter = { | |
62 | .tc_get_timecount = a9tmr_get_timecount, | 60 | .tc_get_timecount = a9tmr_get_timecount, | |
63 | .tc_poll_pps = 0, | 61 | .tc_poll_pps = 0, | |
64 | .tc_counter_mask = ~0u, | 62 | .tc_counter_mask = ~0u, | |
65 | .tc_frequency = 0, /* set by cpu_initclocks() */ | 63 | .tc_frequency = 0, /* set by cpu_initclocks() */ | |
66 | .tc_name = NULL, /* set by attach */ | 64 | .tc_name = NULL, /* set by attach */ | |
67 | .tc_quality = 500, | 65 | .tc_quality = 500, | |
68 | .tc_priv = &a9tmr_sc, | 66 | .tc_priv = &a9tmr_sc, | |
69 | .tc_next = NULL, | 67 | .tc_next = NULL, | |
70 | }; | 68 | }; | |
71 | 69 | |||
72 | CFATTACH_DECL_NEW(a9tmr, 0, a9tmr_match, a9tmr_attach, NULL, NULL); | 70 | CFATTACH_DECL_NEW(arma9tmr, 0, a9tmr_match, a9tmr_attach, NULL, NULL); | |
73 | 71 | |||
74 | static inline uint32_t | 72 | static inline uint32_t | |
75 | a9tmr_global_read(struct a9tmr_softc *sc, bus_size_t o) | 73 | a9tmr_global_read(struct a9tmr_softc *sc, bus_size_t o) | |
76 | { | 74 | { | |
77 | return bus_space_read_4(sc->sc_memt, sc->sc_global_memh, o); | 75 | return bus_space_read_4(sc->sc_memt, sc->sc_global_memh, o); | |
78 | } | 76 | } | |
79 | 77 | |||
80 | static inline void | 78 | static inline void | |
81 | a9tmr_global_write(struct a9tmr_softc *sc, bus_size_t o, uint32_t v) | 79 | a9tmr_global_write(struct a9tmr_softc *sc, bus_size_t o, uint32_t v) | |
82 | { | 80 | { | |
83 | bus_space_write_4(sc->sc_memt, sc->sc_global_memh, o, v); | 81 | bus_space_write_4(sc->sc_memt, sc->sc_global_memh, o, v); | |
84 | } | 82 | } | |
85 | 83 | |||
@@ -116,59 +114,64 @@ a9tmr_match(device_t parent, cfdata_t cf | @@ -116,59 +114,64 @@ a9tmr_match(device_t parent, cfdata_t cf | |||
116 | static void | 114 | static void | |
117 | a9tmr_attach(device_t parent, device_t self, void *aux) | 115 | a9tmr_attach(device_t parent, device_t self, void *aux) | |
118 | { | 116 | { | |
119 | struct a9tmr_softc *sc = &a9tmr_sc; | 117 | struct a9tmr_softc *sc = &a9tmr_sc; | |
120 | struct mpcore_attach_args * const mpcaa = aux; | 118 | struct mpcore_attach_args * const mpcaa = aux; | |
121 | prop_dictionary_t dict = device_properties(self); | 119 | prop_dictionary_t dict = device_properties(self); | |
122 | char freqbuf[sizeof("XXX SHz")]; | 120 | char freqbuf[sizeof("XXX SHz")]; | |
123 | const char *cpu_type; | 121 | const char *cpu_type; | |
124 | 122 | |||
125 | /* | 123 | /* | |
126 | * This runs at the ARM PERIPHCLOCK which should be 1/2 of the CPU clock. | 124 | * This runs at the ARM PERIPHCLOCK which should be 1/2 of the CPU clock. | |
127 | * The MD code should have setup our frequency for us. | 125 | * The MD code should have setup our frequency for us. | |
128 | */ | 126 | */ | |
129 | prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq); | 127 | if (!prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq)) { | |
128 | dict = device_properties(parent); | |||
129 | prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq); | |||
130 | } | |||
130 | 131 | |||
131 | humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000); | 132 | humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000); | |
132 | 133 | |||
133 | aprint_naive("\n"); | 134 | aprint_naive("\n"); | |
134 | if (CPU_ID_CORTEX_A5_P(curcpu()->ci_arm_cpuid)) { | 135 | if (CPU_ID_CORTEX_A5_P(curcpu()->ci_arm_cpuid)) { | |
135 | cpu_type = "A5"; | 136 | cpu_type = "A5"; | |
136 | } else { | 137 | } else { | |
137 | cpu_type = "A9"; | 138 | cpu_type = "A9"; | |
138 | } | 139 | } | |
139 | aprint_normal(": %s Global 64-bit Timer (%s)\n", cpu_type, freqbuf); | 140 | aprint_normal(": %s Global 64-bit Timer (%s)\n", cpu_type, freqbuf); | |
140 | 141 | |||
141 | self->dv_private = sc; | 142 | self->dv_private = sc; | |
142 | sc->sc_dev = self; | 143 | sc->sc_dev = self; | |
143 | sc->sc_memt = mpcaa->mpcaa_memt; | 144 | sc->sc_memt = mpcaa->mpcaa_memt; | |
144 | sc->sc_memh = mpcaa->mpcaa_memh; | 145 | sc->sc_memh = mpcaa->mpcaa_memh; | |
145 | 146 | |||
146 | evcnt_attach_dynamic(&sc->sc_ev_missing_ticks, EVCNT_TYPE_MISC, NULL, | 147 | evcnt_attach_dynamic(&sc->sc_ev_missing_ticks, EVCNT_TYPE_MISC, NULL, | |
147 | device_xname(self), "missing interrupts"); | 148 | device_xname(self), "missing interrupts"); | |
148 | 149 | |||
149 | bus_space_subregion(sc->sc_memt, sc->sc_memh, | 150 | bus_space_subregion(sc->sc_memt, sc->sc_memh, | |
150 | TMR_GLOBAL_BASE, TMR_GLOBAL_SIZE, &sc->sc_global_memh); | 151 | TMR_GLOBAL_BASE, TMR_GLOBAL_SIZE, &sc->sc_global_memh); | |
151 | bus_space_subregion(sc->sc_memt, sc->sc_memh, | 152 | bus_space_subregion(sc->sc_memt, sc->sc_memh, | |
152 | TMR_PRIVATE_BASE, TMR_PRIVATE_SIZE, &sc->sc_private_memh); | 153 | TMR_PRIVATE_BASE, TMR_PRIVATE_SIZE, &sc->sc_private_memh); | |
153 | bus_space_subregion(sc->sc_memt, sc->sc_memh, | 154 | bus_space_subregion(sc->sc_memt, sc->sc_memh, | |
154 | TMR_WDOG_BASE, TMR_WDOG_SIZE, &sc->sc_wdog_memh); | 155 | TMR_WDOG_BASE, TMR_WDOG_SIZE, &sc->sc_wdog_memh); | |
155 | 156 | |||
156 | sc->sc_global_ih = intr_establish(IRQ_A9TMR_PPI_GTIMER, IPL_CLOCK, | 157 | if (mpcaa->mpcaa_irq != -1) { | |
157 | IST_EDGE | IST_MPSAFE, clockhandler, NULL); | 158 | sc->sc_global_ih = intr_establish(mpcaa->mpcaa_irq, IPL_CLOCK, | |
158 | if (sc->sc_global_ih == NULL) | 159 | IST_EDGE | IST_MPSAFE, a9tmr_intr, NULL); | |
159 | panic("%s: unable to register timer interrupt", __func__); | 160 | if (sc->sc_global_ih == NULL) | |
160 | aprint_normal_dev(sc->sc_dev, "interrupting on irq %d\n", | 161 | panic("%s: unable to register timer interrupt", __func__); | |
161 | IRQ_A9TMR_PPI_GTIMER); | 162 | aprint_normal_dev(sc->sc_dev, "interrupting on irq %d\n", | |
163 | mpcaa->mpcaa_irq); | |||
164 | } | |||
162 | } | 165 | } | |
163 | 166 | |||
164 | static inline uint64_t | 167 | static inline uint64_t | |
165 | a9tmr_gettime(struct a9tmr_softc *sc) | 168 | a9tmr_gettime(struct a9tmr_softc *sc) | |
166 | { | 169 | { | |
167 | uint32_t lo, hi; | 170 | uint32_t lo, hi; | |
168 | 171 | |||
169 | do { | 172 | do { | |
170 | hi = a9tmr_global_read(sc, TMR_GBL_CTR_U); | 173 | hi = a9tmr_global_read(sc, TMR_GBL_CTR_U); | |
171 | lo = a9tmr_global_read(sc, TMR_GBL_CTR_L); | 174 | lo = a9tmr_global_read(sc, TMR_GBL_CTR_L); | |
172 | } while (hi != a9tmr_global_read(sc, TMR_GBL_CTR_U)); | 175 | } while (hi != a9tmr_global_read(sc, TMR_GBL_CTR_U)); | |
173 | 176 | |||
174 | return ((uint64_t)hi << 32) | lo; | 177 | return ((uint64_t)hi << 32) | lo; | |
@@ -231,27 +234,27 @@ a9tmr_init_cpu_clock(struct cpu_info *ci | @@ -231,27 +234,27 @@ a9tmr_init_cpu_clock(struct cpu_info *ci | |||
231 | printf("%s: %s: status %#x cmp %#x%08x now %#"PRIx64"\n", | 234 | printf("%s: %s: status %#x cmp %#x%08x now %#"PRIx64"\n", | |
232 | __func__, ci->ci_data.cpu_name, | 235 | __func__, ci->ci_data.cpu_name, | |
233 | a9tmr_global_read(sc, TMR_GBL_INT), | 236 | a9tmr_global_read(sc, TMR_GBL_INT), | |
234 | a9tmr_global_read(sc, TMR_GBL_CMP_H), | 237 | a9tmr_global_read(sc, TMR_GBL_CMP_H), | |
235 | a9tmr_global_read(sc, TMR_GBL_CMP_L), | 238 | a9tmr_global_read(sc, TMR_GBL_CMP_L), | |
236 | a9tmr_gettime(sc)); | 239 | a9tmr_gettime(sc)); | |
237 | splx(s); | 240 | splx(s); | |
238 | #elif 0 | 241 | #elif 0 | |
239 | delay(1000000 / hz + 1000); | 242 | delay(1000000 / hz + 1000); | |
240 | #endif | 243 | #endif | |
241 | } | 244 | } | |
242 | 245 | |||
243 | void | 246 | void | |
244 | cpu_initclocks(void) | 247 | a9tmr_cpu_initclocks(void) | |
245 | { | 248 | { | |
246 | struct a9tmr_softc * const sc = &a9tmr_sc; | 249 | struct a9tmr_softc * const sc = &a9tmr_sc; | |
247 | 250 | |||
248 | KASSERT(sc->sc_dev != NULL); | 251 | KASSERT(sc->sc_dev != NULL); | |
249 | KASSERT(sc->sc_freq != 0); | 252 | KASSERT(sc->sc_freq != 0); | |
250 | 253 | |||
251 | sc->sc_autoinc = sc->sc_freq / hz; | 254 | sc->sc_autoinc = sc->sc_freq / hz; | |
252 | 255 | |||
253 | a9tmr_init_cpu_clock(curcpu()); | 256 | a9tmr_init_cpu_clock(curcpu()); | |
254 | 257 | |||
255 | a9tmr_timecounter.tc_name = device_xname(sc->sc_dev); | 258 | a9tmr_timecounter.tc_name = device_xname(sc->sc_dev); | |
256 | a9tmr_timecounter.tc_frequency = sc->sc_freq; | 259 | a9tmr_timecounter.tc_frequency = sc->sc_freq; | |
257 | 260 | |||
@@ -302,32 +305,32 @@ a9tmr_delay(unsigned int n) | @@ -302,32 +305,32 @@ a9tmr_delay(unsigned int n) | |||
302 | */ | 305 | */ | |
303 | const uint64_t incr_per_us = (freq >> 20) + (freq >> 24); | 306 | const uint64_t incr_per_us = (freq >> 20) + (freq >> 24); | |
304 | 307 | |||
305 | const uint64_t delta = n * incr_per_us; | 308 | const uint64_t delta = n * incr_per_us; | |
306 | const uint64_t base = a9tmr_gettime(sc); | 309 | const uint64_t base = a9tmr_gettime(sc); | |
307 | const uint64_t finish = base + delta; | 310 | const uint64_t finish = base + delta; | |
308 | 311 | |||
309 | while (a9tmr_gettime(sc) < finish) { | 312 | while (a9tmr_gettime(sc) < finish) { | |
310 | /* spin */ | 313 | /* spin */ | |
311 | } | 314 | } | |
312 | } | 315 | } | |
313 | 316 | |||
314 | /* | 317 | /* | |
315 | * clockhandler: | 318 | * a9tmr_intr: | |
316 | * | 319 | * | |
317 | * Handle the hardclock interrupt. | 320 | * Handle the hardclock interrupt. | |
318 | */ | 321 | */ | |
319 | static int | 322 | int | |
320 | clockhandler(void *arg) | 323 | a9tmr_intr(void *arg) | |
321 | { | 324 | { | |
322 | struct clockframe * const cf = arg; | 325 | struct clockframe * const cf = arg; | |
323 | struct a9tmr_softc * const sc = &a9tmr_sc; | 326 | struct a9tmr_softc * const sc = &a9tmr_sc; | |
324 | struct cpu_info * const ci = curcpu(); | 327 | struct cpu_info * const ci = curcpu(); | |
325 | 328 | |||
326 | const uint64_t now = a9tmr_gettime(sc); | 329 | const uint64_t now = a9tmr_gettime(sc); | |
327 | uint64_t delta = now - ci->ci_lastintr; | 330 | uint64_t delta = now - ci->ci_lastintr; | |
328 | 331 | |||
329 | a9tmr_global_write(sc, TMR_GBL_INT, 1); /* Ack the interrupt */ | 332 | a9tmr_global_write(sc, TMR_GBL_INT, 1); /* Ack the interrupt */ | |
330 | 333 | |||
331 | #if 0 | 334 | #if 0 | |
332 | printf("%s(%p): %s: now %#"PRIx64" delta %"PRIu64"\n", | 335 | printf("%s(%p): %s: now %#"PRIx64" delta %"PRIu64"\n", | |
333 | __func__, cf, ci->ci_data.cpu_name, now, delta); | 336 | __func__, cf, ci->ci_data.cpu_name, now, delta); |
--- src/sys/arch/arm/cortex/a9tmr_var.h 2015/01/02 21:58:03 1.4
+++ src/sys/arch/arm/cortex/a9tmr_var.h 2018/06/05 08:03:28 1.5
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: a9tmr_var.h,v 1.4 2015/01/02 21:58:03 jmcneill Exp $ */ | 1 | /* $NetBSD: a9tmr_var.h,v 1.5 2018/06/05 08:03:28 hkenken Exp $ */ | |
2 | /*- | 2 | /*- | |
3 | * Copyright (c) 2012 The NetBSD Foundation, Inc. | 3 | * Copyright (c) 2012 The NetBSD Foundation, Inc. | |
4 | * All rights reserved. | 4 | * All rights reserved. | |
5 | * | 5 | * | |
6 | * This code is derived from software contributed to The NetBSD Foundation | 6 | * This code is derived from software contributed to The NetBSD Foundation | |
7 | * by Matt Thomas of 3am Software Foundry. | 7 | * by Matt Thomas of 3am Software Foundry. | |
8 | * | 8 | * | |
9 | * Redistribution and use in source and binary forms, with or without | 9 | * Redistribution and use in source and binary forms, with or without | |
10 | * modification, are permitted provided that the following conditions | 10 | * modification, are permitted provided that the following conditions | |
11 | * are met: | 11 | * are met: | |
12 | * 1. Redistributions of source code must retain the above copyright | 12 | * 1. Redistributions of source code must retain the above copyright | |
13 | * notice, this list of conditions and the following disclaimer. | 13 | * notice, this list of conditions and the following disclaimer. | |
14 | * 2. Redistributions in binary form must reproduce the above copyright | 14 | * 2. Redistributions in binary form must reproduce the above copyright | |
@@ -35,20 +35,27 @@ struct a9tmr_softc { | @@ -35,20 +35,27 @@ struct a9tmr_softc { | |||
35 | device_t sc_dev; | 35 | device_t sc_dev; | |
36 | bus_space_tag_t sc_memt; | 36 | bus_space_tag_t sc_memt; | |
37 | bus_space_handle_t sc_memh; | 37 | bus_space_handle_t sc_memh; | |
38 | bus_space_handle_t sc_global_memh; | 38 | bus_space_handle_t sc_global_memh; | |
39 | bus_space_handle_t sc_private_memh; | 39 | bus_space_handle_t sc_private_memh; | |
40 | bus_space_handle_t sc_wdog_memh; | 40 | bus_space_handle_t sc_wdog_memh; | |
41 | struct evcnt sc_ev_missing_ticks; | 41 | struct evcnt sc_ev_missing_ticks; | |
42 | uint32_t sc_freq; | 42 | uint32_t sc_freq; | |
43 | u_long sc_autoinc; | 43 | u_long sc_autoinc; | |
44 | void *sc_global_ih; | 44 | void *sc_global_ih; | |
45 | }; | 45 | }; | |
46 | 46 | |||
47 | #ifdef _KERNEL | 47 | #ifdef _KERNEL | |
48 | #include "opt_arm_timer.h" | |||
48 | struct cpu_info; | 49 | struct cpu_info; | |
49 | void a9tmr_init_cpu_clock(struct cpu_info *); | 50 | void a9tmr_init_cpu_clock(struct cpu_info *); | |
51 | #ifdef __HAVE_GENERIC_CPU_INITCLOCKS | |||
52 | void a9tmr_cpu_initclocks(void); | |||
53 | #else | |||
54 | #define a9tmr_cpu_initclocks cpu_initclocks | |||
55 | #endif | |||
56 | int a9tmr_intr(void *); | |||
50 | void a9tmr_update_freq(uint32_t); | 57 | void a9tmr_update_freq(uint32_t); | |
51 | void a9tmr_delay(unsigned int n); | 58 | void a9tmr_delay(unsigned int n); | |
52 | #endif | 59 | #endif | |
53 | 60 | |||
54 | #endif /* _ARM_CORTEX_A9TMR_VAR_ */ | 61 | #endif /* _ARM_CORTEX_A9TMR_VAR_ */ |
--- src/sys/arch/arm/cortex/armperiph.c 2017/12/29 11:06:26 1.12
+++ src/sys/arch/arm/cortex/armperiph.c 2018/06/05 08:03:28 1.13
@@ -21,27 +21,27 @@ | @@ -21,27 +21,27 @@ | |||
21 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | 21 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
22 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | 22 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
23 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | 23 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | |
24 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | 24 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | |
25 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | 25 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | |
26 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | 26 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
27 | * POSSIBILITY OF SUCH DAMAGE. | 27 | * POSSIBILITY OF SUCH DAMAGE. | |
28 | */ | 28 | */ | |
29 | 29 | |||
30 | #include "locators.h" | 30 | #include "locators.h" | |
31 | 31 | |||
32 | #include <sys/cdefs.h> | 32 | #include <sys/cdefs.h> | |
33 | 33 | |||
34 | __KERNEL_RCSID(1, "$NetBSD: armperiph.c,v 1.12 2017/12/29 11:06:26 skrll Exp $"); | 34 | __KERNEL_RCSID(1, "$NetBSD: armperiph.c,v 1.13 2018/06/05 08:03:28 hkenken Exp $"); | |
35 | 35 | |||
36 | #include <sys/param.h> | 36 | #include <sys/param.h> | |
37 | #include <sys/device.h> | 37 | #include <sys/device.h> | |
38 | #include <sys/lwp.h> | 38 | #include <sys/lwp.h> | |
39 | 39 | |||
40 | #include "ioconf.h" | 40 | #include "ioconf.h" | |
41 | 41 | |||
42 | #include <arm/mainbus/mainbus.h> | 42 | #include <arm/mainbus/mainbus.h> | |
43 | #include <arm/cortex/mpcore_var.h> | 43 | #include <arm/cortex/mpcore_var.h> | |
44 | #include <arm/cortex/gtmr_intr.h> | 44 | #include <arm/cortex/gtmr_intr.h> | |
45 | 45 | |||
46 | static int armperiph_match(device_t, cfdata_t, void *); | 46 | static int armperiph_match(device_t, cfdata_t, void *); | |
47 | static void armperiph_attach(device_t, device_t, void *); | 47 | static void armperiph_attach(device_t, device_t, void *); | |
@@ -52,50 +52,50 @@ struct armperiph_softc { | @@ -52,50 +52,50 @@ struct armperiph_softc { | |||
52 | device_t sc_dev; | 52 | device_t sc_dev; | |
53 | bus_space_tag_t sc_memt; | 53 | bus_space_tag_t sc_memt; | |
54 | bus_space_handle_t sc_memh; | 54 | bus_space_handle_t sc_memh; | |
55 | }; | 55 | }; | |
56 | 56 | |||
57 | struct armperiph_info { | 57 | struct armperiph_info { | |
58 | const char pi_name[12]; | 58 | const char pi_name[12]; | |
59 | bus_size_t pi_off1; | 59 | bus_size_t pi_off1; | |
60 | bus_size_t pi_off2; | 60 | bus_size_t pi_off2; | |
61 | }; | 61 | }; | |
62 | 62 | |||
63 | #ifdef CPU_CORTEXA5 | 63 | #ifdef CPU_CORTEXA5 | |
64 | static const struct armperiph_info a5_devices[] = { | 64 | static const struct armperiph_info a5_devices[] = { | |
65 | { "armscu", 0x0000, 0 }, | 65 | { "armscu", 0x0000, 0 }, | |
66 | { "armgic", 0x1000, 0x0100 }, | 66 | { "armgic", 0x1000, 0x0100 }, | |
67 | { "a9tmr", 0x0200, 0 }, | 67 | { "arma9tmr", 0x0200, 0 }, | |
68 | { "a9wdt", 0x0600, 0 }, | 68 | { "a9wdt", 0x0600, 0 }, | |
69 | { "arml2cc", 0, 0 }, /* external; needs "offset" property */ | 69 | { "arml2cc", 0, 0 }, /* external; needs "offset" property */ | |
70 | { "", 0, 0 }, | 70 | { "", 0, 0 }, | |
71 | }; | 71 | }; | |
72 | #endif | 72 | #endif | |
73 | 73 | |||
74 | #ifdef CPU_CORTEXA7 | 74 | #ifdef CPU_CORTEXA7 | |
75 | static const struct armperiph_info a7_devices[] = { | 75 | static const struct armperiph_info a7_devices[] = { | |
76 | { "armgic", 0x1000, 0x2000 }, | 76 | { "armgic", 0x1000, 0x2000 }, | |
77 | { "armgtmr", 0, 0 }, | 77 | { "armgtmr", 0, 0 }, | |
78 | { "", 0, 0 }, | 78 | { "", 0, 0 }, | |
79 | }; | 79 | }; | |
80 | #endif | 80 | #endif | |
81 | 81 | |||
82 | #ifdef CPU_CORTEXA9 | 82 | #ifdef CPU_CORTEXA9 | |
83 | static const struct armperiph_info a9_devices[] = { | 83 | static const struct armperiph_info a9_devices[] = { | |
84 | { "armscu", 0x0000, 0 }, | 84 | { "armscu", 0x0000, 0 }, | |
85 | { "arml2cc", 0x2000, 0 }, | 85 | { "arml2cc", 0x2000, 0 }, | |
86 | { "armgic", 0x1000, 0x0100 }, | 86 | { "armgic", 0x1000, 0x0100 }, | |
87 | { "a9tmr", 0x0200, 0 }, | 87 | { "arma9tmr", 0x0200, 0 }, | |
88 | { "a9wdt", 0x0600, 0 }, | 88 | { "a9wdt", 0x0600, 0 }, | |
89 | { "", 0, 0 }, | 89 | { "", 0, 0 }, | |
90 | }; | 90 | }; | |
91 | #endif | 91 | #endif | |
92 | 92 | |||
93 | #ifdef CPU_CORTEXA15 | 93 | #ifdef CPU_CORTEXA15 | |
94 | static const struct armperiph_info a15_devices[] = { | 94 | static const struct armperiph_info a15_devices[] = { | |
95 | { "armgic", 0x1000, 0x2000 }, | 95 | { "armgic", 0x1000, 0x2000 }, | |
96 | { "armgtmr", 0, 0 }, | 96 | { "armgtmr", 0, 0 }, | |
97 | { "", 0, 0 }, | 97 | { "", 0, 0 }, | |
98 | }; | 98 | }; | |
99 | #endif | 99 | #endif | |
100 | 100 | |||
101 | #ifdef CPU_CORTEXA17 | 101 | #ifdef CPU_CORTEXA17 | |
@@ -219,23 +219,27 @@ armperiph_attach(device_t parent, device | @@ -219,23 +219,27 @@ armperiph_attach(device_t parent, device | |||
219 | aprint_normal("\n"); | 219 | aprint_normal("\n"); | |
220 | 220 | |||
221 | /* | 221 | /* | |
222 | * Let's try to attach any children we may have. | 222 | * Let's try to attach any children we may have. | |
223 | */ | 223 | */ | |
224 | for (size_t i = 0; cfg->cfg_devices[i].pi_name[0] != 0; i++) { | 224 | for (size_t i = 0; cfg->cfg_devices[i].pi_name[0] != 0; i++) { | |
225 | struct mpcore_attach_args mpcaa = { | 225 | struct mpcore_attach_args mpcaa = { | |
226 | .mpcaa_name = cfg->cfg_devices[i].pi_name, | 226 | .mpcaa_name = cfg->cfg_devices[i].pi_name, | |
227 | .mpcaa_memt = sc->sc_memt, | 227 | .mpcaa_memt = sc->sc_memt, | |
228 | .mpcaa_memh = sc->sc_memh, | 228 | .mpcaa_memh = sc->sc_memh, | |
229 | .mpcaa_off1 = cfg->cfg_devices[i].pi_off1, | 229 | .mpcaa_off1 = cfg->cfg_devices[i].pi_off1, | |
230 | .mpcaa_off2 = cfg->cfg_devices[i].pi_off2, | 230 | .mpcaa_off2 = cfg->cfg_devices[i].pi_off2, | |
231 | }; | 231 | }; | |
232 | #if defined(CPU_CORTEXA9) | |||
233 | if (strcmp(mpcaa.mpcaa_name, "arma9tmr") == 0) | |||
234 | mpcaa.mpcaa_irq = IRQ_A9TMR_PPI_GTIMER; | |||
235 | #endif | |||
232 | #if defined(CPU_CORTEXA7) || defined(CPU_CORTEXA15) || defined(CPU_CORTEXA57) | 236 | #if defined(CPU_CORTEXA7) || defined(CPU_CORTEXA15) || defined(CPU_CORTEXA57) | |
233 | if (strcmp(mpcaa.mpcaa_name, "armgtmr") == 0) { | 237 | if (strcmp(mpcaa.mpcaa_name, "armgtmr") == 0) { | |
234 | mpcaa.mpcaa_irq = IRQ_GTMR_PPI_VTIMER; | 238 | mpcaa.mpcaa_irq = IRQ_GTMR_PPI_VTIMER; | |
235 | } | 239 | } | |
236 | #endif | 240 | #endif | |
237 | 241 | |||
238 | config_found(self, &mpcaa, NULL); | 242 | config_found(self, &mpcaa, NULL); | |
239 | } | 243 | } | |
240 | attached = true; | 244 | attached = true; | |
241 | } | 245 | } |
--- src/sys/arch/arm/cortex/files.cortex 2017/05/28 00:32:46 1.6
+++ src/sys/arch/arm/cortex/files.cortex 2018/06/05 08:03:28 1.7
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | # $NetBSD: files.cortex,v 1.6 2017/05/28 00:32:46 jmcneill Exp $ | 1 | # $NetBSD: files.cortex,v 1.7 2018/06/05 08:03:28 hkenken Exp $ | |
2 | 2 | |||
3 | defflag opt_cpu_in_cksum.h NEON_IN_CKSUM | 3 | defflag opt_cpu_in_cksum.h NEON_IN_CKSUM | |
4 | 4 | |||
5 | file arch/arm/cortex/cpu_in_cksum_neon.c (inet | inet6) & neon_in_cksum | 5 | file arch/arm/cortex/cpu_in_cksum_neon.c (inet | inet6) & neon_in_cksum | |
6 | file arch/arm/cortex/cpu_in_cksum_asm_neon.S (inet | inet6) & neon_in_cksum | 6 | file arch/arm/cortex/cpu_in_cksum_asm_neon.S (inet | inet6) & neon_in_cksum | |
7 | 7 | |||
8 | define mpcorebus {} | 8 | define mpcorebus {} | |
9 | 9 | |||
10 | device armperiph: mpcorebus | 10 | device armperiph: mpcorebus | |
11 | attach armperiph at mainbus | 11 | attach armperiph at mainbus | |
12 | file arch/arm/cortex/armperiph.c armperiph | 12 | file arch/arm/cortex/armperiph.c armperiph | |
13 | 13 | |||
14 | # ARM Generic Interrupt Controller (initially on Cortex-A9) | 14 | # ARM Generic Interrupt Controller (initially on Cortex-A9) | |
@@ -17,21 +17,21 @@ attach armgic at mpcorebus | @@ -17,21 +17,21 @@ attach armgic at mpcorebus | |||
17 | file arch/arm/cortex/gic.c armgic | 17 | file arch/arm/cortex/gic.c armgic | |
18 | 18 | |||
19 | # ARM PL310 L2 Cache Controller(initially on Cortex-A9) | 19 | # ARM PL310 L2 Cache Controller(initially on Cortex-A9) | |
20 | device arml2cc | 20 | device arml2cc | |
21 | attach arml2cc at mpcorebus | 21 | attach arml2cc at mpcorebus | |
22 | file arch/arm/cortex/pl310.c arml2cc needs-flag | 22 | file arch/arm/cortex/pl310.c arml2cc needs-flag | |
23 | 23 | |||
24 | # ARMv7 Generic Timer | 24 | # ARMv7 Generic Timer | |
25 | device armgtmr | 25 | device armgtmr | |
26 | attach armgtmr at mpcorebus | 26 | attach armgtmr at mpcorebus | |
27 | file arch/arm/cortex/gtmr.c armgtmr | 27 | file arch/arm/cortex/gtmr.c armgtmr | |
28 | 28 | |||
29 | # A9 MPCore Global Timer | 29 | # A9 MPCore Global Timer | |
30 | device a9tmr | 30 | device arma9tmr | |
31 | attach a9tmr at mpcorebus | 31 | attach arma9tmr at mpcorebus | |
32 | file arch/arm/cortex/a9tmr.c a9tmr | 32 | file arch/arm/cortex/a9tmr.c arma9tmr | |
33 | 33 | |||
34 | # A9 MPcore Watchdog Timer | 34 | # A9 MPcore Watchdog Timer | |
35 | device a9wdt: sysmon_wdog | 35 | device a9wdt: sysmon_wdog | |
36 | attach a9wdt at mpcorebus | 36 | attach a9wdt at mpcorebus | |
37 | file arch/arm/cortex/a9wdt.c a9wdt | 37 | file arch/arm/cortex/a9wdt.c a9wdt |
/* $NetBSD: a9tmr_fdt.c,v 1.1 2018/06/05 08:03:28 hkenken Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: a9tmr_fdt.c,v 1.1 2018/06/05 08:03:28 hkenken Exp $");
#include <sys/param.h>
#include <sys/bus.h>
#include <sys/device.h>
#include <sys/intr.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/kmem.h>
#include <arm/cortex/a9tmr_intr.h>
#include <arm/cortex/mpcore_var.h>
#include <arm/cortex/a9tmr_var.h>
#include <dev/fdt/fdtvar.h>
#include <arm/fdt/arm_fdtvar.h>
static int a9tmr_fdt_match(device_t, cfdata_t, void *);
static void a9tmr_fdt_attach(device_t, device_t, void *);
static void a9tmr_fdt_cpu_hatch(void *, struct cpu_info *);
CFATTACH_DECL_NEW(a9tmr_fdt, 0, a9tmr_fdt_match, a9tmr_fdt_attach, NULL, NULL);
static int
a9tmr_fdt_match(device_t parent, cfdata_t cf, void *aux)
{
const char * const compatible[] = {
"arm,cortex-a9-global-timer",
NULL
};
struct fdt_attach_args * const faa = aux;
return of_compatible(faa->faa_phandle, compatible) >= 0;
}
static void
a9tmr_fdt_attach(device_t parent, device_t self, void *aux)
{
struct fdt_attach_args * const faa = aux;
const int phandle = faa->faa_phandle;
bus_space_handle_t bsh;
struct clk *clk = fdtbus_clock_get_index(phandle, 0);
if (clk == NULL) {
aprint_error(": couldn't get clock\n");
return;
}
if (clk_enable(clk) != 0) {
aprint_error(": couldn't enable clock\n");
return;
}
uint32_t rate = clk_get_rate(clk);
prop_dictionary_t dict = device_properties(self);
prop_dictionary_set_uint32(dict, "frequency", rate);
char intrstr[128];
if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
aprint_error(": failed to decode interrupt\n");
return;
}
void *ih = fdtbus_intr_establish(phandle, 0, IPL_CLOCK,
FDT_INTR_MPSAFE, a9tmr_intr, NULL);
if (ih == NULL) {
aprint_error_dev(self, "couldn't install interrupt handler\n");
return;
}
aprint_normal_dev(self, "interrupting on %s\n", intrstr);
bus_addr_t addr;
bus_size_t size;
if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
aprint_error(": couldn't get distributor address\n");
return;
}
if (bus_space_map(faa->faa_bst, addr, size, 0, &bsh)) {
aprint_error(": couldn't map registers\n");
return;
}
struct mpcore_attach_args mpcaa = {
.mpcaa_name = "arma9tmr",
.mpcaa_memt = faa->faa_bst,
.mpcaa_memh = bsh,
.mpcaa_irq = -1,
};
config_found(self, &mpcaa, NULL);
arm_fdt_cpu_hatch_register(self, a9tmr_fdt_cpu_hatch);
arm_fdt_timer_register(a9tmr_cpu_initclocks);
}
static void
a9tmr_fdt_cpu_hatch(void *priv, struct cpu_info *ci)
{
a9tmr_init_cpu_clock(ci);
}
--- src/sys/arch/arm/fdt/files.fdt 2018/02/19 16:10:42 1.15
+++ src/sys/arch/arm/fdt/files.fdt 2018/06/05 08:03:28 1.16
@@ -1,28 +1,32 @@ | @@ -1,28 +1,32 @@ | |||
1 | # $NetBSD: files.fdt,v 1.15 2018/02/19 16:10:42 jmcneill Exp $ | 1 | # $NetBSD: files.fdt,v 1.16 2018/06/05 08:03:28 hkenken Exp $ | |
2 | 2 | |||
3 | include "dev/pckbport/files.pckbport" | 3 | include "dev/pckbport/files.pckbport" | |
4 | 4 | |||
5 | device armfdt { }: bus_space_generic, fdtbus | 5 | device armfdt { }: bus_space_generic, fdtbus | |
6 | attach armfdt at root with arm_fdt | 6 | attach armfdt at root with arm_fdt | |
7 | file arch/arm/fdt/arm_fdt.c arm_fdt | 7 | file arch/arm/fdt/arm_fdt.c arm_fdt | |
8 | 8 | |||
9 | attach cpu at cpus with cpu_fdt | 9 | attach cpu at cpus with cpu_fdt | |
10 | file arch/arm/fdt/cpu_fdt.c cpu_fdt | 10 | file arch/arm/fdt/cpu_fdt.c cpu_fdt | |
11 | 11 | |||
12 | device cpufreqdt | 12 | device cpufreqdt | |
13 | attach cpufreqdt at cpu with cpufreq_dt | 13 | attach cpufreqdt at cpu with cpufreq_dt | |
14 | file dev/fdt/cpufreq_dt.c cpufreq_dt | 14 | file dev/fdt/cpufreq_dt.c cpufreq_dt | |
15 | 15 | |||
16 | device a9tmr: mpcorebus | |||
17 | attach a9tmr at fdt with a9tmr_fdt | |||
18 | file arch/arm/fdt/a9tmr_fdt.c a9tmr_fdt | |||
19 | ||||
16 | device gtmr: mpcorebus | 20 | device gtmr: mpcorebus | |
17 | attach gtmr at fdt with gtmr_fdt | 21 | attach gtmr at fdt with gtmr_fdt | |
18 | file arch/arm/fdt/gtmr_fdt.c gtmr_fdt | 22 | file arch/arm/fdt/gtmr_fdt.c gtmr_fdt | |
19 | 23 | |||
20 | device gic: mpcorebus | 24 | device gic: mpcorebus | |
21 | attach gic at fdt with gic_fdt | 25 | attach gic at fdt with gic_fdt | |
22 | file arch/arm/fdt/gic_fdt.c gic_fdt | 26 | file arch/arm/fdt/gic_fdt.c gic_fdt | |
23 | 27 | |||
24 | attach plcom at fdt with plcom_fdt | 28 | attach plcom at fdt with plcom_fdt | |
25 | file arch/arm/fdt/plcom_fdt.c plcom_fdt | 29 | file arch/arm/fdt/plcom_fdt.c plcom_fdt | |
26 | 30 | |||
27 | attach plkmi at fdt with plkmi_fdt | 31 | attach plkmi at fdt with plkmi_fdt | |
28 | file arch/arm/fdt/plkmi_fdt.c plkmi_fdt | 32 | file arch/arm/fdt/plkmi_fdt.c plkmi_fdt |
--- src/sys/arch/arm/zynq/Attic/zynq7000_board.c 2016/10/20 09:53:07 1.2
+++ src/sys/arch/arm/zynq/Attic/zynq7000_board.c 2018/06/05 08:03:28 1.3
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: zynq7000_board.c,v 1.2 2016/10/20 09:53:07 skrll Exp $ */ | 1 | /* $NetBSD: zynq7000_board.c,v 1.3 2018/06/05 08:03:28 hkenken Exp $ */ | |
2 | /*- | 2 | /*- | |
3 | * Copyright (c) 2015 Genetec Corporation. All rights reserved. | 3 | * Copyright (c) 2015 Genetec Corporation. All rights reserved. | |
4 | * Written by Hashimoto Kenichi for Genetec Corporation. | 4 | * Written by Hashimoto Kenichi for Genetec Corporation. | |
5 | * | 5 | * | |
6 | * Redistribution and use in source and binary forms, with or without | 6 | * Redistribution and use in source and binary forms, with or without | |
7 | * modification, are permitted provided that the following conditions | 7 | * modification, are permitted provided that the following conditions | |
8 | * are met: | 8 | * are met: | |
9 | * 1. Redistributions of source code must retain the above copyright | 9 | * 1. Redistributions of source code must retain the above copyright | |
10 | * notice, this list of conditions and the following disclaimer. | 10 | * notice, this list of conditions and the following disclaimer. | |
11 | * 2. Redistributions in binary form must reproduce the above copyright | 11 | * 2. Redistributions in binary form must reproduce the above copyright | |
12 | * notice, this list of conditions and the following disclaimer in the | 12 | * notice, this list of conditions and the following disclaimer in the | |
13 | * documentation and/or other materials provided with the distribution. | 13 | * documentation and/or other materials provided with the distribution. | |
14 | * | 14 | * | |
@@ -16,27 +16,27 @@ | @@ -16,27 +16,27 @@ | |||
16 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | 16 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | |
17 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | 17 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | |
18 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS | 18 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS | |
19 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | 19 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
20 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | 20 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
21 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | 21 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | |
22 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | 22 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | |
23 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | 23 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | |
24 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | 24 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
25 | * POSSIBILITY OF SUCH DAMAGE. | 25 | * POSSIBILITY OF SUCH DAMAGE. | |
26 | */ | 26 | */ | |
27 | 27 | |||
28 | #include <sys/cdefs.h> | 28 | #include <sys/cdefs.h> | |
29 | __KERNEL_RCSID(1, "$NetBSD: zynq7000_board.c,v 1.2 2016/10/20 09:53:07 skrll Exp $"); | 29 | __KERNEL_RCSID(1, "$NetBSD: zynq7000_board.c,v 1.3 2018/06/05 08:03:28 hkenken Exp $"); | |
30 | 30 | |||
31 | #include "opt_zynq.h" | 31 | #include "opt_zynq.h" | |
32 | #include "arml2cc.h" | 32 | #include "arml2cc.h" | |
33 | 33 | |||
34 | #include <sys/param.h> | 34 | #include <sys/param.h> | |
35 | #include <sys/bus.h> | 35 | #include <sys/bus.h> | |
36 | #include <sys/cpu.h> | 36 | #include <sys/cpu.h> | |
37 | #include <sys/device.h> | 37 | #include <sys/device.h> | |
38 | 38 | |||
39 | #include <arm/locore.h> | 39 | #include <arm/locore.h> | |
40 | #include <arm/cortex/a9tmr_var.h> | 40 | #include <arm/cortex/a9tmr_var.h> | |
41 | #include <arm/cortex/pl310_var.h> | 41 | #include <arm/cortex/pl310_var.h> | |
42 | #include <arm/mainbus/mainbus.h> | 42 | #include <arm/mainbus/mainbus.h> | |
@@ -114,27 +114,27 @@ zynq7000_device_register(device_t self, | @@ -114,27 +114,27 @@ zynq7000_device_register(device_t self, | |||
114 | * The iot mainbus supplies is completely wrong since it scales | 114 | * The iot mainbus supplies is completely wrong since it scales | |
115 | * addresses by 2. The simpliest remedy is to replace with our | 115 | * addresses by 2. The simpliest remedy is to replace with our | |
116 | * bus space used for the armcore registers (which armperiph uses). | 116 | * bus space used for the armcore registers (which armperiph uses). | |
117 | */ | 117 | */ | |
118 | struct mainbus_attach_args * const mb = aux; | 118 | struct mainbus_attach_args * const mb = aux; | |
119 | mb->mb_iot = zynq7000_armcore_bst; | 119 | mb->mb_iot = zynq7000_armcore_bst; | |
120 | return; | 120 | return; | |
121 | } | 121 | } | |
122 | 122 | |||
123 | /* | 123 | /* | |
124 | * We need to tell the A9 Global/Watchdog Timer | 124 | * We need to tell the A9 Global/Watchdog Timer | |
125 | * what frequency it runs at. | 125 | * what frequency it runs at. | |
126 | */ | 126 | */ | |
127 | if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) { | 127 | if (device_is_a(self, "arma9tmr") || device_is_a(self, "a9wdt")) { | |
128 | prop_dictionary_set_uint32(dict, "frequency", | 128 | prop_dictionary_set_uint32(dict, "frequency", | |
129 | 666666666 / PERIPHCLK_N); | 129 | 666666666 / PERIPHCLK_N); | |
130 | return; | 130 | return; | |
131 | } | 131 | } | |
132 | } | 132 | } | |
133 | 133 | |||
134 | #ifdef MULTIPROCESSOR | 134 | #ifdef MULTIPROCESSOR | |
135 | void | 135 | void | |
136 | zynq7000_cpu_hatch(struct cpu_info *ci) | 136 | zynq7000_cpu_hatch(struct cpu_info *ci) | |
137 | { | 137 | { | |
138 | a9tmr_init_cpu_clock(ci); | 138 | a9tmr_init_cpu_clock(ci); | |
139 | } | 139 | } | |
140 | #endif | 140 | #endif |
--- src/sys/arch/evbarm/amlogic/Attic/amlogic_machdep.c 2015/08/08 13:54:05 1.21
+++ src/sys/arch/evbarm/amlogic/Attic/amlogic_machdep.c 2018/06/05 08:03:28 1.22
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: amlogic_machdep.c,v 1.21 2015/08/08 13:54:05 jmcneill Exp $ */ | 1 | /* $NetBSD: amlogic_machdep.c,v 1.22 2018/06/05 08:03:28 hkenken Exp $ */ | |
2 | 2 | |||
3 | /* | 3 | /* | |
4 | * Machine dependent functions for kernel setup for TI OSK5912 board. | 4 | * Machine dependent functions for kernel setup for TI OSK5912 board. | |
5 | * Based on lubbock_machdep.c which in turn was based on iq80310_machhdep.c | 5 | * Based on lubbock_machdep.c which in turn was based on iq80310_machhdep.c | |
6 | * | 6 | * | |
7 | * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. | 7 | * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. | |
8 | * Written by Hiroyuki Bessho for Genetec Corporation. | 8 | * Written by Hiroyuki Bessho for Genetec Corporation. | |
9 | * | 9 | * | |
10 | * Redistribution and use in source and binary forms, with or without | 10 | * Redistribution and use in source and binary forms, with or without | |
11 | * modification, are permitted provided that the following conditions | 11 | * modification, are permitted provided that the following conditions | |
12 | * are met: | 12 | * are met: | |
13 | * 1. Redistributions of source code must retain the above copyright | 13 | * 1. Redistributions of source code must retain the above copyright | |
14 | * notice, this list of conditions and the following disclaimer. | 14 | * notice, this list of conditions and the following disclaimer. | |
@@ -115,27 +115,27 @@ | @@ -115,27 +115,27 @@ | |||
115 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | 115 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | |
116 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | 116 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | |
117 | * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT, | 117 | * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT, | |
118 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | 118 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | |
119 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | 119 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
120 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | 120 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
121 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | 121 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
122 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | 122 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
123 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | 123 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
124 | * SUCH DAMAGE. | 124 | * SUCH DAMAGE. | |
125 | */ | 125 | */ | |
126 | 126 | |||
127 | #include <sys/cdefs.h> | 127 | #include <sys/cdefs.h> | |
128 | __KERNEL_RCSID(0, "$NetBSD: amlogic_machdep.c,v 1.21 2015/08/08 13:54:05 jmcneill Exp $"); | 128 | __KERNEL_RCSID(0, "$NetBSD: amlogic_machdep.c,v 1.22 2018/06/05 08:03:28 hkenken Exp $"); | |
129 | 129 | |||
130 | #include "opt_machdep.h" | 130 | #include "opt_machdep.h" | |
131 | #include "opt_ddb.h" | 131 | #include "opt_ddb.h" | |
132 | #include "opt_md.h" | 132 | #include "opt_md.h" | |
133 | #include "opt_amlogic.h" | 133 | #include "opt_amlogic.h" | |
134 | #include "opt_arm_debug.h" | 134 | #include "opt_arm_debug.h" | |
135 | #include "opt_multiprocessor.h" | 135 | #include "opt_multiprocessor.h" | |
136 | 136 | |||
137 | #include "amlogic_com.h" | 137 | #include "amlogic_com.h" | |
138 | #include "arml2cc.h" | 138 | #include "arml2cc.h" | |
139 | #include "ukbd.h" | 139 | #include "ukbd.h" | |
140 | #include "genfb.h" | 140 | #include "genfb.h" | |
141 | #include "ether.h" | 141 | #include "ether.h" | |
@@ -515,27 +515,27 @@ amlogic_device_register(device_t self, v | @@ -515,27 +515,27 @@ amlogic_device_register(device_t self, v | |||
515 | struct mainbus_attach_args * const mb = aux; | 515 | struct mainbus_attach_args * const mb = aux; | |
516 | mb->mb_iot = &armv7_generic_bs_tag; | 516 | mb->mb_iot = &armv7_generic_bs_tag; | |
517 | return; | 517 | return; | |
518 | } | 518 | } | |
519 | 519 | |||
520 | if (device_is_a(self, "cpu") && device_unit(self) == 0) { | 520 | if (device_is_a(self, "cpu") && device_unit(self) == 0) { | |
521 | amlogic_cpufreq_init(); | 521 | amlogic_cpufreq_init(); | |
522 | } | 522 | } | |
523 | 523 | |||
524 | /* | 524 | /* | |
525 | * We need to tell the A9 Global/Watchdog Timer | 525 | * We need to tell the A9 Global/Watchdog Timer | |
526 | * what frequency it runs at. | 526 | * what frequency it runs at. | |
527 | */ | 527 | */ | |
528 | if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) { | 528 | if (device_is_a(self, "arma9tmr") || device_is_a(self, "a9wdt")) { | |
529 | prop_dictionary_set_uint32(dict, "frequency", | 529 | prop_dictionary_set_uint32(dict, "frequency", | |
530 | amlogic_get_rate_a9periph()); | 530 | amlogic_get_rate_a9periph()); | |
531 | 531 | |||
532 | return; | 532 | return; | |
533 | } | 533 | } | |
534 | 534 | |||
535 | if (device_is_a(self, "arml2cc")) { | 535 | if (device_is_a(self, "arml2cc")) { | |
536 | /* | 536 | /* | |
537 | * L2 cache regs are at C4200000 and A9 periph base is | 537 | * L2 cache regs are at C4200000 and A9 periph base is | |
538 | * at C4300000; pass as a negative offset for the benefit | 538 | * at C4300000; pass as a negative offset for the benefit | |
539 | * of armperiph bus. | 539 | * of armperiph bus. | |
540 | */ | 540 | */ | |
541 | prop_dictionary_set_uint32(dict, "offset", 0xfff00000); | 541 | prop_dictionary_set_uint32(dict, "offset", 0xfff00000); |
--- src/sys/arch/evbarm/beagle/Attic/beagle_machdep.c 2016/10/20 09:53:08 1.68
+++ src/sys/arch/evbarm/beagle/Attic/beagle_machdep.c 2018/06/05 08:03:28 1.69
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: beagle_machdep.c,v 1.68 2016/10/20 09:53:08 skrll Exp $ */ | 1 | /* $NetBSD: beagle_machdep.c,v 1.69 2018/06/05 08:03:28 hkenken Exp $ */ | |
2 | 2 | |||
3 | /* | 3 | /* | |
4 | * Machine dependent functions for kernel setup for TI OSK5912 board. | 4 | * Machine dependent functions for kernel setup for TI OSK5912 board. | |
5 | * Based on lubbock_machdep.c which in turn was based on iq80310_machhdep.c | 5 | * Based on lubbock_machdep.c which in turn was based on iq80310_machhdep.c | |
6 | * | 6 | * | |
7 | * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. | 7 | * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. | |
8 | * Written by Hiroyuki Bessho for Genetec Corporation. | 8 | * Written by Hiroyuki Bessho for Genetec Corporation. | |
9 | * | 9 | * | |
10 | * Redistribution and use in source and binary forms, with or without | 10 | * Redistribution and use in source and binary forms, with or without | |
11 | * modification, are permitted provided that the following conditions | 11 | * modification, are permitted provided that the following conditions | |
12 | * are met: | 12 | * are met: | |
13 | * 1. Redistributions of source code must retain the above copyright | 13 | * 1. Redistributions of source code must retain the above copyright | |
14 | * notice, this list of conditions and the following disclaimer. | 14 | * notice, this list of conditions and the following disclaimer. | |
@@ -115,27 +115,27 @@ | @@ -115,27 +115,27 @@ | |||
115 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | 115 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | |
116 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | 116 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | |
117 | * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT, | 117 | * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT, | |
118 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | 118 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | |
119 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | 119 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
120 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | 120 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
121 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | 121 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
122 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | 122 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
123 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | 123 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
124 | * SUCH DAMAGE. | 124 | * SUCH DAMAGE. | |
125 | */ | 125 | */ | |
126 | 126 | |||
127 | #include <sys/cdefs.h> | 127 | #include <sys/cdefs.h> | |
128 | __KERNEL_RCSID(0, "$NetBSD: beagle_machdep.c,v 1.68 2016/10/20 09:53:08 skrll Exp $"); | 128 | __KERNEL_RCSID(0, "$NetBSD: beagle_machdep.c,v 1.69 2018/06/05 08:03:28 hkenken Exp $"); | |
129 | 129 | |||
130 | #include "opt_machdep.h" | 130 | #include "opt_machdep.h" | |
131 | #include "opt_ddb.h" | 131 | #include "opt_ddb.h" | |
132 | #include "opt_kgdb.h" | 132 | #include "opt_kgdb.h" | |
133 | #include "opt_ipkdb.h" | 133 | #include "opt_ipkdb.h" | |
134 | #include "opt_md.h" | 134 | #include "opt_md.h" | |
135 | #include "opt_com.h" | 135 | #include "opt_com.h" | |
136 | #include "opt_omap.h" | 136 | #include "opt_omap.h" | |
137 | 137 | |||
138 | #include "com.h" | 138 | #include "com.h" | |
139 | #include "omapwdt32k.h" | 139 | #include "omapwdt32k.h" | |
140 | #include "prcm.h" | 140 | #include "prcm.h" | |
141 | #include "sdhc.h" | 141 | #include "sdhc.h" | |
@@ -971,27 +971,27 @@ beagle_device_register(device_t self, vo | @@ -971,27 +971,27 @@ beagle_device_register(device_t self, vo | |||
971 | * addresses by 2. The simpliest remedy is to replace with our | 971 | * addresses by 2. The simpliest remedy is to replace with our | |
972 | * bus space used for the armcore registers (which armperiph uses). | 972 | * bus space used for the armcore registers (which armperiph uses). | |
973 | */ | 973 | */ | |
974 | struct mainbus_attach_args * const mb = aux; | 974 | struct mainbus_attach_args * const mb = aux; | |
975 | mb->mb_iot = &omap_bs_tag; | 975 | mb->mb_iot = &omap_bs_tag; | |
976 | return; | 976 | return; | |
977 | } | 977 | } | |
978 | 978 | |||
979 | #ifdef CPU_CORTEXA9 | 979 | #ifdef CPU_CORTEXA9 | |
980 | /* | 980 | /* | |
981 | * We need to tell the A9 Global/Watchdog Timer | 981 | * We need to tell the A9 Global/Watchdog Timer | |
982 | * what frequency it runs at. | 982 | * what frequency it runs at. | |
983 | */ | 983 | */ | |
984 | if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) { | 984 | if (device_is_a(self, "arma9tmr") || device_is_a(self, "a9wdt")) { | |
985 | /* | 985 | /* | |
986 | * This clock always runs at (arm_clk div 2) and only goes | 986 | * This clock always runs at (arm_clk div 2) and only goes | |
987 | * to timers that are part of the A9 MP core subsystem. | 987 | * to timers that are part of the A9 MP core subsystem. | |
988 | */ | 988 | */ | |
989 | prop_dictionary_set_uint32(dict, "frequency", | 989 | prop_dictionary_set_uint32(dict, "frequency", | |
990 | curcpu()->ci_data.cpu_cc_freq / 2); | 990 | curcpu()->ci_data.cpu_cc_freq / 2); | |
991 | return; | 991 | return; | |
992 | } | 992 | } | |
993 | #endif | 993 | #endif | |
994 | 994 | |||
995 | #ifdef CPU_CORTEXA15 | 995 | #ifdef CPU_CORTEXA15 | |
996 | if (device_is_a(self, "armgtmr")) { | 996 | if (device_is_a(self, "armgtmr")) { | |
997 | /* | 997 | /* |
--- src/sys/arch/evbarm/conf/BCM5301X 2017/09/14 07:58:40 1.29
+++ src/sys/arch/evbarm/conf/BCM5301X 2018/06/05 08:03:28 1.30
@@ -1,15 +1,15 @@ | @@ -1,15 +1,15 @@ | |||
1 | # | 1 | # | |
2 | # $NetBSD: BCM5301X,v 1.29 2017/09/14 07:58:40 mrg Exp $ | 2 | # $NetBSD: BCM5301X,v 1.30 2018/06/05 08:03:28 hkenken Exp $ | |
3 | # | 3 | # | |
4 | # BCM5301X -- Broadcom BCM5301X Eval Board Kernel | 4 | # BCM5301X -- Broadcom BCM5301X Eval Board Kernel | |
5 | # | 5 | # | |
6 | 6 | |||
7 | include "arch/evbarm/conf/std.bcm53xx" | 7 | include "arch/evbarm/conf/std.bcm53xx" | |
8 | 8 | |||
9 | # estimated number of users | 9 | # estimated number of users | |
10 | 10 | |||
11 | maxusers 32 | 11 | maxusers 32 | |
12 | 12 | |||
13 | # Standard system options | 13 | # Standard system options | |
14 | 14 | |||
15 | options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT | 15 | options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT | |
@@ -161,27 +161,27 @@ options BOOT_ARGS="\"\"" | @@ -161,27 +161,27 @@ options BOOT_ARGS="\"\"" | |||
161 | config netbsd root on ? type ? | 161 | config netbsd root on ? type ? | |
162 | 162 | |||
163 | # The main bus device | 163 | # The main bus device | |
164 | mainbus0 at root | 164 | mainbus0 at root | |
165 | 165 | |||
166 | # The boot cpu | 166 | # The boot cpu | |
167 | cpu0 at mainbus? | 167 | cpu0 at mainbus? | |
168 | #cpu* at mainbus? | 168 | #cpu* at mainbus? | |
169 | 169 | |||
170 | # The MPCore interrupt controller and global timer | 170 | # The MPCore interrupt controller and global timer | |
171 | armperiph0 at mainbus? # A9 On-Chip Peripherals | 171 | armperiph0 at mainbus? # A9 On-Chip Peripherals | |
172 | armgic0 at armperiph? # ARM Generic Interrupt Controller | 172 | armgic0 at armperiph? # ARM Generic Interrupt Controller | |
173 | arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC | 173 | arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC | |
174 | a9tmr0 at armperiph? # A9 Global Timer | 174 | arma9tmr0 at armperiph? # A9 Global Timer | |
175 | a9wdt0 at armperiph? flags 1 # A9 Watchdog Timer | 175 | a9wdt0 at armperiph? flags 1 # A9 Watchdog Timer | |
176 | 176 | |||
177 | # ChipCommonA Peripherals | 177 | # ChipCommonA Peripherals | |
178 | bcmcca0 at mainbus? # ChipCommonA | 178 | bcmcca0 at mainbus? # ChipCommonA | |
179 | #options CONADDR=0x18000300, CONSPEED=115200 | 179 | #options CONADDR=0x18000300, CONSPEED=115200 | |
180 | options CONSPEED=9600 | 180 | options CONSPEED=9600 | |
181 | com0 at bcmcca? channel 0 | 181 | com0 at bcmcca? channel 0 | |
182 | com* at bcmcca? channel 1 | 182 | com* at bcmcca? channel 1 | |
183 | 183 | |||
184 | # ChipCommonB Peripherals | 184 | # ChipCommonB Peripherals | |
185 | bcmccb0 at mainbus? # ChipCommonB | 185 | bcmccb0 at mainbus? # ChipCommonB | |
186 | bcmpax* at bcmccb? port ? flags 2 # use bounce buffers | 186 | bcmpax* at bcmccb? port ? flags 2 # use bounce buffers | |
187 | pci* at bcmpax? | 187 | pci* at bcmpax? |
--- src/sys/arch/evbarm/conf/BCM56340 2017/09/14 07:58:40 1.14
+++ src/sys/arch/evbarm/conf/BCM56340 2018/06/05 08:03:28 1.15
@@ -1,15 +1,15 @@ | @@ -1,15 +1,15 @@ | |||
1 | # | 1 | # | |
2 | # $NetBSD: BCM56340,v 1.14 2017/09/14 07:58:40 mrg Exp $ | 2 | # $NetBSD: BCM56340,v 1.15 2018/06/05 08:03:28 hkenken Exp $ | |
3 | # | 3 | # | |
4 | # BCM5301X -- Broadcom BCM5301X Eval Board Kernel | 4 | # BCM5301X -- Broadcom BCM5301X Eval Board Kernel | |
5 | # | 5 | # | |
6 | 6 | |||
7 | include "arch/evbarm/conf/std.bcm53xx" | 7 | include "arch/evbarm/conf/std.bcm53xx" | |
8 | 8 | |||
9 | # estimated number of users | 9 | # estimated number of users | |
10 | 10 | |||
11 | maxusers 32 | 11 | maxusers 32 | |
12 | 12 | |||
13 | # Standard system options | 13 | # Standard system options | |
14 | 14 | |||
15 | options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT | 15 | options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT | |
@@ -161,27 +161,27 @@ options BOOT_ARGS="\"\"" | @@ -161,27 +161,27 @@ options BOOT_ARGS="\"\"" | |||
161 | config netbsd root on ? type ? | 161 | config netbsd root on ? type ? | |
162 | 162 | |||
163 | # The main bus device | 163 | # The main bus device | |
164 | mainbus0 at root | 164 | mainbus0 at root | |
165 | 165 | |||
166 | # The boot cpu | 166 | # The boot cpu | |
167 | cpu0 at mainbus? | 167 | cpu0 at mainbus? | |
168 | #cpu* at mainbus? | 168 | #cpu* at mainbus? | |
169 | 169 | |||
170 | # The MPCore interrupt controller and global timer | 170 | # The MPCore interrupt controller and global timer | |
171 | armperiph0 at mainbus? # A9 On-Chip Peripherals | 171 | armperiph0 at mainbus? # A9 On-Chip Peripherals | |
172 | armgic0 at armperiph? # ARM Generic Interrupt Controller | 172 | armgic0 at armperiph? # ARM Generic Interrupt Controller | |
173 | arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC | 173 | arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC | |
174 | a9tmr0 at armperiph? # A9 Global Timer | 174 | arma9tmr0 at armperiph? # A9 Global Timer | |
175 | a9wdt0 at armperiph? flags 1 # A9 Watchdog Timer | 175 | a9wdt0 at armperiph? flags 1 # A9 Watchdog Timer | |
176 | 176 | |||
177 | # ChipCommonA Peripherals | 177 | # ChipCommonA Peripherals | |
178 | bcmcca0 at mainbus? # ChipCommonA | 178 | bcmcca0 at mainbus? # ChipCommonA | |
179 | #options CONADDR=0x18000300, CONSPEED=115200 | 179 | #options CONADDR=0x18000300, CONSPEED=115200 | |
180 | options CONSPEED=9600 | 180 | options CONSPEED=9600 | |
181 | com0 at bcmcca? channel 0 | 181 | com0 at bcmcca? channel 0 | |
182 | com* at bcmcca? channel 1 | 182 | com* at bcmcca? channel 1 | |
183 | 183 | |||
184 | # ChipCommonB Peripherals | 184 | # ChipCommonB Peripherals | |
185 | bcmccb0 at mainbus? # ChipCommonB | 185 | bcmccb0 at mainbus? # ChipCommonB | |
186 | bcmpax* at bcmccb? port ? flags 2 # use bounce buffers | 186 | bcmpax* at bcmccb? port ? flags 2 # use bounce buffers | |
187 | pci* at bcmpax? | 187 | pci* at bcmpax? |
--- src/sys/arch/evbarm/conf/Attic/NITROGEN6X 2017/11/09 05:57:23 1.14
+++ src/sys/arch/evbarm/conf/Attic/NITROGEN6X 2018/06/05 08:03:28 1.15
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | # $NetBSD: NITROGEN6X,v 1.14 2017/11/09 05:57:23 hkenken Exp $ | 1 | # $NetBSD: NITROGEN6X,v 1.15 2018/06/05 08:03:28 hkenken Exp $ | |
2 | # | 2 | # | |
3 | # Nitrogen6X | 3 | # Nitrogen6X | |
4 | # - http://boundarydevices.com/products/nitrogen6x-board-imx6-arm-cortex-a9-sbc/ | 4 | # - http://boundarydevices.com/products/nitrogen6x-board-imx6-arm-cortex-a9-sbc/ | |
5 | # | 5 | # | |
6 | 6 | |||
7 | include "arch/evbarm/conf/std.nitrogen6" | 7 | include "arch/evbarm/conf/std.nitrogen6" | |
8 | 8 | |||
9 | #options INCLUDE_CONFIG_FILE # embed config file in kernel binary | 9 | #options INCLUDE_CONFIG_FILE # embed config file in kernel binary | |
10 | 10 | |||
11 | # estimated number of users | 11 | # estimated number of users | |
12 | 12 | |||
13 | maxusers 32 | 13 | maxusers 32 | |
14 | 14 | |||
@@ -177,27 +177,27 @@ config netbsd root on ? type ? | @@ -177,27 +177,27 @@ config netbsd root on ? type ? | |||
177 | 177 | |||
178 | # | 178 | # | |
179 | # Device configuration | 179 | # Device configuration | |
180 | # | 180 | # | |
181 | 181 | |||
182 | mainbus0 at root | 182 | mainbus0 at root | |
183 | 183 | |||
184 | cpu* at mainbus? | 184 | cpu* at mainbus? | |
185 | 185 | |||
186 | # The MPCore interrupt controller and global timer | 186 | # The MPCore interrupt controller and global timer | |
187 | armperiph0 at mainbus? # A9 On-Chip Peripherals | 187 | armperiph0 at mainbus? # A9 On-Chip Peripherals | |
188 | armgic0 at armperiph? # ARM Generic Interrupt Controller | 188 | armgic0 at armperiph? # ARM Generic Interrupt Controller | |
189 | arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC | 189 | arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC | |
190 | a9tmr0 at armperiph? # A9 Global Timer | 190 | arma9tmr0 at armperiph? # A9 Global Timer | |
191 | #a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer | 191 | #a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer | |
192 | 192 | |||
193 | axi0 at mainbus? | 193 | axi0 at mainbus? | |
194 | 194 | |||
195 | # Enhanced Periodic Interrupt Timer | 195 | # Enhanced Periodic Interrupt Timer | |
196 | #imxclock0 at axi? addr 0x020d0000 irq 88 | 196 | #imxclock0 at axi? addr 0x020d0000 irq 88 | |
197 | #imxclock1 at axi? addr 0x020d4000 irq 89 | 197 | #imxclock1 at axi? addr 0x020d4000 irq 89 | |
198 | 198 | |||
199 | # GPIO | 199 | # GPIO | |
200 | imxgpio0 at axi? addr 0x0209c000 irqbase 256 irq 98 | 200 | imxgpio0 at axi? addr 0x0209c000 irqbase 256 irq 98 | |
201 | imxgpio1 at axi? addr 0x020a0000 irqbase 288 irq 100 | 201 | imxgpio1 at axi? addr 0x020a0000 irqbase 288 irq 100 | |
202 | imxgpio2 at axi? addr 0x020a4000 irqbase 320 irq 102 | 202 | imxgpio2 at axi? addr 0x020a4000 irqbase 320 irq 102 | |
203 | imxgpio3 at axi? addr 0x020a8000 irqbase 352 irq 104 | 203 | imxgpio3 at axi? addr 0x020a8000 irqbase 352 irq 104 |
--- src/sys/arch/evbarm/conf/Attic/CUBOX-I 2017/11/09 05:57:23 1.12
+++ src/sys/arch/evbarm/conf/Attic/CUBOX-I 2018/06/05 08:03:28 1.13
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | # $NetBSD: CUBOX-I,v 1.12 2017/11/09 05:57:23 hkenken Exp $ | 1 | # $NetBSD: CUBOX-I,v 1.13 2018/06/05 08:03:28 hkenken Exp $ | |
2 | # | 2 | # | |
3 | # CuBox-i | 3 | # CuBox-i | |
4 | # - http://www.solid-run.com/products/cubox-i-mini-computer/ | 4 | # - http://www.solid-run.com/products/cubox-i-mini-computer/ | |
5 | # | 5 | # | |
6 | 6 | |||
7 | include "arch/evbarm/conf/std.nitrogen6" | 7 | include "arch/evbarm/conf/std.nitrogen6" | |
8 | 8 | |||
9 | #options INCLUDE_CONFIG_FILE # embed config file in kernel binary | 9 | #options INCLUDE_CONFIG_FILE # embed config file in kernel binary | |
10 | 10 | |||
11 | # estimated number of users | 11 | # estimated number of users | |
12 | 12 | |||
13 | maxusers 32 | 13 | maxusers 32 | |
14 | 14 | |||
@@ -188,27 +188,27 @@ options NFS_BOOT_DHCP | @@ -188,27 +188,27 @@ options NFS_BOOT_DHCP | |||
188 | 188 | |||
189 | # | 189 | # | |
190 | # Device configuration | 190 | # Device configuration | |
191 | # | 191 | # | |
192 | 192 | |||
193 | mainbus0 at root | 193 | mainbus0 at root | |
194 | 194 | |||
195 | cpu* at mainbus? | 195 | cpu* at mainbus? | |
196 | 196 | |||
197 | # The MPCore interrupt controller and global timer | 197 | # The MPCore interrupt controller and global timer | |
198 | armperiph0 at mainbus? # A9 On-Chip Peripherals | 198 | armperiph0 at mainbus? # A9 On-Chip Peripherals | |
199 | armgic0 at armperiph? # ARM Generic Interrupt Controller | 199 | armgic0 at armperiph? # ARM Generic Interrupt Controller | |
200 | arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC | 200 | arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC | |
201 | a9tmr0 at armperiph? # A9 Global Timer | 201 | arma9tmr0 at armperiph? # A9 Global Timer | |
202 | #a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer | 202 | #a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer | |
203 | 203 | |||
204 | axi0 at mainbus? | 204 | axi0 at mainbus? | |
205 | 205 | |||
206 | # Enhanced Periodic Interrupt Timer | 206 | # Enhanced Periodic Interrupt Timer | |
207 | #imxclock0 at axi? addr 0x020d0000 irq 88 | 207 | #imxclock0 at axi? addr 0x020d0000 irq 88 | |
208 | #imxclock1 at axi? addr 0x020d4000 irq 89 | 208 | #imxclock1 at axi? addr 0x020d4000 irq 89 | |
209 | 209 | |||
210 | # GPIO | 210 | # GPIO | |
211 | imxgpio0 at axi? addr 0x0209c000 irqbase 256 irq 98 | 211 | imxgpio0 at axi? addr 0x0209c000 irqbase 256 irq 98 | |
212 | imxgpio1 at axi? addr 0x020a0000 irqbase 288 irq 100 | 212 | imxgpio1 at axi? addr 0x020a0000 irqbase 288 irq 100 | |
213 | imxgpio2 at axi? addr 0x020a4000 irqbase 320 irq 102 | 213 | imxgpio2 at axi? addr 0x020a4000 irqbase 320 irq 102 | |
214 | imxgpio3 at axi? addr 0x020a8000 irqbase 352 irq 104 | 214 | imxgpio3 at axi? addr 0x020a8000 irqbase 352 irq 104 |
--- src/sys/arch/evbarm/conf/Attic/DUOVERO 2018/03/13 06:21:59 1.7
+++ src/sys/arch/evbarm/conf/Attic/DUOVERO 2018/06/05 08:03:28 1.8
@@ -1,15 +1,15 @@ | @@ -1,15 +1,15 @@ | |||
1 | # | 1 | # | |
2 | # $NetBSD: DUOVERO,v 1.7 2018/03/13 06:21:59 ryo Exp $ | 2 | # $NetBSD: DUOVERO,v 1.8 2018/06/05 08:03:28 hkenken Exp $ | |
3 | # | 3 | # | |
4 | # DUOOVERO -- Gumstix. Inc. DuoVero COMS platforms kernel | 4 | # DUOOVERO -- Gumstix. Inc. DuoVero COMS platforms kernel | |
5 | # | 5 | # | |
6 | 6 | |||
7 | include "arch/evbarm/conf/std.overo" | 7 | include "arch/evbarm/conf/std.overo" | |
8 | 8 | |||
9 | #options INCLUDE_CONFIG_FILE # embed config file in kernel binary | 9 | #options INCLUDE_CONFIG_FILE # embed config file in kernel binary | |
10 | 10 | |||
11 | # estimated number of users | 11 | # estimated number of users | |
12 | 12 | |||
13 | maxusers 32 | 13 | maxusers 32 | |
14 | 14 | |||
15 | # CPU options | 15 | # CPU options | |
@@ -145,27 +145,27 @@ makeoptions COPY_SYMTAB=1 | @@ -145,27 +145,27 @@ makeoptions COPY_SYMTAB=1 | |||
145 | 145 | |||
146 | config netbsd root on ? type ? | 146 | config netbsd root on ? type ? | |
147 | 147 | |||
148 | # The main bus device | 148 | # The main bus device | |
149 | mainbus0 at root | 149 | mainbus0 at root | |
150 | 150 | |||
151 | # The boot cpu | 151 | # The boot cpu | |
152 | cpu* at mainbus? | 152 | cpu* at mainbus? | |
153 | 153 | |||
154 | # A9 core devices | 154 | # A9 core devices | |
155 | armperiph0 at mainbus? | 155 | armperiph0 at mainbus? | |
156 | arml2cc0 at armperiph? # L2 Cache Controller | 156 | arml2cc0 at armperiph? # L2 Cache Controller | |
157 | armgic0 at armperiph? # Interrupt Controller | 157 | armgic0 at armperiph? # Interrupt Controller | |
158 | a9tmr0 at armperiph? # Global Timer | 158 | arma9tmr0 at armperiph? # Global Timer | |
159 | a9wdt0 at armperiph? # Watchdog | 159 | a9wdt0 at armperiph? # Watchdog | |
160 | 160 | |||
161 | # L3 Interconnect | 161 | # L3 Interconnect | |
162 | L3i0 at mainbus? | 162 | L3i0 at mainbus? | |
163 | 163 | |||
164 | # OBIO | 164 | # OBIO | |
165 | obio0 at mainbus? base 0x4a000000 size 0x1000000 # L4 CORE (CFG) | 165 | obio0 at mainbus? base 0x4a000000 size 0x1000000 # L4 CORE (CFG) | |
166 | obio1 at mainbus? base 0x4a300000 size 0x0100000 # L4 WAKEUP | 166 | obio1 at mainbus? base 0x4a300000 size 0x0100000 # L4 WAKEUP | |
167 | obio2 at mainbus? base 0x48000000 size 0x1000000 # L4 PERIPHERAL | 167 | obio2 at mainbus? base 0x48000000 size 0x1000000 # L4 PERIPHERAL | |
168 | obio3 at mainbus? base 0x49000000 size 0x1000000 # L4 ABE | 168 | obio3 at mainbus? base 0x49000000 size 0x1000000 # L4 ABE | |
169 | 169 | |||
170 | # General Purpose Memory Controller | 170 | # General Purpose Memory Controller | |
171 | gpmc0 at mainbus? base 0x50000000 | 171 | gpmc0 at mainbus? base 0x50000000 |
--- src/sys/arch/evbarm/conf/Attic/GOLDENGATE 2017/09/14 07:58:40 1.16
+++ src/sys/arch/evbarm/conf/Attic/GOLDENGATE 2018/06/05 08:03:28 1.17
@@ -1,15 +1,15 @@ | @@ -1,15 +1,15 @@ | |||
1 | # | 1 | # | |
2 | # $NetBSD: GOLDENGATE,v 1.16 2017/09/14 07:58:40 mrg Exp $ | 2 | # $NetBSD: GOLDENGATE,v 1.17 2018/06/05 08:03:28 hkenken Exp $ | |
3 | # | 3 | # | |
4 | # GOLDENGATE -- Cortina GOLDENGATE Eval Board Kernel | 4 | # GOLDENGATE -- Cortina GOLDENGATE Eval Board Kernel | |
5 | # | 5 | # | |
6 | 6 | |||
7 | include "arch/evbarm/conf/std.goldengate" | 7 | include "arch/evbarm/conf/std.goldengate" | |
8 | 8 | |||
9 | # estimated number of users | 9 | # estimated number of users | |
10 | 10 | |||
11 | maxusers 32 | 11 | maxusers 32 | |
12 | 12 | |||
13 | # Standard system options | 13 | # Standard system options | |
14 | 14 | |||
15 | options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT | 15 | options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT | |
@@ -157,27 +157,27 @@ options BOOT_ARGS="\"\"" | @@ -157,27 +157,27 @@ options BOOT_ARGS="\"\"" | |||
157 | config netbsd root on ? type ? | 157 | config netbsd root on ? type ? | |
158 | 158 | |||
159 | # The main bus device | 159 | # The main bus device | |
160 | mainbus0 at root | 160 | mainbus0 at root | |
161 | 161 | |||
162 | # The boot cpu | 162 | # The boot cpu | |
163 | cpu0 at mainbus? | 163 | cpu0 at mainbus? | |
164 | #cpu* at mainbus? | 164 | #cpu* at mainbus? | |
165 | 165 | |||
166 | # The MPCore interrupt controller and global timer | 166 | # The MPCore interrupt controller and global timer | |
167 | armperiph0 at mainbus? # A9 On-Chip Peripherals | 167 | armperiph0 at mainbus? # A9 On-Chip Peripherals | |
168 | armgic0 at armperiph? # ARM Generic Interrupt Controller | 168 | armgic0 at armperiph? # ARM Generic Interrupt Controller | |
169 | arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC | 169 | arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC | |
170 | a9tmr0 at armperiph? # A9 Global Timer | 170 | arma9tmr0 at armperiph? # A9 Global Timer | |
171 | a9wdt0 at armperiph? flags 1 # A9 Watchdog Timer | 171 | a9wdt0 at armperiph? flags 1 # A9 Watchdog Timer | |
172 | 172 | |||
173 | # Peripherals | 173 | # Peripherals | |
174 | g2periph0 at mainbus? | 174 | g2periph0 at mainbus? | |
175 | g2com0 at g2periph0 channel 0 | 175 | g2com0 at g2periph0 channel 0 | |
176 | #options CONADDR=0xf0070110, CONSPEED=115200 | 176 | #options CONADDR=0xf0070110, CONSPEED=115200 | |
177 | g2com* at g2periph0 channel ? | 177 | g2com* at g2periph0 channel ? | |
178 | g2mdio* at g2periph0 | 178 | g2mdio* at g2periph0 | |
179 | g2flash* at g2periph0 | 179 | g2flash* at g2periph0 | |
180 | g2spi* at g2periph0 | 180 | g2spi* at g2periph0 | |
181 | g2gpio* at g2periph0 channel ? | 181 | g2gpio* at g2periph0 channel ? | |
182 | gpio* at g2gpio? | 182 | gpio* at g2gpio? | |
183 | g2eth* at g2periph? channel ? | 183 | g2eth* at g2periph? channel ? |
--- src/sys/arch/evbarm/conf/Attic/HUMMINGBOARD 2017/11/25 04:53:24 1.3
+++ src/sys/arch/evbarm/conf/Attic/HUMMINGBOARD 2018/06/05 08:03:28 1.4
@@ -1,15 +1,15 @@ | @@ -1,15 +1,15 @@ | |||
1 | # | 1 | # | |
2 | # $NetBSD: HUMMINGBOARD,v 1.3 2017/11/25 04:53:24 christos Exp $ | 2 | # $NetBSD: HUMMINGBOARD,v 1.4 2018/06/05 08:03:28 hkenken Exp $ | |
3 | # | 3 | # | |
4 | # Hummingboard -- Freescale i.MX6 Eval Board Kernel | 4 | # Hummingboard -- Freescale i.MX6 Eval Board Kernel | |
5 | # | 5 | # | |
6 | 6 | |||
7 | include "arch/evbarm/conf/std.nitrogen6" | 7 | include "arch/evbarm/conf/std.nitrogen6" | |
8 | include "arch/evbarm/conf/GENERIC.common" | 8 | include "arch/evbarm/conf/GENERIC.common" | |
9 | 9 | |||
10 | # Board Type | 10 | # Board Type | |
11 | options EVBARM_BOARDTYPE=hummingboard | 11 | options EVBARM_BOARDTYPE=hummingboard | |
12 | #options EVBARM_BOARDTYPE=hummingboard_edge | 12 | #options EVBARM_BOARDTYPE=hummingboard_edge | |
13 | options HUMMINGBOARD | 13 | options HUMMINGBOARD | |
14 | 14 | |||
15 | # CPU options | 15 | # CPU options | |
@@ -44,27 +44,27 @@ config netbsd-wd0 root on wd0 type ffs | @@ -44,27 +44,27 @@ config netbsd-wd0 root on wd0 type ffs | |||
44 | 44 | |||
45 | # | 45 | # | |
46 | # Device configuration | 46 | # Device configuration | |
47 | # | 47 | # | |
48 | 48 | |||
49 | mainbus0 at root | 49 | mainbus0 at root | |
50 | 50 | |||
51 | cpu* at mainbus? | 51 | cpu* at mainbus? | |
52 | 52 | |||
53 | # The MPCore interrupt controller and global timer | 53 | # The MPCore interrupt controller and global timer | |
54 | armperiph0 at mainbus? # A9 On-Chip Peripherals | 54 | armperiph0 at mainbus? # A9 On-Chip Peripherals | |
55 | armgic0 at armperiph? # ARM Generic Interrupt Controller | 55 | armgic0 at armperiph? # ARM Generic Interrupt Controller | |
56 | arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC | 56 | arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC | |
57 | a9tmr0 at armperiph? # A9 Global Timer | 57 | arma9tmr0 at armperiph? # A9 Global Timer | |
58 | #a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer | 58 | #a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer | |
59 | 59 | |||
60 | axi0 at mainbus? | 60 | axi0 at mainbus? | |
61 | 61 | |||
62 | # GPIO | 62 | # GPIO | |
63 | imxgpio0 at axi? addr 0x0209c000 irqbase 256 irq 98 | 63 | imxgpio0 at axi? addr 0x0209c000 irqbase 256 irq 98 | |
64 | imxgpio1 at axi? addr 0x020a0000 irqbase 288 irq 100 | 64 | imxgpio1 at axi? addr 0x020a0000 irqbase 288 irq 100 | |
65 | imxgpio2 at axi? addr 0x020a4000 irqbase 320 irq 102 | 65 | imxgpio2 at axi? addr 0x020a4000 irqbase 320 irq 102 | |
66 | imxgpio3 at axi? addr 0x020a8000 irqbase 352 irq 104 | 66 | imxgpio3 at axi? addr 0x020a8000 irqbase 352 irq 104 | |
67 | imxgpio4 at axi? addr 0x020ac000 irqbase 384 irq 106 | 67 | imxgpio4 at axi? addr 0x020ac000 irqbase 384 irq 106 | |
68 | imxgpio5 at axi? addr 0x020b0000 irqbase 416 irq 108 | 68 | imxgpio5 at axi? addr 0x020b0000 irqbase 416 irq 108 | |
69 | imxgpio6 at axi? addr 0x020b4000 irqbase 448 irq 110 | 69 | imxgpio6 at axi? addr 0x020b4000 irqbase 448 irq 110 | |
70 | gpio* at imxgpio? | 70 | gpio* at imxgpio? |
--- src/sys/arch/evbarm/conf/Attic/PARALLELLA 2017/11/25 04:53:24 1.3
+++ src/sys/arch/evbarm/conf/Attic/PARALLELLA 2018/06/05 08:03:28 1.4
@@ -1,15 +1,15 @@ | @@ -1,15 +1,15 @@ | |||
1 | # | 1 | # | |
2 | # $NetBSD: PARALLELLA,v 1.3 2017/11/25 04:53:24 christos Exp $ | 2 | # $NetBSD: PARALLELLA,v 1.4 2018/06/05 08:03:28 hkenken Exp $ | |
3 | # | 3 | # | |
4 | # Parallella -- Xilinx Zynq Eval Board Kernel | 4 | # Parallella -- Xilinx Zynq Eval Board Kernel | |
5 | # | 5 | # | |
6 | 6 | |||
7 | include "arch/evbarm/conf/std.zynq" | 7 | include "arch/evbarm/conf/std.zynq" | |
8 | include "arch/evbarm/conf/files.parallella" | 8 | include "arch/evbarm/conf/files.parallella" | |
9 | include "arch/evbarm/conf/GENERIC.common" | 9 | include "arch/evbarm/conf/GENERIC.common" | |
10 | 10 | |||
11 | # CPU options | 11 | # CPU options | |
12 | 12 | |||
13 | makeoptions BOARDTYPE="parallella" | 13 | makeoptions BOARDTYPE="parallella" | |
14 | options EVBARM_BOARDTYPE=parallella | 14 | options EVBARM_BOARDTYPE=parallella | |
15 | 15 | |||
@@ -48,27 +48,27 @@ config netbsd root on ? type ? | @@ -48,27 +48,27 @@ config netbsd root on ? type ? | |||
48 | 48 | |||
49 | # | 49 | # | |
50 | # Device configuration | 50 | # Device configuration | |
51 | # | 51 | # | |
52 | 52 | |||
53 | mainbus0 at root | 53 | mainbus0 at root | |
54 | 54 | |||
55 | cpu* at mainbus? | 55 | cpu* at mainbus? | |
56 | 56 | |||
57 | # The MPCore interrupt controller and global timer | 57 | # The MPCore interrupt controller and global timer | |
58 | armperiph0 at mainbus? # A9 On-Chip Peripherals | 58 | armperiph0 at mainbus? # A9 On-Chip Peripherals | |
59 | armgic0 at armperiph? # ARM Generic Interrupt Controller | 59 | armgic0 at armperiph? # ARM Generic Interrupt Controller | |
60 | arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC | 60 | arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC | |
61 | a9tmr0 at armperiph? # A9 Global Timer | 61 | arma9tmr0 at armperiph? # A9 Global Timer | |
62 | #a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer | 62 | #a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer | |
63 | 63 | |||
64 | axi0 at mainbus? | 64 | axi0 at mainbus? | |
65 | 65 | |||
66 | # System Level Control Module | 66 | # System Level Control Module | |
67 | zynqslcr0 at axi? addr 0xf8000000 | 67 | zynqslcr0 at axi? addr 0xf8000000 | |
68 | 68 | |||
69 | # UART | 69 | # UART | |
70 | zynquart0 at axi? addr 0xe0000000 irq 59 | 70 | zynquart0 at axi? addr 0xe0000000 irq 59 | |
71 | zynquart1 at axi? addr 0xe0001000 irq 82 | 71 | zynquart1 at axi? addr 0xe0001000 irq 82 | |
72 | options ZYNQUARTCONSOLE | 72 | options ZYNQUARTCONSOLE | |
73 | 73 | |||
74 | # SD/MMC | 74 | # SD/MMC |
--- src/sys/arch/evbarm/conf/Attic/ZEDBOARD 2017/11/25 04:53:24 1.3
+++ src/sys/arch/evbarm/conf/Attic/ZEDBOARD 2018/06/05 08:03:28 1.4
@@ -1,15 +1,15 @@ | @@ -1,15 +1,15 @@ | |||
1 | # | 1 | # | |
2 | # $NetBSD: ZEDBOARD,v 1.3 2017/11/25 04:53:24 christos Exp $ | 2 | # $NetBSD: ZEDBOARD,v 1.4 2018/06/05 08:03:28 hkenken Exp $ | |
3 | # | 3 | # | |
4 | # ZedBoard -- Xilinx Zynq Eval Board Kernel | 4 | # ZedBoard -- Xilinx Zynq Eval Board Kernel | |
5 | # | 5 | # | |
6 | 6 | |||
7 | include "arch/evbarm/conf/std.zynq" | 7 | include "arch/evbarm/conf/std.zynq" | |
8 | include "arch/evbarm/conf/files.zedboard" | 8 | include "arch/evbarm/conf/files.zedboard" | |
9 | include "arch/evbarm/conf/GENERIC.common" | 9 | include "arch/evbarm/conf/GENERIC.common" | |
10 | 10 | |||
11 | # CPU options | 11 | # CPU options | |
12 | 12 | |||
13 | makeoptions BOARDTYPE="zedboard" | 13 | makeoptions BOARDTYPE="zedboard" | |
14 | options EVBARM_BOARDTYPE=zedboard | 14 | options EVBARM_BOARDTYPE=zedboard | |
15 | 15 | |||
@@ -47,27 +47,27 @@ config netbsd root on ? type ? | @@ -47,27 +47,27 @@ config netbsd root on ? type ? | |||
47 | 47 | |||
48 | # | 48 | # | |
49 | # Device configuration | 49 | # Device configuration | |
50 | # | 50 | # | |
51 | 51 | |||
52 | mainbus0 at root | 52 | mainbus0 at root | |
53 | 53 | |||
54 | cpu* at mainbus? | 54 | cpu* at mainbus? | |
55 | 55 | |||
56 | # The MPCore interrupt controller and global timer | 56 | # The MPCore interrupt controller and global timer | |
57 | armperiph0 at mainbus? # A9 On-Chip Peripherals | 57 | armperiph0 at mainbus? # A9 On-Chip Peripherals | |
58 | armgic0 at armperiph? # ARM Generic Interrupt Controller | 58 | armgic0 at armperiph? # ARM Generic Interrupt Controller | |
59 | arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC | 59 | arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC | |
60 | a9tmr0 at armperiph? # A9 Global Timer | 60 | arma9tmr0 at armperiph? # A9 Global Timer | |
61 | #a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer | 61 | #a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer | |
62 | 62 | |||
63 | axi0 at mainbus? | 63 | axi0 at mainbus? | |
64 | 64 | |||
65 | # System Level Control Module | 65 | # System Level Control Module | |
66 | zynqslcr0 at axi? addr 0xf8000000 | 66 | zynqslcr0 at axi? addr 0xf8000000 | |
67 | 67 | |||
68 | # UART | 68 | # UART | |
69 | zynquart0 at axi? addr 0xe0000000 irq 59 | 69 | zynquart0 at axi? addr 0xe0000000 irq 59 | |
70 | zynquart1 at axi? addr 0xe0001000 irq 82 | 70 | zynquart1 at axi? addr 0xe0001000 irq 82 | |
71 | options ZYNQUARTCONSOLE | 71 | options ZYNQUARTCONSOLE | |
72 | 72 | |||
73 | # SD/MMC | 73 | # SD/MMC |
--- src/sys/arch/evbarm/conf/Attic/ODROID-C1 2017/03/20 14:06:43 1.22
+++ src/sys/arch/evbarm/conf/Attic/ODROID-C1 2018/06/05 08:03:28 1.23
@@ -1,40 +1,40 @@ | @@ -1,40 +1,40 @@ | |||
1 | # | 1 | # | |
2 | # $NetBSD: ODROID-C1,v 1.22 2017/03/20 14:06:43 skrll Exp $ | 2 | # $NetBSD: ODROID-C1,v 1.23 2018/06/05 08:03:28 hkenken Exp $ | |
3 | # | 3 | # | |
4 | # Hardkernel ODROID-C1 (Amlogic S805) based SBC (Single Board Computer) | 4 | # Hardkernel ODROID-C1 (Amlogic S805) based SBC (Single Board Computer) | |
5 | # | 5 | # | |
6 | 6 | |||
7 | include "arch/evbarm/conf/std.amlogic" | 7 | include "arch/evbarm/conf/std.amlogic" | |
8 | include "arch/evbarm/conf/GENERIC.common" | 8 | include "arch/evbarm/conf/GENERIC.common" | |
9 | 9 | |||
10 | options CPU_CORTEXA5 | 10 | options CPU_CORTEXA5 | |
11 | options MULTIPROCESSOR | 11 | options MULTIPROCESSOR | |
12 | 12 | |||
13 | #options DIAGNOSTIC | 13 | #options DIAGNOSTIC | |
14 | #options DEBUG | 14 | #options DEBUG | |
15 | #options LOCKDEBUG | 15 | #options LOCKDEBUG | |
16 | makeoptions DEBUG="-g" # compile full symbol table | 16 | makeoptions DEBUG="-g" # compile full symbol table | |
17 | makeoptions COPY_SYMTAB=1 | 17 | makeoptions COPY_SYMTAB=1 | |
18 | 18 | |||
19 | config netbsd root on ? type ? | 19 | config netbsd root on ? type ? | |
20 | 20 | |||
21 | mainbus0 at root | 21 | mainbus0 at root | |
22 | cpu* at mainbus? | 22 | cpu* at mainbus? | |
23 | 23 | |||
24 | armperiph0 at mainbus? | 24 | armperiph0 at mainbus? | |
25 | arml2cc0 at armperiph? # L2 Cache Controller | 25 | arml2cc0 at armperiph? # L2 Cache Controller | |
26 | armgic0 at armperiph? # Interrupt Controller | 26 | armgic0 at armperiph? # Interrupt Controller | |
27 | a9tmr0 at armperiph? # Global Timer | 27 | arma9tmr0 at armperiph? # Global Timer | |
28 | a9wdt0 at armperiph? # Watchdog | 28 | a9wdt0 at armperiph? # Watchdog | |
29 | 29 | |||
30 | # On-board I/O | 30 | # On-board I/O | |
31 | amlogicio0 at mainbus? | 31 | amlogicio0 at mainbus? | |
32 | 32 | |||
33 | # On-board UARTs | 33 | # On-board UARTs | |
34 | amlogiccom0 at amlogicio0 port 0 | 34 | amlogiccom0 at amlogicio0 port 0 | |
35 | options CONSADDR=0xc81004c0, CONSPEED=115200 | 35 | options CONSADDR=0xc81004c0, CONSPEED=115200 | |
36 | 36 | |||
37 | # GPIO | 37 | # GPIO | |
38 | amlogicgpio0 at amlogicio0 | 38 | amlogicgpio0 at amlogicio0 | |
39 | gpio* at gpiobus? | 39 | gpio* at gpiobus? | |
40 | 40 |
--- src/sys/arch/evbarm/conf/Attic/PANDABOARD 2017/09/14 07:58:40 1.24
+++ src/sys/arch/evbarm/conf/Attic/PANDABOARD 2018/06/05 08:03:28 1.25
@@ -1,15 +1,15 @@ | @@ -1,15 +1,15 @@ | |||
1 | # | 1 | # | |
2 | # $NetBSD: PANDABOARD,v 1.24 2017/09/14 07:58:40 mrg Exp $ | 2 | # $NetBSD: PANDABOARD,v 1.25 2018/06/05 08:03:28 hkenken Exp $ | |
3 | # | 3 | # | |
4 | # PANDABOARD -- TI OMAP 4430 Eval Board Kernel | 4 | # PANDABOARD -- TI OMAP 4430 Eval Board Kernel | |
5 | # | 5 | # | |
6 | 6 | |||
7 | include "arch/evbarm/conf/std.beagle" | 7 | include "arch/evbarm/conf/std.beagle" | |
8 | 8 | |||
9 | # estimated number of users | 9 | # estimated number of users | |
10 | 10 | |||
11 | maxusers 32 | 11 | maxusers 32 | |
12 | 12 | |||
13 | # Standard system options | 13 | # Standard system options | |
14 | 14 | |||
15 | options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT | 15 | options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT | |
@@ -143,27 +143,27 @@ options BOOT_ARGS="\"\"" | @@ -143,27 +143,27 @@ options BOOT_ARGS="\"\"" | |||
143 | 143 | |||
144 | config netbsd root on ? type ? | 144 | config netbsd root on ? type ? | |
145 | 145 | |||
146 | # The main bus device | 146 | # The main bus device | |
147 | mainbus0 at root | 147 | mainbus0 at root | |
148 | 148 | |||
149 | # The boot cpu | 149 | # The boot cpu | |
150 | cpu0 at mainbus? | 150 | cpu0 at mainbus? | |
151 | 151 | |||
152 | # A9 core devices | 152 | # A9 core devices | |
153 | armperiph0 at mainbus? | 153 | armperiph0 at mainbus? | |
154 | arml2cc0 at armperiph? # L2 Cache Controller | 154 | arml2cc0 at armperiph? # L2 Cache Controller | |
155 | armgic0 at armperiph? # Interrupt Controller | 155 | armgic0 at armperiph? # Interrupt Controller | |
156 | a9tmr0 at armperiph? # Global Timer | 156 | arma9tmr0 at armperiph? # Global Timer | |
157 | a9wdt0 at armperiph? # Watchdog | 157 | a9wdt0 at armperiph? # Watchdog | |
158 | 158 | |||
159 | # Specify the memory size in megabytes. | 159 | # Specify the memory size in megabytes. | |
160 | #options MEMSIZE=512 | 160 | #options MEMSIZE=512 | |
161 | 161 | |||
162 | # L3 Interconnect | 162 | # L3 Interconnect | |
163 | L3i0 at mainbus? | 163 | L3i0 at mainbus? | |
164 | 164 | |||
165 | # OBIO | 165 | # OBIO | |
166 | obio0 at mainbus? base 0x4a000000 size 0x1000000 # L4 CORE (CFG) | 166 | obio0 at mainbus? base 0x4a000000 size 0x1000000 # L4 CORE (CFG) | |
167 | obio1 at mainbus? base 0x4a300000 size 0x0100000 # L4 WAKEUP | 167 | obio1 at mainbus? base 0x4a300000 size 0x0100000 # L4 WAKEUP | |
168 | obio2 at mainbus? base 0x48000000 size 0x1000000 # L4 PERIPHERAL | 168 | obio2 at mainbus? base 0x48000000 size 0x1000000 # L4 PERIPHERAL | |
169 | obio3 at mainbus? base 0x49000000 size 0x1000000 # L4 ABE | 169 | obio3 at mainbus? base 0x49000000 size 0x1000000 # L4 ABE |
--- src/sys/arch/evbarm/gumstix/gumstix_machdep.c 2017/03/01 16:44:54 1.58
+++ src/sys/arch/evbarm/gumstix/gumstix_machdep.c 2018/06/05 08:03:28 1.59
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: gumstix_machdep.c,v 1.58 2017/03/01 16:44:54 skrll Exp $ */ | 1 | /* $NetBSD: gumstix_machdep.c,v 1.59 2018/06/05 08:03:28 hkenken Exp $ */ | |
2 | /* | 2 | /* | |
3 | * Copyright (C) 2005, 2006, 2007 WIDE Project and SOUM Corporation. | 3 | * Copyright (C) 2005, 2006, 2007 WIDE Project and SOUM Corporation. | |
4 | * All rights reserved. | 4 | * All rights reserved. | |
5 | * | 5 | * | |
6 | * Written by Takashi Kiyohara and Susumu Miki for WIDE Project and SOUM | 6 | * Written by Takashi Kiyohara and Susumu Miki for WIDE Project and SOUM | |
7 | * Corporation. | 7 | * Corporation. | |
8 | * | 8 | * | |
9 | * Redistribution and use in source and binary forms, with or without | 9 | * Redistribution and use in source and binary forms, with or without | |
10 | * modification, are permitted provided that the following conditions | 10 | * modification, are permitted provided that the following conditions | |
11 | * are met: | 11 | * are met: | |
12 | * 1. Redistributions of source code must retain the above copyright | 12 | * 1. Redistributions of source code must retain the above copyright | |
13 | * notice, this list of conditions and the following disclaimer. | 13 | * notice, this list of conditions and the following disclaimer. | |
14 | * 2. Redistributions in binary form must reproduce the above copyright | 14 | * 2. Redistributions in binary form must reproduce the above copyright | |
@@ -1041,27 +1041,27 @@ kgdb_port_init(void) | @@ -1041,27 +1041,27 @@ kgdb_port_init(void) | |||
1041 | 1041 | |||
1042 | pxa2x0_clkman_config(cken, 1); | 1042 | pxa2x0_clkman_config(cken, 1); | |
1043 | } | 1043 | } | |
1044 | 1044 | |||
1045 | #endif | 1045 | #endif | |
1046 | } | 1046 | } | |
1047 | #endif | 1047 | #endif | |
1048 | 1048 | |||
1049 | static void | 1049 | static void | |
1050 | gumstix_device_register(device_t dev, void *aux) | 1050 | gumstix_device_register(device_t dev, void *aux) | |
1051 | { | 1051 | { | |
1052 | prop_dictionary_t dict = device_properties(dev); | 1052 | prop_dictionary_t dict = device_properties(dev); | |
1053 | 1053 | |||
1054 | if (device_is_a(dev, "a9tmr") || | 1054 | if (device_is_a(dev, "arma9tmr") || | |
1055 | device_is_a(dev, "a9wdt")) { | 1055 | device_is_a(dev, "a9wdt")) { | |
1056 | /* | 1056 | /* | |
1057 | * We need to tell the A9 Global/Watchdog Timer | 1057 | * We need to tell the A9 Global/Watchdog Timer | |
1058 | * what frequency it runs at. | 1058 | * what frequency it runs at. | |
1059 | */ | 1059 | */ | |
1060 | 1060 | |||
1061 | /* | 1061 | /* | |
1062 | * This clock always runs at (arm_clk div 2) and only goes | 1062 | * This clock always runs at (arm_clk div 2) and only goes | |
1063 | * to timers that are part of the A9 MP core subsystem. | 1063 | * to timers that are part of the A9 MP core subsystem. | |
1064 | */ | 1064 | */ | |
1065 | prop_dictionary_set_uint32(dict, "frequency", | 1065 | prop_dictionary_set_uint32(dict, "frequency", | |
1066 | curcpu()->ci_data.cpu_cc_freq / 2); | 1066 | curcpu()->ci_data.cpu_cc_freq / 2); | |
1067 | } | 1067 | } |
--- src/sys/dev/DEVNAMES 2018/04/09 20:16:53 1.310
+++ src/sys/dev/DEVNAMES 2018/06/05 08:03:29 1.311
@@ -1,29 +1,28 @@ | @@ -1,29 +1,28 @@ | |||
1 | # $NetBSD: DEVNAMES,v 1.310 2018/04/09 20:16:53 christos Exp $ | 1 | # $NetBSD: DEVNAMES,v 1.311 2018/06/05 08:03:29 hkenken Exp $ | |
2 | # | 2 | # | |
3 | # This file contains all used device names and defined attributes in | 3 | # This file contains all used device names and defined attributes in | |
4 | # alphabetical order. New devices added to the system somewhere should first | 4 | # alphabetical order. New devices added to the system somewhere should first | |
5 | # be checked for uniqueness here and thereafter added to this file. | 5 | # be checked for uniqueness here and thereafter added to this file. | |
6 | # | 6 | # | |
7 | # NOTE: Before adding devices to this list, ensure the appropriate | 7 | # NOTE: Before adding devices to this list, ensure the appropriate | |
8 | # man pages exist. | 8 | # man pages exist. | |
9 | # | 9 | # | |
10 | a12c alpha | 10 | a12c alpha | |
11 | a12dc alpha | 11 | a12dc alpha | |
12 | a2kbbc amiga | 12 | a2kbbc amiga | |
13 | a2kbbc amigappc | 13 | a2kbbc amigappc | |
14 | a34kbbc amiga | 14 | a34kbbc amiga | |
15 | a34kbbc amigappc | 15 | a34kbbc amigappc | |
16 | a9tmr arm | |||
17 | a9wdt arm | 16 | a9wdt arm | |
18 | aac MI | 17 | aac MI | |
19 | abtn macppc | 18 | abtn macppc | |
20 | abus vax | 19 | abus vax | |
21 | ac97 MI Attribute | 20 | ac97 MI Attribute | |
22 | acardide MI | 21 | acardide MI | |
23 | acc vax | 22 | acc vax | |
24 | acemidi MI | 23 | acemidi MI | |
25 | aceride MI | 24 | aceride MI | |
26 | aclock arc | 25 | aclock arc | |
27 | acphy MI | 26 | acphy MI | |
28 | acpi MI | 27 | acpi MI | |
29 | acpiacad MI | 28 | acpiacad MI | |
@@ -80,26 +79,27 @@ amps acorn32 | @@ -80,26 +79,27 @@ amps acorn32 | |||
80 | amr MI | 79 | amr MI | |
81 | ams mac68k | 80 | ams mac68k | |
82 | ams macppc | 81 | ams macppc | |
83 | an MI | 82 | an MI | |
84 | ap newsmips | 83 | ap newsmips | |
85 | apc sparc | 84 | apc sparc | |
86 | apecs alpha | 85 | apecs alpha | |
87 | apm i386 | 86 | apm i386 | |
88 | aps MI | 87 | aps MI | |
89 | arbus evbmips | 88 | arbus evbmips | |
90 | arc MI Attribute | 89 | arc MI Attribute | |
91 | arcmsr MI | 90 | arcmsr MI | |
92 | aria MI | 91 | aria MI | |
92 | arma9tmr arm | |||
93 | armgic arm | 93 | armgic arm | |
94 | arml2cc arm | 94 | arml2cc arm | |
95 | armperiph arm | 95 | armperiph arm | |
96 | arp MI Attribute | 96 | arp MI Attribute | |
97 | artsata MI | 97 | artsata MI | |
98 | asc acorn32 | 98 | asc acorn32 | |
99 | asc alpha | 99 | asc alpha | |
100 | asc arc | 100 | asc arc | |
101 | asc mac68k | 101 | asc mac68k | |
102 | asc mipsco | 102 | asc mipsco | |
103 | asc pmax | 103 | asc pmax | |
104 | asc vax | 104 | asc vax | |
105 | asiop amiga Attribute | 105 | asiop amiga Attribute |