| @@ -1,353 +1,351 @@ | | | @@ -1,353 +1,351 @@ |
1 | /* $NetBSD: gtmr.c,v 1.28 2018/05/21 10:28:13 jmcneill Exp $ */ | | 1 | /* $NetBSD: gtmr.c,v 1.29 2018/06/09 01:17:35 jakllsch Exp $ */ |
2 | | | 2 | |
3 | /*- | | 3 | /*- |
4 | * Copyright (c) 2012 The NetBSD Foundation, Inc. | | 4 | * Copyright (c) 2012 The NetBSD Foundation, Inc. |
5 | * All rights reserved. | | 5 | * All rights reserved. |
6 | * | | 6 | * |
7 | * This code is derived from software contributed to The NetBSD Foundation | | 7 | * This code is derived from software contributed to The NetBSD Foundation |
8 | * by Matt Thomas | | 8 | * by Matt Thomas |
9 | * | | 9 | * |
10 | * Redistribution and use in source and binary forms, with or without | | 10 | * Redistribution and use in source and binary forms, with or without |
11 | * modification, are permitted provided that the following conditions | | 11 | * modification, are permitted provided that the following conditions |
12 | * are met: | | 12 | * are met: |
13 | * 1. Redistributions of source code must retain the above copyright | | 13 | * 1. Redistributions of source code must retain the above copyright |
14 | * notice, this list of conditions and the following disclaimer. | | 14 | * notice, this list of conditions and the following disclaimer. |
15 | * 2. Redistributions in binary form must reproduce the above copyright | | 15 | * 2. Redistributions in binary form must reproduce the above copyright |
16 | * notice, this list of conditions and the following disclaimer in the | | 16 | * notice, this list of conditions and the following disclaimer in the |
17 | * documentation and/or other materials provided with the distribution. | | 17 | * documentation and/or other materials provided with the distribution. |
18 | * | | 18 | * |
19 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS | | 19 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
20 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | | 20 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
21 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | | 21 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
22 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS | | 22 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
23 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | | 23 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
24 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | | 24 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
25 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | | 25 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | | 26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | | 27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | | 28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
29 | * POSSIBILITY OF SUCH DAMAGE. | | 29 | * POSSIBILITY OF SUCH DAMAGE. |
30 | */ | | 30 | */ |
31 | | | 31 | |
32 | #include <sys/cdefs.h> | | 32 | #include <sys/cdefs.h> |
33 | __KERNEL_RCSID(0, "$NetBSD: gtmr.c,v 1.28 2018/05/21 10:28:13 jmcneill Exp $"); | | 33 | __KERNEL_RCSID(0, "$NetBSD: gtmr.c,v 1.29 2018/06/09 01:17:35 jakllsch Exp $"); |
34 | | | 34 | |
35 | #include <sys/param.h> | | 35 | #include <sys/param.h> |
36 | #include <sys/bus.h> | | 36 | #include <sys/bus.h> |
37 | #include <sys/device.h> | | 37 | #include <sys/device.h> |
38 | #include <sys/intr.h> | | 38 | #include <sys/intr.h> |
39 | #include <sys/kernel.h> | | 39 | #include <sys/kernel.h> |
40 | #include <sys/percpu.h> | | 40 | #include <sys/percpu.h> |
41 | #include <sys/proc.h> | | 41 | #include <sys/proc.h> |
42 | #include <sys/systm.h> | | 42 | #include <sys/systm.h> |
43 | #include <sys/timetc.h> | | 43 | #include <sys/timetc.h> |
44 | | | 44 | |
45 | #include <prop/proplib.h> | | 45 | #include <prop/proplib.h> |
46 | | | 46 | |
47 | #include <arm/locore.h> | | 47 | #include <arm/locore.h> |
48 | #include <arm/cpufunc.h> | | 48 | #include <arm/cpufunc.h> |
49 | | | 49 | |
50 | #include <arm/cortex/gtmr_var.h> | | 50 | #include <arm/cortex/gtmr_var.h> |
51 | #include <arm/cortex/mpcore_var.h> | | 51 | #include <arm/cortex/mpcore_var.h> |
52 | | | 52 | |
53 | #define stable_write(reg) \ | | 53 | #define stable_write(reg) \ |
54 | static struct evcnt reg ## _write_ev; \ | | 54 | static struct evcnt reg ## _write_ev; \ |
55 | static void \ | | 55 | static void \ |
56 | reg ## _stable_write(struct gtmr_softc *sc, uint64_t val) \ | | 56 | reg ## _stable_write(struct gtmr_softc *sc, uint64_t val) \ |
57 | { \ | | 57 | { \ |
58 | int retry; \ | | 58 | int retry; \ |
59 | reg ## _write(val); \ | | 59 | reg ## _write(val); \ |
60 | retry = 0; \ | | 60 | retry = 0; \ |
61 | while (reg ## _read() != (val) && retry++ < 200) \ | | 61 | while (reg ## _read() != (val) && retry++ < 200) \ |
62 | reg ## _write(val); \ | | 62 | reg ## _write(val); \ |
63 | if (retry > reg ## _write_ev.ev_count) { \ | | 63 | if (retry > reg ## _write_ev.ev_count) { \ |
64 | reg ## _write_ev.ev_count = retry; \ | | 64 | reg ## _write_ev.ev_count = retry; \ |
65 | } \ | | 65 | } \ |
66 | } | | 66 | } |
67 | | | 67 | |
68 | stable_write(gtmr_cntv_tval); | | 68 | stable_write(gtmr_cntv_tval); |
69 | | | 69 | |
70 | #define stable_read(reg) \ | | 70 | #define stable_read(reg) \ |
71 | static struct evcnt reg ## _read_ev; \ | | 71 | static struct evcnt reg ## _read_ev; \ |
72 | static uint64_t \ | | 72 | static uint64_t \ |
73 | reg ## _stable_read(struct gtmr_softc *sc) \ | | 73 | reg ## _stable_read(struct gtmr_softc *sc) \ |
74 | { \ | | 74 | { \ |
75 | uint64_t oval, val; \ | | 75 | uint64_t oval, val; \ |
76 | int retry = 0; \ | | 76 | int retry = 0; \ |
77 | val = reg ## _read(); \ | | 77 | val = reg ## _read(); \ |
78 | while (++retry < 200) { \ | | 78 | while (++retry < 200) { \ |
79 | oval = val; \ | | 79 | oval = val; \ |
80 | val = reg ## _read(); \ | | 80 | val = reg ## _read(); \ |
81 | if (val == oval) \ | | 81 | if (val == oval) \ |
82 | break; \ | | 82 | break; \ |
83 | } \ | | 83 | } \ |
84 | if (retry > reg ## _read_ev.ev_count) { \ | | 84 | if (retry > reg ## _read_ev.ev_count) { \ |
85 | reg ## _read_ev.ev_count = retry; \ | | 85 | reg ## _read_ev.ev_count = retry; \ |
86 | } \ | | 86 | } \ |
87 | return val; \ | | 87 | return val; \ |
88 | } | | 88 | } |
89 | | | 89 | |
90 | stable_read(gtmr_cntv_cval); | | 90 | stable_read(gtmr_cntv_cval); |
91 | stable_read(gtmr_cntvct); | | 91 | stable_read(gtmr_cntvct); |
92 | stable_read(gtmr_cntpct); | | 92 | stable_read(gtmr_cntpct); |
93 | | | 93 | |
94 | static int gtmr_match(device_t, cfdata_t, void *); | | 94 | static int gtmr_match(device_t, cfdata_t, void *); |
95 | static void gtmr_attach(device_t, device_t, void *); | | 95 | static void gtmr_attach(device_t, device_t, void *); |
96 | | | 96 | |
97 | static u_int gtmr_get_timecount(struct timecounter *); | | 97 | static u_int gtmr_get_timecount(struct timecounter *); |
98 | | | 98 | |
99 | static struct gtmr_softc gtmr_sc; | | 99 | static struct gtmr_softc gtmr_sc; |
100 | | | 100 | |
101 | struct gtmr_percpu { | | 101 | struct gtmr_percpu { |
102 | uint32_t pc_delta; | | 102 | uint32_t pc_delta; |
103 | }; | | 103 | }; |
104 | | | 104 | |
105 | static struct timecounter gtmr_timecounter = { | | 105 | static struct timecounter gtmr_timecounter = { |
106 | .tc_get_timecount = gtmr_get_timecount, | | 106 | .tc_get_timecount = gtmr_get_timecount, |
107 | .tc_poll_pps = 0, | | 107 | .tc_poll_pps = 0, |
108 | .tc_counter_mask = ~0u, | | 108 | .tc_counter_mask = ~0u, |
109 | .tc_frequency = 0, /* set by cpu_initclocks() */ | | 109 | .tc_frequency = 0, /* set by cpu_initclocks() */ |
110 | .tc_name = NULL, /* set by attach */ | | 110 | .tc_name = NULL, /* set by attach */ |
111 | .tc_quality = 500, | | 111 | .tc_quality = 500, |
112 | .tc_priv = >mr_sc, | | 112 | .tc_priv = >mr_sc, |
113 | .tc_next = NULL, | | 113 | .tc_next = NULL, |
114 | }; | | 114 | }; |
115 | | | 115 | |
116 | CFATTACH_DECL_NEW(armgtmr, 0, gtmr_match, gtmr_attach, NULL, NULL); | | 116 | CFATTACH_DECL_NEW(armgtmr, 0, gtmr_match, gtmr_attach, NULL, NULL); |
117 | | | 117 | |
118 | /* ARGSUSED */ | | 118 | /* ARGSUSED */ |
119 | static int | | 119 | static int |
120 | gtmr_match(device_t parent, cfdata_t cf, void *aux) | | 120 | gtmr_match(device_t parent, cfdata_t cf, void *aux) |
121 | { | | 121 | { |
122 | struct mpcore_attach_args * const mpcaa = aux; | | 122 | struct mpcore_attach_args * const mpcaa = aux; |
123 | | | 123 | |
124 | if (gtmr_sc.sc_dev != NULL) | | 124 | if (gtmr_sc.sc_dev != NULL) |
125 | return 0; | | 125 | return 0; |
126 | | | 126 | |
127 | /* Genertic Timer is always implemented in ARMv8-A */ | | 127 | /* Genertic Timer is always implemented in ARMv8-A */ |
128 | if (!cpu_gtmr_exists_p()) | | 128 | if (!cpu_gtmr_exists_p()) |
129 | return 0; | | 129 | return 0; |
130 | | | 130 | |
131 | if (strcmp(mpcaa->mpcaa_name, cf->cf_name) != 0) | | 131 | if (strcmp(mpcaa->mpcaa_name, cf->cf_name) != 0) |
132 | return 0; | | 132 | return 0; |
133 | | | 133 | |
134 | return 1; | | 134 | return 1; |
135 | } | | 135 | } |
136 | | | 136 | |
137 | static void | | 137 | static void |
138 | gtmr_attach(device_t parent, device_t self, void *aux) | | 138 | gtmr_attach(device_t parent, device_t self, void *aux) |
139 | { | | 139 | { |
140 | struct mpcore_attach_args * const mpcaa = aux; | | 140 | struct mpcore_attach_args * const mpcaa = aux; |
141 | struct gtmr_softc *sc = >mr_sc; | | 141 | struct gtmr_softc *sc = >mr_sc; |
142 | prop_dictionary_t dict = device_properties(self); | | 142 | prop_dictionary_t dict = device_properties(self); |
143 | char freqbuf[sizeof("X.XXX SHz")]; | | 143 | char freqbuf[sizeof("X.XXX SHz")]; |
144 | | | 144 | |
145 | /* | | 145 | /* |
146 | * This runs at a fixed frequency of 1 to 50MHz. | | 146 | * This runs at a fixed frequency of 1 to 50MHz. |
147 | */ | | 147 | */ |
148 | if (!prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq)) | | 148 | if (!prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq)) |
149 | sc->sc_freq = gtmr_cntfrq_read(); | | 149 | sc->sc_freq = gtmr_cntfrq_read(); |
150 | | | 150 | |
151 | KASSERT(sc->sc_freq != 0); | | 151 | KASSERT(sc->sc_freq != 0); |
152 | | | 152 | |
153 | humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000); | | 153 | humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000); |
154 | | | 154 | |
155 | aprint_naive("\n"); | | 155 | aprint_naive("\n"); |
156 | aprint_normal(": ARMv7 Generic 64-bit Timer (%s)\n", freqbuf); | | 156 | aprint_normal(": ARMv7 Generic 64-bit Timer (%s)\n", freqbuf); |
157 | | | 157 | |
158 | /* | | 158 | /* |
159 | * Enable the virtual counter to be accessed from usermode. | | 159 | * Enable the virtual counter to be accessed from usermode. |
160 | */ | | 160 | */ |
161 | gtmr_cntk_ctl_write(gtmr_cntk_ctl_read() | | | 161 | gtmr_cntk_ctl_write(gtmr_cntk_ctl_read() | |
162 | CNTKCTL_PL0VCTEN | CNTKCTL_PL0PCTEN); | | 162 | CNTKCTL_PL0VCTEN | CNTKCTL_PL0PCTEN); |
163 | | | 163 | |
164 | self->dv_private = sc; | | 164 | self->dv_private = sc; |
165 | sc->sc_dev = self; | | 165 | sc->sc_dev = self; |
166 | | | 166 | |
167 | #ifdef DIAGNOSTIC | | 167 | #ifdef DIAGNOSTIC |
168 | sc->sc_percpu = percpu_alloc(sizeof(struct gtmr_percpu)); | | 168 | sc->sc_percpu = percpu_alloc(sizeof(struct gtmr_percpu)); |
169 | #endif | | 169 | #endif |
170 | | | 170 | |
171 | evcnt_attach_dynamic(&sc->sc_ev_missing_ticks, EVCNT_TYPE_MISC, NULL, | | 171 | evcnt_attach_dynamic(&sc->sc_ev_missing_ticks, EVCNT_TYPE_MISC, NULL, |
172 | device_xname(self), "missing interrupts"); | | 172 | device_xname(self), "missing interrupts"); |
173 | | | 173 | |
174 | evcnt_attach_dynamic(>mr_cntv_tval_write_ev, EVCNT_TYPE_MISC, NULL, | | 174 | evcnt_attach_dynamic(>mr_cntv_tval_write_ev, EVCNT_TYPE_MISC, NULL, |
175 | device_xname(self), "CNTV_TVAL write retry max"); | | 175 | device_xname(self), "CNTV_TVAL write retry max"); |
176 | evcnt_attach_dynamic(>mr_cntv_cval_read_ev, EVCNT_TYPE_MISC, NULL, | | 176 | evcnt_attach_dynamic(>mr_cntv_cval_read_ev, EVCNT_TYPE_MISC, NULL, |
177 | device_xname(self), "CNTV_CVAL read retry max"); | | 177 | device_xname(self), "CNTV_CVAL read retry max"); |
178 | evcnt_attach_dynamic(>mr_cntvct_read_ev, EVCNT_TYPE_MISC, NULL, | | 178 | evcnt_attach_dynamic(>mr_cntvct_read_ev, EVCNT_TYPE_MISC, NULL, |
179 | device_xname(self), "CNTVCT read retry max"); | | 179 | device_xname(self), "CNTVCT read retry max"); |
180 | evcnt_attach_dynamic(>mr_cntpct_read_ev, EVCNT_TYPE_MISC, NULL, | | 180 | evcnt_attach_dynamic(>mr_cntpct_read_ev, EVCNT_TYPE_MISC, NULL, |
181 | device_xname(self), "CNTPCT read retry max"); | | 181 | device_xname(self), "CNTPCT read retry max"); |
182 | | | 182 | |
183 | if (mpcaa->mpcaa_irq != -1) { | | 183 | if (mpcaa->mpcaa_irq != -1) { |
184 | sc->sc_global_ih = intr_establish(mpcaa->mpcaa_irq, IPL_CLOCK, | | 184 | sc->sc_global_ih = intr_establish(mpcaa->mpcaa_irq, IPL_CLOCK, |
185 | IST_LEVEL | IST_MPSAFE, gtmr_intr, NULL); | | 185 | IST_LEVEL | IST_MPSAFE, gtmr_intr, NULL); |
186 | if (sc->sc_global_ih == NULL) | | 186 | if (sc->sc_global_ih == NULL) |
187 | panic("%s: unable to register timer interrupt", __func__); | | 187 | panic("%s: unable to register timer interrupt", __func__); |
188 | aprint_normal_dev(self, "interrupting on irq %d\n", | | 188 | aprint_normal_dev(self, "interrupting on irq %d\n", |
189 | mpcaa->mpcaa_irq); | | 189 | mpcaa->mpcaa_irq); |
190 | } | | 190 | } |
191 | | | 191 | |
192 | const uint32_t cnt_frq = gtmr_cntfrq_read(); | | 192 | const uint32_t cnt_frq = gtmr_cntfrq_read(); |
193 | if (cnt_frq == 0) { | | 193 | if (cnt_frq == 0) { |
194 | aprint_verbose_dev(self, "cp15 CNT_FRQ not set\n"); | | 194 | aprint_verbose_dev(self, "cp15 CNT_FRQ not set\n"); |
195 | } else if (cnt_frq != sc->sc_freq) { | | 195 | } else if (cnt_frq != sc->sc_freq) { |
196 | aprint_verbose_dev(self, | | 196 | aprint_verbose_dev(self, |
197 | "cp15 CNT_FRQ (%u) differs from supplied frequency\n", | | 197 | "cp15 CNT_FRQ (%u) differs from supplied frequency\n", |
198 | cnt_frq); | | 198 | cnt_frq); |
199 | } | | 199 | } |
200 | | | 200 | |
201 | gtmr_timecounter.tc_name = device_xname(sc->sc_dev); | | 201 | gtmr_timecounter.tc_name = device_xname(sc->sc_dev); |
202 | gtmr_timecounter.tc_frequency = sc->sc_freq; | | 202 | gtmr_timecounter.tc_frequency = sc->sc_freq; |
203 | gtmr_timecounter.tc_priv = sc; | | 203 | gtmr_timecounter.tc_priv = sc; |
204 | | | 204 | |
205 | tc_init(>mr_timecounter); | | 205 | tc_init(>mr_timecounter); |
206 | | | 206 | |
207 | /* Disable the timer until we are ready */ | | 207 | /* Disable the timer until we are ready */ |
208 | gtmr_cntv_ctl_write(0); | | 208 | gtmr_cntv_ctl_write(0); |
209 | gtmr_cntp_ctl_write(0); | | | |
210 | } | | 209 | } |
211 | | | 210 | |
212 | void | | 211 | void |
213 | gtmr_init_cpu_clock(struct cpu_info *ci) | | 212 | gtmr_init_cpu_clock(struct cpu_info *ci) |
214 | { | | 213 | { |
215 | struct gtmr_softc * const sc = >mr_sc; | | 214 | struct gtmr_softc * const sc = >mr_sc; |
216 | | | 215 | |
217 | KASSERT(ci == curcpu()); | | 216 | KASSERT(ci == curcpu()); |
218 | | | 217 | |
219 | int s = splsched(); | | 218 | int s = splsched(); |
220 | | | 219 | |
221 | /* | | 220 | /* |
222 | * enable timer and stop masking the timer. | | 221 | * enable timer and stop masking the timer. |
223 | */ | | 222 | */ |
224 | gtmr_cntv_ctl_write(CNTCTL_ENABLE); | | 223 | gtmr_cntv_ctl_write(CNTCTL_ENABLE); |
225 | gtmr_cntp_ctl_write(CNTCTL_ENABLE); | | | |
226 | | | 224 | |
227 | /* | | 225 | /* |
228 | * Get now and update the compare timer. | | 226 | * Get now and update the compare timer. |
229 | */ | | 227 | */ |
230 | arm_isb(); | | 228 | arm_isb(); |
231 | ci->ci_lastintr = gtmr_cntvct_stable_read(sc); | | 229 | ci->ci_lastintr = gtmr_cntvct_stable_read(sc); |
232 | gtmr_cntv_tval_stable_write(sc, sc->sc_autoinc); | | 230 | gtmr_cntv_tval_stable_write(sc, sc->sc_autoinc); |
233 | splx(s); | | 231 | splx(s); |
234 | KASSERT(gtmr_cntvct_read() != 0); | | 232 | KASSERT(gtmr_cntvct_read() != 0); |
235 | } | | 233 | } |
236 | | | 234 | |
237 | void | | 235 | void |
238 | gtmr_cpu_initclocks(void) | | 236 | gtmr_cpu_initclocks(void) |
239 | { | | 237 | { |
240 | struct gtmr_softc * const sc = >mr_sc; | | 238 | struct gtmr_softc * const sc = >mr_sc; |
241 | | | 239 | |
242 | KASSERT(sc->sc_dev != NULL); | | 240 | KASSERT(sc->sc_dev != NULL); |
243 | KASSERT(sc->sc_freq != 0); | | 241 | KASSERT(sc->sc_freq != 0); |
244 | | | 242 | |
245 | sc->sc_autoinc = sc->sc_freq / hz; | | 243 | sc->sc_autoinc = sc->sc_freq / hz; |
246 | | | 244 | |
247 | gtmr_init_cpu_clock(curcpu()); | | 245 | gtmr_init_cpu_clock(curcpu()); |
248 | } | | 246 | } |
249 | | | 247 | |
250 | void | | 248 | void |
251 | gtmr_delay(unsigned int n) | | 249 | gtmr_delay(unsigned int n) |
252 | { | | 250 | { |
253 | struct gtmr_softc * const sc = >mr_sc; | | 251 | struct gtmr_softc * const sc = >mr_sc; |
254 | | | 252 | |
255 | KASSERT(sc != NULL); | | 253 | KASSERT(sc != NULL); |
256 | | | 254 | |
257 | uint32_t freq = sc->sc_freq ? sc->sc_freq : gtmr_cntfrq_read(); | | 255 | uint32_t freq = sc->sc_freq ? sc->sc_freq : gtmr_cntfrq_read(); |
258 | KASSERT(freq != 0); | | 256 | KASSERT(freq != 0); |
259 | | | 257 | |
260 | const unsigned int incr_per_us = howmany(freq, 1000000); | | 258 | const unsigned int incr_per_us = howmany(freq, 1000000); |
261 | unsigned int delta = 0, usecs = 0; | | 259 | unsigned int delta = 0, usecs = 0; |
262 | | | 260 | |
263 | arm_isb(); | | 261 | arm_isb(); |
264 | uint64_t last = gtmr_cntpct_stable_read(sc); | | 262 | uint64_t last = gtmr_cntpct_stable_read(sc); |
265 | | | 263 | |
266 | while (n > usecs) { | | 264 | while (n > usecs) { |
267 | arm_isb(); | | 265 | arm_isb(); |
268 | uint64_t curr = gtmr_cntpct_stable_read(sc); | | 266 | uint64_t curr = gtmr_cntpct_stable_read(sc); |
269 | if (curr < last) | | 267 | if (curr < last) |
270 | delta += curr + (UINT64_MAX - last); | | 268 | delta += curr + (UINT64_MAX - last); |
271 | else | | 269 | else |
272 | delta += curr - last; | | 270 | delta += curr - last; |
273 | | | 271 | |
274 | last = curr; | | 272 | last = curr; |
275 | if (delta >= incr_per_us) { | | 273 | if (delta >= incr_per_us) { |
276 | usecs += delta / incr_per_us; | | 274 | usecs += delta / incr_per_us; |
277 | delta %= incr_per_us; | | 275 | delta %= incr_per_us; |
278 | } | | 276 | } |
279 | } | | 277 | } |
280 | } | | 278 | } |
281 | | | 279 | |
282 | /* | | 280 | /* |
283 | * gtmr_intr: | | 281 | * gtmr_intr: |
284 | * | | 282 | * |
285 | * Handle the hardclock interrupt. | | 283 | * Handle the hardclock interrupt. |
286 | */ | | 284 | */ |
287 | int | | 285 | int |
288 | gtmr_intr(void *arg) | | 286 | gtmr_intr(void *arg) |
289 | { | | 287 | { |
290 | struct cpu_info * const ci = curcpu(); | | 288 | struct cpu_info * const ci = curcpu(); |
291 | struct clockframe * const cf = arg; | | 289 | struct clockframe * const cf = arg; |
292 | struct gtmr_softc * const sc = >mr_sc; | | 290 | struct gtmr_softc * const sc = >mr_sc; |
293 | | | 291 | |
294 | arm_isb(); | | 292 | arm_isb(); |
295 | | | 293 | |
296 | const uint32_t ctl = gtmr_cntv_ctl_read(); | | 294 | const uint32_t ctl = gtmr_cntv_ctl_read(); |
297 | if ((ctl & CNTCTL_ISTATUS) == 0) | | 295 | if ((ctl & CNTCTL_ISTATUS) == 0) |
298 | return 0; | | 296 | return 0; |
299 | | | 297 | |
300 | const uint64_t now = gtmr_cntvct_stable_read(sc); | | 298 | const uint64_t now = gtmr_cntvct_stable_read(sc); |
301 | uint64_t delta = now - ci->ci_lastintr; | | 299 | uint64_t delta = now - ci->ci_lastintr; |
302 | | | 300 | |
303 | #ifdef DIAGNOSTIC | | 301 | #ifdef DIAGNOSTIC |
304 | const uint64_t then = gtmr_cntv_cval_stable_read(sc); | | 302 | const uint64_t then = gtmr_cntv_cval_stable_read(sc); |
305 | struct gtmr_percpu * const pc = percpu_getref(sc->sc_percpu); | | 303 | struct gtmr_percpu * const pc = percpu_getref(sc->sc_percpu); |
306 | KASSERTMSG(then <= now, "%"PRId64, now - then); | | 304 | KASSERTMSG(then <= now, "%"PRId64, now - then); |
307 | KASSERTMSG(then + pc->pc_delta >= ci->ci_lastintr + sc->sc_autoinc, | | 305 | KASSERTMSG(then + pc->pc_delta >= ci->ci_lastintr + sc->sc_autoinc, |
308 | "%"PRId64, then + pc->pc_delta - ci->ci_lastintr - sc->sc_autoinc); | | 306 | "%"PRId64, then + pc->pc_delta - ci->ci_lastintr - sc->sc_autoinc); |
309 | #endif | | 307 | #endif |
310 | | | 308 | |
311 | KASSERTMSG(delta > sc->sc_autoinc / 100, | | 309 | KASSERTMSG(delta > sc->sc_autoinc / 100, |
312 | "%s: interrupting too quickly (delta=%"PRIu64") autoinc=%lu", | | 310 | "%s: interrupting too quickly (delta=%"PRIu64") autoinc=%lu", |
313 | ci->ci_data.cpu_name, delta, sc->sc_autoinc); | | 311 | ci->ci_data.cpu_name, delta, sc->sc_autoinc); |
314 | | | 312 | |
315 | /* | | 313 | /* |
316 | * If we got interrupted too soon (delta < sc->sc_autoinc) | | 314 | * If we got interrupted too soon (delta < sc->sc_autoinc) |
317 | * or we missed (or almost missed) a tick | | 315 | * or we missed (or almost missed) a tick |
318 | * (delta >= 7 * sc->sc_autoinc / 4), don't try to adjust for jitter. | | 316 | * (delta >= 7 * sc->sc_autoinc / 4), don't try to adjust for jitter. |
319 | */ | | 317 | */ |
320 | if (delta >= sc->sc_autoinc && delta <= 7 * sc->sc_autoinc / 4) { | | 318 | if (delta >= sc->sc_autoinc && delta <= 7 * sc->sc_autoinc / 4) { |
321 | delta -= sc->sc_autoinc; | | 319 | delta -= sc->sc_autoinc; |
322 | } else { | | 320 | } else { |
323 | delta = 0; | | 321 | delta = 0; |
324 | } | | 322 | } |
325 | gtmr_cntv_tval_stable_write(sc, sc->sc_autoinc - delta); | | 323 | gtmr_cntv_tval_stable_write(sc, sc->sc_autoinc - delta); |
326 | | | 324 | |
327 | ci->ci_lastintr = now; | | 325 | ci->ci_lastintr = now; |
328 | | | 326 | |
329 | #ifdef DIAGNOSTIC | | 327 | #ifdef DIAGNOSTIC |
330 | KASSERT(delta == (uint32_t) delta); | | 328 | KASSERT(delta == (uint32_t) delta); |
331 | pc->pc_delta = delta; | | 329 | pc->pc_delta = delta; |
332 | percpu_putref(sc->sc_percpu); | | 330 | percpu_putref(sc->sc_percpu); |
333 | #endif | | 331 | #endif |
334 | | | 332 | |
335 | hardclock(cf); | | 333 | hardclock(cf); |
336 | | | 334 | |
337 | sc->sc_ev_missing_ticks.ev_count += delta / sc->sc_autoinc; | | 335 | sc->sc_ev_missing_ticks.ev_count += delta / sc->sc_autoinc; |
338 | | | 336 | |
339 | return 1; | | 337 | return 1; |
340 | } | | 338 | } |
341 | | | 339 | |
342 | void | | 340 | void |
343 | setstatclockrate(int newhz) | | 341 | setstatclockrate(int newhz) |
344 | { | | 342 | { |
345 | } | | 343 | } |
346 | | | 344 | |
347 | static u_int | | 345 | static u_int |
348 | gtmr_get_timecount(struct timecounter *tc) | | 346 | gtmr_get_timecount(struct timecounter *tc) |
349 | { | | 347 | { |
350 | struct gtmr_softc * const sc = tc->tc_priv; | | 348 | struct gtmr_softc * const sc = tc->tc_priv; |
351 | arm_isb(); // we want the time NOW, not some instructions later. | | 349 | arm_isb(); // we want the time NOW, not some instructions later. |
352 | return (u_int) gtmr_cntpct_stable_read(sc); | | 350 | return (u_int) gtmr_cntpct_stable_read(sc); |
353 | } | | 351 | } |