| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
1 | /* $NetBSD: bcm283x_platform.c,v 1.6 2018/06/27 11:12:14 ryo Exp $ */ | | 1 | /* $NetBSD: bcm283x_platform.c,v 1.7 2018/07/09 06:21:46 ryo Exp $ */ |
2 | | | 2 | |
3 | /*- | | 3 | /*- |
4 | * Copyright (c) 2017 Jared D. McNeill <jmcneill@invisible.ca> | | 4 | * Copyright (c) 2017 Jared D. McNeill <jmcneill@invisible.ca> |
5 | * All rights reserved. | | 5 | * All rights reserved. |
6 | * | | 6 | * |
7 | * Redistribution and use in source and binary forms, with or without | | 7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions | | 8 | * modification, are permitted provided that the following conditions |
9 | * are met: | | 9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright | | 10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. | | 11 | * notice, this list of conditions and the following disclaimer. |
12 | * 2. Redistributions in binary form must reproduce the above copyright | | 12 | * 2. Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the | | 13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. | | 14 | * documentation and/or other materials provided with the distribution. |
| @@ -17,27 +17,27 @@ | | | @@ -17,27 +17,27 @@ |
17 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | | 17 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | | 18 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | | 19 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | | 20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
21 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | | 21 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED | | 22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
23 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | | 23 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
24 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | | 24 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | | 25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
26 | * SUCH DAMAGE. | | 26 | * SUCH DAMAGE. |
27 | */ | | 27 | */ |
28 | | | 28 | |
29 | #include <sys/cdefs.h> | | 29 | #include <sys/cdefs.h> |
30 | __KERNEL_RCSID(0, "$NetBSD: bcm283x_platform.c,v 1.6 2018/06/27 11:12:14 ryo Exp $"); | | 30 | __KERNEL_RCSID(0, "$NetBSD: bcm283x_platform.c,v 1.7 2018/07/09 06:21:46 ryo Exp $"); |
31 | | | 31 | |
32 | #include "opt_arm_debug.h" | | 32 | #include "opt_arm_debug.h" |
33 | #include "opt_bcm283x.h" | | 33 | #include "opt_bcm283x.h" |
34 | #include "opt_cpuoptions.h" | | 34 | #include "opt_cpuoptions.h" |
35 | #include "opt_ddb.h" | | 35 | #include "opt_ddb.h" |
36 | #include "opt_evbarm_boardtype.h" | | 36 | #include "opt_evbarm_boardtype.h" |
37 | #include "opt_kgdb.h" | | 37 | #include "opt_kgdb.h" |
38 | #include "opt_fdt.h" | | 38 | #include "opt_fdt.h" |
39 | #include "opt_rpi.h" | | 39 | #include "opt_rpi.h" |
40 | #include "opt_vcprop.h" | | 40 | #include "opt_vcprop.h" |
41 | | | 41 | |
42 | #include "sdhc.h" | | 42 | #include "sdhc.h" |
43 | #include "bcmsdhost.h" | | 43 | #include "bcmsdhost.h" |
| @@ -764,55 +764,89 @@ bcm2836_bootparams(void) | | | @@ -764,55 +764,89 @@ bcm2836_bootparams(void) |
764 | { | | 764 | { |
765 | const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); | | 765 | const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); |
766 | const bus_space_tag_t iot = &bcm2836_bs_tag; | | 766 | const bus_space_tag_t iot = &bcm2836_bs_tag; |
767 | const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa); | | 767 | const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa); |
768 | | | 768 | |
769 | bcm283x_bootparams(iot, ioh); | | 769 | bcm283x_bootparams(iot, ioh); |
770 | } | | 770 | } |
771 | | | 771 | |
772 | static void | | 772 | static void |
773 | bcm2836_bootstrap(void) | | 773 | bcm2836_bootstrap(void) |
774 | { | | 774 | { |
775 | #define RPI_CPU_MAX 4 | | 775 | #define RPI_CPU_MAX 4 |
776 | | | 776 | |
777 | #ifdef MULTIPROCESSOR | | 777 | #ifdef VERBOSE_INIT_ARM |
778 | extern int cortex_mmuinfo; | | 778 | #define DPRINTF(...) printf(__VA_ARGS__) |
| | | 779 | #else |
| | | 780 | #define DPRINTF(...) |
| | | 781 | #endif |
779 | | | 782 | |
| | | 783 | #ifdef MULTIPROCESSOR |
780 | arm_cpu_max = RPI_CPU_MAX; | | 784 | arm_cpu_max = RPI_CPU_MAX; |
| | | 785 | DPRINTF("%s: %d cpus present\n", __func__, arm_cpu_max); |
| | | 786 | #ifdef __arm__ |
| | | 787 | extern int cortex_mmuinfo; |
781 | cortex_mmuinfo = armreg_ttbr_read(); | | 788 | cortex_mmuinfo = armreg_ttbr_read(); |
782 | #ifdef VERBOSE_INIT_ARM | | 789 | DPRINTF("%s: cortex_mmuinfo %x\n", __func__, cortex_mmuinfo); |
783 | printf("%s: %d cpus present\n", __func__, arm_cpu_max); | | | |
784 | printf("%s: cortex_mmuinfo %x\n", __func__, cortex_mmuinfo); | | | |
785 | #endif | | 790 | #endif |
| | | 791 | #endif /* MULTIPROCESSOR */ |
| | | 792 | |
| | | 793 | #ifdef __aarch64__ |
| | | 794 | /* |
| | | 795 | * XXX: use psci_fdt_bootstrap() |
| | | 796 | */ |
| | | 797 | extern void aarch64_mpstart(void); |
| | | 798 | for (int i = 1; i < RPI_CPU_MAX; i++) { |
| | | 799 | /* |
| | | 800 | * Reference: |
| | | 801 | * armstubs/armstub8.S |
| | | 802 | * in https://github.com/raspberrypi/tools |
| | | 803 | */ |
| | | 804 | volatile uint64_t *cpu_release_addr; |
| | | 805 | #define RPI3_ARMSTUB8_SPINADDR_BASE 0x000000d8 |
| | | 806 | cpu_release_addr = |
| | | 807 | AARCH64_PA_TO_KVA(RPI3_ARMSTUB8_SPINADDR_BASE + i * 8); |
| | | 808 | *cpu_release_addr = aarch64_kern_vtophys(aarch64_mpstart); |
| | | 809 | |
| | | 810 | /* need flush cache. secondary processors are cache disabled */ |
| | | 811 | cpu_dcache_wb_range(cpu_release_addr, sizeof(cpu_release_addr)); |
| | | 812 | __asm __volatile("sev" ::: "memory"); |
| | | 813 | |
| | | 814 | #if defined(VERBOSE_INIT_ARM) && defined(EARLYCONS) |
| | | 815 | /* wait secondary processor's debug output */ |
| | | 816 | gtmr_delay(100000); |
786 | #endif | | 817 | #endif |
| | | 818 | } |
| | | 819 | #endif /* __aarch64__ */ |
787 | | | 820 | |
788 | #ifndef __aarch64__ | | 821 | #ifdef __arm__ |
789 | /* | | 822 | /* |
790 | * Even if no options MULTIPROCESSOR, | | 823 | * Even if no options MULTIPROCESSOR, |
791 | * It is need to initialize the secondary CPU, | | 824 | * It is need to initialize the secondary CPU, |
792 | * and go into wfi loop (cortex_mpstart), | | 825 | * and go into wfi loop (cortex_mpstart), |
793 | * otherwise system would be freeze... | | 826 | * otherwise system would be freeze... |
794 | */ | | 827 | */ |
795 | extern void cortex_mpstart(void); | | 828 | extern void cortex_mpstart(void); |
796 | | | 829 | |
797 | for (size_t i = 1; i < RPI_CPU_MAX; i++) { | | 830 | for (size_t i = 1; i < RPI_CPU_MAX; i++) { |
798 | bus_space_tag_t iot = &bcm2836_bs_tag; | | 831 | bus_space_tag_t iot = &bcm2836_bs_tag; |
799 | bus_space_handle_t ioh = BCM2836_ARM_LOCAL_VBASE; | | 832 | bus_space_handle_t ioh = BCM2836_ARM_LOCAL_VBASE; |
800 | | | 833 | |
801 | bus_space_write_4(iot, ioh, | | 834 | bus_space_write_4(iot, ioh, |
802 | BCM2836_LOCAL_MAILBOX3_SETN(i), | | 835 | BCM2836_LOCAL_MAILBOX3_SETN(i), |
803 | (uint32_t)cortex_mpstart); | | 836 | (uint32_t)cortex_mpstart); |
804 | } | | 837 | } |
805 | #endif | | 838 | #endif |
| | | 839 | |
806 | #ifdef MULTIPROCESSOR | | 840 | #ifdef MULTIPROCESSOR |
807 | /* Wake up AP in case firmware has placed it in WFE state */ | | 841 | /* Wake up AP in case firmware has placed it in WFE state */ |
808 | __asm __volatile("sev" ::: "memory"); | | 842 | __asm __volatile("sev" ::: "memory"); |
809 | | | 843 | |
810 | for (int loop = 0; loop < 16; loop++) { | | 844 | for (int loop = 0; loop < 16; loop++) { |
811 | if (arm_cpu_hatched == __BITS(arm_cpu_max - 1, 1)) | | 845 | if (arm_cpu_hatched == __BITS(arm_cpu_max - 1, 1)) |
812 | break; | | 846 | break; |
813 | gtmr_delay(10000); | | 847 | gtmr_delay(10000); |
814 | } | | 848 | } |
815 | | | 849 | |
816 | for (size_t i = 1; i < arm_cpu_max; i++) { | | 850 | for (size_t i = 1; i < arm_cpu_max; i++) { |
817 | if ((arm_cpu_hatched & (1 << i)) == 0) { | | 851 | if ((arm_cpu_hatched & (1 << i)) == 0) { |
818 | printf("%s: warning: cpu%zu failed to hatch\n", | | 852 | printf("%s: warning: cpu%zu failed to hatch\n", |