| @@ -424,32 +424,34 @@ | | | @@ -424,32 +424,34 @@ |
424 | compatible = "brcm,bcm2835-i2c"; | | 424 | compatible = "brcm,bcm2835-i2c"; |
425 | reg = <0x7e205000 0x1000>; | | 425 | reg = <0x7e205000 0x1000>; |
426 | interrupts = <2 21>; | | 426 | interrupts = <2 21>; |
427 | clocks = <&clocks BCM2835_CLOCK_VPU>; | | 427 | clocks = <&clocks BCM2835_CLOCK_VPU>; |
428 | #address-cells = <1>; | | 428 | #address-cells = <1>; |
429 | #size-cells = <0>; | | 429 | #size-cells = <0>; |
430 | status = "disabled"; | | 430 | status = "disabled"; |
431 | }; | | 431 | }; |
432 | | | 432 | |
433 | pixelvalve@7e206000 { | | 433 | pixelvalve@7e206000 { |
434 | compatible = "brcm,bcm2835-pixelvalve0"; | | 434 | compatible = "brcm,bcm2835-pixelvalve0"; |
435 | reg = <0x7e206000 0x100>; | | 435 | reg = <0x7e206000 0x100>; |
436 | interrupts = <2 13>; /* pwa0 */ | | 436 | interrupts = <2 13>; /* pwa0 */ |
| | | 437 | status = "disabled"; |
437 | }; | | 438 | }; |
438 | | | 439 | |
439 | pixelvalve@7e207000 { | | 440 | pixelvalve@7e207000 { |
440 | compatible = "brcm,bcm2835-pixelvalve1"; | | 441 | compatible = "brcm,bcm2835-pixelvalve1"; |
441 | reg = <0x7e207000 0x100>; | | 442 | reg = <0x7e207000 0x100>; |
442 | interrupts = <2 14>; /* pwa1 */ | | 443 | interrupts = <2 14>; /* pwa1 */ |
| | | 444 | status = "disabled"; |
443 | }; | | 445 | }; |
444 | | | 446 | |
445 | dpi: dpi@7e208000 { | | 447 | dpi: dpi@7e208000 { |
446 | compatible = "brcm,bcm2835-dpi"; | | 448 | compatible = "brcm,bcm2835-dpi"; |
447 | reg = <0x7e208000 0x8c>; | | 449 | reg = <0x7e208000 0x8c>; |
448 | clocks = <&clocks BCM2835_CLOCK_VPU>, | | 450 | clocks = <&clocks BCM2835_CLOCK_VPU>, |
449 | <&clocks BCM2835_CLOCK_DPI>; | | 451 | <&clocks BCM2835_CLOCK_DPI>; |
450 | clock-names = "core", "pixel"; | | 452 | clock-names = "core", "pixel"; |
451 | #address-cells = <1>; | | 453 | #address-cells = <1>; |
452 | #size-cells = <0>; | | 454 | #size-cells = <0>; |
453 | status = "disabled"; | | 455 | status = "disabled"; |
454 | }; | | 456 | }; |
455 | | | 457 | |
| @@ -527,26 +529,27 @@ | | | @@ -527,26 +529,27 @@ |
527 | | | 529 | |
528 | sdhci: sdhci@7e300000 { | | 530 | sdhci: sdhci@7e300000 { |
529 | compatible = "brcm,bcm2835-sdhci"; | | 531 | compatible = "brcm,bcm2835-sdhci"; |
530 | reg = <0x7e300000 0x100>; | | 532 | reg = <0x7e300000 0x100>; |
531 | interrupts = <2 30>; | | 533 | interrupts = <2 30>; |
532 | clocks = <&clocks BCM2835_CLOCK_EMMC>; | | 534 | clocks = <&clocks BCM2835_CLOCK_EMMC>; |
533 | status = "disabled"; | | 535 | status = "disabled"; |
534 | }; | | 536 | }; |
535 | | | 537 | |
536 | hvs@7e400000 { | | 538 | hvs@7e400000 { |
537 | compatible = "brcm,bcm2835-hvs"; | | 539 | compatible = "brcm,bcm2835-hvs"; |
538 | reg = <0x7e400000 0x6000>; | | 540 | reg = <0x7e400000 0x6000>; |
539 | interrupts = <2 1>; | | 541 | interrupts = <2 1>; |
| | | 542 | status = "disabled"; |
540 | }; | | 543 | }; |
541 | | | 544 | |
542 | dsi1: dsi@7e700000 { | | 545 | dsi1: dsi@7e700000 { |
543 | compatible = "brcm,bcm2835-dsi1"; | | 546 | compatible = "brcm,bcm2835-dsi1"; |
544 | reg = <0x7e700000 0x8c>; | | 547 | reg = <0x7e700000 0x8c>; |
545 | interrupts = <2 12>; | | 548 | interrupts = <2 12>; |
546 | #address-cells = <1>; | | 549 | #address-cells = <1>; |
547 | #size-cells = <0>; | | 550 | #size-cells = <0>; |
548 | #clock-cells = <1>; | | 551 | #clock-cells = <1>; |
549 | | | 552 | |
550 | clocks = <&clocks BCM2835_PLLD_DSI1>, | | 553 | clocks = <&clocks BCM2835_PLLD_DSI1>, |
551 | <&clocks BCM2835_CLOCK_DSI1E>, | | 554 | <&clocks BCM2835_CLOCK_DSI1E>, |
552 | <&clocks BCM2835_CLOCK_DSI1P>; | | 555 | <&clocks BCM2835_CLOCK_DSI1P>; |
| @@ -581,26 +584,27 @@ | | | @@ -581,26 +584,27 @@ |
581 | | | 584 | |
582 | vec: vec@7e806000 { | | 585 | vec: vec@7e806000 { |
583 | compatible = "brcm,bcm2835-vec"; | | 586 | compatible = "brcm,bcm2835-vec"; |
584 | reg = <0x7e806000 0x1000>; | | 587 | reg = <0x7e806000 0x1000>; |
585 | clocks = <&clocks BCM2835_CLOCK_VEC>; | | 588 | clocks = <&clocks BCM2835_CLOCK_VEC>; |
586 | interrupts = <2 27>; | | 589 | interrupts = <2 27>; |
587 | status = "disabled"; | | 590 | status = "disabled"; |
588 | }; | | 591 | }; |
589 | | | 592 | |
590 | pixelvalve@7e807000 { | | 593 | pixelvalve@7e807000 { |
591 | compatible = "brcm,bcm2835-pixelvalve2"; | | 594 | compatible = "brcm,bcm2835-pixelvalve2"; |
592 | reg = <0x7e807000 0x100>; | | 595 | reg = <0x7e807000 0x100>; |
593 | interrupts = <2 10>; /* pixelvalve */ | | 596 | interrupts = <2 10>; /* pixelvalve */ |
| | | 597 | status = "disabled"; |
594 | }; | | 598 | }; |
595 | | | 599 | |
596 | hdmi: hdmi@7e902000 { | | 600 | hdmi: hdmi@7e902000 { |
597 | compatible = "brcm,bcm2835-hdmi"; | | 601 | compatible = "brcm,bcm2835-hdmi"; |
598 | reg = <0x7e902000 0x600>, | | 602 | reg = <0x7e902000 0x600>, |
599 | <0x7e808000 0x100>; | | 603 | <0x7e808000 0x100>; |
600 | interrupts = <2 8>, <2 9>; | | 604 | interrupts = <2 8>, <2 9>; |
601 | ddc = <&i2c2>; | | 605 | ddc = <&i2c2>; |
602 | clocks = <&clocks BCM2835_PLLH_PIX>, | | 606 | clocks = <&clocks BCM2835_PLLH_PIX>, |
603 | <&clocks BCM2835_CLOCK_HSM>; | | 607 | <&clocks BCM2835_CLOCK_HSM>; |
604 | clock-names = "pixel", "hdmi"; | | 608 | clock-names = "pixel", "hdmi"; |
605 | dmas = <&dma 17>; | | 609 | dmas = <&dma 17>; |
606 | dma-names = "audio-rx"; | | 610 | dma-names = "audio-rx"; |
| @@ -613,26 +617,27 @@ | | | @@ -613,26 +617,27 @@ |
613 | interrupts = <1 9>; | | 617 | interrupts = <1 9>; |
614 | #address-cells = <1>; | | 618 | #address-cells = <1>; |
615 | #size-cells = <0>; | | 619 | #size-cells = <0>; |
616 | clocks = <&clk_usb>; | | 620 | clocks = <&clk_usb>; |
617 | clock-names = "otg"; | | 621 | clock-names = "otg"; |
618 | phys = <&usbphy>; | | 622 | phys = <&usbphy>; |
619 | phy-names = "usb2-phy"; | | 623 | phy-names = "usb2-phy"; |
620 | }; | | 624 | }; |
621 | | | 625 | |
622 | v3d: v3d@7ec00000 { | | 626 | v3d: v3d@7ec00000 { |
623 | compatible = "brcm,bcm2835-v3d"; | | 627 | compatible = "brcm,bcm2835-v3d"; |
624 | reg = <0x7ec00000 0x1000>; | | 628 | reg = <0x7ec00000 0x1000>; |
625 | interrupts = <1 10>; | | 629 | interrupts = <1 10>; |
| | | 630 | status = "disabled"; |
626 | }; | | 631 | }; |
627 | | | 632 | |
628 | vc4: gpu { | | 633 | vc4: gpu { |
629 | compatible = "brcm,bcm2835-vc4"; | | 634 | compatible = "brcm,bcm2835-vc4"; |
630 | }; | | 635 | }; |
631 | | | 636 | |
632 | | | 637 | |
633 | fb: fb { | | 638 | fb: fb { |
634 | compatible = "brcm,bcm2835-fb"; | | 639 | compatible = "brcm,bcm2835-fb"; |
635 | status = "ok"; | | 640 | status = "ok"; |
636 | }; | | 641 | }; |
637 | | | 642 | |
638 | vchiq: vchiq { | | 643 | vchiq: vchiq { |