 @@ -1,14 +1,14 @@
-/*	$NetBSD: intel_guc_loader.c,v 1.3 2018/08/27 07:22:27 riastradh Exp $	*/
+/*	$NetBSD: intel_guc_loader.c,v 1.4 2018/08/27 07:22:38 riastradh Exp $	*/
 /*
  * Copyright © 2014 Intel Corporation
+ *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
  * to deal in the Software without restriction, including without limitation
  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  * and/or sell copies of the Software, and to permit persons to whom the
  * Software is furnished to do so, subject to the following conditions:
+ *
  * The above copyright notice and this permission notice (including the next
  * paragraph) shall be included in all copies or substantial portions of the
 @@ -19,27 +19,27 @@
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  * IN THE SOFTWARE.
+ *
  * Authors:
  *    Vinit Azad <vinit.azad@intel.com>
  *    Ben Widawsky <ben@bwidawsk.net>
  *    Dave Gordon <david.s.gordon@intel.com>
  *    Alex Dai <yu.dai@intel.com>
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intel_guc_loader.c,v 1.3 2018/08/27 07:22:27 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intel_guc_loader.c,v 1.4 2018/08/27 07:22:38 riastradh Exp $");
 #include <linux/firmware.h>
 #include <linux/module.h>
 #include "i915_drv.h"
 #include "intel_guc.h"
 /**
  * DOC: GuC
+ *
  * intel_guc:
  * Top level structure of guc. It handles firmware loading and manages client
  * pool and doorbells. intel_guc owns a i915_guc_client to replace the legacy
  * ExecList submission.
 @@ -233,36 +233,55 @@ static inline bool guc_ucode_response(st
  */
 #define UOS_CSS_HEADER_OFFSET		0
 #define UOS_VER_MINOR_OFFSET		0x44
 #define UOS_VER_MAJOR_OFFSET		0x46
 #define UOS_CSS_HEADER_SIZE		0x80
 #define UOS_RSA_SIG_SIZE		0x100
 static int guc_ucode_xfer_dma(struct drm_i915_private *dev_priv)
+{
 	struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
 	struct drm_i915_gem_object *fw_obj = guc_fw->guc_fw_obj;
 	unsigned long offset;
 #ifdef __NetBSD__
 	struct iovec iov;
 	struct uio uio;
 #else
 	struct sg_table *sg = fw_obj->pages;
 #endif
 	u32 status, ucode_size, rsa[UOS_RSA_SIG_SIZE / sizeof(u32)];
 	int i, ret = 0;
 	/* uCode size, also is where RSA signature starts */
 	offset = ucode_size = guc_fw->guc_fw_size - UOS_RSA_SIG_SIZE;
 	I915_WRITE(DMA_COPY_SIZE, ucode_size);
 	/* Copy RSA signature from the fw image to HW for verification */
 #ifdef __NetBSD__
 	iov.iov_base = rsa;
 	iov.iov_len = UOS_RSA_SIG_SIZE;
 	uio.uio_iov = &iov;
 	uio.uio_iovcnt = 1;
 	uio.uio_resid = UOS_RSA_SIG_SIZE;
 	uio.uio_rw = UIO_READ;
 	/* XXX errno NetBSD->Linux */
 	ret = -ubc_uiomove(fw_obj->base.filp, &uio, UOS_RSA_SIG_SIZE,
 	    UVM_ADV_NORMAL, UBC_READ);
 	if (ret)
 		return ret;
 #else
 	sg_pcopy_to_buffer(sg->sgl, sg->nents, rsa, UOS_RSA_SIG_SIZE, offset);
 #endif
 	for (i = 0; i < UOS_RSA_SIG_SIZE / sizeof(u32); i++)
 		I915_WRITE(UOS_RSA_SCRATCH(i), rsa[i]);
 	/* Set the source address for the new blob */
 	offset = i915_gem_obj_ggtt_offset(fw_obj);
 	I915_WRITE(DMA_ADDR_0_LOW, lower_32_bits(offset));
 	I915_WRITE(DMA_ADDR_0_HIGH, upper_32_bits(offset) & 0xFFFF);
 	/*
 	 * Set the DMA destination. Current uCode expects the code to be
 	 * loaded at 8k; locations below this are used for the stack.
 	 */
 	I915_WRITE(DMA_ADDR_1_LOW, 0x2000);