Mon Aug 27 07:52:20 2018 UTC ()
ALIGN -> round_up


(riastradh)
diff -r1.4 -r1.5 src/sys/external/bsd/drm2/dist/drm/radeon/radeon_vm.c
cvs diff -r1.4 -r1.5 src/sys/external/bsd/drm2/dist/drm/radeon/radeon_vm.c (expand / switch to unified diff)

--- src/sys/external/bsd/drm2/dist/drm/radeon/radeon_vm.c 2018/08/27 07:52:10 1.4
+++ src/sys/external/bsd/drm2/dist/drm/radeon/radeon_vm.c 2018/08/27 07:52:20 1.5
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: radeon_vm.c,v 1.4 2018/08/27 07:52:10 riastradh Exp $ */ 1/* $NetBSD: radeon_vm.c,v 1.5 2018/08/27 07:52:20 riastradh Exp $ */
2 2
3/* 3/*
4 * Copyright 2008 Advanced Micro Devices, Inc. 4 * Copyright 2008 Advanced Micro Devices, Inc.
5 * Copyright 2008 Red Hat Inc. 5 * Copyright 2008 Red Hat Inc.
6 * Copyright 2009 Jerome Glisse. 6 * Copyright 2009 Jerome Glisse.
7 * 7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a 8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"), 9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation 10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the 12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions: 13 * Software is furnished to do so, subject to the following conditions:
14 * 14 *
@@ -18,27 +18,27 @@ @@ -18,27 +18,27 @@
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 21 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
22 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 22 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
24 * OTHER DEALINGS IN THE SOFTWARE. 24 * OTHER DEALINGS IN THE SOFTWARE.
25 * 25 *
26 * Authors: Dave Airlie 26 * Authors: Dave Airlie
27 * Alex Deucher 27 * Alex Deucher
28 * Jerome Glisse 28 * Jerome Glisse
29 */ 29 */
30#include <sys/cdefs.h> 30#include <sys/cdefs.h>
31__KERNEL_RCSID(0, "$NetBSD: radeon_vm.c,v 1.4 2018/08/27 07:52:10 riastradh Exp $"); 31__KERNEL_RCSID(0, "$NetBSD: radeon_vm.c,v 1.5 2018/08/27 07:52:20 riastradh Exp $");
32 32
33#include <drm/drmP.h> 33#include <drm/drmP.h>
34#include <drm/radeon_drm.h> 34#include <drm/radeon_drm.h>
35#include "radeon.h" 35#include "radeon.h"
36#include "radeon_trace.h" 36#include "radeon_trace.h"
37 37
38/* 38/*
39 * GPUVM 39 * GPUVM
40 * GPUVM is similar to the legacy gart on older asics, however 40 * GPUVM is similar to the legacy gart on older asics, however
41 * rather than there being a single global gart table 41 * rather than there being a single global gart table
42 * for the entire GPU, there are multiple VM page tables active 42 * for the entire GPU, there are multiple VM page tables active
43 * at any given time. The VM page tables can contain a mix 43 * at any given time. The VM page tables can contain a mix
44 * vram pages and system memory pages and system memory pages 44 * vram pages and system memory pages and system memory pages
@@ -753,27 +753,31 @@ static void radeon_vm_frag_ptes(struct r @@ -753,27 +753,31 @@ static void radeon_vm_frag_ptes(struct r
753 * asymmetric partitions. The large fragment cache is significantly 753 * asymmetric partitions. The large fragment cache is significantly
754 * larger. Thus, we try to use large fragments wherever possible. 754 * larger. Thus, we try to use large fragments wherever possible.
755 * Userspace can support this by aligning virtual base address and 755 * Userspace can support this by aligning virtual base address and
756 * allocation size to the fragment size. 756 * allocation size to the fragment size.
757 */ 757 */
758 758
759 /* NI is optimized for 256KB fragments, SI and newer for 64KB */ 759 /* NI is optimized for 256KB fragments, SI and newer for 64KB */
760 uint64_t frag_flags = ((rdev->family == CHIP_CAYMAN) || 760 uint64_t frag_flags = ((rdev->family == CHIP_CAYMAN) ||
761 (rdev->family == CHIP_ARUBA)) ? 761 (rdev->family == CHIP_ARUBA)) ?
762 R600_PTE_FRAG_256KB : R600_PTE_FRAG_64KB; 762 R600_PTE_FRAG_256KB : R600_PTE_FRAG_64KB;
763 uint64_t frag_align = ((rdev->family == CHIP_CAYMAN) || 763 uint64_t frag_align = ((rdev->family == CHIP_CAYMAN) ||
764 (rdev->family == CHIP_ARUBA)) ? 0x200 : 0x80; 764 (rdev->family == CHIP_ARUBA)) ? 0x200 : 0x80;
765 765
 766#ifdef __NetBSD__ /* XXX ALIGN means something else */
 767 uint64_t frag_start = round_up(pe_start, frag_align);
 768#else
766 uint64_t frag_start = ALIGN(pe_start, frag_align); 769 uint64_t frag_start = ALIGN(pe_start, frag_align);
 770#endif
767 uint64_t frag_end = pe_end & ~(frag_align - 1); 771 uint64_t frag_end = pe_end & ~(frag_align - 1);
768 772
769 unsigned count; 773 unsigned count;
770 774
771 /* system pages are non continuously */ 775 /* system pages are non continuously */
772 if ((flags & R600_PTE_SYSTEM) || !(flags & R600_PTE_VALID) || 776 if ((flags & R600_PTE_SYSTEM) || !(flags & R600_PTE_VALID) ||
773 (frag_start >= frag_end)) { 777 (frag_start >= frag_end)) {
774 778
775 count = (pe_end - pe_start) / 8; 779 count = (pe_end - pe_start) / 8;
776 radeon_vm_set_pages(rdev, ib, pe_start, addr, count, 780 radeon_vm_set_pages(rdev, ib, pe_start, addr, count,
777 RADEON_GPU_PAGE_SIZE, flags); 781 RADEON_GPU_PAGE_SIZE, flags);
778 return; 782 return;
779 } 783 }