Sun Sep 30 10:34:38 2018 UTC ()
If we're going to allow pl0 to access virtual and physical counters then
we should allow it from all CPUs.

kern/53630 (openssl fallout on arm)


(skrll)
diff -r1.35 -r1.36 src/sys/arch/arm/cortex/gtmr.c

cvs diff -r1.35 -r1.36 src/sys/arch/arm/cortex/gtmr.c (expand / switch to unified diff)

--- src/sys/arch/arm/cortex/gtmr.c 2018/09/16 13:21:36 1.35
+++ src/sys/arch/arm/cortex/gtmr.c 2018/09/30 10:34:38 1.36
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: gtmr.c,v 1.35 2018/09/16 13:21:36 jmcneill Exp $ */ 1/* $NetBSD: gtmr.c,v 1.36 2018/09/30 10:34:38 skrll Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2012 The NetBSD Foundation, Inc. 4 * Copyright (c) 2012 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas 8 * by Matt Thomas
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -20,27 +20,27 @@ @@ -20,27 +20,27 @@
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#include <sys/cdefs.h> 32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: gtmr.c,v 1.35 2018/09/16 13:21:36 jmcneill Exp $"); 33__KERNEL_RCSID(0, "$NetBSD: gtmr.c,v 1.36 2018/09/30 10:34:38 skrll Exp $");
34 34
35#include <sys/param.h> 35#include <sys/param.h>
36#include <sys/bus.h> 36#include <sys/bus.h>
37#include <sys/device.h> 37#include <sys/device.h>
38#include <sys/intr.h> 38#include <sys/intr.h>
39#include <sys/kernel.h> 39#include <sys/kernel.h>
40#include <sys/percpu.h> 40#include <sys/percpu.h>
41#include <sys/proc.h> 41#include <sys/proc.h>
42#include <sys/systm.h> 42#include <sys/systm.h>
43#include <sys/timetc.h> 43#include <sys/timetc.h>
44 44
45#include <prop/proplib.h> 45#include <prop/proplib.h>
46 46
@@ -110,32 +110,26 @@ gtmr_attach(device_t parent, device_t se @@ -110,32 +110,26 @@ gtmr_attach(device_t parent, device_t se
110 110
111 KASSERT(sc->sc_freq != 0); 111 KASSERT(sc->sc_freq != 0);
112 112
113 humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000); 113 humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000);
114 114
115 aprint_naive("\n"); 115 aprint_naive("\n");
116 aprint_normal(": ARM Generic Timer (%s)\n", freqbuf); 116 aprint_normal(": ARM Generic Timer (%s)\n", freqbuf);
117 117
118 if (prop_dictionary_get_bool(dict, "sun50i-a64-unstable-timer", &flag) && flag) { 118 if (prop_dictionary_get_bool(dict, "sun50i-a64-unstable-timer", &flag) && flag) {
119 sc->sc_flags |= GTMR_FLAG_SUN50I_A64_UNSTABLE_TIMER; 119 sc->sc_flags |= GTMR_FLAG_SUN50I_A64_UNSTABLE_TIMER;
120 aprint_debug_dev(self, "enabling Allwinner A64 timer workaround\n"); 120 aprint_debug_dev(self, "enabling Allwinner A64 timer workaround\n");
121 } 121 }
122 122
123 /* 
124 * Enable the virtual counter to be accessed from usermode. 
125 */ 
126 gtmr_cntk_ctl_write(gtmr_cntk_ctl_read() | 
127 CNTKCTL_PL0VCTEN | CNTKCTL_PL0PCTEN); 
128 
129 self->dv_private = sc; 123 self->dv_private = sc;
130 sc->sc_dev = self; 124 sc->sc_dev = self;
131 125
132#ifdef DIAGNOSTIC 126#ifdef DIAGNOSTIC
133 sc->sc_percpu = percpu_alloc(sizeof(struct gtmr_percpu)); 127 sc->sc_percpu = percpu_alloc(sizeof(struct gtmr_percpu));
134#endif 128#endif
135 129
136 evcnt_attach_dynamic(&sc->sc_ev_missing_ticks, EVCNT_TYPE_MISC, NULL, 130 evcnt_attach_dynamic(&sc->sc_ev_missing_ticks, EVCNT_TYPE_MISC, NULL,
137 device_xname(self), "missing interrupts"); 131 device_xname(self), "missing interrupts");
138 132
139 if (mpcaa->mpcaa_irq != -1) { 133 if (mpcaa->mpcaa_irq != -1) {
140 sc->sc_global_ih = intr_establish(mpcaa->mpcaa_irq, IPL_CLOCK, 134 sc->sc_global_ih = intr_establish(mpcaa->mpcaa_irq, IPL_CLOCK,
141 IST_LEVEL | IST_MPSAFE, gtmr_intr, NULL); 135 IST_LEVEL | IST_MPSAFE, gtmr_intr, NULL);
@@ -185,26 +179,33 @@ gtmr_read_cntvct(struct gtmr_softc *sc) @@ -185,26 +179,33 @@ gtmr_read_cntvct(struct gtmr_softc *sc)
185 return gtmr_cntvct_read(); 179 return gtmr_cntvct_read();
186} 180}
187 181
188void 182void
189gtmr_init_cpu_clock(struct cpu_info *ci) 183gtmr_init_cpu_clock(struct cpu_info *ci)
190{ 184{
191 struct gtmr_softc * const sc = &gtmr_sc; 185 struct gtmr_softc * const sc = &gtmr_sc;
192 186
193 KASSERT(ci == curcpu()); 187 KASSERT(ci == curcpu());
194 188
195 int s = splsched(); 189 int s = splsched();
196 190
197 /* 191 /*
 192 * Allow the virtual and physical counters to be accessed from
 193 * usermode. (PL0)
 194 */
 195 gtmr_cntk_ctl_write(gtmr_cntk_ctl_read() |
 196 CNTKCTL_PL0VCTEN | CNTKCTL_PL0PCTEN);
 197
 198 /*
198 * enable timer and stop masking the timer. 199 * enable timer and stop masking the timer.
199 */ 200 */
200 gtmr_cntv_ctl_write(CNTCTL_ENABLE); 201 gtmr_cntv_ctl_write(CNTCTL_ENABLE);
201 202
202 /* 203 /*
203 * Get now and update the compare timer. 204 * Get now and update the compare timer.
204 */ 205 */
205 arm_isb(); 206 arm_isb();
206 ci->ci_lastintr = gtmr_read_cntvct(sc); 207 ci->ci_lastintr = gtmr_read_cntvct(sc);
207 gtmr_cntv_tval_write(sc->sc_autoinc); 208 gtmr_cntv_tval_write(sc->sc_autoinc);
208 splx(s); 209 splx(s);
209 KASSERT(gtmr_read_cntvct(sc) != 0); 210 KASSERT(gtmr_read_cntvct(sc) != 0);
210} 211}