| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
1 | /* $NetBSD: cpu_fdt.c,v 1.14 2018/09/13 12:53:00 jmcneill Exp $ */ | | 1 | /* $NetBSD: cpu_fdt.c,v 1.15 2018/10/04 08:58:13 ryo Exp $ */ |
2 | | | 2 | |
3 | /*- | | 3 | /*- |
4 | * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca> | | 4 | * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca> |
5 | * All rights reserved. | | 5 | * All rights reserved. |
6 | * | | 6 | * |
7 | * Redistribution and use in source and binary forms, with or without | | 7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions | | 8 | * modification, are permitted provided that the following conditions |
9 | * are met: | | 9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright | | 10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. | | 11 | * notice, this list of conditions and the following disclaimer. |
12 | * 2. Redistributions in binary form must reproduce the above copyright | | 12 | * 2. Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the | | 13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. | | 14 | * documentation and/or other materials provided with the distribution. |
| @@ -20,27 +20,27 @@ | | | @@ -20,27 +20,27 @@ |
20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | | 20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
21 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | | 21 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED | | 22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
23 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | | 23 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
24 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | | 24 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | | 25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
26 | * SUCH DAMAGE. | | 26 | * SUCH DAMAGE. |
27 | */ | | 27 | */ |
28 | | | 28 | |
29 | #include "opt_multiprocessor.h" | | 29 | #include "opt_multiprocessor.h" |
30 | #include "psci_fdt.h" | | 30 | #include "psci_fdt.h" |
31 | | | 31 | |
32 | #include <sys/cdefs.h> | | 32 | #include <sys/cdefs.h> |
33 | __KERNEL_RCSID(0, "$NetBSD: cpu_fdt.c,v 1.14 2018/09/13 12:53:00 jmcneill Exp $"); | | 33 | __KERNEL_RCSID(0, "$NetBSD: cpu_fdt.c,v 1.15 2018/10/04 08:58:13 ryo Exp $"); |
34 | | | 34 | |
35 | #include <sys/param.h> | | 35 | #include <sys/param.h> |
36 | #include <sys/atomic.h> | | 36 | #include <sys/atomic.h> |
37 | #include <sys/bus.h> | | 37 | #include <sys/bus.h> |
38 | #include <sys/device.h> | | 38 | #include <sys/device.h> |
39 | #include <sys/lwp.h> | | 39 | #include <sys/lwp.h> |
40 | #include <sys/systm.h> | | 40 | #include <sys/systm.h> |
41 | #include <sys/kernel.h> | | 41 | #include <sys/kernel.h> |
42 | | | 42 | |
43 | #include <dev/fdt/fdtvar.h> | | 43 | #include <dev/fdt/fdtvar.h> |
44 | | | 44 | |
45 | #include <arm/armreg.h> | | 45 | #include <arm/armreg.h> |
46 | #include <arm/cpu.h> | | 46 | #include <arm/cpu.h> |
| @@ -226,43 +226,46 @@ arm_fdt_cpu_okay(const int child) | | | @@ -226,43 +226,46 @@ arm_fdt_cpu_okay(const int child) |
226 | return true; | | 226 | return true; |
227 | } | | 227 | } |
228 | } | | 228 | } |
229 | #endif /* MULTIPROCESSOR */ | | 229 | #endif /* MULTIPROCESSOR */ |
230 | | | 230 | |
231 | void | | 231 | void |
232 | arm_fdt_cpu_bootstrap(void) | | 232 | arm_fdt_cpu_bootstrap(void) |
233 | { | | 233 | { |
234 | #ifdef MULTIPROCESSOR | | 234 | #ifdef MULTIPROCESSOR |
235 | uint64_t mpidr, bp_mpidr; | | 235 | uint64_t mpidr, bp_mpidr; |
236 | u_int cpuindex; | | 236 | u_int cpuindex; |
237 | int child, ret; | | 237 | int child, ret; |
238 | const char *method; | | 238 | const char *method; |
| | | 239 | #if NPSCI_FDT > 0 |
| | | 240 | bool nopsci = false; |
| | | 241 | #endif |
239 | | | 242 | |
240 | const int cpus = OF_finddevice("/cpus"); | | 243 | const int cpus = OF_finddevice("/cpus"); |
241 | if (cpus == -1) { | | 244 | if (cpus == -1) { |
242 | aprint_error("%s: no /cpus node found\n", __func__); | | 245 | aprint_error("%s: no /cpus node found\n", __func__); |
243 | arm_cpu_max = 1; | | 246 | arm_cpu_max = 1; |
244 | return; | | 247 | return; |
245 | } | | 248 | } |
246 | | | 249 | |
247 | /* Count CPUs */ | | 250 | /* Count CPUs */ |
248 | arm_cpu_max = 0; | | 251 | arm_cpu_max = 0; |
249 | for (child = OF_child(cpus); child; child = OF_peer(child)) | | 252 | for (child = OF_child(cpus); child; child = OF_peer(child)) |
250 | if (arm_fdt_cpu_okay(child)) | | 253 | if (arm_fdt_cpu_okay(child)) |
251 | arm_cpu_max++; | | 254 | arm_cpu_max++; |
252 | | | 255 | |
253 | #if NPSCI_FDT > 0 | | 256 | #if NPSCI_FDT > 0 |
254 | if (psci_fdt_preinit() != 0) | | 257 | if (psci_fdt_preinit() != 0) |
255 | return; | | 258 | nopsci = true; |
256 | #endif | | 259 | #endif |
257 | | | 260 | |
258 | /* MPIDR affinity levels of boot processor. */ | | 261 | /* MPIDR affinity levels of boot processor. */ |
259 | bp_mpidr = cpu_mpidr_aff_read(); | | 262 | bp_mpidr = cpu_mpidr_aff_read(); |
260 | | | 263 | |
261 | /* Boot APs */ | | 264 | /* Boot APs */ |
262 | uint32_t started = 0; | | 265 | uint32_t started = 0; |
263 | cpuindex = 1; | | 266 | cpuindex = 1; |
264 | for (child = OF_child(cpus); child; child = OF_peer(child)) { | | 267 | for (child = OF_child(cpus); child; child = OF_peer(child)) { |
265 | if (!arm_fdt_cpu_okay(child)) | | 268 | if (!arm_fdt_cpu_okay(child)) |
266 | continue; | | 269 | continue; |
267 | if (fdtbus_get_reg64(child, 0, &mpidr, NULL) != 0) | | 270 | if (fdtbus_get_reg64(child, 0, &mpidr, NULL) != 0) |
268 | continue; | | 271 | continue; |
| @@ -289,27 +292,27 @@ arm_fdt_cpu_bootstrap(void) | | | @@ -289,27 +292,27 @@ arm_fdt_cpu_bootstrap(void) |
289 | uint64_t data; | | 292 | uint64_t data; |
290 | paddr_t cpu_release_addr; | | 293 | paddr_t cpu_release_addr; |
291 | | | 294 | |
292 | if (OF_getprop(child, "cpu-release-addr", &data, | | 295 | if (OF_getprop(child, "cpu-release-addr", &data, |
293 | sizeof(data)) != sizeof(data)) | | 296 | sizeof(data)) != sizeof(data)) |
294 | continue; | | 297 | continue; |
295 | | | 298 | |
296 | cpu_release_addr = (paddr_t)be64toh(data); | | 299 | cpu_release_addr = (paddr_t)be64toh(data); |
297 | ret = spintable_cpu_on(mpidr, cpu_fdt_mpstart_pa(), cpu_release_addr); | | 300 | ret = spintable_cpu_on(mpidr, cpu_fdt_mpstart_pa(), cpu_release_addr); |
298 | if (ret != 0) | | 301 | if (ret != 0) |
299 | continue; | | 302 | continue; |
300 | | | 303 | |
301 | #if NPSCI_FDT > 0 | | 304 | #if NPSCI_FDT > 0 |
302 | } else if (strcmp(method, "psci") == 0) { | | 305 | } else if (!nopsci && (strcmp(method, "psci") == 0)) { |
303 | ret = psci_cpu_on(mpidr, cpu_fdt_mpstart_pa(), 0); | | 306 | ret = psci_cpu_on(mpidr, cpu_fdt_mpstart_pa(), 0); |
304 | if (ret != PSCI_SUCCESS) | | 307 | if (ret != PSCI_SUCCESS) |
305 | continue; | | 308 | continue; |
306 | #endif | | 309 | #endif |
307 | } else { | | 310 | } else { |
308 | aprint_error("%s: %s: unsupported method\n", __func__, method); | | 311 | aprint_error("%s: %s: unsupported method\n", __func__, method); |
309 | continue; | | 312 | continue; |
310 | } | | 313 | } |
311 | | | 314 | |
312 | started |= __BIT(cpuindex); | | 315 | started |= __BIT(cpuindex); |
313 | cpuindex++; | | 316 | cpuindex++; |
314 | } | | 317 | } |
315 | | | 318 | |