Sun Mar 17 08:37:56 2019 UTC ()
Wrap arm_cpu_marker if #ifdef MPDEBUG.

One day a9_mpsubr.S will die


(skrll)
diff -r1.128 -r1.129 src/sys/arch/arm/arm32/cpu.c
cvs diff -r1.128 -r1.129 src/sys/arch/arm/arm32/cpu.c (expand / switch to unified diff)

--- src/sys/arch/arm/arm32/cpu.c 2019/01/27 02:08:37 1.128
+++ src/sys/arch/arm/arm32/cpu.c 2019/03/17 08:37:55 1.129
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: cpu.c,v 1.128 2019/01/27 02:08:37 pgoyette Exp $ */ 1/* $NetBSD: cpu.c,v 1.129 2019/03/17 08:37:55 skrll Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1995 Mark Brinicombe. 4 * Copyright (c) 1995 Mark Brinicombe.
5 * Copyright (c) 1995 Brini. 5 * Copyright (c) 1995 Brini.
6 * All rights reserved. 6 * All rights reserved.
7 * 7 *
8 * Redistribution and use in source and binary forms, with or without 8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions 9 * modification, are permitted provided that the following conditions
10 * are met: 10 * are met:
11 * 1. Redistributions of source code must retain the above copyright 11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer. 12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright 13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the 14 * notice, this list of conditions and the following disclaimer in the
@@ -36,52 +36,56 @@ @@ -36,52 +36,56 @@
36 * 36 *
37 * cpu.c 37 * cpu.c
38 * 38 *
39 * Probing and configuration for the master CPU 39 * Probing and configuration for the master CPU
40 * 40 *
41 * Created : 10/10/95 41 * Created : 10/10/95
42 */ 42 */
43 43
44#include "opt_armfpe.h" 44#include "opt_armfpe.h"
45#include "opt_cputypes.h" 45#include "opt_cputypes.h"
46#include "opt_multiprocessor.h" 46#include "opt_multiprocessor.h"
47 47
48#include <sys/cdefs.h> 48#include <sys/cdefs.h>
49__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.128 2019/01/27 02:08:37 pgoyette Exp $"); 49__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.129 2019/03/17 08:37:55 skrll Exp $");
50 50
51#include <sys/param.h> 51#include <sys/param.h>
52#include <sys/conf.h> 52#include <sys/conf.h>
53#include <sys/cpu.h> 53#include <sys/cpu.h>
54#include <sys/device.h> 54#include <sys/device.h>
55#include <sys/kmem.h> 55#include <sys/kmem.h>
56#include <sys/proc.h> 56#include <sys/proc.h>
57#include <sys/systm.h> 57#include <sys/systm.h>
58 58
59#include <uvm/uvm_extern.h> 59#include <uvm/uvm_extern.h>
60 60
61#include <arm/locore.h> 61#include <arm/locore.h>
62#include <arm/undefined.h> 62#include <arm/undefined.h>
63 63
64extern const char *cpu_arch; 64extern const char *cpu_arch;
65 65
66#ifdef MULTIPROCESSOR 66#ifdef MULTIPROCESSOR
67uint32_t cpu_mpidr[MAXCPUS] = { 67uint32_t cpu_mpidr[MAXCPUS] = {
68 [0 ... MAXCPUS - 1] = ~0, 68 [0 ... MAXCPUS - 1] = ~0,
69}; 69};
70 70
71volatile u_int arm_cpu_hatched __cacheline_aligned = 0; 71volatile u_int arm_cpu_hatched __cacheline_aligned = 0;
72volatile uint32_t arm_cpu_mbox __cacheline_aligned = 0; 72volatile uint32_t arm_cpu_mbox __cacheline_aligned = 0;
73uint32_t arm_cpu_marker[2] __cacheline_aligned = { 0, 0 }; 
74u_int arm_cpu_max = 1; 73u_int arm_cpu_max = 1;
 74
 75#ifdef MPDEBUG
 76uint32_t arm_cpu_marker[2] __cacheline_aligned = { 0, 0 };
 77#endif
 78
75#endif 79#endif
76 80
77/* Prototypes */ 81/* Prototypes */
78void identify_arm_cpu(device_t, struct cpu_info *); 82void identify_arm_cpu(device_t, struct cpu_info *);
79void identify_cortex_caches(device_t); 83void identify_cortex_caches(device_t);
80void identify_features(device_t); 84void identify_features(device_t);
81 85
82/* 86/*
83 * Identify the master (boot) CPU 87 * Identify the master (boot) CPU
84 */ 88 */
85 89
86void 90void
87cpu_attach(device_t dv, cpuid_t id) 91cpu_attach(device_t dv, cpuid_t id)