 @@ -1,14 +1,14 @@
-/*	$NetBSD: pci_hades.c,v 1.14 2015/10/02 05:22:50 msaitoh Exp $	*/
+/*	$NetBSD: pci_hades.c,v 1.15 2019/05/04 08:20:05 tsutsui Exp $	*/
 /*
  * Copyright (c) 1996 Leo Weppelman.  All rights reserved.
  * Copyright (c) 1996, 1997 Christopher G. Demetriou.  All rights reserved.
  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
 @@ -22,216 +22,224 @@
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_hades.c,v 1.14 2015/10/02 05:22:50 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_hades.c,v 1.15 2019/05/04 08:20:05 tsutsui Exp $");
 #include <sys/types.h>
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/device.h>
 #include <uvm/uvm_extern.h>
 #include <sys/bus.h>
 #include <dev/pci/pcivar.h>
 #include <dev/pci/pcireg.h>
 #include <machine/cpu.h>
 #include <machine/iomap.h>
 #include <machine/mfp.h>
 #include <sys/bswap.h>
 #include <atari/atari/device.h>
 #include <atari/pci/pci_vga.h>
 #include <atari/dev/grf_etreg.h>
 int
 pci_bus_maxdevs(pci_chipset_tag_t pc, int busno)
+{
 	return (4);
 	return 4;
+}
 static int pci_config_offset(pcitag_t);
 /*
  * Atari_init.c maps the config areas PAGE_SIZE bytes apart....
  */
-static int pci_config_offset(pcitag_t tag)
+static int
 pci_config_offset(pcitag_t tag)
+{
-	int	device;
+	int device;
 	device = (tag >> 11) & 0x1f;
 	return(device * PAGE_SIZE);
 	return device * PAGE_SIZE;
+}
 pcireg_t
 pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
+{
-	u_long	data;
+	uint32_t data;
-	if ((unsigned int)reg >= PCI_CONF_SIZE)
+	if ((uint32_t)reg >= PCI_CONF_SIZE)
-		return ((pcireg_t) -1);
+		return 0xffffffff;
-	data = *(u_long *)(pci_conf_addr + pci_config_offset(tag) + reg);
+	data = *(uint32_t *)(pci_conf_addr + pci_config_offset(tag) + reg);
-	return (bswap32(data));
+	return bswap32(data);
+}
 void
 pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data)
+{
-	if ((unsigned int)reg >= PCI_CONF_SIZE)
+	if ((uint32_t)reg >= PCI_CONF_SIZE)
 		return;
-	*((u_long *)(pci_conf_addr + pci_config_offset(tag) + reg))
+	*((uint32_t *)(pci_conf_addr + pci_config_offset(tag) + reg))
-		= bswap32(data);
+	    = bswap32(data);
+}
 /*
  * The interrupt stuff is rather ugly. On the Hades, all interrupt lines
  * for a slot are wired together and connected to IO 0,1,2 or 5 (slots:
  * (0-3) on the TT-MFP. The Pci-config code initializes the irq. number
  * to the slot position.
  */
 static pci_intr_info_t iinfo[4] = { { -1 }, { -1 }, { -1 }, { -1 } };
-static int	iifun(int, int);
+static int iifun(int, int);
 static int
 iifun(int slot, int sr)
+{
 	pci_intr_info_t *iinfo_p;
-	int		s;
+	int s;
 	iinfo_p = &iinfo[slot];
 	/*
 	 * Disable the interrupts
 	 */
 	MFP2->mf_imrb  &= ~iinfo_p->imask;
 	if ((sr & PSL_IPL) >= (iinfo_p->ipl & PSL_IPL)) {
 		/*
 		 * We're running at a too high priority now.
 		 */
 		add_sicallback((si_farg)iifun, (void*)slot, 0);
 	} else {
 	else {
 		s = splx(iinfo_p->ipl);
-		(void) (iinfo_p->ifunc)(iinfo_p->iarg);
+		(void)(iinfo_p->ifunc)(iinfo_p->iarg);
 		splx(s);
 		/*
 		 * Re-enable interrupts after handling
 		 */
 		MFP2->mf_imrb |= iinfo_p->imask;
+	}
 	return 1;
+}
 int
 pci_intr_setattr(pci_chipset_tag_t pc, pci_intr_handle_t *ih,
-		 int attr, uint64_t data)
+    int attr, uint64_t data)
+{
 	switch (attr) {
 	case PCI_INTR_MPSAFE:
 		return 0;
 	default:
 		return ENODEV;
+	}
+}
 void *
-pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level, int (*ih_fun)(void *), void *ih_arg)
+pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
     int (*ih_fun)(void *), void *ih_arg)
+{
 	pci_intr_info_t *iinfo_p;
 	struct intrhand	*ihand;
-	int		slot;
+	int slot;
 	slot    = ih;
 	iinfo_p = &iinfo[slot];
 	if (iinfo_p->ipl > 0)
-	    panic("pci_intr_establish: interrupt was already established");
+		panic("pci_intr_establish: interrupt was already established");
 	ihand = intr_establish((slot == 3) ? 23 : 16 + slot, USER_VEC, 0,
-				(hw_ifun_t)iifun, (void *)slot);
+	    (hw_ifun_t)iifun, (void *)slot);
 	if (ihand != NULL) {
 		iinfo_p->ipl   = level;
 		iinfo_p->imask = (slot == 3) ? 0x80 : (0x01 << slot);
 		iinfo_p->ifunc = ih_fun;
 		iinfo_p->iarg  = ih_arg;
 		iinfo_p->ihand = ihand;
 		/*
 		 * Enable (unmask) the interrupt
 		 */
 		MFP2->mf_imrb |= iinfo_p->imask;
 		MFP2->mf_ierb |= iinfo_p->imask;
-		return(iinfo_p);
+		return iinfo_p;
+	}
 	return NULL;
+}
 void
 pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
+{
 	pci_intr_info_t *iinfo_p = (pci_intr_info_t *)cookie;
 	if (iinfo->ipl < 0)
-	    panic("pci_intr_disestablish: interrupt was not established");
+		panic("pci_intr_disestablish: interrupt was not established");
 	MFP2->mf_imrb &= ~iinfo->imask;
 	MFP2->mf_ierb &= ~iinfo->imask;
-	(void) intr_disestablish(iinfo_p->ihand);
+	(void)intr_disestablish(iinfo_p->ihand);
 	iinfo_p->ipl = -1;
+}
 /*
  * XXX: Why are we repeating this everywhere! (Leo)
  */
 #define PCI_LINMEMBASE  0x0e000000
-static u_char crt_tab[] = {
+static uint8_t crt_tab[] = {
 x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
 x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
 x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
 xff };
-static u_char seq_tab[] = {
+static uint8_t seq_tab[] = {
-x03, 0x00, 0x03, 0x00, 0x02, 0x00, 0x00, 0x00 };
+x03, 0x00, 0x03, 0x00, 0x02, 0x00, 0x00, 0x00
 };
 static u_char attr_tab[] = {
-x0c, 0x00, 0x0f, 0x08, 0x00, 0x00, 0x00, 0x00 };
+static uint8_t attr_tab[] = {
 x0c, 0x00, 0x0f, 0x08, 0x00, 0x00, 0x00, 0x00
-static u_char gdc_tab[] = {
+};
 x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00, 0xff };
 static uint8_t gdc_tab[] = {
 x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00, 0xff
 };
 void
-ati_vga_init(pci_chipset_tag_t pc, pcitag_t tag, int id, volatile u_char *ba, u_char *fb)
+ati_vga_init(pci_chipset_tag_t pc, pcitag_t tag, int id, volatile uint8_t *ba,
     uint8_t *fb)
+{
-	int			i, csr;
+	uint32_t csr;
 	int i;
 	/* Turn on the card */
 	pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE);
 	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
 	csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE);
 	csr |= PCI_COMMAND_MASTER_ENABLE;
 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
 	/*
 	 * Make sure we're allowed to write all crt-registers and reload them.
 	 */
 	WCrt(ba, CRT_ID_END_VER_RETR, (RCrt(ba, CRT_ID_END_VER_RETR) & 0x7f));

 @@ -1,95 +1,96 @@
-/*	$NetBSD: pci_vga.c,v 1.14 2009/10/20 19:10:11 snj Exp $	*/
+/*	$NetBSD: pci_vga.c,v 1.15 2019/05/04 08:20:05 tsutsui Exp $	*/
 /*
  * Copyright (c) 1999 Leo Weppelman.  All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_vga.c,v 1.14 2009/10/20 19:10:11 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_vga.c,v 1.15 2019/05/04 08:20:05 tsutsui Exp $");
 #include <sys/param.h>
 #include <sys/queue.h>
 #include <sys/systm.h>
 #include <dev/pci/pcireg.h>
 #include <dev/pci/pcivar.h>
 #include <dev/pci/pcidevs.h>
 #include <atari/pci/pci_vga.h>
 #include <atari/dev/grf_etreg.h>
 #include <atari/include/iomap.h>
 #include <atari/dev/font.h>
 #include "vga_pci.h"
 #if NVGA_PCI > 0
 #include <dev/cons.h>
 #include <dev/ic/mc6845reg.h>
 #include <dev/ic/pcdisplayvar.h>
 #include <dev/ic/vgareg.h>
 #include <dev/ic/vgavar.h>
 #endif
-static void loadfont(volatile u_char *, u_char *fb);
+static void loadfont(volatile uint8_t *, uint8_t *fb);
 /* XXX: Shouldn't these be in font.h???? */
 extern font_info	font_info_8x8;
 extern font_info	font_info_8x16;
 /* Console colors */
-static u_char conscolors[3][3] = {	/* background, foreground, hilite */
+static uint8_t conscolors[3][3] = {	/* background, foreground, hilite */
 	{0x0, 0x0, 0x0}, {0x30, 0x30, 0x30}, { 0x3f,  0x3f,  0x3f}
 };
 static bus_space_tag_t	vga_iot, vga_memt;
 static int		tags_valid = 0;
 #define		VGA_REG_SIZE	(8*1024)
 #define		VGA_FB_SIZE	(32*1024)
 /*
  * Go look for a VGA card on the PCI-bus. This search is a
  * stripped down version of the PCI-probe. It only looks on
  * bus0 for VGA cards. The first card found is used.
  */
 int
 check_for_vga(bus_space_tag_t iot, bus_space_tag_t memt)
+{
 	pci_chipset_tag_t	pc = NULL; /* XXX */
 	bus_space_handle_t	ioh_regs, memh_fb;
 	pcitag_t		tag;
 	int			device, found, id, maxndevs, i, j;
-	int			class, got_ioh, got_memh, rv;
+	int			got_ioh, got_memh, rv;
-	volatile u_char		*regs;
+	int		class;
-	u_char			*fb;
+	volatile uint8_t	*regs;
 	uint8_t			*fb;
 	const char		*nbd = "NetBSD/Atari";
 	found    = 0;
 	tag      = 0;
 	id       = 0;
 	rv	 = 0;
 	got_ioh	 = 0;
 	got_memh = 0;
 	maxndevs = pci_bus_maxdevs(pc, 0);
 	/*
 	 * Map 8Kb of registers and 32Kb frame buffer.
 	 * XXX: The way the registers are mapped here is plain wrong.
 @@ -188,89 +189,91 @@ check_for_vga(bus_space_tag_t iot, bus_s
 	 * is of diagnostic/debug use only.
 	 */
 	for (i = 50 * 80; i >= 0; i -= 2) {
 		fb[i] = 0x20; fb[i+1] = 0x07;
+	}
 	for (i = 56; *nbd; i += 2)
 		fb[i] = *nbd++;
 	rv = 1;
 	vga_iot  = iot;
 	vga_memt = memt;
 	rv = tags_valid = 1;
-bad:
+ bad:
 	if (got_memh)
 		bus_space_unmap(memt, memh_fb, VGA_FB_SIZE);
 	if (got_ioh)
 		bus_space_unmap(iot, ioh_regs, VGA_REG_SIZE);
-	return (rv);
+	return rv;
+}
 #if NVGA_PCI > 0
 void vgacnprobe(struct consdev *);
 void vgacninit(struct consdev *);
 void
 vgacnprobe(struct consdev *cp)
+{
 	if (tags_valid)
 		cp->cn_pri = CN_NORMAL;
+}
 void
 vgacninit(struct consdev *cp)
+{
 	if (tags_valid) {
 		/* XXX: Are those arguments correct? Leo */
 		vga_cnattach(vga_iot, vga_memt, 8, 0);
+	}
+}
 #endif /* NVGA_PCI */
 /*
  * Generic VGA. Load the configured kernel font into the videomemory and
  * place the card into textmode.
  */
 static void
-loadfont(volatile u_char *ba, u_char *fb)
+loadfont(volatile uint8_t *ba, uint8_t *fb)
 	/* ba:	 Register area KVA */
-	/* fb:	 Frame buffer	KVA  */
+	/* fb:	 Frame buffer KVA  */
+{
 	font_info	*fd;
-	u_char		*c, *f, tmp;
+	uint8_t		*c, *f, tmp;
-	u_short		z, y;
+	uint16_t	z, y;
 #if defined(KFONT_8X8)
 	fd = &font_info_8x8;
 #else
 	fd = &font_info_8x16;
 #endif
 	WAttr(ba, 0x20 | ACT_ID_ATTR_MODE_CNTL, 0x0a);
 	WSeq(ba, SEQ_ID_MAP_MASK,	 0x04);
 	WSeq(ba, SEQ_ID_MEMORY_MODE,	 0x06);
 	WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x02);
 	WGfx(ba, GCT_ID_GRAPHICS_MODE,	 0x00);
 	WGfx(ba, GCT_ID_MISC,		 0x0c);
 	/*
 	 * load text font into beginning of display memory. Each
 	 * character cell is 32 bytes long (enough for 4 planes)
 	 */
 	for (z = 0, c = fb; z < 256 * 32; z++)
 		*c++ = 0;
-	c = (unsigned char *) (fb) + (32 * fd->font_lo);
+	c = (uint8_t *)(fb) + (32 * fd->font_lo);
 	f = fd->font_p;
 	z = fd->font_lo;
 	for (; z <= fd->font_hi; z++, c += (32 - fd->height))
 		for (y = 0; y < fd->height; y++) {
 			*c++ = *f++;
+		}
 	/*
 	 * Odd/Even addressing
 	 */
 	WSeq(ba, SEQ_ID_MAP_MASK,	 0x03);
 	WSeq(ba, SEQ_ID_MEMORY_MODE,	 0x03);
 	WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);

 @@ -1,14 +1,14 @@
-/*	$NetBSD: pci_machdep.c,v 1.56 2018/02/09 15:24:35 tsutsui Exp $	*/
+/*	$NetBSD: pci_machdep.c,v 1.57 2019/05/04 08:20:05 tsutsui Exp $	*/
 /*
  * Copyright (c) 1996 Leo Weppelman.  All rights reserved.
  * Copyright (c) 1996, 1997 Christopher G. Demetriou.  All rights reserved.
  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
 @@ -22,27 +22,27 @@
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.56 2018/02/09 15:24:35 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.57 2019/05/04 08:20:05 tsutsui Exp $");
 #include "opt_mbtype.h"
 #include <sys/types.h>
 #include <sys/param.h>
 #include <sys/time.h>
 #include <sys/systm.h>
 #include <sys/errno.h>
 #include <sys/device.h>
 #include <sys/malloc.h>
 #define _ATARI_BUS_DMA_PRIVATE
 #include <sys/bus.h>
 @@ -79,32 +79,32 @@ __KERNEL_RCSID(0, "$NetBSD: pci_machdep.
  */
 #define PCI_MACHDEP_IO_ALIGN_MASK	0xffffff00
 #define PCI_MACHDEP_MEM_ALIGN_MASK	0xfffff000
 /*
  * Convert a PCI 'device' number to a slot number.
  */
 #define	DEV2SLOT(dev)	(3 - dev)
 /*
  * Struct to hold the memory and I/O datas of the pci devices
  */
 struct pci_memreg {
-    LIST_ENTRY(pci_memreg) link;
+	LIST_ENTRY(pci_memreg) link;
-    int dev;
+	int dev;
-    pcitag_t tag;
+	pcitag_t tag;
-    pcireg_t reg, address, mask;
+	pcireg_t reg, address, mask;
-    u_int32_t size;
+	uint32_t size;
-    u_int32_t csr;
+	uint32_t csr;
 };
 typedef LIST_HEAD(pci_memreg_head, pci_memreg) PCI_MEMREG;
 /*
  * Entry points for PCI DMA.  Use only the 'standard' functions.
  */
 int	_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
 	    bus_size_t, int, bus_dmamap_t *);
 struct atari_bus_dma_tag pci_bus_dma_tag = {
 ,
 #if defined(_ATARIHW_)
 x80000000, /* On the Hades, CPU memory starts here PCI-wise */
 @@ -118,64 +118,64 @@ struct atari_bus_dma_tag pci_bus_dma_tag
 	_bus_dmamap_load_uio,
 	_bus_dmamap_load_raw,
 	_bus_dmamap_unload,
 	_bus_dmamap_sync,
 };
 int	ataripcibusprint(void *, const char *);
 int	pcibusmatch(device_t, cfdata_t, void *);
 void	pcibusattach(device_t, device_t, void *);
 static void enable_pci_devices(void);
 static void insert_into_list(PCI_MEMREG *head, struct pci_memreg *elem);
 static int overlap_pci_areas(struct pci_memreg *p,
-	struct pci_memreg *self, u_int addr, u_int size, u_int what);
+    struct pci_memreg *self, u_int addr, u_int size, u_int what);
 CFATTACH_DECL_NEW(pcib, 0,
     pcibusmatch, pcibusattach, NULL, NULL);
 /*
  * We need some static storage to probe pci-busses for VGA cards during
  * early console init.
  */
 static struct atari_bus_space	bs_storage[2];	/* 1 iot, 1 memt */
 int
 pcibusmatch(device_t parent, cfdata_t cf, void *aux)
+{
-	static int	nmatched = 0;
+	static int nmatched = 0;
 	if (strcmp((char *)aux, "pcib"))
 		return 0;	/* Wrong number... */
 	if (atari_realconfig == 0)
 		return 1;
-	if (machineid & (ATARI_HADES|ATARI_MILAN)) {
+	if ((machineid & (ATARI_HADES|ATARI_MILAN)) != 0) {
 		/*
 		 * Both Hades and Milan have only one pci bus
 		 */
 		if (nmatched)
 			return 0;
 		nmatched++;
 		return 1;
+	}
 	return 0;
+}
 void
 pcibusattach(device_t parent, device_t self, void *aux)
+{
-	struct pcibus_attach_args	pba;
+	struct pcibus_attach_args pba;
 	pba.pba_pc      = NULL;
 	pba.pba_bus     = 0;
 	pba.pba_bridgetag = NULL;
 	pba.pba_flags	= PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY;
 	pba.pba_dmat	= &pci_bus_dma_tag;
 	pba.pba_iot     = leb_alloc_bus_space_tag(&bs_storage[0]);
 	pba.pba_memt    = leb_alloc_bus_space_tag(&bs_storage[1]);
 	if ((pba.pba_iot == NULL) || (pba.pba_memt == NULL)) {
 		printf("leb_alloc_bus_space_tag failed!\n");
 		return;
+	}
 	pba.pba_iot->base  = PCI_IO_PHYS;
 @@ -217,27 +217,28 @@ pci_attach_hook(device_t parent, device_
+}
 /*
  * Initialize the PCI-bus. The Atari-BIOS does not do this, so....
  * We only disable all devices here. Memory and I/O enabling is done
  * later at pcibusattach.
  */
 void
 init_pci_bus(void)
+{
 	pci_chipset_tag_t	pc = NULL; /* XXX */
 	pcitag_t		tag;
 	pcireg_t		csr;
-	int			device, id, maxndevs;
+	int			device, maxndevs;
 	int			id;
 	tag   = 0;
 	id    = 0;
 	maxndevs = pci_bus_maxdevs(pc, 0);
 	for (device = 0; device < maxndevs; device++) {
 		tag = pci_make_tag(pc, 0, device, 0);
 		id  = pci_conf_read(pc, tag, PCI_ID_REG);
 		if (id == 0 || id == 0xffffffff)
 			continue;
 @@ -245,384 +246,416 @@ init_pci_bus(void)
 		csr &= ~(PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE);
 		csr &= ~PCI_COMMAND_MASTER_ENABLE;
 		pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
+	}
+}
 /*
  * insert a new element in an existing list that the ID's (size in struct
  * pci_memreg) are sorted.
  */
 static void
 insert_into_list(PCI_MEMREG *head, struct pci_memreg *elem)
+{
-    struct pci_memreg *p, *q;
+	struct pci_memreg *p, *q;
-    p = LIST_FIRST(head);
+	p = LIST_FIRST(head);
-    q = NULL;
+	q = NULL;
-    for (; p != NULL && p->size < elem->size; q = p, p = LIST_NEXT(p, link));
+	for (; p != NULL && p->size < elem->size;
 	    q = p, p = LIST_NEXT(p, link))
     if (q == NULL) {
 	LIST_INSERT_HEAD(head, elem, link);
-    } else {
+	if (q == NULL) {
-	LIST_INSERT_AFTER(q, elem, link);
+		LIST_INSERT_HEAD(head, elem, link);
 	} else {
 		LIST_INSERT_AFTER(q, elem, link);
+	}
+}
 /*
  * Test if a new selected area overlaps with an already (probably preselected)
  * pci area.
  */
 static int
-overlap_pci_areas(struct pci_memreg *p, struct pci_memreg *self, u_int addr, u_int size, u_int what)
+overlap_pci_areas(struct pci_memreg *p, struct pci_memreg *self, u_int addr,
     u_int size, u_int what)
+{
-    struct pci_memreg *q;
+	struct pci_memreg *q;
-    if (p == NULL)
+	if (p == NULL)
-	return 0;
+		return 0;
-    q = p;
+	q = p;
-    while (q != NULL) {
+	while (q != NULL) {
-      if ((q != self) && (q->csr & what)) {
+		if ((q != self) && (q->csr & what)) {
-	if ((addr >= q->address) && (addr < (q->address + q->size))) {
+			if ((addr >= q->address) &&
 			    (addr < (q->address + q->size))) {
 #ifdef DEBUG_PCI_MACHDEP
-	  printf("\noverlap area dev %d reg 0x%02x with dev %d reg 0x%02x",
+				printf("\noverlap area dev %d reg 0x%02x "
-			self->dev, self->reg, q->dev, q->reg);
+				    "with dev %d reg 0x%02x",
 				    self->dev, self->reg, q->dev, q->reg);
 #endif
-	  return 1;
+				return 1;
+			}
-	if ((q->address >= addr) && (q->address < (addr + size))) {
+			if ((q->address >= addr) &&
 			    (q->address < (addr + size))) {
 #ifdef DEBUG_PCI_MACHDEP
-	  printf("\noverlap area dev %d reg 0x%02x with dev %d reg 0x%02x",
+				printf("\noverlap area dev %d reg 0x%02x "
-			self->dev, self->reg, q->dev, q->reg);
+				    "with dev %d reg 0x%02x",
 				    self->dev, self->reg, q->dev, q->reg);
 #endif
-	  return 1;
+				return 1;
+			}
+		}
 		q = LIST_NEXT(q, link);
+	}
 	return 0;
       q = LIST_NEXT(q, link);
     return 0;
+}
 /*
  * Enable memory and I/O on pci devices. Care about already enabled devices
  * (probabaly by the console driver).
+ *
  * The idea behind the following code is:
  * We build a by sizes sorted list of the requirements of the different
  * pci devices. After that we choose the start addresses of that areas
  * in such a way that they are placed as closed as possible together.
  */
 static void
 enable_pci_devices(void)
+{
-    PCI_MEMREG memlist;
+	PCI_MEMREG memlist;
-    PCI_MEMREG iolist;
+	PCI_MEMREG iolist;
-    struct pci_memreg *p, *q;
+	struct pci_memreg *p, *q;
-    int dev, reg, id, class;
+	int dev, reg;
-    pcitag_t tag;
+	int id, class;
-    pcireg_t csr, address, mask;
+	pcitag_t tag;
-    pci_chipset_tag_t pc;
+	pcireg_t csr, address, mask;
-    int sizecnt, membase_1m;
+	pci_chipset_tag_t pc;
 	int sizecnt, membase_1m;
     pc = 0;
-    csr = 0;
+	pc = 0;
-    tag = 0;
+	csr = 0;
 	tag = 0;
     LIST_INIT(&memlist);
     LIST_INIT(&iolist);
     /*
      * first step: go through all devices and gather memory and I/O
      * sizes
      */
     for (dev = 0; dev < pci_bus_maxdevs(pc,0); dev++) {
 	tag = pci_make_tag(pc, 0, dev, 0);
 	id  = pci_conf_read(pc, tag, PCI_ID_REG);
 	if (id == 0 || id == 0xffffffff)
 	    continue;
-	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
+	LIST_INIT(&memlist);
 	LIST_INIT(&iolist);
 	/*
-	 * special case: if a display card is found and memory is enabled
+	 * first step: go through all devices and gather memory and I/O
-	 * preserve 128k at 0xa0000 as vga memory.
+	 * sizes
 	 * XXX: if a display card is found without being enabled, leave
 	 *      it alone! You will usually only create conflicts by enabeling
 	 *      it.
 	 */
-	class = pci_conf_read(pc, tag, PCI_CLASS_REG);
+	for (dev = 0; dev < pci_bus_maxdevs(pc,0); dev++) {
 	switch (PCI_CLASS(class)) {
-	    case PCI_CLASS_PREHISTORIC:
+		tag = pci_make_tag(pc, 0, dev, 0);
-	    case PCI_CLASS_DISPLAY:
+		id  = pci_conf_read(pc, tag, PCI_ID_REG);
-	      if (csr & (PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE)) {
+		if (id == 0 || id == 0xffffffff)
-		    p = (struct pci_memreg *)malloc(sizeof(struct pci_memreg),
+			continue;
 				M_TEMP, M_WAITOK);
 		    memset(p, '\0', sizeof(struct pci_memreg));
 		    p->dev = dev;
 		    p->csr = csr;
 		    p->tag = tag;
 		    p->reg = 0;     /* there is no register about this */
 		    p->size = 0x20000;  /* 128kByte */
 		    p->mask = 0xfffe0000;
 		    p->address = 0xa0000;
 		    insert_into_list(&memlist, p);
 	      else continue;
 	for (reg = PCI_MAPREG_START; reg < PCI_MAPREG_END; reg += 4) {
 	    address = pci_conf_read(pc, tag, reg);
 	    pci_conf_write(pc, tag, reg, 0xffffffff);
 	    mask    = pci_conf_read(pc, tag, reg);
 	    pci_conf_write(pc, tag, reg, address);
 	    if (mask == 0)
 		continue; /* Register unused */
 	    p = (struct pci_memreg *)malloc(sizeof(struct pci_memreg),
 			M_TEMP, M_WAITOK);
 	    memset(p, '\0', sizeof(struct pci_memreg));
 	    p->dev = dev;
 	    p->csr = csr;
 	    p->tag = tag;
 	    p->reg = reg;
 	    p->mask = mask;
 	    p->address = 0;
-	    if (mask & PCI_MAPREG_TYPE_IO) {
+		csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
 		p->size = PCI_MAPREG_IO_SIZE(mask);
 		/*
-		 * Align IO if necessary
+		 * special case: if a display card is found and memory is
 		 * enabled preserve 128k at 0xa0000 as vga memory.
 		 * XXX: if a display card is found without being enabled,
 		 * leave it alone! You will usually only create conflicts
 		 * by enabeling it.
 		 */
-		if (p->size < PCI_MAPREG_IO_SIZE(PCI_MACHDEP_IO_ALIGN_MASK)) {
+		class = pci_conf_read(pc, tag, PCI_CLASS_REG);
-		    p->mask = PCI_MACHDEP_IO_ALIGN_MASK;
+		switch (PCI_CLASS(class)) {
-		    p->size = PCI_MAPREG_IO_SIZE(p->mask);
+		case PCI_CLASS_PREHISTORIC:
 		case PCI_CLASS_DISPLAY:
 			if (csr & (PCI_COMMAND_MEM_ENABLE |
 			    PCI_COMMAND_MASTER_ENABLE)) {
 				p = malloc(sizeof(struct pci_memreg),
 				    M_TEMP, M_WAITOK);
 				memset(p, 0, sizeof(struct pci_memreg));
 				p->dev = dev;
 				p->csr = csr;
 				p->tag = tag;
 				p->reg = 0;	/* there is no register
 						   about this */
 				p->size = 0x20000; /* 128kByte */
 				p->mask = 0xfffe0000;
 				p->address = 0xa0000;
 				insert_into_list(&memlist, p);
 			} else
 				continue;
+		}
-		/*
+		for (reg = PCI_MAPREG_START; reg < PCI_MAPREG_END; reg += 4) {
-		 * if I/O is already enabled (probably by the console driver)
+			address = pci_conf_read(pc, tag, reg);
-		 * save the address in order to take care about it later.
+			pci_conf_write(pc, tag, reg, 0xffffffff);
-		 */
+			mask    = pci_conf_read(pc, tag, reg);
-		if (csr & PCI_COMMAND_IO_ENABLE)
+			pci_conf_write(pc, tag, reg, address);
-		    p->address = address;
+			if (mask == 0)
 				continue; /* Register unused */
 		insert_into_list(&iolist, p);
-	    } else {
+			p = malloc(sizeof(struct pci_memreg),
-		p->size = PCI_MAPREG_MEM_SIZE(mask);
+			    M_TEMP, M_WAITOK);
 			memset(p, 0, sizeof(struct pci_memreg));
-		/*
+			p->dev = dev;
-		 * Align memory if necessary
+			p->csr = csr;
-		 */
+			p->tag = tag;
-		if (p->size < PCI_MAPREG_IO_SIZE(PCI_MACHDEP_MEM_ALIGN_MASK)) {
+			p->reg = reg;
-		    p->mask = PCI_MACHDEP_MEM_ALIGN_MASK;
+			p->mask = mask;
-		    p->size = PCI_MAPREG_MEM_SIZE(p->mask);
+			p->address = 0;
 			if ((mask & PCI_MAPREG_TYPE_IO) != 0) {
 				p->size = PCI_MAPREG_IO_SIZE(mask);
 				/*
 				 * Align IO if necessary
 				 */
 				if (p->size < PCI_MAPREG_IO_SIZE(
 				    PCI_MACHDEP_IO_ALIGN_MASK)) {
 					p->mask = PCI_MACHDEP_IO_ALIGN_MASK;
 					p->size = PCI_MAPREG_IO_SIZE(p->mask);
+				}
 				/*
 				 * if I/O is already enabled
 				 * (probably by the console driver)
 				 * save the address in order to take care
 				 * about it later.
 				 */
 				if ((csr & PCI_COMMAND_IO_ENABLE) != 0)
 					p->address = address;
 				insert_into_list(&iolist, p);
 			} else {
 				p->size = PCI_MAPREG_MEM_SIZE(mask);
 				/*
 				 * Align memory if necessary
 				 */
 				if (p->size < PCI_MAPREG_IO_SIZE(
 				    PCI_MACHDEP_MEM_ALIGN_MASK)) {
 					p->mask = PCI_MACHDEP_MEM_ALIGN_MASK;
 					p->size = PCI_MAPREG_MEM_SIZE(p->mask);
+				}
 				/*
 				 * if memory is already enabled
 				 * (probably by the console driver)
 				 * save the address in order to take care
 				 * about it later.
 				 */
 				if ((csr & PCI_COMMAND_MEM_ENABLE) != 0)
 					p->address = address;
 				insert_into_list(&memlist, p);
 				if (PCI_MAPREG_MEM_TYPE(mask) ==
 				    PCI_MAPREG_MEM_TYPE_64BIT)
 					reg++;
+			}
+		}
 #if defined(_ATARIHW_)
 		/*
-		 * if memory is already enabled (probably by the console driver)
+		 * Both interrupt pin & line are set to the device (== slot)
-		 * save the address in order to take care about it later.
+		 * number. This makes sense on the atari Hades because the
 		 * individual slots are hard-wired to a specific MFP-pin.
 		 */
-		if (csr & PCI_COMMAND_MEM_ENABLE)
+		csr  = (DEV2SLOT(dev) << PCI_INTERRUPT_PIN_SHIFT);
-		    p->address = address;
+		csr |= (DEV2SLOT(dev) << PCI_INTERRUPT_LINE_SHIFT);
 		pci_conf_write(pc, tag, PCI_INTERRUPT_REG, csr);
 		insert_into_list(&memlist, p);
 		if (PCI_MAPREG_MEM_TYPE(mask) == PCI_MAPREG_MEM_TYPE_64BIT)
 		    reg++;
 #if defined(_ATARIHW_)
 	/*
 	 * Both interrupt pin & line are set to the device (== slot)
 	 * number. This makes sense on the atari Hades because the
 	 * individual slots are hard-wired to a specific MFP-pin.
 	 */
 	csr  = (DEV2SLOT(dev) << PCI_INTERRUPT_PIN_SHIFT);
 	csr |= (DEV2SLOT(dev) << PCI_INTERRUPT_LINE_SHIFT);
 	pci_conf_write(pc, tag, PCI_INTERRUPT_REG, csr);
 #else
 	/*
 	 * On the Milan, we accept the BIOS's choice.
 	 */
 	/* ..except the secondary IDE interrupt that the BIOS doesn't setup. */
 #define PIIX_PCIB_MBIRQ0	0x70
 	if ((PCI_VENDOR(id) == PCI_VENDOR_INTEL) &&
 	    (PCI_PRODUCT(id) == PCI_PRODUCT_INTEL_82371FB_ISA)) {
 		/*
-		 * Set Interrupt Routing for MBIRQ0 to IRQ15.
+		 * On the Milan, we accept the BIOS's choice.
 		 * Note Milan's ROM bootloader v1.2 and v1.4 incorrectly
 		 * set MBIRQ0 to IRQ14 (not 15) and unused MBIRQ1 to IRQ 15,
 		 * so explicitly disable MBIRQ1.
 		 */
-		csr = pci_conf_read(pc, tag, PIIX_PCIB_MBIRQ0);
+		/*
-		csr &= ~0x000ffff;
+		 * ..except the secondary IDE interrupt that
-		csr |=  0x000800f;	/* MBIRQ1: disable, MBIRQ0: IRQ15 */
+		 * the BIOS doesn't setup.
-		pci_conf_write(pc, tag, PIIX_PCIB_MBIRQ0, csr);
+		 */
 #define PIIX_PCIB_MBIRQ0	0x70
 		if ((PCI_VENDOR(id) == PCI_VENDOR_INTEL) &&
 		    (PCI_PRODUCT(id) == PCI_PRODUCT_INTEL_82371FB_ISA)) {
 			/*
 			 * Set Interrupt Routing for MBIRQ0 to IRQ15.
 			 * Note Milan's ROM bootloader v1.2 and v1.4
 			 * incorrectly set MBIRQ0 to IRQ14 (not 15)
 			 * and unused MBIRQ1 to IRQ 15,
 			 * so explicitly disable MBIRQ1.
 			 */
 			csr = pci_conf_read(pc, tag, PIIX_PCIB_MBIRQ0);
 			csr &= ~0x0000ffff;
 			/* MBIRQ1: disable, MBIRQ0: IRQ15 */
 			csr |=  0x0000800f;
 			pci_conf_write(pc, tag, PIIX_PCIB_MBIRQ0, csr);
 #ifdef DEBUG_PCI_MACHDEP
-		printf("\npcib0: enable and route MBIRQ0 to irq 15\n");
+			printf("\npcib0: enable and route MBIRQ0 to irq 15\n");
 #endif
+		}
 #endif
+	}
-    /*
+	/*
-     * second step: calculate the memory and I/O addresses beginning from
+	 * second step: calculate the memory and I/O addresses beginning from
-     * PCI_MEM_START and PCI_IO_START. Care about already mapped areas.
+	 * PCI_MEM_START and PCI_IO_START. Care about already mapped areas.
+	 *
-     * begin with memory list
+	 * begin with memory list
-     */
+	 */
     address = PCI_MEM_START;
     sizecnt = 0;
     membase_1m = 0;
     p = LIST_FIRST(&memlist);
     while (p != NULL) {
 	if (!(p->csr & PCI_COMMAND_MEM_ENABLE)) {
 	    if (PCI_MAPREG_MEM_TYPE(p->mask) == PCI_MAPREG_MEM_TYPE_32BIT_1M) {
 		if (p->size > membase_1m)
 		    membase_1m = p->size;
 		do {
 		    p->address = membase_1m;
 		    membase_1m += p->size;
 		} while (overlap_pci_areas(LIST_FIRST(&memlist), p, p->address,
 					   p->size, PCI_COMMAND_MEM_ENABLE));
 		if (membase_1m > 0x00100000) {
 		    /*
 		     * Should we panic here?
 		     */
 		    printf("\npcibus0: dev %d reg %d: memory not configured",
 			    p->dev, p->reg);
 		    p->reg = 0;
 	    } else {
-		if (sizecnt && (p->size > sizecnt))
+	address = PCI_MEM_START;
-		    sizecnt = ((p->size + sizecnt) & p->mask) &
+	sizecnt = 0;
-			      PCI_MAPREG_MEM_ADDR_MASK;
+	membase_1m = 0;
-		if (sizecnt > address) {
+	p = LIST_FIRST(&memlist);
-		    address = sizecnt;
+	while (p != NULL) {
-		    sizecnt = 0;
+		if ((p->csr & PCI_COMMAND_MEM_ENABLE) == 0) {
 			if (PCI_MAPREG_MEM_TYPE(p->mask) ==
 			    PCI_MAPREG_MEM_TYPE_32BIT_1M) {
 				if (p->size > membase_1m)
 					membase_1m = p->size;
 				do {
 					p->address = membase_1m;
 					membase_1m += p->size;
 				} while (overlap_pci_areas(LIST_FIRST(&memlist),
 				    p, p->address, p->size,
 				    PCI_COMMAND_MEM_ENABLE));
 				if (membase_1m > 0x00100000) {
 					/*
 					 * Should we panic here?
 					 */
 					printf("\npcibus0: dev %d reg %d:"
 					    " memory not configured",
 					    p->dev, p->reg);
 					p->reg = 0;
+				}
 			} else {
 				if (sizecnt && (p->size > sizecnt))
 					sizecnt =
 					    ((p->size + sizecnt) & p->mask) &
 					    PCI_MAPREG_MEM_ADDR_MASK;
 				if (sizecnt > address) {
 					address = sizecnt;
 					sizecnt = 0;
+				}
 				do {
 					p->address = address + sizecnt;
 					sizecnt += p->size;
 				} while (overlap_pci_areas(LIST_FIRST(&memlist),
 				    p, p->address, p->size,
 				    PCI_COMMAND_MEM_ENABLE));
 				if ((address + sizecnt) > PCI_MEM_END) {
 					/*
 					 * Should we panic here?
 					 */
 					printf("\npcibus0: dev %d reg %d:"
 					    " memory not configured",
 					    p->dev, p->reg);
 					p->reg = 0;
+				}
+			}
 			if (p->reg > 0) {
 				pci_conf_write(pc, p->tag, p->reg, p->address);
 				csr = pci_conf_read(pc, p->tag,
 				    PCI_COMMAND_STATUS_REG);
 				csr |= PCI_COMMAND_MEM_ENABLE |
 				    PCI_COMMAND_MASTER_ENABLE;
 				pci_conf_write(pc, p->tag,
 				    PCI_COMMAND_STATUS_REG, csr);
 				p->csr = csr;
+			}
+		}
 		p = LIST_NEXT(p, link);
+	}
-		do {
+	/*
-		    p->address = address + sizecnt;
+	 * now the I/O list
-		    sizecnt += p->size;
+	 */
 		} while (overlap_pci_areas(LIST_FIRST(&memlist), p, p->address,
 					   p->size, PCI_COMMAND_MEM_ENABLE));
 		if ((address + sizecnt) > PCI_MEM_END) {
 		    /*
 		     * Should we panic here?
 		     */
 		    printf("\npcibus0: dev %d reg %d: memory not configured",
 			    p->dev, p->reg);
 		    p->reg = 0;
 	    if (p->reg > 0) {
 		pci_conf_write(pc, p->tag, p->reg, p->address);
 		csr = pci_conf_read(pc, p->tag, PCI_COMMAND_STATUS_REG);
 		csr |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE;
 		pci_conf_write(pc, p->tag, PCI_COMMAND_STATUS_REG, csr);
 		p->csr = csr;
 	p = LIST_NEXT(p, link);
     /*
      * now the I/O list
      */
     address = PCI_IO_START;
     sizecnt = 0;
     p = LIST_FIRST(&iolist);
     while (p != NULL) {
 	if (!(p->csr & PCI_COMMAND_IO_ENABLE)) {
 	    if (sizecnt && (p->size > sizecnt))
 		sizecnt = ((p->size + sizecnt) & p->mask) &
 			  PCI_MAPREG_IO_ADDR_MASK;
 	    if (sizecnt > address) {
 		address = sizecnt;
 		sizecnt = 0;
 	    do {
 		p->address = address + sizecnt;
 		sizecnt += p->size;
 	    } while (overlap_pci_areas(LIST_FIRST(&iolist), p, p->address,
 				       p->size, PCI_COMMAND_IO_ENABLE));
-	    if ((address + sizecnt) > PCI_IO_END) {
+	address = PCI_IO_START;
-		/*
+	sizecnt = 0;
-		 * Should we panic here?
+	p = LIST_FIRST(&iolist);
-		 */
+	while (p != NULL) {
-		printf("\npcibus0: dev %d reg %d: io not configured",
+		if (!(p->csr & PCI_COMMAND_IO_ENABLE)) {
 			p->dev, p->reg);
-	    } else {
+			if (sizecnt && (p->size > sizecnt))
-		pci_conf_write(pc, p->tag, p->reg, p->address);
+				sizecnt = ((p->size + sizecnt) & p->mask) &
-		csr = pci_conf_read(pc, p->tag, PCI_COMMAND_STATUS_REG);
+				    PCI_MAPREG_IO_ADDR_MASK;
-		csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE;
+			if (sizecnt > address) {
-		pci_conf_write(pc, p->tag, PCI_COMMAND_STATUS_REG, csr);
+				address = sizecnt;
-		p->csr = csr;
+				sizecnt = 0;
+			}
 			do {
 				p->address = address + sizecnt;
 				sizecnt += p->size;
 			} while (overlap_pci_areas(LIST_FIRST(&iolist), p,
 			    p->address, p->size, PCI_COMMAND_IO_ENABLE));
 			if ((address + sizecnt) > PCI_IO_END) {
 				/*
 				 * Should we panic here?
 				 */
 				printf("\npcibus0: dev %d reg %d:"
 				    " io not configured",
 				    p->dev, p->reg);
 			} else {
 				pci_conf_write(pc, p->tag, p->reg, p->address);
 				csr = pci_conf_read(pc, p->tag,
 				    PCI_COMMAND_STATUS_REG);
 				csr |= PCI_COMMAND_IO_ENABLE |
 				    PCI_COMMAND_MASTER_ENABLE;
 				pci_conf_write(pc, p->tag,
 				    PCI_COMMAND_STATUS_REG, csr);
 				p->csr = csr;
+			}
+		}
 		p = LIST_NEXT(p, link);
+	}
 	p = LIST_NEXT(p, link);
 #ifdef DEBUG_PCI_MACHDEP
-    printf("\nI/O List:\n");
+	printf("\nI/O List:\n");
-    p = LIST_FIRST(&iolist);
+	p = LIST_FIRST(&iolist);
-    while (p != NULL) {
+	while (p != NULL) {
-	printf("\ndev: %d, reg: 0x%02x, size: 0x%08x, addr: 0x%08x", p->dev,
+		printf("\ndev: %d, reg: 0x%02x, size: 0x%08x, addr: 0x%08x",
-			p->reg, p->size, p->address);
+		    p->dev, p->reg, p->size, p->address);
-	p = LIST_NEXT(p, link);
+		p = LIST_NEXT(p, link);
+	}
-    printf("\nMemlist:");
+	printf("\nMemlist:");
-    p = LIST_FIRST(&memlist);
+	p = LIST_FIRST(&memlist);
-    while (p != NULL) {
+	while (p != NULL) {
-	printf("\ndev: %d, reg: 0x%02x, size: 0x%08x, addr: 0x%08x", p->dev,
+		printf("\ndev: %d, reg: 0x%02x, size: 0x%08x, addr: 0x%08x",
-			p->reg, p->size, p->address);
+		    p->dev, p->reg, p->size, p->address);
-	p = LIST_NEXT(p, link);
+		p = LIST_NEXT(p, link);
+	}
 #endif
-    /*
+	/*
-     * Free the lists
+	 * Free the lists
-     */
+	 */
     p = LIST_FIRST(&iolist);
     while (p != NULL) {
 	q = p;
 	LIST_REMOVE(q, link);
 	free(p, M_WAITOK);
 	p = LIST_FIRST(&iolist);
 	while (p != NULL) {
-    p = LIST_FIRST(&memlist);
+		q = p;
-    while (p != NULL) {
+		LIST_REMOVE(q, link);
-	q = p;
+		free(p, M_WAITOK);
-	LIST_REMOVE(q, link);
+		p = LIST_FIRST(&iolist);
 	free(p, M_WAITOK);
 	p = LIST_FIRST(&memlist);
 	while (p != NULL) {
 		q = p;
 		LIST_REMOVE(q, link);
 		free(p, M_WAITOK);
 		p = LIST_FIRST(&memlist);
+	}
+}
 pcitag_t
 pci_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
+{
 	return (bus << 16) | (device << 11) | (function << 8);
+}
 void
 pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, int *fp)
+{
 @@ -682,28 +715,30 @@ pci_intr_map(const struct pci_attach_arg
 	/* Assume line == 0 means unassigned */
 	if (line == 0)
 		goto bad;
 #endif
 	*ihp = line;
 	return 0;
 bad:
 	*ihp = -1;
 	return 1;
+}
 const char *
-pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih, char *buf, size_t len)
+pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih, char *buf,
     size_t len)
+{
 	if (ih == -1)
 		panic("pci_intr_string: bogus handle 0x%x", ih);
 	snprintf(buf, len, "irq %d", ih);
 	return buf;
+}
 const struct evcnt *
 pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
+{
 	/* XXX for now, no evcnt parent reported */

 @@ -1,14 +1,14 @@
-/*	$NetBSD: pci_milan.c,v 1.15 2018/01/28 14:22:23 tsutsui Exp $	*/
+/*	$NetBSD: pci_milan.c,v 1.16 2019/05/04 08:20:05 tsutsui Exp $	*/
 /*-
  * Copyright (c) 2001 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Leo Weppelman.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -20,111 +20,115 @@
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_milan.c,v 1.15 2018/01/28 14:22:23 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_milan.c,v 1.16 2019/05/04 08:20:05 tsutsui Exp $");
 #include <sys/types.h>
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/device.h>
 #include <dev/pci/pcivar.h>
 #include <dev/pci/pcireg.h>
 #include <dev/isa/isavar.h>		/* isa_intr_{dis}establish */
 #include <dev/isa/isareg.h>		/* isa_intr_{dis}establish */
 #include <sys/bswap.h>
 #include <machine/isa_machdep.h>	/* isa_intr_{dis}establish */
 #include <atari/pci/pci_vga.h>
 #include <atari/dev/grf_etreg.h>
 int
 pci_bus_maxdevs(pci_chipset_tag_t pc, int busno)
+{
 	return (6);
 	return 6;
+}
 /*
  * These are defined in locore.s:
  */
 pcireg_t	milan_pci_confread(pcitag_t);
-void		milan_pci_confwrite(u_long, pcireg_t);
+void		milan_pci_confwrite(uint32_t, pcireg_t);
-extern u_long	plx_status;
+extern uint32_t	plx_status;
 pcireg_t
 pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
+{
-	u_long		data;
+	uint32_t data;
-	if ((unsigned int)reg >= PCI_CONF_SIZE)
+	if ((uint32_t)reg >= PCI_CONF_SIZE)
 		return 0xffffffff;
 	data = bswap32(milan_pci_confread(tag | reg));
-	if ((plx_status) & 0xf9000000) {
+	if ((plx_status & 0xf9000000) != 0) {
 		/*
 		 * Access error, assume nothing there...
 		 */
 		data = 0xffffffff;
+	}
-	return(data);
+	return data;
+}
 void
 pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data)
+{
-	if ((unsigned int)reg >= PCI_CONF_SIZE)
+	if ((uint32_t)reg >= PCI_CONF_SIZE)
 		return;
 	milan_pci_confwrite(tag | reg, bswap32(data));
+}
 int
-pci_intr_setattr(pci_chipset_tag_t pc, pci_intr_handle_t *ih,
+pci_intr_setattr(pci_chipset_tag_t pc, pci_intr_handle_t *ih, int attr,
-		 int attr, uint64_t data)
+    uint64_t data)
+{
 	switch (attr) {
 	case PCI_INTR_MPSAFE:
 		return 0;
 	default:
 		return ENODEV;
+	}
+}
 void *
-pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level, int (*ih_fun)(void *), void *ih_arg)
+pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
     int (*ih_fun)(void *), void *ih_arg)
+{
 	if (ih == 0 || ih >= 16 || ih == 2)
 		panic("pci_intr_establish: bogus handle 0x%x", ih);
 	return isa_intr_establish(NULL, ih, IST_LEVEL, level, ih_fun, ih_arg);
+}
 void
 pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
+{
 	isa_intr_disestablish(NULL, cookie);
+}
 /*
  * VGA related stuff...
+ *
  * It looks like the Milan BIOS is initializing the VGA card in a reasonably
  * standard text mode. However, the screen mode is 640*480 instead of 640*400.
  * Since wscons does not handle the right by default, the card is reprogrammed
  * to 640*400 using only 'standard' VGA registers (I hope!). So this ought to
  * work on cards other than the S3Trio card I have tested it on.
  */
 static const uint8_t crt_tab[] = {
 @@ -152,29 +156,31 @@ static const uint8_t crt_tab[] = {
 x00,	/* 14: underline location */
 x96,	/* 15: start vertical blanking */
 xb9,	/* 16: end vertical blanking */
 xa3,	/* 17: CRT mode control */
 xff	/* 18: line compare */
 };
 /*
  * XXX: Why are we repeating this everywhere! (Leo)
  */
 #define PCI_LINMEMBASE  0x0e000000
 void
-milan_vga_init(pci_chipset_tag_t pc, pcitag_t tag, int id, volatile u_char *ba, u_char *fb)
+milan_vga_init(pci_chipset_tag_t pc, pcitag_t tag, int id,
     volatile uint8_t *ba, uint8_t *fb)
+{
-	int			i, csr;
+	uint32_t csr;
 	int i;
 	/* Turn on the card */
 	pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE);
 	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
 	csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE);
 	csr |= PCI_COMMAND_MASTER_ENABLE;
 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
 	/*
 	 * Make sure we're allowed to write all crt-registers and reload them.
 	 */
 	WCrt(ba, CRT_ID_END_VER_RETR, (RCrt(ba, CRT_ID_END_VER_RETR) & 0x7f));

 @@ -1,98 +1,105 @@
-/*	$NetBSD: pci_tseng.c,v 1.11 2009/10/20 19:10:11 snj Exp $	*/
+/*	$NetBSD: pci_tseng.c,v 1.12 2019/05/04 08:20:05 tsutsui Exp $	*/
 /*
  * Copyright (c) 1999 Leo Weppelman.  All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_tseng.c,v 1.11 2009/10/20 19:10:11 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_tseng.c,v 1.12 2019/05/04 08:20:05 tsutsui Exp $");
 #include <sys/param.h>
 #include <sys/queue.h>
 #include <sys/systm.h>
 #include <dev/pci/pcireg.h>
 #include <dev/pci/pcivar.h>
 #include <dev/pci/pcidevs.h>
 #include <atari/pci/pci_vga.h>
 #include <atari/dev/grf_etreg.h>
 #define PCI_LINMEMBASE	0x0e000000
 #define PCI_IOBASE	0x800
-static void et6000_init(volatile u_char *, u_char *, int);
+static void et6000_init(volatile uint8_t *, uint8_t *, int);
 /*
  * Use tables for the card init...
  */
-static u_char seq_tab[] = {
+static uint8_t seq_tab[] = {
-x03, 0x01, 0x03, 0x00, 0x02, 0x00, 0x00, 0xb4 };
+x03, 0x01, 0x03, 0x00, 0x02, 0x00, 0x00, 0xb4
 };
 static uint8_t gfx_tab[] = {
 x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff
 };
 static uint8_t attr_tab[] = {
 x0a, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00
 };
-static u_char gfx_tab[] = {
+static uint8_t crt_tab[] = {
 x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff };
 static u_char attr_tab[] = {
 x0a, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00 };
 static u_char crt_tab[] = {
 x60, 0x53, 0x4f, 0x94, 0x56, 0x05, 0xc1, 0x1f,
 x00, 0x4f, 0x00, 0x0f, 0x00, 0x00, 0x07, 0x80,
 x98, 0x3d, 0x8f, 0x28, 0x0f, 0x8f, 0xc2, 0xa3,
 xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 x00, 0x00, 0x00, 0x00, 0x56, 0x00, 0x00, 0x00,
 x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 #ifdef ET4000_HAS_2MB_MEM
 x00, 0x80, 0xa0, 0x00, 0x00, 0x10, 0x03, 0x89,		/* 2 MB video memory */
 #else
 x00, 0x80, 0x28, 0x00, 0x00, 0x10, 0x43, 0x09,		/* 1 MB video memory */
 #endif
-x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
+x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 };
-static u_char ras_cas_tab[] = {
+static uint8_t ras_cas_tab[] = {
-x11, 0x14, 0x15 };
+x11, 0x14, 0x15
 };
 void
-tseng_init(pci_chipset_tag_t pc, pcitag_t tag, int id, volatile u_char *ba, u_char *fb)
+tseng_init(pci_chipset_tag_t pc, pcitag_t tag, int id, volatile uint8_t *ba,
     uint8_t *fb)
+{
-	int			i, j, csr;
+	int i, j;
-	int			is_et6000 = 0;
+	int is_et6000 = 0;
 	uint32_t csr;
 	is_et6000 = (id ==  PCI_PRODUCT_TSENG_ET6000) ? 1 : 0;
 	/* Turn on the card */
 	pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE);
 	if (is_et6000)
-		pci_conf_write(pc, tag, PCI_MAPREG_START+4,
+		pci_conf_write(pc, tag, PCI_MAPREG_START + 4,
-					PCI_IOBASE | PCI_MAPREG_TYPE_IO);
+		    PCI_IOBASE | PCI_MAPREG_TYPE_IO);
 	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
 	csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE);
 	csr |= PCI_COMMAND_MASTER_ENABLE;
 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
 	if (is_et6000) {
 		/*
 		 * The et6[01]000 cards have MDRAM chips. The
 		 * timing to those chips is not properly initialized
 		 * by the card on init. The way to determine the
 		 * values is not documented either :-( So that's why
 		 * all this mess below (and in et6000_init()....
 		 */
 @@ -148,58 +155,56 @@ tseng_init(pci_chipset_tag_t pc, pcitag_
 		WAttr(ba, i, i);
 	for (; i < 0x18; i++)
 		WAttr(ba, i, attr_tab[i - 0x10]);
 	WAttr(ba, 0x20, 0);
+}
 /*
  * Initialize the et6000 specific (PCI) registers. Try to do it like the
  * video-bios would have done it, so things like Xservers get what they
  * expect. Most info was kindly provided by Koen Gadeyne.
  */
 static void
-et6000_init(volatile u_char *ba, u_char *fb, int iter)
+et6000_init(volatile uint8_t *ba, uint8_t *fb, int iter)
+{
 	int		i;
-	u_char		dac_tab[] = { 0x7d,0x67, 0x5d,0x64, 0x56,0x63,
+	uint8_t		dac_tab[] = { 0x7d,0x67, 0x5d,0x64, 0x56,0x63,
 x28,0x22, 0x79,0x49, 0x6f,0x47,
 x28,0x41, 0x6b,0x44, 0x00,0x00,
 x00,0x00, 0x5d,0x25, 0x00,0x00,
 x00,0x00, 0x00,0x96 };
 	ba += 0x800;
 	ba[0x40] = 0x06;	/* Use standard vga addressing		*/
 	ba[0x41] = 0x2a;	/* Performance control			*/
 	ba[0x43] = 0x02;	/* XCLK/SCLK config			*/
 	ba[0x44] = ras_cas_tab[iter];	/* RAS/CAS config		*/
 	ba[0x46] = 0x00;	/* CRT display feature			*/
 	ba[0x47] = 0x10;
 	ba[0x58] = 0x00;	/* Video Control 1			*/
 	ba[0x59] = 0x04;	/* Video Control 2			*/
 	/*
 	 * Setup a 'standard' CLKDAC
 	 */
 	ba[0x42] = 0x00;	/* MCLK == CLK0 */
 	ba[0x67] = 0x00;	/* Start filling from dac-reg 0 and up... */
 	for (i = 0; i < 0x16; i++)
 		ba[0x69] = dac_tab[i];
 	if (ba[8] == 0x70) { /* et6100, right? */
-		volatile u_char *ma = (volatile u_char *)fb;
+		volatile uint8_t *ma = (volatile uint8_t *)fb;
-		u_char		bv;
+		uint8_t bv;
 		/*
 		 * XXX Black magic to get the bloody MDRAM's to function...
                  * XXX _Only_ tested on my card! [leo]
 		 */
 		bv = ba[45];
 		ba[0x45] = bv | 0x40;	/* Reset MDRAM's		*/
 		ba[0x45] = bv | 0x70;	/* Program latency value	*/
 		ma[0x0] = 0;		/* Yeah, right :-(		*/
 		ba[0x45] = bv;		/* Back to normal		*/
+	}
+}

 @@ -1,14 +1,14 @@
-/*	$NetBSD: pciide_machdep.c,v 1.7 2012/10/27 17:17:43 chs Exp $	*/
+/*	$NetBSD: pciide_machdep.c,v 1.8 2019/05/04 08:20:05 tsutsui Exp $	*/
 /*
  * Copyright (c) 1998 Christopher G. Demetriou.  All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. All advertising materials mentioning features or use of this software
 @@ -31,41 +31,41 @@
  */
 /*
  * PCI IDE controller driver (i386 machine-dependent portion).
+ *
  * Author: Christopher G. Demetriou, March 2, 1998 (derived from NetBSD
  * sys/dev/pci/ppb.c, revision 1.16).
+ *
  * See "PCI IDE Controller Specification, Revision 1.0 3/4/94" from the
  * PCI SIG.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pciide_machdep.c,v 1.7 2012/10/27 17:17:43 chs Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pciide_machdep.c,v 1.8 2019/05/04 08:20:05 tsutsui Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/device.h>
 #include <dev/pci/pcireg.h>
 #include <dev/pci/pcivar.h>
 #include <dev/pci/pciidereg.h>
 #include <dev/pci/pciidevar.h>
 #include <dev/isa/isavar.h>
 void *
 pciide_machdep_compat_intr_establish(device_t dev,
     const struct pci_attach_args *pa, int chan, int (*func)(void *), void *arg)
+{
 	int irq;
 	void *cookie;
 	irq = PCIIDE_COMPAT_IRQ(chan);
 	cookie = isa_intr_establish(NULL, irq, IST_EDGE, IPL_BIO, func, arg);
 	if (cookie == NULL)
 		return (NULL);
 	printf("%s: %s channel interrupting at irq %d\n", device_xname(dev),
 	    PCIIDE_CHANNEL_NAME(chan), irq);
-	return (cookie);
+	return cookie;
+}