 @@ -1,14 +1,14 @@
-/* $NetBSD: rk3328_cru.c,v 1.4 2018/08/12 16:48:04 jmcneill Exp $ */
+/* $NetBSD: rk3328_cru.c,v 1.5 2019/05/15 01:24:43 mrg Exp $ */
 /*-
  * Copyright (c) 2018 Jared McNeill <jmcneill@invisible.ca>
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -18,27 +18,27 @@
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: rk3328_cru.c,v 1.4 2018/08/12 16:48:04 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3328_cru.c,v 1.5 2019/05/15 01:24:43 mrg Exp $");
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/device.h>
 #include <sys/systm.h>
 #include <dev/fdt/fdtvar.h>
 #include <arm/rockchip/rk_cru.h>
 #include <arm/rockchip/rk3328_cru.h>
 #define	PLL_CON(n)	(0x0000 + (n) * 4)
 #define	MISC_CON	0x0084
 @@ -137,26 +137,27 @@ static const char * armclk_parents[] = {
 static const char * aclk_bus_pre_parents[] = { "cpll", "gpll", "hdmiphy" };
 static const char * hclk_bus_pre_parents[] = { "aclk_bus_pre" };
 static const char * pclk_bus_pre_parents[] = { "aclk_bus_pre" };
 static const char * aclk_peri_pre_parents[] = { "cpll", "gpll", "hdmiphy_peri" };
 static const char * mmc_parents[] = { "cpll", "gpll", "xin24m", "usb480m" };
 static const char * phclk_peri_parents[] = { "aclk_peri_pre" };
 static const char * mux_hdmiphy_parents[] = { "hdmi_phy", "xin24m" };
 static const char * mux_usb480m_parents[] = { "usb480m_phy", "xin24m" };
 static const char * mux_uart0_parents[] = { "clk_uart0_div", "clk_uart0_frac", "xin24m" };
 static const char * mux_uart1_parents[] = { "clk_uart1_div", "clk_uart1_frac", "xin24m" };
 static const char * mux_uart2_parents[] = { "clk_uart2_div", "clk_uart2_frac", "xin24m" };
 static const char * mux_mac2io_src_parents[] = { "clk_mac2io_src", "gmac_clkin" };
 static const char * mux_mac2io_ext_parents[] = { "clk_mac2io", "gmac_clkin" };
 static const char * mux_clk_tsadc_parents[] = { "clk_24m" };
 static const char * mux_2plls_parents[] = { "cpll", "gpll" };
 static const char * mux_2plls_hdmiphy_parents[] = { "cpll", "gpll", "dummy_hdmiphy" };
 static const char * comp_uart_parents[] = { "cpll", "gpll", "usb480m" };
 static const char * pclk_gmac_parents[] = { "aclk_gmac" };
 static struct rk_cru_clk rk3328_cru_clks[] = {
 	RK_PLL(RK3328_PLL_APLL, "apll", pll_parents,
 	       PLL_CON(0),		/* con_base */
 x80,			/* mode_reg */
 	       __BIT(0),		/* mode_mask */
 	       __BIT(4),		/* lock_mask */
 	       pll_frac_rates),
 	RK_PLL(RK3328_PLL_DPLL, "dpll", pll_parents,
 @@ -319,48 +320,58 @@ static struct rk_cru_clk rk3328_cru_clks
 		     CLKSEL_CON(35),	/* muxdiv_reg */
 		     __BIT(7),		/* mux_mask */
 		     __BITS(6,0),	/* div_mask */
 		     CLKGATE_CON(2),	/* gate_reg */
 		     __BIT(11),		/* gate_mask */
 ),
 	RK_COMPOSITE(RK3328_SCLK_I2C3, "clk_i2c3", mux_2plls_parents,
 		     CLKSEL_CON(35),	/* muxdiv_reg */
 		     __BIT(15),		/* mux_mask */
 		     __BITS(14,8),	/* div_mask */
 		     CLKGATE_CON(2),	/* gate_reg */
 		     __BIT(12),		/* gate_mask */
 ),
 	RK_COMPOSITE(RK3328_SCLK_TSADC, "clk_tsadc", mux_clk_tsadc_parents,
 		     CLKSEL_CON(22),	/* muxdiv_reg */
 ,			/* mux_mask */
 		     __BITS(9,0),	/* div_mask */
 		     CLKGATE_CON(2),	/* gate_reg */
 		     __BIT(6),		/* gate_mask */
 ),
 	RK_DIV(0, "clk_24m", "xin24m", CLKSEL_CON(2), __BITS(12,8), 0),
 	RK_GATE(0, "apll_core", "apll", CLKGATE_CON(0), 0),
 	RK_GATE(0, "dpll_core", "dpll", CLKGATE_CON(0), 1),
 	RK_GATE(0, "gpll_core", "gpll", CLKGATE_CON(0), 2),
 	RK_GATE(0, "npll_core", "npll", CLKGATE_CON(0), 12),
 	RK_GATE(0, "gpll_peri", "gpll", CLKGATE_CON(4), 0),
 	RK_GATE(0, "cpll_peri", "cpll", CLKGATE_CON(4), 1),
 	RK_GATE(0, "hdmiphy_peri", "hdmiphy", CLKGATE_CON(4), 2),
 	RK_GATE(0, "pclk_bus", "pclk_bus_pre", CLKGATE_CON(8), 3),
 	RK_GATE(0, "pclk_phy_pre", "pclk_bus_pre", CLKGATE_CON(8), 4),
 	RK_GATE(RK3328_ACLK_PERI, "aclk_peri", "aclk_peri_pre", CLKGATE_CON(10), 0),
 	RK_GATE(RK3328_PCLK_I2C0, "pclk_i2c0", "pclk_bus", CLKGATE_CON(15), 10),
 	RK_GATE(RK3328_PCLK_I2C1, "pclk_i2c1", "pclk_bus", CLKGATE_CON(16), 0),
 	RK_GATE(RK3328_PCLK_I2C2, "pclk_i2c2", "pclk_bus", CLKGATE_CON(16), 1),
 	RK_GATE(RK3328_PCLK_I2C3, "pclk_i2c3", "pclk_bus", CLKGATE_CON(16), 2),
 	RK_GATE(RK3328_PCLK_GPIO0, "pclk_gpio0", "pclk_bus", CLKGATE_CON(16), 7),
 	RK_GATE(RK3328_PCLK_GPIO1, "pclk_gpio1", "pclk_bus", CLKGATE_CON(16), 8),
 	RK_GATE(RK3328_PCLK_GPIO2, "pclk_gpio2", "pclk_bus", CLKGATE_CON(16), 9),
 	RK_GATE(RK3328_PCLK_GPIO3, "pclk_gpio3", "pclk_bus", CLKGATE_CON(16), 10),
 	RK_GATE(RK3328_PCLK_UART0, "pclk_uart0", "pclk_bus", CLKGATE_CON(16), 11),
 	RK_GATE(RK3328_PCLK_UART1, "pclk_uart1", "pclk_bus", CLKGATE_CON(16), 12),
 	RK_GATE(RK3328_PCLK_UART2, "pclk_uart2", "pclk_bus", CLKGATE_CON(16), 13),
 	RK_GATE(RK3328_PCLK_TSADC, "pclk_tsadc", "pclk_bus", CLKGATE_CON(16), 14),
 	RK_GATE(RK3328_SCLK_MAC2IO_REF, "clk_mac2io_ref", "clk_mac2io", CLKGATE_CON(9), 7),
 	RK_GATE(RK3328_SCLK_MAC2IO_RX, "clk_mac2io_rx", "clk_mac2io", CLKGATE_CON(9), 4),
 	RK_GATE(RK3328_SCLK_MAC2IO_TX, "clk_mac2io_tx", "clk_mac2io", CLKGATE_CON(9), 5),
 	RK_GATE(RK3328_SCLK_MAC2IO_REFOUT, "clk_mac2io_refout", "clk_mac2io", CLKGATE_CON(9), 6),
 	RK_GATE(0, "pclk_phy_niu", "pclk_phy_pre", CLKGATE_CON(15), 15),
 	RK_GATE(RK3328_ACLK_USB3OTG, "aclk_usb3otg", "aclk_peri", CLKGATE_CON(19), 4),
 	RK_GATE(RK3328_HCLK_SDMMC, "hclk_sdmmc", "hclk_peri", CLKGATE_CON(19), 0),
 	RK_GATE(RK3328_HCLK_SDIO, "hclk_sdio", "hclk_peri", CLKGATE_CON(19), 1),
 	RK_GATE(RK3328_HCLK_EMMC, "hclk_emmc", "hclk_peri", CLKGATE_CON(19), 2),
 	RK_GATE(RK3328_HCLK_SDMMC_EXT, "hclk_sdmmc_ext", "hclk_peri", CLKGATE_CON(19), 15),
 	RK_GATE(RK3328_HCLK_HOST0, "hclk_host0", "hclk_peri", CLKGATE_CON(19), 6),
 	RK_GATE(RK3328_HCLK_HOST0_ARB, "hclk_host0_arb", "hclk_peri", CLKGATE_CON(19), 7),
 	RK_GATE(RK3328_HCLK_OTG, "hclk_otg", "hclk_peri", CLKGATE_CON(19), 8),

 @@ -1,14 +1,14 @@
-/*	$NetBSD: rk_tsadc.c,v 1.4 2019/05/14 07:45:03 mrg Exp $	*/
+/*	$NetBSD: rk_tsadc.c,v 1.5 2019/05/15 01:24:43 mrg Exp $	*/
 /*
  * Copyright (c) 2019 Matthew R. Green
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -20,54 +20,51 @@
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rk_tsadc.c,v 1.4 2019/05/14 07:45:03 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_tsadc.c,v 1.5 2019/05/15 01:24:43 mrg Exp $");
 /*
  * Driver for the TSADC temperature sensor monitor in RK3328 and RK3399.
+ *
  * TODO:
  * - handle setting various temp values
  * - handle DT trips/temp value defaults
  * - interrupts aren't triggered (test by lowering warn/crit values), and
  *   once they work, make the interrupt do something
  * - fix for RK3328, and port to other rockchips (will require moving some
  *   part into per-chipset sections, such as code<->temp tables)
  */
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/device.h>
 #include <sys/intr.h>
 #include <sys/systm.h>
 #include <sys/time.h>
 #include <sys/kmem.h>
 #include <dev/fdt/fdtvar.h>
 #include <dev/fdt/syscon.h>
 #include <dev/sysmon/sysmonvar.h>
 //#define RKTSADC_DEBUG
 #ifdef RKTSADC_DEBUG
 #define DPRINTF(fmt, ...) \
 	printf("%s:%d: " fmt "\n", __func__, __LINE__, ## __VA_ARGS__)
 #else
 #define DPRINTF(fmt, ...)
 #endif
 /* Register definitions */
 #define TSADC_USER_CON                          0x00
 #define  TSADC_USER_CON_ADC_STATUS              __BIT(12)
 #define  TSADC_USER_CON_INTER_PD_SOC            __BITS(11,6)
 #define  TSADC_USER_CON_START                   __BIT(5)
 #define  TSADC_USER_CON_START_MODE              __BIT(4)
 @@ -149,76 +146,77 @@ __KERNEL_RCSID(0, "$NetBSD: rk_tsadc.c,v
 #define TEMP_uC_TO_uK             273150000
 #define TSHUT_MODE_CPU    0
 #define TSHUT_MODE_GPIO   1
 #define TSHUT_LOW_ACTIVE  0
 #define TSHUT_HIGH_ACTIVE 1
 #define TSHUT_DEF_TEMP    95000
 #define TSADC_DATA_MAX    0xfff
-#define NUM_SENSORS       2
+#define MAX_SENSORS       2
 typedef struct rk_data_array {
 	uint32_t data;  /* register value */
 	int temp;       /* micro-degC */
 } rk_data_array;
 struct rk_tsadc_softc;
-typedef struct rk_data_table {
+typedef struct rk_data {
-	const rk_data_array	*rdt_array;
+	const rk_data_array	*rd_array;
-	size_t			 rdt_size;
+	size_t			 rd_size;
-	void			(*rdt_init)(struct rk_tsadc_softc *, int, int);
+	void			(*rd_init)(struct rk_tsadc_softc *, int, int);
-	bool			 rdt_decr;  /* lower values -> higher temp */
+	bool			 rd_decr;  /* lower values -> higher temp */
-	unsigned		 rdt_min, rdt_max;
+	unsigned		 rd_min, rd_max;
-	unsigned		 rdt_auto_period;
+	unsigned		 rd_auto_period;
-} rk_data_table;
+	unsigned		 rd_num_sensors;
 } rk_data;
 /* Per-sensor data */
 struct rk_tsadc_sensor {
 	envsys_data_t	s_data;
 	bool		s_attached;
 	/* TSADC register offsets for this sensor */
 	unsigned	s_data_reg;
 	unsigned	s_comp_tshut;
 	unsigned	s_comp_int;
 	/* enable bit in AUTO_CON register */
 	unsigned	s_comp_int_en;
 	/* warn/crit values in micro Kelvin */
 	int		s_warn;
 	int		s_tshut;
 };
 struct rk_tsadc_softc {
 	device_t		sc_dev;
 	int			sc_phandle;
 	bus_space_tag_t		sc_bst;
 	bus_space_handle_t	sc_bsh;
 	size_t			sc_size;
 	uint32_t		sc_data_mask;
 	void			*sc_ih;
 	struct sysmon_envsys	*sc_sme;
-	struct rk_tsadc_sensor	sc_sensors[NUM_SENSORS];
+	struct rk_tsadc_sensor	sc_sensors[MAX_SENSORS];
 	struct clk		*sc_clock;
 	struct clk		*sc_clockapb;
 	struct fdtbus_reset	*sc_reset;
 	struct syscon		*sc_syscon;
-	const rk_data_table	*sc_rdt;
+	const rk_data		*sc_rd;
 };
 static int rk_tsadc_match(device_t, cfdata_t, void *);
 static void rk_tsadc_attach(device_t, device_t, void *);
 static int rk_tsadc_detach(device_t, int);
 static int rk_tsadc_init_clocks(struct rk_tsadc_softc *);
 static void rk_tsadc_init_counts(struct rk_tsadc_softc *);
 static void rk_tsadc_tshut_set(struct rk_tsadc_softc *s);
 static void rk_tsadc_init_tshut(struct rk_tsadc_softc *, int, int);
 static void rk_tsadc_init_rk3328(struct rk_tsadc_softc *, int, int);
 static void rk_tsadc_init_rk3399(struct rk_tsadc_softc *, int, int);
 static void rk_tsadc_init_enable(struct rk_tsadc_softc *);
 static void rk_tsadc_init(struct rk_tsadc_softc *, int, int);
 @@ -254,29 +252,35 @@ static const struct rk_tsadc_sensor rk_t
 	  .s_warn = 75000000,
 	  .s_tshut = 95000000,
 	}, {
 	  .s_data = { .desc = "GPU" },
 	  .s_data_reg = TSADC_DATA1,
 	  .s_comp_tshut = TSADC_COMP1_SHUT,
 	  .s_comp_int = TSADC_COMP1_INT,
 	  .s_comp_int_en = TSADC_AUTO_CON_SRC1_EN,
 	  .s_warn = 75000000,
 	  .s_tshut = 95000000,
 	},
 };
-/* Table from RK3328 manual */
+/*
  * Table from RK3328 manual.  Note that the manual lists valid numbers as
  * 4096 - number.  This also means it is increasing not decreasing for
  * higher temps, and the min and max are also offset from 4096.
  */
 #define RK3328_DATA_OFFSET (4096)
 static const rk_data_array rk3328_data_array[] = {
-#define ENTRY(d,C)	{ .data = (d), .temp = (C) * 1000 * 1000, }
+#define ENTRY(d,C) \
 	{ .data = RK3328_DATA_OFFSET - (d), .temp = (C) * 1000 * 1000, }
 	ENTRY(TSADC_DATA_MAX,    -40),
 	ENTRY(3800, -40),
 	ENTRY(3792, -35),
 	ENTRY(3783, -30),
 	ENTRY(3774, -25),
 	ENTRY(3765, -20),
 	ENTRY(3756, -15),
 	ENTRY(3747, -10),
 	ENTRY(3737,  -5),
 	ENTRY(3728,   0),
 	ENTRY(3718,   5),
 	ENTRY(3708,  10),
 	ENTRY(3698,  15),
 @@ -338,54 +342,50 @@ static const rk_data_array rk3399_data_a
 	ENTRY(616,  85),
 	ENTRY(624,  90),
 	ENTRY(633,  95),
 	ENTRY(642, 100),
 	ENTRY(650, 105),
 	ENTRY(659, 110),
 	ENTRY(668, 115),
 	ENTRY(677, 120),
 	ENTRY(685, 125),
 	ENTRY(TSADC_DATA_MAX, 125),
 #undef ENTRY
 };
-static const rk_data_table rk3328_data_table = {
+static const rk_data rk3328_data_table = {
-	.rdt_array = rk3328_data_array,
+	.rd_array = rk3328_data_array,
-	.rdt_size = __arraycount(rk3328_data_array),
+	.rd_size = __arraycount(rk3328_data_array),
-	.rdt_init = rk_tsadc_init_rk3328,
+	.rd_init = rk_tsadc_init_rk3328,
-	.rdt_decr = true,
+	.rd_decr = false,
-	.rdt_max = 3801,
+	.rd_max = RK3328_DATA_OFFSET - 3420,
-	.rdt_min = 3420,
+	.rd_min = RK3328_DATA_OFFSET - 3801,
-	.rdt_auto_period = RK3328_TSADC_AUTO_PERIOD_TIME,
+	.rd_auto_period = RK3328_TSADC_AUTO_PERIOD_TIME,
 	.rd_num_sensors = 1,
 };
-static const rk_data_table rk3399_data_table = {
+static const rk_data rk3399_data_table = {
-	.rdt_array = rk3399_data_array,
+	.rd_array = rk3399_data_array,
-	.rdt_size = __arraycount(rk3399_data_array),
+	.rd_size = __arraycount(rk3399_data_array),
-	.rdt_init = rk_tsadc_init_rk3399,
+	.rd_init = rk_tsadc_init_rk3399,
-	.rdt_decr = false,
+	.rd_decr = false,
-	.rdt_max = 686,
+	.rd_max = 686,
-	.rdt_min = 401,
+	.rd_min = 401,
-	.rdt_auto_period = RK3399_TSADC_AUTO_PERIOD_TIME,
+	.rd_auto_period = RK3399_TSADC_AUTO_PERIOD_TIME,
 	.rd_num_sensors = 2,
 };
 static const char * const compatible_rk3328[] = {
 #if 0
 	/*
 	 * does not yet report sane values.  should be between 3421 and 3800,
 	 * but CPU tends to report < 1000 and the GPU reports 600-1600.
 	 */
 	"rockchip,rk3328-tsadc",
 #endif
 	NULL
 };
 static const char * const compatible_rk3399[] = {
 	"rockchip,rk3399-tsadc",
 	NULL
 };
 #define	TSADC_READ(sc, reg)		\
 	bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
 #define	TSADC_WRITE(sc, reg, val)	\
 	bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
 @@ -420,52 +420,59 @@ rk_tsadc_attach(device_t parent, device_
 	aprint_naive("\n");
 	aprint_normal(": RK3328/3399 Temperature Sensor ADC\n");
 	sc->sc_sme = sysmon_envsys_create();
 	sc->sc_sme->sme_name = device_xname(self);
 	sc->sc_sme->sme_cookie = sc;
 	sc->sc_sme->sme_refresh = rk_tsadc_refresh;
 	sc->sc_sme->sme_get_limits = rk_tsadc_get_limits;
 	sc->sc_data_mask = TSADC_DATA_MAX;
 	pmf_device_register(self, NULL, NULL);
 	if (of_match_compatible(faa->faa_phandle, compatible_rk3328)) {
 		sc->sc_rd = &rk3328_data_table;
 	} else {
 		KASSERT(of_match_compatible(faa->faa_phandle, compatible_rk3399));
 		sc->sc_rd = &rk3399_data_table;
+	}
 	/* Default to tshut via gpio and tshut low is active */
 	if (of_getprop_uint32(phandle, "rockchip,hw-tshut-mode",
 			      &mode) != 0) {
 		aprint_error(": could not get TSHUT mode, default to GPIO");
 		mode = TSHUT_MODE_GPIO;
+	}
 	if (mode != TSHUT_MODE_CPU && mode != TSHUT_MODE_GPIO) {
 		aprint_error(": TSHUT mode should be 0 or 1\n");
 		goto fail;
+	}
 	if (of_getprop_uint32(phandle, "rockchip,hw-tshut-polarity",
 			      &polarity) != 0) {
 		aprint_error(": could not get TSHUT polarity, default to low");
 		polarity = TSHUT_LOW_ACTIVE;
+	}
 	if (of_getprop_uint32(phandle,
 			      "rockchip,hw-tshut-temp", &tshut_temp) != 0) {
 		aprint_error(": could not get TSHUT temperature, default to %u",
 			     TSHUT_DEF_TEMP);
 		tshut_temp = TSHUT_DEF_TEMP;
+	}
 	tshut_temp *= 1000;	/* convert fdt ms -> us */
 	memcpy(sc->sc_sensors, rk_tsadc_sensors, sizeof(sc->sc_sensors));
-	for (unsigned n = 0; n < NUM_SENSORS; n++) {
+	for (unsigned n = 0; n < sc->sc_rd->rd_num_sensors; n++) {
 		struct rk_tsadc_sensor *rks = &sc->sc_sensors[n];
 		rks->s_data.flags = ENVSYS_FMONLIMITS;
 		rks->s_data.units = ENVSYS_STEMP;
 		rks->s_data.state = ENVSYS_SINVALID;
 		if (sysmon_envsys_sensor_attach(sc->sc_sme, &rks->s_data))
 			goto fail;
 		rks->s_attached = true;
 		rks->s_tshut = tshut_temp;
 #if 0
 		// testing
 		rks->s_tshut = 68000000;
 @@ -498,55 +505,48 @@ rk_tsadc_attach(device_t parent, device_
 	    rk_tsadc_intr, sc);
 	if (sc->sc_ih == NULL) {
 		aprint_error_dev(self, "couldn't establish interrupt on %s\n",
 		    intrstr);
 		goto fail;
+	}
 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
 	if (rk_tsadc_init_clocks(sc)) {
 		aprint_error(": couldn't enable clocks\n");
 		return;
+	}
 	if (of_match_compatible(faa->faa_phandle, compatible_rk3328)) {
 		sc->sc_rdt = &rk3328_data_table;
 	} else {
 		KASSERT(of_match_compatible(faa->faa_phandle, compatible_rk3399));
 		sc->sc_rdt = &rk3399_data_table;
 	/*
 	 * Manual says to setup auto period (both), high temp (interrupt),
 	 * high temp (shutdown), enable high temp resets (TSHUT to GPIO
 	 * or reset chip), set the debounce times, and, finally, enable the
 	 * controller iself.
 	 */
 	rk_tsadc_init(sc, mode, polarity);
 	return;
 fail:
 	rk_tsadc_detach(self, 0);
+}
 static int
 rk_tsadc_detach(device_t self, int flags)
+{
 	struct rk_tsadc_softc *sc = device_private(self);
 	pmf_device_deregister(self);
-	for (unsigned n = 0; n < NUM_SENSORS; n++) {
+	for (unsigned n = 0; n < sc->sc_rd->rd_num_sensors; n++) {
 		struct rk_tsadc_sensor *rks = &sc->sc_sensors[n];
 		if (rks->s_attached) {
 			sysmon_envsys_sensor_detach(sc->sc_sme, &rks->s_data);
 			rks->s_attached = false;
+		}
+	}
 	sysmon_envsys_unregister(sc->sc_sme);
 	if (sc->sc_clockapb)
 		clk_disable(sc->sc_clockapb);
 	if (sc->sc_clock)
 @@ -588,42 +588,47 @@ rk_tsadc_init_clocks(struct rk_tsadc_sof
 	error = clk_enable(sc->sc_clockapb);
 	DELAY(20);
 	fdtbus_reset_deassert(sc->sc_reset);
 	return error;
+}
 static void
 rk_tsadc_init_counts(struct rk_tsadc_softc *sc)
+{
-	TSADC_WRITE(sc, TSADC_AUTO_PERIOD, sc->sc_rdt->rdt_auto_period);
+	TSADC_WRITE(sc, TSADC_AUTO_PERIOD, sc->sc_rd->rd_auto_period);
-	TSADC_WRITE(sc, TSADC_AUTO_PERIOD_HT, sc->sc_rdt->rdt_auto_period);
+	TSADC_WRITE(sc, TSADC_AUTO_PERIOD_HT, sc->sc_rd->rd_auto_period);
 	TSADC_WRITE(sc, TSADC_HIGH_INT_DEBOUNCE, TSADC_HT_DEBOUNCE_COUNT);
 	TSADC_WRITE(sc, TSADC_HIGH_TSHUT_DEBOUNCE, TSADC_HT_DEBOUNCE_COUNT);
+}
 /* Configure the hardware with the tshut setup. */
 static void
 rk_tsadc_tshut_set(struct rk_tsadc_softc *sc)
+{
 	uint32_t val = TSADC_READ(sc, TSADC_AUTO_CON);
-	for (unsigned n = 0; n < NUM_SENSORS; n++) {
+	for (unsigned n = 0; n < sc->sc_rd->rd_num_sensors; n++) {
 		struct rk_tsadc_sensor *rks = &sc->sc_sensors[n];
-		uint32_t data = rk_tsadc_temp_to_data(sc, rks->s_tshut);
+		uint32_t data, warndata;
 		uint32_t warndata = rk_tsadc_temp_to_data(sc, rks->s_warn);
 		if (!rks->s_attached)
 			continue;
 		data = rk_tsadc_temp_to_data(sc, rks->s_tshut);
 		warndata = rk_tsadc_temp_to_data(sc, rks->s_warn);
 		DPRINTF("(%s:%s): tshut/data %d/%u warn/data %d/%u",
 			sc->sc_sme->sme_name, rks->s_data.desc,
 			rks->s_tshut, data,
 			rks->s_warn, warndata);
 		if (data == sc->sc_data_mask) {
 			aprint_error_dev(sc->sc_dev,
 			    "Failed converting critical temp %u.%06u to code",
 			    rks->s_tshut / 1000000, rks->s_tshut % 1000000);
 			continue;
+		}
 		if (warndata == sc->sc_data_mask) {
 @@ -716,37 +721,38 @@ rk_tsadc_init_enable(struct rk_tsadc_sof
 	/* Finally, register & enable the controller */
 	sysmon_envsys_register(sc->sc_sme);
 	val = TSADC_READ(sc, TSADC_AUTO_CON);
 	val |= TSADC_AUTO_CON_AUTO_EN | TSADC_AUTO_CON_Q_SEL;
 	TSADC_WRITE(sc, TSADC_AUTO_CON, val);
+}
 static void
 rk_tsadc_init(struct rk_tsadc_softc *sc, int mode, int polarity)
+{
-	(*sc->sc_rdt->rdt_init)(sc, mode, polarity);
+	(*sc->sc_rd->rd_init)(sc, mode, polarity);
 	rk_tsadc_init_enable(sc);
+}
 /* run time support */
 /* given edata, find the matching rk sensor structure */
 static struct rk_tsadc_sensor *
 rk_tsadc_edata_to_sensor(struct rk_tsadc_softc * const sc, envsys_data_t *edata)
+{
-	for (unsigned n = 0; n < NUM_SENSORS; n++) {
+	for (unsigned n = 0; n < sc->sc_rd->rd_num_sensors; n++) {
 		struct rk_tsadc_sensor *rks = &sc->sc_sensors[n];
 		if (&rks->s_data == edata)
 			return rks;
+	}
 	return NULL;
+}
 static void
 rk_tsadc_refresh(struct sysmon_envsys *sme, envsys_data_t *edata)
+{
 	struct rk_tsadc_softc * const sc = sme->sme_cookie;
 	struct rk_tsadc_sensor *rks = rk_tsadc_edata_to_sensor(sc, edata);
 @@ -811,87 +817,88 @@ rk_tsadc_intr(void *arg)
 	return 1;
+}
 /*
  * Convert TDASC data codes to temp and reverse.  The manual only has codes
  * and temperature values in 5 degC intervals, but says that interpolation
  * can be done to achieve better resolution between these values, and that
  * the spacing is linear.
  */
 static int
 rk_tsadc_data_to_temp(struct rk_tsadc_softc *sc, uint32_t data)
+{
 	unsigned i;
-	const rk_data_table *rdt = sc->sc_rdt;
+	const rk_data *rd = sc->sc_rd;
-	if (data > rdt->rdt_max || data < rdt->rdt_min) {
+	if (data > rd->rd_max || data < rd->rd_min) {
-		DPRINTF("data out of range (%u > %u || %u < %u)", data, rdt->rdt_max, data, rdt->rdt_min);
+		DPRINTF("data out of range (%u > %u || %u < %u)",
 			data, rd->rd_max, data, rd->rd_min);
 		return sc->sc_data_mask;
+	}
-	for (i = 1; i < rdt->rdt_size; i++) {
+	for (i = 1; i < rd->rd_size; i++) {
-		if (rdt->rdt_array[i].data >= data) {
+		if (rd->rd_array[i].data >= data) {
 			int temprange, offset;
 			uint32_t datarange, datadiff;
 			unsigned first, secnd;
-			if (rdt->rdt_array[i].data == data)
+			if (rd->rd_array[i].data == data)
-				return rdt->rdt_array[i].temp;
+				return rd->rd_array[i].temp;
 			/* must interpolate */
-			if (rdt->rdt_decr) {
+			if (rd->rd_decr) {
 				first = i;
 				secnd = i+1;
 			} else {
 				first = i;
 				secnd = i-1;
+			}
-			temprange = rdt->rdt_array[first].temp -
+			temprange = rd->rd_array[first].temp -
-				    rdt->rdt_array[secnd].temp;
+				    rd->rd_array[secnd].temp;
-			datarange = rdt->rdt_array[first].data -
+			datarange = rd->rd_array[first].data -
-				    rdt->rdt_array[secnd].data;
+				    rd->rd_array[secnd].data;
-			datadiff = data - rdt->rdt_array[secnd].data;
+			datadiff = data - rd->rd_array[secnd].data;
 			offset = (temprange * datadiff) / datarange;
-			return rdt->rdt_array[secnd].temp + offset;
+			return rd->rd_array[secnd].temp + offset;
+		}
+	}
 	panic("didn't find range");
+}
 static uint32_t
 rk_tsadc_temp_to_data(struct rk_tsadc_softc *sc, int temp)
+{
 	unsigned i;
-	const rk_data_table *rdt = sc->sc_rdt;
+	const rk_data *rd = sc->sc_rd;
-	for (i = 1; i < rdt->rdt_size; i++) {
+	for (i = 1; i < rd->rd_size; i++) {
-		if (rdt->rdt_array[i].temp >= temp) {
+		if (rd->rd_array[i].temp >= temp) {
 			int temprange, tempdiff;
 			uint32_t datarange, offset;
 			unsigned first, secnd;
-			if (rdt->rdt_array[i].temp == temp)
+			if (rd->rd_array[i].temp == temp)
-				return rdt->rdt_array[i].data;
+				return rd->rd_array[i].data;
 			/* must interpolate */
-			if (rdt->rdt_decr) {
+			if (rd->rd_decr) {
 				first = i;
 				secnd = i+1;
 			} else {
 				first = i;
 				secnd = i-1;
+			}
-			datarange = rdt->rdt_array[first].data -
+			datarange = rd->rd_array[first].data -
-				    rdt->rdt_array[secnd].data;
+				    rd->rd_array[secnd].data;
-			temprange = rdt->rdt_array[first].temp -
+			temprange = rd->rd_array[first].temp -
-				    rdt->rdt_array[secnd].temp;
+				    rd->rd_array[secnd].temp;
-			tempdiff = temp - rdt->rdt_array[secnd].temp;
+			tempdiff = temp - rd->rd_array[secnd].temp;
 			offset = (datarange * tempdiff) / temprange;
-			return rdt->rdt_array[secnd].data + offset;
+			return rd->rd_array[secnd].data + offset;
+		}
+	}
 	return sc->sc_data_mask;
+}