Thu Jul 25 07:05:44 2019 UTC ()
 Set FCTTV(Flow Control Transmit Timer Value) register correctly in
ixgbe_fc_enable_generic(). Found by KUBSan.


(msaitoh)
diff -r1.23 -r1.24 src/sys/dev/pci/ixgbe/ixgbe_common.c
cvs diff -r1.23 -r1.24 src/sys/dev/pci/ixgbe/ixgbe_common.c (expand / switch to unified diff)

--- src/sys/dev/pci/ixgbe/ixgbe_common.c 2019/06/27 05:55:40 1.23
+++ src/sys/dev/pci/ixgbe/ixgbe_common.c 2019/07/25 07:05:44 1.24
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: ixgbe_common.c,v 1.23 2019/06/27 05:55:40 msaitoh Exp $ */ 1/* $NetBSD: ixgbe_common.c,v 1.24 2019/07/25 07:05:44 msaitoh Exp $ */
2 2
3/****************************************************************************** 3/******************************************************************************
4 SPDX-License-Identifier: BSD-3-Clause 4 SPDX-License-Identifier: BSD-3-Clause
5 5
6 Copyright (c) 2001-2017, Intel Corporation 6 Copyright (c) 2001-2017, Intel Corporation
7 All rights reserved. 7 All rights reserved.
8 8
9 Redistribution and use in source and binary forms, with or without 9 Redistribution and use in source and binary forms, with or without
10 modification, are permitted provided that the following conditions are met: 10 modification, are permitted provided that the following conditions are met:
11 11
12 1. Redistributions of source code must retain the above copyright notice, 12 1. Redistributions of source code must retain the above copyright notice,
13 this list of conditions and the following disclaimer. 13 this list of conditions and the following disclaimer.
14 14
@@ -2940,27 +2940,27 @@ s32 ixgbe_fc_enable_generic(struct ixgbe @@ -2940,27 +2940,27 @@ s32 ixgbe_fc_enable_generic(struct ixgbe
2940 * In order to prevent Tx hangs when the internal Tx 2940 * In order to prevent Tx hangs when the internal Tx
2941 * switch is enabled we must set the high water mark 2941 * switch is enabled we must set the high water mark
2942 * to the Rx packet buffer size - 24KB. This allows 2942 * to the Rx packet buffer size - 24KB. This allows
2943 * the Tx switch to function even under heavy Rx 2943 * the Tx switch to function even under heavy Rx
2944 * workloads. 2944 * workloads.
2945 */ 2945 */
2946 fcrth = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)) - 24576; 2946 fcrth = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)) - 24576;
2947 } 2947 }
2948 2948
2949 IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(i), fcrth); 2949 IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(i), fcrth);
2950 } 2950 }
2951 2951
2952 /* Configure pause time (2 TCs per register) */ 2952 /* Configure pause time (2 TCs per register) */
2953 reg = hw->fc.pause_time * 0x00010001; 2953 reg = (u32)hw->fc.pause_time * 0x00010001;
2954 for (i = 0; i < (IXGBE_DCB_MAX_TRAFFIC_CLASS / 2); i++) 2954 for (i = 0; i < (IXGBE_DCB_MAX_TRAFFIC_CLASS / 2); i++)
2955 IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg); 2955 IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg);
2956 2956
2957 /* Configure flow control refresh threshold value */ 2957 /* Configure flow control refresh threshold value */
2958 IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2); 2958 IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2);
2959 2959
2960out: 2960out:
2961 return ret_val; 2961 return ret_val;
2962} 2962}
2963 2963
2964/** 2964/**
2965 * ixgbe_negotiate_fc - Negotiate flow control 2965 * ixgbe_negotiate_fc - Negotiate flow control
2966 * @hw: pointer to hardware structure 2966 * @hw: pointer to hardware structure