Thu Oct 10 22:34:42 2019 UTC ()
magic number police. use ETHER_ADDR_LEN.


(bad)
diff -r1.91 -r1.92 src/sys/dev/pci/if_iwn.c
cvs diff -r1.91 -r1.92 src/sys/dev/pci/if_iwn.c (switch to unified diff)

--- src/sys/dev/pci/if_iwn.c 2019/04/19 19:37:31 1.91
+++ src/sys/dev/pci/if_iwn.c 2019/10/10 22:34:42 1.92
@@ -1,2570 +1,2570 @@ @@ -1,2570 +1,2570 @@
1/* $NetBSD: if_iwn.c,v 1.91 2019/04/19 19:37:31 gutteridge Exp $ */ 1/* $NetBSD: if_iwn.c,v 1.92 2019/10/10 22:34:42 bad Exp $ */
2/* $OpenBSD: if_iwn.c,v 1.135 2014/09/10 07:22:09 dcoppa Exp $ */ 2/* $OpenBSD: if_iwn.c,v 1.135 2014/09/10 07:22:09 dcoppa Exp $ */
3 3
4/*- 4/*-
5 * Copyright (c) 2007-2010 Damien Bergamini <damien.bergamini@free.fr> 5 * Copyright (c) 2007-2010 Damien Bergamini <damien.bergamini@free.fr>
6 * 6 *
7 * Permission to use, copy, modify, and distribute this software for any 7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above 8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies. 9 * copyright notice and this permission notice appear in all copies.
10 * 10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */ 18 */
19 19
20/* 20/*
21 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network 21 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
22 * adapters. 22 * adapters.
23 */ 23 */
24#include <sys/cdefs.h> 24#include <sys/cdefs.h>
25__KERNEL_RCSID(0, "$NetBSD: if_iwn.c,v 1.91 2019/04/19 19:37:31 gutteridge Exp $"); 25__KERNEL_RCSID(0, "$NetBSD: if_iwn.c,v 1.92 2019/10/10 22:34:42 bad Exp $");
26 26
27#define IWN_USE_RBUF /* Use local storage for RX */ 27#define IWN_USE_RBUF /* Use local storage for RX */
28#undef IWN_HWCRYPTO /* XXX does not even compile yet */ 28#undef IWN_HWCRYPTO /* XXX does not even compile yet */
29 29
30#include <sys/param.h> 30#include <sys/param.h>
31#include <sys/sockio.h> 31#include <sys/sockio.h>
32#include <sys/proc.h> 32#include <sys/proc.h>
33#include <sys/mbuf.h> 33#include <sys/mbuf.h>
34#include <sys/kernel.h> 34#include <sys/kernel.h>
35#include <sys/socket.h> 35#include <sys/socket.h>
36#include <sys/systm.h> 36#include <sys/systm.h>
37#include <sys/malloc.h> 37#include <sys/malloc.h>
38#ifdef notyetMODULE 38#ifdef notyetMODULE
39#include <sys/module.h> 39#include <sys/module.h>
40#endif 40#endif
41#include <sys/mutex.h> 41#include <sys/mutex.h>
42#include <sys/conf.h> 42#include <sys/conf.h>
43#include <sys/kauth.h> 43#include <sys/kauth.h>
44#include <sys/callout.h> 44#include <sys/callout.h>
45 45
46#include <dev/sysmon/sysmonvar.h> 46#include <dev/sysmon/sysmonvar.h>
47 47
48#include <sys/bus.h> 48#include <sys/bus.h>
49#include <machine/endian.h> 49#include <machine/endian.h>
50#include <sys/intr.h> 50#include <sys/intr.h>
51 51
52#include <dev/pci/pcireg.h> 52#include <dev/pci/pcireg.h>
53#include <dev/pci/pcivar.h> 53#include <dev/pci/pcivar.h>
54#include <dev/pci/pcidevs.h> 54#include <dev/pci/pcidevs.h>
55 55
56#include <net/bpf.h> 56#include <net/bpf.h>
57#include <net/if.h> 57#include <net/if.h>
58#include <net/if_arp.h> 58#include <net/if_arp.h>
59#include <net/if_dl.h> 59#include <net/if_dl.h>
60#include <net/if_media.h> 60#include <net/if_media.h>
61#include <net/if_types.h> 61#include <net/if_types.h>
62 62
63#include <netinet/in.h> 63#include <netinet/in.h>
64#include <netinet/in_systm.h> 64#include <netinet/in_systm.h>
65#include <netinet/in_var.h> 65#include <netinet/in_var.h>
66#include <net/if_ether.h> 66#include <net/if_ether.h>
67#include <netinet/ip.h> 67#include <netinet/ip.h>
68 68
69#include <net80211/ieee80211_var.h> 69#include <net80211/ieee80211_var.h>
70#include <net80211/ieee80211_amrr.h> 70#include <net80211/ieee80211_amrr.h>
71#include <net80211/ieee80211_radiotap.h> 71#include <net80211/ieee80211_radiotap.h>
72 72
73#include <dev/firmload.h> 73#include <dev/firmload.h>
74 74
75#include <dev/pci/if_iwnreg.h> 75#include <dev/pci/if_iwnreg.h>
76#include <dev/pci/if_iwnvar.h> 76#include <dev/pci/if_iwnvar.h>
77 77
78static const pci_product_id_t iwn_devices[] = { 78static const pci_product_id_t iwn_devices[] = {
79 PCI_PRODUCT_INTEL_WIFI_LINK_1030_1, 79 PCI_PRODUCT_INTEL_WIFI_LINK_1030_1,
80 PCI_PRODUCT_INTEL_WIFI_LINK_1030_2, 80 PCI_PRODUCT_INTEL_WIFI_LINK_1030_2,
81 PCI_PRODUCT_INTEL_WIFI_LINK_4965_1, 81 PCI_PRODUCT_INTEL_WIFI_LINK_4965_1,
82 PCI_PRODUCT_INTEL_WIFI_LINK_4965_2, 82 PCI_PRODUCT_INTEL_WIFI_LINK_4965_2,
83 PCI_PRODUCT_INTEL_WIFI_LINK_4965_3, 83 PCI_PRODUCT_INTEL_WIFI_LINK_4965_3,
84 PCI_PRODUCT_INTEL_WIFI_LINK_4965_4, 84 PCI_PRODUCT_INTEL_WIFI_LINK_4965_4,
85 PCI_PRODUCT_INTEL_WIFI_LINK_5100_1, 85 PCI_PRODUCT_INTEL_WIFI_LINK_5100_1,
86 PCI_PRODUCT_INTEL_WIFI_LINK_5100_2, 86 PCI_PRODUCT_INTEL_WIFI_LINK_5100_2,
87 PCI_PRODUCT_INTEL_WIFI_LINK_5150_1, 87 PCI_PRODUCT_INTEL_WIFI_LINK_5150_1,
88 PCI_PRODUCT_INTEL_WIFI_LINK_5150_2, 88 PCI_PRODUCT_INTEL_WIFI_LINK_5150_2,
89 PCI_PRODUCT_INTEL_WIFI_LINK_5300_1, 89 PCI_PRODUCT_INTEL_WIFI_LINK_5300_1,
90 PCI_PRODUCT_INTEL_WIFI_LINK_5300_2, 90 PCI_PRODUCT_INTEL_WIFI_LINK_5300_2,
91 PCI_PRODUCT_INTEL_WIFI_LINK_5350_1, 91 PCI_PRODUCT_INTEL_WIFI_LINK_5350_1,
92 PCI_PRODUCT_INTEL_WIFI_LINK_5350_2, 92 PCI_PRODUCT_INTEL_WIFI_LINK_5350_2,
93 PCI_PRODUCT_INTEL_WIFI_LINK_1000_1, 93 PCI_PRODUCT_INTEL_WIFI_LINK_1000_1,
94 PCI_PRODUCT_INTEL_WIFI_LINK_1000_2, 94 PCI_PRODUCT_INTEL_WIFI_LINK_1000_2,
95 PCI_PRODUCT_INTEL_WIFI_LINK_6000_3X3_1, 95 PCI_PRODUCT_INTEL_WIFI_LINK_6000_3X3_1,
96 PCI_PRODUCT_INTEL_WIFI_LINK_6000_3X3_2, 96 PCI_PRODUCT_INTEL_WIFI_LINK_6000_3X3_2,
97 PCI_PRODUCT_INTEL_WIFI_LINK_6000_IPA_1, 97 PCI_PRODUCT_INTEL_WIFI_LINK_6000_IPA_1,
98 PCI_PRODUCT_INTEL_WIFI_LINK_6000_IPA_2, 98 PCI_PRODUCT_INTEL_WIFI_LINK_6000_IPA_2,
99 PCI_PRODUCT_INTEL_WIFI_LINK_6050_2X2_1, 99 PCI_PRODUCT_INTEL_WIFI_LINK_6050_2X2_1,
100 PCI_PRODUCT_INTEL_WIFI_LINK_6050_2X2_2, 100 PCI_PRODUCT_INTEL_WIFI_LINK_6050_2X2_2,
101 PCI_PRODUCT_INTEL_WIFI_LINK_6005_2X2_1, 101 PCI_PRODUCT_INTEL_WIFI_LINK_6005_2X2_1,
102 PCI_PRODUCT_INTEL_WIFI_LINK_6005_2X2_2, 102 PCI_PRODUCT_INTEL_WIFI_LINK_6005_2X2_2,
103 PCI_PRODUCT_INTEL_WIFI_LINK_6230_1, 103 PCI_PRODUCT_INTEL_WIFI_LINK_6230_1,
104 PCI_PRODUCT_INTEL_WIFI_LINK_6230_2, 104 PCI_PRODUCT_INTEL_WIFI_LINK_6230_2,
105 PCI_PRODUCT_INTEL_WIFI_LINK_6235, 105 PCI_PRODUCT_INTEL_WIFI_LINK_6235,
106 PCI_PRODUCT_INTEL_WIFI_LINK_6235_2, 106 PCI_PRODUCT_INTEL_WIFI_LINK_6235_2,
107 PCI_PRODUCT_INTEL_WIFI_LINK_100_1, 107 PCI_PRODUCT_INTEL_WIFI_LINK_100_1,
108 PCI_PRODUCT_INTEL_WIFI_LINK_100_2, 108 PCI_PRODUCT_INTEL_WIFI_LINK_100_2,
109 PCI_PRODUCT_INTEL_WIFI_LINK_130_1, 109 PCI_PRODUCT_INTEL_WIFI_LINK_130_1,
110 PCI_PRODUCT_INTEL_WIFI_LINK_130_2, 110 PCI_PRODUCT_INTEL_WIFI_LINK_130_2,
111 PCI_PRODUCT_INTEL_WIFI_LINK_2230_1, 111 PCI_PRODUCT_INTEL_WIFI_LINK_2230_1,
112 PCI_PRODUCT_INTEL_WIFI_LINK_2230_2, 112 PCI_PRODUCT_INTEL_WIFI_LINK_2230_2,
113 PCI_PRODUCT_INTEL_WIFI_LINK_2200_1, 113 PCI_PRODUCT_INTEL_WIFI_LINK_2200_1,
114 PCI_PRODUCT_INTEL_WIFI_LINK_2200_2, 114 PCI_PRODUCT_INTEL_WIFI_LINK_2200_2,
115 PCI_PRODUCT_INTEL_WIFI_LINK_135_1, 115 PCI_PRODUCT_INTEL_WIFI_LINK_135_1,
116 PCI_PRODUCT_INTEL_WIFI_LINK_135_2, 116 PCI_PRODUCT_INTEL_WIFI_LINK_135_2,
117 PCI_PRODUCT_INTEL_WIFI_LINK_105_1, 117 PCI_PRODUCT_INTEL_WIFI_LINK_105_1,
118 PCI_PRODUCT_INTEL_WIFI_LINK_105_2, 118 PCI_PRODUCT_INTEL_WIFI_LINK_105_2,
119}; 119};
120 120
121static int iwn_match(device_t , struct cfdata *, void *); 121static int iwn_match(device_t , struct cfdata *, void *);
122static void iwn_attach(device_t , device_t , void *); 122static void iwn_attach(device_t , device_t , void *);
123static int iwn4965_attach(struct iwn_softc *, pci_product_id_t); 123static int iwn4965_attach(struct iwn_softc *, pci_product_id_t);
124static int iwn5000_attach(struct iwn_softc *, pci_product_id_t); 124static int iwn5000_attach(struct iwn_softc *, pci_product_id_t);
125static void iwn_radiotap_attach(struct iwn_softc *); 125static void iwn_radiotap_attach(struct iwn_softc *);
126static int iwn_detach(device_t , int); 126static int iwn_detach(device_t , int);
127#if 0 127#if 0
128static void iwn_power(int, void *); 128static void iwn_power(int, void *);
129#endif 129#endif
130static bool iwn_resume(device_t, const pmf_qual_t *); 130static bool iwn_resume(device_t, const pmf_qual_t *);
131static int iwn_nic_lock(struct iwn_softc *); 131static int iwn_nic_lock(struct iwn_softc *);
132static int iwn_eeprom_lock(struct iwn_softc *); 132static int iwn_eeprom_lock(struct iwn_softc *);
133static int iwn_init_otprom(struct iwn_softc *); 133static int iwn_init_otprom(struct iwn_softc *);
134static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int); 134static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int);
135static int iwn_dma_contig_alloc(bus_dma_tag_t, struct iwn_dma_info *, 135static int iwn_dma_contig_alloc(bus_dma_tag_t, struct iwn_dma_info *,
136 void **, bus_size_t, bus_size_t); 136 void **, bus_size_t, bus_size_t);
137static void iwn_dma_contig_free(struct iwn_dma_info *); 137static void iwn_dma_contig_free(struct iwn_dma_info *);
138static int iwn_alloc_sched(struct iwn_softc *); 138static int iwn_alloc_sched(struct iwn_softc *);
139static void iwn_free_sched(struct iwn_softc *); 139static void iwn_free_sched(struct iwn_softc *);
140static int iwn_alloc_kw(struct iwn_softc *); 140static int iwn_alloc_kw(struct iwn_softc *);
141static void iwn_free_kw(struct iwn_softc *); 141static void iwn_free_kw(struct iwn_softc *);
142static int iwn_alloc_ict(struct iwn_softc *); 142static int iwn_alloc_ict(struct iwn_softc *);
143static void iwn_free_ict(struct iwn_softc *); 143static void iwn_free_ict(struct iwn_softc *);
144static int iwn_alloc_fwmem(struct iwn_softc *); 144static int iwn_alloc_fwmem(struct iwn_softc *);
145static void iwn_free_fwmem(struct iwn_softc *); 145static void iwn_free_fwmem(struct iwn_softc *);
146static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *); 146static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
147static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *); 147static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
148static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *); 148static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
149static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *, 149static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
150 int); 150 int);
151static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *); 151static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
152static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *); 152static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
153static void iwn5000_ict_reset(struct iwn_softc *); 153static void iwn5000_ict_reset(struct iwn_softc *);
154static int iwn_read_eeprom(struct iwn_softc *); 154static int iwn_read_eeprom(struct iwn_softc *);
155static void iwn4965_read_eeprom(struct iwn_softc *); 155static void iwn4965_read_eeprom(struct iwn_softc *);
156 156
157#ifdef IWN_DEBUG 157#ifdef IWN_DEBUG
158static void iwn4965_print_power_group(struct iwn_softc *, int); 158static void iwn4965_print_power_group(struct iwn_softc *, int);
159#endif 159#endif
160static void iwn5000_read_eeprom(struct iwn_softc *); 160static void iwn5000_read_eeprom(struct iwn_softc *);
161static void iwn_read_eeprom_channels(struct iwn_softc *, int, uint32_t); 161static void iwn_read_eeprom_channels(struct iwn_softc *, int, uint32_t);
162static void iwn_read_eeprom_enhinfo(struct iwn_softc *); 162static void iwn_read_eeprom_enhinfo(struct iwn_softc *);
163static struct ieee80211_node *iwn_node_alloc(struct ieee80211_node_table *); 163static struct ieee80211_node *iwn_node_alloc(struct ieee80211_node_table *);
164static void iwn_newassoc(struct ieee80211_node *, int); 164static void iwn_newassoc(struct ieee80211_node *, int);
165static int iwn_media_change(struct ifnet *); 165static int iwn_media_change(struct ifnet *);
166static int iwn_newstate(struct ieee80211com *, enum ieee80211_state, int); 166static int iwn_newstate(struct ieee80211com *, enum ieee80211_state, int);
167static void iwn_iter_func(void *, struct ieee80211_node *); 167static void iwn_iter_func(void *, struct ieee80211_node *);
168static void iwn_calib_timeout(void *); 168static void iwn_calib_timeout(void *);
169static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *, 169static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *,
170 struct iwn_rx_data *); 170 struct iwn_rx_data *);
171static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *, 171static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
172 struct iwn_rx_data *); 172 struct iwn_rx_data *);
173#ifndef IEEE80211_NO_HT 173#ifndef IEEE80211_NO_HT
174static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *, 174static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *,
175 struct iwn_rx_data *); 175 struct iwn_rx_data *);
176#endif 176#endif
177static void iwn5000_rx_calib_results(struct iwn_softc *, 177static void iwn5000_rx_calib_results(struct iwn_softc *,
178 struct iwn_rx_desc *, struct iwn_rx_data *); 178 struct iwn_rx_desc *, struct iwn_rx_data *);
179static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *, 179static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *,
180 struct iwn_rx_data *); 180 struct iwn_rx_data *);
181static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *, 181static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
182 struct iwn_rx_data *); 182 struct iwn_rx_data *);
183static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *, 183static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
184 struct iwn_rx_data *); 184 struct iwn_rx_data *);
185static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int, 185static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int,
186 uint8_t); 186 uint8_t);
187static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *); 187static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
188static void iwn_notif_intr(struct iwn_softc *); 188static void iwn_notif_intr(struct iwn_softc *);
189static void iwn_wakeup_intr(struct iwn_softc *); 189static void iwn_wakeup_intr(struct iwn_softc *);
190static void iwn_fatal_intr(struct iwn_softc *); 190static void iwn_fatal_intr(struct iwn_softc *);
191static int iwn_intr(void *); 191static int iwn_intr(void *);
192static void iwn_softintr(void *); 192static void iwn_softintr(void *);
193static void iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t, 193static void iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t,
194 uint16_t); 194 uint16_t);
195static void iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t, 195static void iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t,
196 uint16_t); 196 uint16_t);
197#ifdef notyet 197#ifdef notyet
198static void iwn5000_reset_sched(struct iwn_softc *, int, int); 198static void iwn5000_reset_sched(struct iwn_softc *, int, int);
199#endif 199#endif
200static int iwn_tx(struct iwn_softc *, struct mbuf *, 200static int iwn_tx(struct iwn_softc *, struct mbuf *,
201 struct ieee80211_node *, int); 201 struct ieee80211_node *, int);
202static void iwn_start(struct ifnet *); 202static void iwn_start(struct ifnet *);
203static void iwn_watchdog(struct ifnet *); 203static void iwn_watchdog(struct ifnet *);
204static int iwn_ioctl(struct ifnet *, u_long, void *); 204static int iwn_ioctl(struct ifnet *, u_long, void *);
205static int iwn_cmd(struct iwn_softc *, int, const void *, int, int); 205static int iwn_cmd(struct iwn_softc *, int, const void *, int, int);
206static int iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *, 206static int iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *,
207 int); 207 int);
208static int iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *, 208static int iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *,
209 int); 209 int);
210static int iwn_set_link_quality(struct iwn_softc *, 210static int iwn_set_link_quality(struct iwn_softc *,
211 struct ieee80211_node *); 211 struct ieee80211_node *);
212static int iwn_add_broadcast_node(struct iwn_softc *, int); 212static int iwn_add_broadcast_node(struct iwn_softc *, int);
213static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t); 213static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
214static int iwn_set_critical_temp(struct iwn_softc *); 214static int iwn_set_critical_temp(struct iwn_softc *);
215static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *); 215static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *);
216static void iwn4965_power_calibration(struct iwn_softc *, int); 216static void iwn4965_power_calibration(struct iwn_softc *, int);
217static int iwn4965_set_txpower(struct iwn_softc *, int); 217static int iwn4965_set_txpower(struct iwn_softc *, int);
218static int iwn5000_set_txpower(struct iwn_softc *, int); 218static int iwn5000_set_txpower(struct iwn_softc *, int);
219static int iwn4965_get_rssi(const struct iwn_rx_stat *); 219static int iwn4965_get_rssi(const struct iwn_rx_stat *);
220static int iwn5000_get_rssi(const struct iwn_rx_stat *); 220static int iwn5000_get_rssi(const struct iwn_rx_stat *);
221static int iwn_get_noise(const struct iwn_rx_general_stats *); 221static int iwn_get_noise(const struct iwn_rx_general_stats *);
222static int iwn4965_get_temperature(struct iwn_softc *); 222static int iwn4965_get_temperature(struct iwn_softc *);
223static int iwn5000_get_temperature(struct iwn_softc *); 223static int iwn5000_get_temperature(struct iwn_softc *);
224static int iwn_init_sensitivity(struct iwn_softc *); 224static int iwn_init_sensitivity(struct iwn_softc *);
225static void iwn_collect_noise(struct iwn_softc *, 225static void iwn_collect_noise(struct iwn_softc *,
226 const struct iwn_rx_general_stats *); 226 const struct iwn_rx_general_stats *);
227static int iwn4965_init_gains(struct iwn_softc *); 227static int iwn4965_init_gains(struct iwn_softc *);
228static int iwn5000_init_gains(struct iwn_softc *); 228static int iwn5000_init_gains(struct iwn_softc *);
229static int iwn4965_set_gains(struct iwn_softc *); 229static int iwn4965_set_gains(struct iwn_softc *);
230static int iwn5000_set_gains(struct iwn_softc *); 230static int iwn5000_set_gains(struct iwn_softc *);
231static void iwn_tune_sensitivity(struct iwn_softc *, 231static void iwn_tune_sensitivity(struct iwn_softc *,
232 const struct iwn_rx_stats *); 232 const struct iwn_rx_stats *);
233static int iwn_send_sensitivity(struct iwn_softc *); 233static int iwn_send_sensitivity(struct iwn_softc *);
234static int iwn_set_pslevel(struct iwn_softc *, int, int, int); 234static int iwn_set_pslevel(struct iwn_softc *, int, int, int);
235static int iwn5000_runtime_calib(struct iwn_softc *); 235static int iwn5000_runtime_calib(struct iwn_softc *);
236 236
237static int iwn_config_bt_coex_bluetooth(struct iwn_softc *); 237static int iwn_config_bt_coex_bluetooth(struct iwn_softc *);
238static int iwn_config_bt_coex_prio_table(struct iwn_softc *); 238static int iwn_config_bt_coex_prio_table(struct iwn_softc *);
239static int iwn_config_bt_coex_adv1(struct iwn_softc *); 239static int iwn_config_bt_coex_adv1(struct iwn_softc *);
240static int iwn_config_bt_coex_adv2(struct iwn_softc *); 240static int iwn_config_bt_coex_adv2(struct iwn_softc *);
241 241
242static int iwn_config(struct iwn_softc *); 242static int iwn_config(struct iwn_softc *);
243static uint16_t iwn_get_active_dwell_time(struct iwn_softc *, uint16_t, 243static uint16_t iwn_get_active_dwell_time(struct iwn_softc *, uint16_t,
244 uint8_t); 244 uint8_t);
245static uint16_t iwn_limit_dwell(struct iwn_softc *, uint16_t); 245static uint16_t iwn_limit_dwell(struct iwn_softc *, uint16_t);
246static uint16_t iwn_get_passive_dwell_time(struct iwn_softc *, uint16_t); 246static uint16_t iwn_get_passive_dwell_time(struct iwn_softc *, uint16_t);
247static int iwn_scan(struct iwn_softc *, uint16_t); 247static int iwn_scan(struct iwn_softc *, uint16_t);
248static int iwn_auth(struct iwn_softc *); 248static int iwn_auth(struct iwn_softc *);
249static int iwn_run(struct iwn_softc *); 249static int iwn_run(struct iwn_softc *);
250#ifdef IWN_HWCRYPTO 250#ifdef IWN_HWCRYPTO
251static int iwn_set_key(struct ieee80211com *, struct ieee80211_node *, 251static int iwn_set_key(struct ieee80211com *, struct ieee80211_node *,
252 struct ieee80211_key *); 252 struct ieee80211_key *);
253static void iwn_delete_key(struct ieee80211com *, struct ieee80211_node *, 253static void iwn_delete_key(struct ieee80211com *, struct ieee80211_node *,
254 struct ieee80211_key *); 254 struct ieee80211_key *);
255#endif 255#endif
256static int iwn_wme_update(struct ieee80211com *); 256static int iwn_wme_update(struct ieee80211com *);
257#ifndef IEEE80211_NO_HT 257#ifndef IEEE80211_NO_HT
258static int iwn_ampdu_rx_start(struct ieee80211com *, 258static int iwn_ampdu_rx_start(struct ieee80211com *,
259 struct ieee80211_node *, uint8_t); 259 struct ieee80211_node *, uint8_t);
260static void iwn_ampdu_rx_stop(struct ieee80211com *, 260static void iwn_ampdu_rx_stop(struct ieee80211com *,
261 struct ieee80211_node *, uint8_t); 261 struct ieee80211_node *, uint8_t);
262static int iwn_ampdu_tx_start(struct ieee80211com *, 262static int iwn_ampdu_tx_start(struct ieee80211com *,
263 struct ieee80211_node *, uint8_t); 263 struct ieee80211_node *, uint8_t);
264static void iwn_ampdu_tx_stop(struct ieee80211com *, 264static void iwn_ampdu_tx_stop(struct ieee80211com *,
265 struct ieee80211_node *, uint8_t); 265 struct ieee80211_node *, uint8_t);
266static void iwn4965_ampdu_tx_start(struct iwn_softc *, 266static void iwn4965_ampdu_tx_start(struct iwn_softc *,
267 struct ieee80211_node *, uint8_t, uint16_t); 267 struct ieee80211_node *, uint8_t, uint16_t);
268static void iwn4965_ampdu_tx_stop(struct iwn_softc *, 268static void iwn4965_ampdu_tx_stop(struct iwn_softc *,
269 uint8_t, uint16_t); 269 uint8_t, uint16_t);
270static void iwn5000_ampdu_tx_start(struct iwn_softc *, 270static void iwn5000_ampdu_tx_start(struct iwn_softc *,
271 struct ieee80211_node *, uint8_t, uint16_t); 271 struct ieee80211_node *, uint8_t, uint16_t);
272static void iwn5000_ampdu_tx_stop(struct iwn_softc *, 272static void iwn5000_ampdu_tx_stop(struct iwn_softc *,
273 uint8_t, uint16_t); 273 uint8_t, uint16_t);
274#endif 274#endif
275static int iwn5000_query_calibration(struct iwn_softc *); 275static int iwn5000_query_calibration(struct iwn_softc *);
276static int iwn5000_send_calibration(struct iwn_softc *); 276static int iwn5000_send_calibration(struct iwn_softc *);
277static int iwn5000_send_wimax_coex(struct iwn_softc *); 277static int iwn5000_send_wimax_coex(struct iwn_softc *);
278static int iwn6000_temp_offset_calib(struct iwn_softc *); 278static int iwn6000_temp_offset_calib(struct iwn_softc *);
279static int iwn2000_temp_offset_calib(struct iwn_softc *); 279static int iwn2000_temp_offset_calib(struct iwn_softc *);
280static int iwn4965_post_alive(struct iwn_softc *); 280static int iwn4965_post_alive(struct iwn_softc *);
281static int iwn5000_post_alive(struct iwn_softc *); 281static int iwn5000_post_alive(struct iwn_softc *);
282static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *, 282static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
283 int); 283 int);
284static int iwn4965_load_firmware(struct iwn_softc *); 284static int iwn4965_load_firmware(struct iwn_softc *);
285static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t, 285static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
286 const uint8_t *, int); 286 const uint8_t *, int);
287static int iwn5000_load_firmware(struct iwn_softc *); 287static int iwn5000_load_firmware(struct iwn_softc *);
288static int iwn_read_firmware_leg(struct iwn_softc *, 288static int iwn_read_firmware_leg(struct iwn_softc *,
289 struct iwn_fw_info *); 289 struct iwn_fw_info *);
290static int iwn_read_firmware_tlv(struct iwn_softc *, 290static int iwn_read_firmware_tlv(struct iwn_softc *,
291 struct iwn_fw_info *, uint16_t); 291 struct iwn_fw_info *, uint16_t);
292static int iwn_read_firmware(struct iwn_softc *); 292static int iwn_read_firmware(struct iwn_softc *);
293static int iwn_clock_wait(struct iwn_softc *); 293static int iwn_clock_wait(struct iwn_softc *);
294static int iwn_apm_init(struct iwn_softc *); 294static int iwn_apm_init(struct iwn_softc *);
295static void iwn_apm_stop_master(struct iwn_softc *); 295static void iwn_apm_stop_master(struct iwn_softc *);
296static void iwn_apm_stop(struct iwn_softc *); 296static void iwn_apm_stop(struct iwn_softc *);
297static int iwn4965_nic_config(struct iwn_softc *); 297static int iwn4965_nic_config(struct iwn_softc *);
298static int iwn5000_nic_config(struct iwn_softc *); 298static int iwn5000_nic_config(struct iwn_softc *);
299static int iwn_hw_prepare(struct iwn_softc *); 299static int iwn_hw_prepare(struct iwn_softc *);
300static int iwn_hw_init(struct iwn_softc *); 300static int iwn_hw_init(struct iwn_softc *);
301static void iwn_hw_stop(struct iwn_softc *); 301static void iwn_hw_stop(struct iwn_softc *);
302static int iwn_init(struct ifnet *); 302static int iwn_init(struct ifnet *);
303static void iwn_stop(struct ifnet *, int); 303static void iwn_stop(struct ifnet *, int);
304 304
305/* XXX MCLGETI alternative */ 305/* XXX MCLGETI alternative */
306static struct mbuf *MCLGETIalt(struct iwn_softc *, int, 306static struct mbuf *MCLGETIalt(struct iwn_softc *, int,
307 struct ifnet *, u_int); 307 struct ifnet *, u_int);
308#ifdef IWN_USE_RBUF 308#ifdef IWN_USE_RBUF
309static struct iwn_rbuf *iwn_alloc_rbuf(struct iwn_softc *); 309static struct iwn_rbuf *iwn_alloc_rbuf(struct iwn_softc *);
310static void iwn_free_rbuf(struct mbuf *, void *, size_t, void *); 310static void iwn_free_rbuf(struct mbuf *, void *, size_t, void *);
311static int iwn_alloc_rpool(struct iwn_softc *); 311static int iwn_alloc_rpool(struct iwn_softc *);
312static void iwn_free_rpool(struct iwn_softc *); 312static void iwn_free_rpool(struct iwn_softc *);
313#endif 313#endif
314 314
315static void iwn_fix_channel(struct ieee80211com *, struct mbuf *, 315static void iwn_fix_channel(struct ieee80211com *, struct mbuf *,
316 struct iwn_rx_stat *); 316 struct iwn_rx_stat *);
317 317
318#ifdef IWN_DEBUG 318#ifdef IWN_DEBUG
319#define DPRINTF(x) do { if (iwn_debug > 0) printf x; } while (0) 319#define DPRINTF(x) do { if (iwn_debug > 0) printf x; } while (0)
320#define DPRINTFN(n, x) do { if (iwn_debug >= (n)) printf x; } while (0) 320#define DPRINTFN(n, x) do { if (iwn_debug >= (n)) printf x; } while (0)
321int iwn_debug = 0; 321int iwn_debug = 0;
322#else 322#else
323#define DPRINTF(x) 323#define DPRINTF(x)
324#define DPRINTFN(n, x) 324#define DPRINTFN(n, x)
325#endif 325#endif
326 326
327CFATTACH_DECL_NEW(iwn, sizeof(struct iwn_softc), iwn_match, iwn_attach, 327CFATTACH_DECL_NEW(iwn, sizeof(struct iwn_softc), iwn_match, iwn_attach,
328 iwn_detach, NULL); 328 iwn_detach, NULL);
329 329
330static int 330static int
331iwn_match(device_t parent, cfdata_t match __unused, void *aux) 331iwn_match(device_t parent, cfdata_t match __unused, void *aux)
332{ 332{
333 struct pci_attach_args *pa = aux; 333 struct pci_attach_args *pa = aux;
334 size_t i; 334 size_t i;
335 335
336 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL) 336 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL)
337 return 0; 337 return 0;
338 338
339 for (i = 0; i < __arraycount(iwn_devices); i++) 339 for (i = 0; i < __arraycount(iwn_devices); i++)
340 if (PCI_PRODUCT(pa->pa_id) == iwn_devices[i]) 340 if (PCI_PRODUCT(pa->pa_id) == iwn_devices[i])
341 return 1; 341 return 1;
342 342
343 return 0; 343 return 0;
344} 344}
345 345
346static void 346static void
347iwn_attach(device_t parent __unused, device_t self, void *aux) 347iwn_attach(device_t parent __unused, device_t self, void *aux)
348{ 348{
349 struct iwn_softc *sc = device_private(self); 349 struct iwn_softc *sc = device_private(self);
350 struct ieee80211com *ic = &sc->sc_ic; 350 struct ieee80211com *ic = &sc->sc_ic;
351 struct ifnet *ifp = &sc->sc_ec.ec_if; 351 struct ifnet *ifp = &sc->sc_ec.ec_if;
352 struct pci_attach_args *pa = aux; 352 struct pci_attach_args *pa = aux;
353 const char *intrstr; 353 const char *intrstr;
354 pcireg_t memtype, reg; 354 pcireg_t memtype, reg;
355 int i, error; 355 int i, error;
356 char intrbuf[PCI_INTRSTR_LEN]; 356 char intrbuf[PCI_INTRSTR_LEN];
357 357
358 sc->sc_dev = self; 358 sc->sc_dev = self;
359 sc->sc_pct = pa->pa_pc; 359 sc->sc_pct = pa->pa_pc;
360 sc->sc_pcitag = pa->pa_tag; 360 sc->sc_pcitag = pa->pa_tag;
361 sc->sc_dmat = pa->pa_dmat; 361 sc->sc_dmat = pa->pa_dmat;
362 mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_NONE); 362 mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_NONE);
363 363
364 callout_init(&sc->calib_to, 0); 364 callout_init(&sc->calib_to, 0);
365 callout_setfunc(&sc->calib_to, iwn_calib_timeout, sc); 365 callout_setfunc(&sc->calib_to, iwn_calib_timeout, sc);
366 366
367 pci_aprint_devinfo(pa, NULL); 367 pci_aprint_devinfo(pa, NULL);
368 368
369 /* 369 /*
370 * Get the offset of the PCI Express Capability Structure in PCI 370 * Get the offset of the PCI Express Capability Structure in PCI
371 * Configuration Space. 371 * Configuration Space.
372 */ 372 */
373 error = pci_get_capability(sc->sc_pct, sc->sc_pcitag, 373 error = pci_get_capability(sc->sc_pct, sc->sc_pcitag,
374 PCI_CAP_PCIEXPRESS, &sc->sc_cap_off, NULL); 374 PCI_CAP_PCIEXPRESS, &sc->sc_cap_off, NULL);
375 if (error == 0) { 375 if (error == 0) {
376 aprint_error_dev(self, 376 aprint_error_dev(self,
377 "PCIe capability structure not found!\n"); 377 "PCIe capability structure not found!\n");
378 return; 378 return;
379 } 379 }
380 380
381 /* Clear device-specific "PCI retry timeout" register (41h). */ 381 /* Clear device-specific "PCI retry timeout" register (41h). */
382 reg = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40); 382 reg = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40);
383 if (reg & 0xff00) 383 if (reg & 0xff00)
384 pci_conf_write(sc->sc_pct, sc->sc_pcitag, 0x40, reg & ~0xff00); 384 pci_conf_write(sc->sc_pct, sc->sc_pcitag, 0x40, reg & ~0xff00);
385 385
386 /* Enable bus-mastering. */ 386 /* Enable bus-mastering. */
387 /* XXX verify the bus-mastering is really needed (not in OpenBSD) */ 387 /* XXX verify the bus-mastering is really needed (not in OpenBSD) */
388 reg = pci_conf_read(sc->sc_pct, sc->sc_pcitag, PCI_COMMAND_STATUS_REG); 388 reg = pci_conf_read(sc->sc_pct, sc->sc_pcitag, PCI_COMMAND_STATUS_REG);
389 reg |= PCI_COMMAND_MASTER_ENABLE; 389 reg |= PCI_COMMAND_MASTER_ENABLE;
390 pci_conf_write(sc->sc_pct, sc->sc_pcitag, PCI_COMMAND_STATUS_REG, reg); 390 pci_conf_write(sc->sc_pct, sc->sc_pcitag, PCI_COMMAND_STATUS_REG, reg);
391 391
392 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, IWN_PCI_BAR0); 392 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, IWN_PCI_BAR0);
393 error = pci_mapreg_map(pa, IWN_PCI_BAR0, memtype, 0, &sc->sc_st, 393 error = pci_mapreg_map(pa, IWN_PCI_BAR0, memtype, 0, &sc->sc_st,
394 &sc->sc_sh, NULL, &sc->sc_sz); 394 &sc->sc_sh, NULL, &sc->sc_sz);
395 if (error != 0) { 395 if (error != 0) {
396 aprint_error_dev(self, "can't map mem space\n"); 396 aprint_error_dev(self, "can't map mem space\n");
397 return; 397 return;
398 } 398 }
399 399
400 sc->sc_soft_ih = softint_establish(SOFTINT_NET, iwn_softintr, sc); 400 sc->sc_soft_ih = softint_establish(SOFTINT_NET, iwn_softintr, sc);
401 if (sc->sc_soft_ih == NULL) { 401 if (sc->sc_soft_ih == NULL) {
402 aprint_error_dev(self, "can't establish soft interrupt\n"); 402 aprint_error_dev(self, "can't establish soft interrupt\n");
403 goto unmap; 403 goto unmap;
404 } 404 }
405 405
406 /* Install interrupt handler. */ 406 /* Install interrupt handler. */
407 error = pci_intr_alloc(pa, &sc->sc_pihp, NULL, 0); 407 error = pci_intr_alloc(pa, &sc->sc_pihp, NULL, 0);
408 if (error) { 408 if (error) {
409 aprint_error_dev(self, "can't allocate interrupt\n"); 409 aprint_error_dev(self, "can't allocate interrupt\n");
410 goto failsi; 410 goto failsi;
411 } 411 }
412 reg = pci_conf_read(sc->sc_pct, sc->sc_pcitag, PCI_COMMAND_STATUS_REG); 412 reg = pci_conf_read(sc->sc_pct, sc->sc_pcitag, PCI_COMMAND_STATUS_REG);
413 if (pci_intr_type(sc->sc_pct, sc->sc_pihp[0]) == PCI_INTR_TYPE_INTX) 413 if (pci_intr_type(sc->sc_pct, sc->sc_pihp[0]) == PCI_INTR_TYPE_INTX)
414 CLR(reg, PCI_COMMAND_INTERRUPT_DISABLE); 414 CLR(reg, PCI_COMMAND_INTERRUPT_DISABLE);
415 else 415 else
416 SET(reg, PCI_COMMAND_INTERRUPT_DISABLE); 416 SET(reg, PCI_COMMAND_INTERRUPT_DISABLE);
417 pci_conf_write(sc->sc_pct, sc->sc_pcitag, PCI_COMMAND_STATUS_REG, reg); 417 pci_conf_write(sc->sc_pct, sc->sc_pcitag, PCI_COMMAND_STATUS_REG, reg);
418 intrstr = pci_intr_string(sc->sc_pct, sc->sc_pihp[0], intrbuf, 418 intrstr = pci_intr_string(sc->sc_pct, sc->sc_pihp[0], intrbuf,
419 sizeof(intrbuf)); 419 sizeof(intrbuf));
420 sc->sc_ih = pci_intr_establish_xname(sc->sc_pct, sc->sc_pihp[0], 420 sc->sc_ih = pci_intr_establish_xname(sc->sc_pct, sc->sc_pihp[0],
421 IPL_NET, iwn_intr, sc, device_xname(self)); 421 IPL_NET, iwn_intr, sc, device_xname(self));
422 if (sc->sc_ih == NULL) { 422 if (sc->sc_ih == NULL) {
423 aprint_error_dev(self, "can't establish interrupt"); 423 aprint_error_dev(self, "can't establish interrupt");
424 if (intrstr != NULL) 424 if (intrstr != NULL)
425 aprint_error(" at %s", intrstr); 425 aprint_error(" at %s", intrstr);
426 aprint_error("\n"); 426 aprint_error("\n");
427 goto failia; 427 goto failia;
428 } 428 }
429 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 429 aprint_normal_dev(self, "interrupting at %s\n", intrstr);
430 430
431 /* Read hardware revision and attach. */ 431 /* Read hardware revision and attach. */
432 sc->hw_type = 432 sc->hw_type =
433 (IWN_READ(sc, IWN_HW_REV) & IWN_HW_REV_TYPE_MASK) 433 (IWN_READ(sc, IWN_HW_REV) & IWN_HW_REV_TYPE_MASK)
434 >> IWN_HW_REV_TYPE_SHIFT; 434 >> IWN_HW_REV_TYPE_SHIFT;
435 if (sc->hw_type == IWN_HW_REV_TYPE_4965) 435 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
436 error = iwn4965_attach(sc, PCI_PRODUCT(pa->pa_id)); 436 error = iwn4965_attach(sc, PCI_PRODUCT(pa->pa_id));
437 else 437 else
438 error = iwn5000_attach(sc, PCI_PRODUCT(pa->pa_id)); 438 error = iwn5000_attach(sc, PCI_PRODUCT(pa->pa_id));
439 if (error != 0) { 439 if (error != 0) {
440 aprint_error_dev(self, "could not attach device\n"); 440 aprint_error_dev(self, "could not attach device\n");
441 goto failih; 441 goto failih;
442 }  442 }
443 443
444 if ((error = iwn_hw_prepare(sc)) != 0) { 444 if ((error = iwn_hw_prepare(sc)) != 0) {
445 aprint_error_dev(self, "hardware not ready\n"); 445 aprint_error_dev(self, "hardware not ready\n");
446 goto failih; 446 goto failih;
447 } 447 }
448 448
449 /* Read MAC address, channels, etc from EEPROM. */ 449 /* Read MAC address, channels, etc from EEPROM. */
450 if ((error = iwn_read_eeprom(sc)) != 0) { 450 if ((error = iwn_read_eeprom(sc)) != 0) {
451 aprint_error_dev(self, "could not read EEPROM\n"); 451 aprint_error_dev(self, "could not read EEPROM\n");
452 goto failih; 452 goto failih;
453 } 453 }
454 454
455 /* Allocate DMA memory for firmware transfers. */ 455 /* Allocate DMA memory for firmware transfers. */
456 if ((error = iwn_alloc_fwmem(sc)) != 0) { 456 if ((error = iwn_alloc_fwmem(sc)) != 0) {
457 aprint_error_dev(self, 457 aprint_error_dev(self,
458 "could not allocate memory for firmware\n"); 458 "could not allocate memory for firmware\n");
459 goto failih; 459 goto failih;
460 } 460 }
461 461
462 /* Allocate "Keep Warm" page. */ 462 /* Allocate "Keep Warm" page. */
463 if ((error = iwn_alloc_kw(sc)) != 0) { 463 if ((error = iwn_alloc_kw(sc)) != 0) {
464 aprint_error_dev(self, "could not allocate keep warm page\n"); 464 aprint_error_dev(self, "could not allocate keep warm page\n");
465 goto fail1; 465 goto fail1;
466 } 466 }
467 467
468 /* Allocate ICT table for 5000 Series. */ 468 /* Allocate ICT table for 5000 Series. */
469 if (sc->hw_type != IWN_HW_REV_TYPE_4965 && 469 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
470 (error = iwn_alloc_ict(sc)) != 0) { 470 (error = iwn_alloc_ict(sc)) != 0) {
471 aprint_error_dev(self, "could not allocate ICT table\n"); 471 aprint_error_dev(self, "could not allocate ICT table\n");
472 goto fail2; 472 goto fail2;
473 } 473 }
474 474
475 /* Allocate TX scheduler "rings". */ 475 /* Allocate TX scheduler "rings". */
476 if ((error = iwn_alloc_sched(sc)) != 0) { 476 if ((error = iwn_alloc_sched(sc)) != 0) {
477 aprint_error_dev(self, 477 aprint_error_dev(self,
478 "could not allocate TX scheduler rings\n"); 478 "could not allocate TX scheduler rings\n");
479 goto fail3; 479 goto fail3;
480 } 480 }
481 481
482#ifdef IWN_USE_RBUF 482#ifdef IWN_USE_RBUF
483 /* Allocate RX buffers. */ 483 /* Allocate RX buffers. */
484 if ((error = iwn_alloc_rpool(sc)) != 0) { 484 if ((error = iwn_alloc_rpool(sc)) != 0) {
485 aprint_error_dev(self, "could not allocate RX buffers\n"); 485 aprint_error_dev(self, "could not allocate RX buffers\n");
486 goto fail3; 486 goto fail3;
487 } 487 }
488#endif 488#endif
489 489
490 /* Allocate TX rings (16 on 4965AGN, 20 on >=5000). */ 490 /* Allocate TX rings (16 on 4965AGN, 20 on >=5000). */
491 for (i = 0; i < sc->ntxqs; i++) { 491 for (i = 0; i < sc->ntxqs; i++) {
492 if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) { 492 if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) {
493 aprint_error_dev(self, 493 aprint_error_dev(self,
494 "could not allocate TX ring %d\n", i); 494 "could not allocate TX ring %d\n", i);
495 goto fail4; 495 goto fail4;
496 } 496 }
497 } 497 }
498 498
499 /* Allocate RX ring. */ 499 /* Allocate RX ring. */
500 if ((error = iwn_alloc_rx_ring(sc, &sc->rxq)) != 0) { 500 if ((error = iwn_alloc_rx_ring(sc, &sc->rxq)) != 0) {
501 aprint_error_dev(self, "could not allocate RX ring\n"); 501 aprint_error_dev(self, "could not allocate RX ring\n");
502 goto fail4; 502 goto fail4;
503 } 503 }
504 504
505 /* Clear pending interrupts. */ 505 /* Clear pending interrupts. */
506 IWN_WRITE(sc, IWN_INT, 0xffffffff); 506 IWN_WRITE(sc, IWN_INT, 0xffffffff);
507 507
508 /* Count the number of available chains. */ 508 /* Count the number of available chains. */
509 sc->ntxchains = 509 sc->ntxchains =
510 ((sc->txchainmask >> 2) & 1) + 510 ((sc->txchainmask >> 2) & 1) +
511 ((sc->txchainmask >> 1) & 1) + 511 ((sc->txchainmask >> 1) & 1) +
512 ((sc->txchainmask >> 0) & 1); 512 ((sc->txchainmask >> 0) & 1);
513 sc->nrxchains = 513 sc->nrxchains =
514 ((sc->rxchainmask >> 2) & 1) + 514 ((sc->rxchainmask >> 2) & 1) +
515 ((sc->rxchainmask >> 1) & 1) + 515 ((sc->rxchainmask >> 1) & 1) +
516 ((sc->rxchainmask >> 0) & 1); 516 ((sc->rxchainmask >> 0) & 1);
517 aprint_normal_dev(self, "MIMO %dT%dR, %.4s, address %s\n", 517 aprint_normal_dev(self, "MIMO %dT%dR, %.4s, address %s\n",
518 sc->ntxchains, sc->nrxchains, sc->eeprom_domain, 518 sc->ntxchains, sc->nrxchains, sc->eeprom_domain,
519 ether_sprintf(ic->ic_myaddr)); 519 ether_sprintf(ic->ic_myaddr));
520 520
521 ic->ic_ifp = ifp; 521 ic->ic_ifp = ifp;
522 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 522 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
523 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 523 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
524 ic->ic_state = IEEE80211_S_INIT; 524 ic->ic_state = IEEE80211_S_INIT;
525 525
526 /* 526 /*
527 * Set device capabilities. 527 * Set device capabilities.
528 * XXX OpenBSD has IEEE80211_C_WEP, IEEE80211_C_RSN, and 528 * XXX OpenBSD has IEEE80211_C_WEP, IEEE80211_C_RSN, and
529 * IEEE80211_C_PMGT too. 529 * IEEE80211_C_PMGT too.
530 */ 530 */
531 ic->ic_caps = 531 ic->ic_caps =
532 IEEE80211_C_IBSS | /* IBSS mode support */ 532 IEEE80211_C_IBSS | /* IBSS mode support */
533 IEEE80211_C_WPA | /* 802.11i */ 533 IEEE80211_C_WPA | /* 802.11i */
534 IEEE80211_C_MONITOR | /* monitor mode supported */ 534 IEEE80211_C_MONITOR | /* monitor mode supported */
535 IEEE80211_C_TXPMGT | /* tx power management */ 535 IEEE80211_C_TXPMGT | /* tx power management */
536 IEEE80211_C_SHSLOT | /* short slot time supported */ 536 IEEE80211_C_SHSLOT | /* short slot time supported */
537 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 537 IEEE80211_C_SHPREAMBLE | /* short preamble supported */
538 IEEE80211_C_WME; /* 802.11e */ 538 IEEE80211_C_WME; /* 802.11e */
539 539
540#ifndef IEEE80211_NO_HT 540#ifndef IEEE80211_NO_HT
541 if (sc->sc_flags & IWN_FLAG_HAS_11N) { 541 if (sc->sc_flags & IWN_FLAG_HAS_11N) {
542 /* Set HT capabilities. */ 542 /* Set HT capabilities. */
543 ic->ic_htcaps = 543 ic->ic_htcaps =
544#if IWN_RBUF_SIZE == 8192 544#if IWN_RBUF_SIZE == 8192
545 IEEE80211_HTCAP_AMSDU7935 | 545 IEEE80211_HTCAP_AMSDU7935 |
546#endif 546#endif
547 IEEE80211_HTCAP_CBW20_40 | 547 IEEE80211_HTCAP_CBW20_40 |
548 IEEE80211_HTCAP_SGI20 | 548 IEEE80211_HTCAP_SGI20 |
549 IEEE80211_HTCAP_SGI40; 549 IEEE80211_HTCAP_SGI40;
550 if (sc->hw_type != IWN_HW_REV_TYPE_4965) 550 if (sc->hw_type != IWN_HW_REV_TYPE_4965)
551 ic->ic_htcaps |= IEEE80211_HTCAP_GF; 551 ic->ic_htcaps |= IEEE80211_HTCAP_GF;
552 if (sc->hw_type == IWN_HW_REV_TYPE_6050) 552 if (sc->hw_type == IWN_HW_REV_TYPE_6050)
553 ic->ic_htcaps |= IEEE80211_HTCAP_SMPS_DYN; 553 ic->ic_htcaps |= IEEE80211_HTCAP_SMPS_DYN;
554 else 554 else
555 ic->ic_htcaps |= IEEE80211_HTCAP_SMPS_DIS; 555 ic->ic_htcaps |= IEEE80211_HTCAP_SMPS_DIS;
556 } 556 }
557#endif /* !IEEE80211_NO_HT */ 557#endif /* !IEEE80211_NO_HT */
558 558
559 /* Set supported legacy rates. */ 559 /* Set supported legacy rates. */
560 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 560 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b;
561 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 561 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g;
562 if (sc->sc_flags & IWN_FLAG_HAS_5GHZ) { 562 if (sc->sc_flags & IWN_FLAG_HAS_5GHZ) {
563 ic->ic_sup_rates[IEEE80211_MODE_11A] = ieee80211_std_rateset_11a; 563 ic->ic_sup_rates[IEEE80211_MODE_11A] = ieee80211_std_rateset_11a;
564 } 564 }
565#ifndef IEEE80211_NO_HT 565#ifndef IEEE80211_NO_HT
566 if (sc->sc_flags & IWN_FLAG_HAS_11N) { 566 if (sc->sc_flags & IWN_FLAG_HAS_11N) {
567 /* Set supported HT rates. */ 567 /* Set supported HT rates. */
568 ic->ic_sup_mcs[0] = 0xff; /* MCS 0-7 */ 568 ic->ic_sup_mcs[0] = 0xff; /* MCS 0-7 */
569 if (sc->nrxchains > 1) 569 if (sc->nrxchains > 1)
570 ic->ic_sup_mcs[1] = 0xff; /* MCS 7-15 */ 570 ic->ic_sup_mcs[1] = 0xff; /* MCS 7-15 */
571 if (sc->nrxchains > 2) 571 if (sc->nrxchains > 2)
572 ic->ic_sup_mcs[2] = 0xff; /* MCS 16-23 */ 572 ic->ic_sup_mcs[2] = 0xff; /* MCS 16-23 */
573 } 573 }
574#endif 574#endif
575 575
576 /* IBSS channel undefined for now. */ 576 /* IBSS channel undefined for now. */
577 ic->ic_ibss_chan = &ic->ic_channels[0]; 577 ic->ic_ibss_chan = &ic->ic_channels[0];
578 578
579 ifp->if_softc = sc; 579 ifp->if_softc = sc;
580 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 580 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
581 ifp->if_init = iwn_init; 581 ifp->if_init = iwn_init;
582 ifp->if_ioctl = iwn_ioctl; 582 ifp->if_ioctl = iwn_ioctl;
583 ifp->if_start = iwn_start; 583 ifp->if_start = iwn_start;
584 ifp->if_stop = iwn_stop; 584 ifp->if_stop = iwn_stop;
585 ifp->if_watchdog = iwn_watchdog; 585 ifp->if_watchdog = iwn_watchdog;
586 IFQ_SET_READY(&ifp->if_snd); 586 IFQ_SET_READY(&ifp->if_snd);
587 memcpy(ifp->if_xname, device_xname(self), IFNAMSIZ); 587 memcpy(ifp->if_xname, device_xname(self), IFNAMSIZ);
588 588
589 error = if_initialize(ifp); 589 error = if_initialize(ifp);
590 if (error != 0) { 590 if (error != 0) {
591 aprint_error_dev(sc->sc_dev, "if_initialize failed(%d)\n", 591 aprint_error_dev(sc->sc_dev, "if_initialize failed(%d)\n",
592 error); 592 error);
593 goto fail5; 593 goto fail5;
594 } 594 }
595 ieee80211_ifattach(ic); 595 ieee80211_ifattach(ic);
596 /* Use common softint-based if_input */ 596 /* Use common softint-based if_input */
597 ifp->if_percpuq = if_percpuq_create(ifp); 597 ifp->if_percpuq = if_percpuq_create(ifp);
598 if_register(ifp); 598 if_register(ifp);
599 599
600 ic->ic_node_alloc = iwn_node_alloc; 600 ic->ic_node_alloc = iwn_node_alloc;
601 ic->ic_newassoc = iwn_newassoc; 601 ic->ic_newassoc = iwn_newassoc;
602#ifdef IWN_HWCRYPTO 602#ifdef IWN_HWCRYPTO
603 ic->ic_crypto.cs_key_set = iwn_set_key; 603 ic->ic_crypto.cs_key_set = iwn_set_key;
604 ic->ic_crypto.cs_key_delete = iwn_delete_key; 604 ic->ic_crypto.cs_key_delete = iwn_delete_key;
605#endif 605#endif
606 ic->ic_wme.wme_update = iwn_wme_update; 606 ic->ic_wme.wme_update = iwn_wme_update;
607#ifndef IEEE80211_NO_HT 607#ifndef IEEE80211_NO_HT
608 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start; 608 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start;
609 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop; 609 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop;
610 ic->ic_ampdu_tx_start = iwn_ampdu_tx_start; 610 ic->ic_ampdu_tx_start = iwn_ampdu_tx_start;
611 ic->ic_ampdu_tx_stop = iwn_ampdu_tx_stop; 611 ic->ic_ampdu_tx_stop = iwn_ampdu_tx_stop;
612#endif 612#endif
613 613
614 /* Override 802.11 state transition machine. */ 614 /* Override 802.11 state transition machine. */
615 sc->sc_newstate = ic->ic_newstate; 615 sc->sc_newstate = ic->ic_newstate;
616 ic->ic_newstate = iwn_newstate; 616 ic->ic_newstate = iwn_newstate;
617 ieee80211_media_init(ic, iwn_media_change, ieee80211_media_status); 617 ieee80211_media_init(ic, iwn_media_change, ieee80211_media_status);
618 618
619 sc->amrr.amrr_min_success_threshold = 1; 619 sc->amrr.amrr_min_success_threshold = 1;
620 sc->amrr.amrr_max_success_threshold = 15; 620 sc->amrr.amrr_max_success_threshold = 15;
621 621
622 iwn_radiotap_attach(sc); 622 iwn_radiotap_attach(sc);
623 623
624 /* 624 /*
625 * XXX for NetBSD, OpenBSD timeout_set replaced by 625 * XXX for NetBSD, OpenBSD timeout_set replaced by
626 * callout_init and callout_setfunc, above. 626 * callout_init and callout_setfunc, above.
627 */ 627 */
628 628
629 if (pmf_device_register(self, NULL, iwn_resume)) 629 if (pmf_device_register(self, NULL, iwn_resume))
630 pmf_class_network_register(self, ifp); 630 pmf_class_network_register(self, ifp);
631 else 631 else
632 aprint_error_dev(self, "couldn't establish power handler\n"); 632 aprint_error_dev(self, "couldn't establish power handler\n");
633 633
634 /* XXX NetBSD add call to ieee80211_announce for dmesg. */ 634 /* XXX NetBSD add call to ieee80211_announce for dmesg. */
635 ieee80211_announce(ic); 635 ieee80211_announce(ic);
636 636
637 sc->sc_flags |= IWN_FLAG_ATTACHED; 637 sc->sc_flags |= IWN_FLAG_ATTACHED;
638 return; 638 return;
639 639
640 /* Free allocated memory if something failed during attachment. */ 640 /* Free allocated memory if something failed during attachment. */
641fail5: iwn_free_rx_ring(sc, &sc->rxq); 641fail5: iwn_free_rx_ring(sc, &sc->rxq);
642fail4: while (--i >= 0) 642fail4: while (--i >= 0)
643 iwn_free_tx_ring(sc, &sc->txq[i]); 643 iwn_free_tx_ring(sc, &sc->txq[i]);
644#ifdef IWN_USE_RBUF 644#ifdef IWN_USE_RBUF
645 iwn_free_rpool(sc); 645 iwn_free_rpool(sc);
646#endif 646#endif
647 iwn_free_sched(sc); 647 iwn_free_sched(sc);
648fail3: if (sc->ict != NULL) 648fail3: if (sc->ict != NULL)
649 iwn_free_ict(sc); 649 iwn_free_ict(sc);
650fail2: iwn_free_kw(sc); 650fail2: iwn_free_kw(sc);
651fail1: iwn_free_fwmem(sc); 651fail1: iwn_free_fwmem(sc);
652failih: pci_intr_disestablish(sc->sc_pct, sc->sc_ih); 652failih: pci_intr_disestablish(sc->sc_pct, sc->sc_ih);
653 sc->sc_ih = NULL; 653 sc->sc_ih = NULL;
654failia: pci_intr_release(sc->sc_pct, sc->sc_pihp, 1); 654failia: pci_intr_release(sc->sc_pct, sc->sc_pihp, 1);
655 sc->sc_pihp = NULL; 655 sc->sc_pihp = NULL;
656failsi: softint_disestablish(sc->sc_soft_ih); 656failsi: softint_disestablish(sc->sc_soft_ih);
657 sc->sc_soft_ih = NULL; 657 sc->sc_soft_ih = NULL;
658unmap: bus_space_unmap(sc->sc_st, sc->sc_sh, sc->sc_sz); 658unmap: bus_space_unmap(sc->sc_st, sc->sc_sh, sc->sc_sz);
659} 659}
660 660
661int 661int
662iwn4965_attach(struct iwn_softc *sc, pci_product_id_t pid) 662iwn4965_attach(struct iwn_softc *sc, pci_product_id_t pid)
663{ 663{
664 struct iwn_ops *ops = &sc->ops; 664 struct iwn_ops *ops = &sc->ops;
665 665
666 ops->load_firmware = iwn4965_load_firmware; 666 ops->load_firmware = iwn4965_load_firmware;
667 ops->read_eeprom = iwn4965_read_eeprom; 667 ops->read_eeprom = iwn4965_read_eeprom;
668 ops->post_alive = iwn4965_post_alive; 668 ops->post_alive = iwn4965_post_alive;
669 ops->nic_config = iwn4965_nic_config; 669 ops->nic_config = iwn4965_nic_config;
670 ops->config_bt_coex = iwn_config_bt_coex_bluetooth; 670 ops->config_bt_coex = iwn_config_bt_coex_bluetooth;
671 ops->update_sched = iwn4965_update_sched; 671 ops->update_sched = iwn4965_update_sched;
672 ops->get_temperature = iwn4965_get_temperature; 672 ops->get_temperature = iwn4965_get_temperature;
673 ops->get_rssi = iwn4965_get_rssi; 673 ops->get_rssi = iwn4965_get_rssi;
674 ops->set_txpower = iwn4965_set_txpower; 674 ops->set_txpower = iwn4965_set_txpower;
675 ops->init_gains = iwn4965_init_gains; 675 ops->init_gains = iwn4965_init_gains;
676 ops->set_gains = iwn4965_set_gains; 676 ops->set_gains = iwn4965_set_gains;
677 ops->add_node = iwn4965_add_node; 677 ops->add_node = iwn4965_add_node;
678 ops->tx_done = iwn4965_tx_done; 678 ops->tx_done = iwn4965_tx_done;
679#ifndef IEEE80211_NO_HT 679#ifndef IEEE80211_NO_HT
680 ops->ampdu_tx_start = iwn4965_ampdu_tx_start; 680 ops->ampdu_tx_start = iwn4965_ampdu_tx_start;
681 ops->ampdu_tx_stop = iwn4965_ampdu_tx_stop; 681 ops->ampdu_tx_stop = iwn4965_ampdu_tx_stop;
682#endif 682#endif
683 sc->ntxqs = IWN4965_NTXQUEUES; 683 sc->ntxqs = IWN4965_NTXQUEUES;
684 sc->ndmachnls = IWN4965_NDMACHNLS; 684 sc->ndmachnls = IWN4965_NDMACHNLS;
685 sc->broadcast_id = IWN4965_ID_BROADCAST; 685 sc->broadcast_id = IWN4965_ID_BROADCAST;
686 sc->rxonsz = IWN4965_RXONSZ; 686 sc->rxonsz = IWN4965_RXONSZ;
687 sc->schedsz = IWN4965_SCHEDSZ; 687 sc->schedsz = IWN4965_SCHEDSZ;
688 sc->fw_text_maxsz = IWN4965_FW_TEXT_MAXSZ; 688 sc->fw_text_maxsz = IWN4965_FW_TEXT_MAXSZ;
689 sc->fw_data_maxsz = IWN4965_FW_DATA_MAXSZ; 689 sc->fw_data_maxsz = IWN4965_FW_DATA_MAXSZ;
690 sc->fwsz = IWN4965_FWSZ; 690 sc->fwsz = IWN4965_FWSZ;
691 sc->sched_txfact_addr = IWN4965_SCHED_TXFACT; 691 sc->sched_txfact_addr = IWN4965_SCHED_TXFACT;
692 sc->limits = &iwn4965_sensitivity_limits; 692 sc->limits = &iwn4965_sensitivity_limits;
693 sc->fwname = "iwlwifi-4965-2.ucode"; 693 sc->fwname = "iwlwifi-4965-2.ucode";
694 /* Override chains masks, ROM is known to be broken. */ 694 /* Override chains masks, ROM is known to be broken. */
695 sc->txchainmask = IWN_ANT_AB; 695 sc->txchainmask = IWN_ANT_AB;
696 sc->rxchainmask = IWN_ANT_ABC; 696 sc->rxchainmask = IWN_ANT_ABC;
697 697
698 return 0; 698 return 0;
699} 699}
700 700
701int 701int
702iwn5000_attach(struct iwn_softc *sc, pci_product_id_t pid) 702iwn5000_attach(struct iwn_softc *sc, pci_product_id_t pid)
703{ 703{
704 struct iwn_ops *ops = &sc->ops; 704 struct iwn_ops *ops = &sc->ops;
705 705
706 ops->load_firmware = iwn5000_load_firmware; 706 ops->load_firmware = iwn5000_load_firmware;
707 ops->read_eeprom = iwn5000_read_eeprom; 707 ops->read_eeprom = iwn5000_read_eeprom;
708 ops->post_alive = iwn5000_post_alive; 708 ops->post_alive = iwn5000_post_alive;
709 ops->nic_config = iwn5000_nic_config; 709 ops->nic_config = iwn5000_nic_config;
710 ops->config_bt_coex = iwn_config_bt_coex_bluetooth; 710 ops->config_bt_coex = iwn_config_bt_coex_bluetooth;
711 ops->update_sched = iwn5000_update_sched; 711 ops->update_sched = iwn5000_update_sched;
712 ops->get_temperature = iwn5000_get_temperature; 712 ops->get_temperature = iwn5000_get_temperature;
713 ops->get_rssi = iwn5000_get_rssi; 713 ops->get_rssi = iwn5000_get_rssi;
714 ops->set_txpower = iwn5000_set_txpower; 714 ops->set_txpower = iwn5000_set_txpower;
715 ops->init_gains = iwn5000_init_gains; 715 ops->init_gains = iwn5000_init_gains;
716 ops->set_gains = iwn5000_set_gains; 716 ops->set_gains = iwn5000_set_gains;
717 ops->add_node = iwn5000_add_node; 717 ops->add_node = iwn5000_add_node;
718 ops->tx_done = iwn5000_tx_done; 718 ops->tx_done = iwn5000_tx_done;
719#ifndef IEEE80211_NO_HT 719#ifndef IEEE80211_NO_HT
720 ops->ampdu_tx_start = iwn5000_ampdu_tx_start; 720 ops->ampdu_tx_start = iwn5000_ampdu_tx_start;
721 ops->ampdu_tx_stop = iwn5000_ampdu_tx_stop; 721 ops->ampdu_tx_stop = iwn5000_ampdu_tx_stop;
722#endif 722#endif
723 sc->ntxqs = IWN5000_NTXQUEUES; 723 sc->ntxqs = IWN5000_NTXQUEUES;
724 sc->ndmachnls = IWN5000_NDMACHNLS; 724 sc->ndmachnls = IWN5000_NDMACHNLS;
725 sc->broadcast_id = IWN5000_ID_BROADCAST; 725 sc->broadcast_id = IWN5000_ID_BROADCAST;
726 sc->rxonsz = IWN5000_RXONSZ; 726 sc->rxonsz = IWN5000_RXONSZ;
727 sc->schedsz = IWN5000_SCHEDSZ; 727 sc->schedsz = IWN5000_SCHEDSZ;
728 sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ; 728 sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ;
729 sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ; 729 sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ;
730 sc->fwsz = IWN5000_FWSZ; 730 sc->fwsz = IWN5000_FWSZ;
731 sc->sched_txfact_addr = IWN5000_SCHED_TXFACT; 731 sc->sched_txfact_addr = IWN5000_SCHED_TXFACT;
732 732
733 switch (sc->hw_type) { 733 switch (sc->hw_type) {
734 case IWN_HW_REV_TYPE_5100: 734 case IWN_HW_REV_TYPE_5100:
735 sc->limits = &iwn5000_sensitivity_limits; 735 sc->limits = &iwn5000_sensitivity_limits;
736 sc->fwname = "iwlwifi-5000-2.ucode"; 736 sc->fwname = "iwlwifi-5000-2.ucode";
737 /* Override chains masks, ROM is known to be broken. */ 737 /* Override chains masks, ROM is known to be broken. */
738 sc->txchainmask = IWN_ANT_B; 738 sc->txchainmask = IWN_ANT_B;
739 sc->rxchainmask = IWN_ANT_AB; 739 sc->rxchainmask = IWN_ANT_AB;
740 break; 740 break;
741 case IWN_HW_REV_TYPE_5150: 741 case IWN_HW_REV_TYPE_5150:
742 sc->limits = &iwn5150_sensitivity_limits; 742 sc->limits = &iwn5150_sensitivity_limits;
743 sc->fwname = "iwlwifi-5150-2.ucode"; 743 sc->fwname = "iwlwifi-5150-2.ucode";
744 break; 744 break;
745 case IWN_HW_REV_TYPE_5300: 745 case IWN_HW_REV_TYPE_5300:
746 case IWN_HW_REV_TYPE_5350: 746 case IWN_HW_REV_TYPE_5350:
747 sc->limits = &iwn5000_sensitivity_limits; 747 sc->limits = &iwn5000_sensitivity_limits;
748 sc->fwname = "iwlwifi-5000-2.ucode"; 748 sc->fwname = "iwlwifi-5000-2.ucode";
749 break; 749 break;
750 case IWN_HW_REV_TYPE_1000: 750 case IWN_HW_REV_TYPE_1000:
751 sc->limits = &iwn1000_sensitivity_limits; 751 sc->limits = &iwn1000_sensitivity_limits;
752 if (pid == PCI_PRODUCT_INTEL_WIFI_LINK_100_1 || 752 if (pid == PCI_PRODUCT_INTEL_WIFI_LINK_100_1 ||
753 pid == PCI_PRODUCT_INTEL_WIFI_LINK_100_2) 753 pid == PCI_PRODUCT_INTEL_WIFI_LINK_100_2)
754 sc->fwname = "iwlwifi-100-5.ucode"; 754 sc->fwname = "iwlwifi-100-5.ucode";
755 else 755 else
756 sc->fwname = "iwlwifi-1000-3.ucode"; 756 sc->fwname = "iwlwifi-1000-3.ucode";
757 break; 757 break;
758 case IWN_HW_REV_TYPE_6000: 758 case IWN_HW_REV_TYPE_6000:
759 sc->limits = &iwn6000_sensitivity_limits; 759 sc->limits = &iwn6000_sensitivity_limits;
760 sc->fwname = "iwlwifi-6000-4.ucode"; 760 sc->fwname = "iwlwifi-6000-4.ucode";
761 if (pid == PCI_PRODUCT_INTEL_WIFI_LINK_6000_IPA_1 || 761 if (pid == PCI_PRODUCT_INTEL_WIFI_LINK_6000_IPA_1 ||
762 pid == PCI_PRODUCT_INTEL_WIFI_LINK_6000_IPA_2) { 762 pid == PCI_PRODUCT_INTEL_WIFI_LINK_6000_IPA_2) {
763 sc->sc_flags |= IWN_FLAG_INTERNAL_PA; 763 sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
764 /* Override chains masks, ROM is known to be broken. */ 764 /* Override chains masks, ROM is known to be broken. */
765 sc->txchainmask = IWN_ANT_BC; 765 sc->txchainmask = IWN_ANT_BC;
766 sc->rxchainmask = IWN_ANT_BC; 766 sc->rxchainmask = IWN_ANT_BC;
767 } 767 }
768 break; 768 break;
769 case IWN_HW_REV_TYPE_6050: 769 case IWN_HW_REV_TYPE_6050:
770 sc->limits = &iwn6000_sensitivity_limits; 770 sc->limits = &iwn6000_sensitivity_limits;
771 sc->fwname = "iwlwifi-6050-5.ucode"; 771 sc->fwname = "iwlwifi-6050-5.ucode";
772 break; 772 break;
773 case IWN_HW_REV_TYPE_6005: 773 case IWN_HW_REV_TYPE_6005:
774 sc->limits = &iwn6000_sensitivity_limits; 774 sc->limits = &iwn6000_sensitivity_limits;
775 /* Type 6030 cards return IWN_HW_REV_TYPE_6005 */ 775 /* Type 6030 cards return IWN_HW_REV_TYPE_6005 */
776 if (pid == PCI_PRODUCT_INTEL_WIFI_LINK_1030_1 || 776 if (pid == PCI_PRODUCT_INTEL_WIFI_LINK_1030_1 ||
777 pid == PCI_PRODUCT_INTEL_WIFI_LINK_1030_2 || 777 pid == PCI_PRODUCT_INTEL_WIFI_LINK_1030_2 ||
778 pid == PCI_PRODUCT_INTEL_WIFI_LINK_6230_1 || 778 pid == PCI_PRODUCT_INTEL_WIFI_LINK_6230_1 ||
779 pid == PCI_PRODUCT_INTEL_WIFI_LINK_6230_2 || 779 pid == PCI_PRODUCT_INTEL_WIFI_LINK_6230_2 ||
780 pid == PCI_PRODUCT_INTEL_WIFI_LINK_6235 || 780 pid == PCI_PRODUCT_INTEL_WIFI_LINK_6235 ||
781 pid == PCI_PRODUCT_INTEL_WIFI_LINK_6235_2) { 781 pid == PCI_PRODUCT_INTEL_WIFI_LINK_6235_2) {
782 sc->fwname = "iwlwifi-6000g2b-6.ucode"; 782 sc->fwname = "iwlwifi-6000g2b-6.ucode";
783 ops->config_bt_coex = iwn_config_bt_coex_adv1; 783 ops->config_bt_coex = iwn_config_bt_coex_adv1;
784 } 784 }
785 /* 785 /*
786 * This covers: 786 * This covers:
787 * PCI_PRODUCT_INTEL_WIFI_LINK_6005_2X2_1 787 * PCI_PRODUCT_INTEL_WIFI_LINK_6005_2X2_1
788 * PCI_PRODUCT_INTEL_WIFI_LINK_6005_2X2_2 788 * PCI_PRODUCT_INTEL_WIFI_LINK_6005_2X2_2
789 */ 789 */
790 else 790 else
791 sc->fwname = "iwlwifi-6000g2a-5.ucode"; 791 sc->fwname = "iwlwifi-6000g2a-5.ucode";
792 break; 792 break;
793 case IWN_HW_REV_TYPE_2030: 793 case IWN_HW_REV_TYPE_2030:
794 sc->limits = &iwn2030_sensitivity_limits; 794 sc->limits = &iwn2030_sensitivity_limits;
795 sc->fwname = "iwlwifi-2030-6.ucode"; 795 sc->fwname = "iwlwifi-2030-6.ucode";
796 ops->config_bt_coex = iwn_config_bt_coex_adv2; 796 ops->config_bt_coex = iwn_config_bt_coex_adv2;
797 break; 797 break;
798 case IWN_HW_REV_TYPE_2000: 798 case IWN_HW_REV_TYPE_2000:
799 sc->limits = &iwn2000_sensitivity_limits; 799 sc->limits = &iwn2000_sensitivity_limits;
800 sc->fwname = "iwlwifi-2000-6.ucode"; 800 sc->fwname = "iwlwifi-2000-6.ucode";
801 break; 801 break;
802 case IWN_HW_REV_TYPE_135: 802 case IWN_HW_REV_TYPE_135:
803 sc->limits = &iwn2000_sensitivity_limits; 803 sc->limits = &iwn2000_sensitivity_limits;
804 sc->fwname = "iwlwifi-135-6.ucode"; 804 sc->fwname = "iwlwifi-135-6.ucode";
805 ops->config_bt_coex = iwn_config_bt_coex_adv2; 805 ops->config_bt_coex = iwn_config_bt_coex_adv2;
806 break; 806 break;
807 case IWN_HW_REV_TYPE_105: 807 case IWN_HW_REV_TYPE_105:
808 sc->limits = &iwn2000_sensitivity_limits; 808 sc->limits = &iwn2000_sensitivity_limits;
809 sc->fwname = "iwlwifi-105-6.ucode"; 809 sc->fwname = "iwlwifi-105-6.ucode";
810 break; 810 break;
811 default: 811 default:
812 aprint_normal(": adapter type %d not supported\n", sc->hw_type); 812 aprint_normal(": adapter type %d not supported\n", sc->hw_type);
813 return ENOTSUP; 813 return ENOTSUP;
814 } 814 }
815 return 0; 815 return 0;
816} 816}
817 817
818/* 818/*
819 * Attach the interface to 802.11 radiotap. 819 * Attach the interface to 802.11 radiotap.
820 */ 820 */
821static void 821static void
822iwn_radiotap_attach(struct iwn_softc *sc) 822iwn_radiotap_attach(struct iwn_softc *sc)
823{ 823{
824 struct ifnet *ifp = sc->sc_ic.ic_ifp; 824 struct ifnet *ifp = sc->sc_ic.ic_ifp;
825 825
826 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 826 bpf_attach2(ifp, DLT_IEEE802_11_RADIO,
827 sizeof (struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN, 827 sizeof (struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN,
828 &sc->sc_drvbpf); 828 &sc->sc_drvbpf);
829 829
830 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 830 sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
831 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 831 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
832 sc->sc_rxtap.wr_ihdr.it_present = htole32(IWN_RX_RADIOTAP_PRESENT); 832 sc->sc_rxtap.wr_ihdr.it_present = htole32(IWN_RX_RADIOTAP_PRESENT);
833 833
834 sc->sc_txtap_len = sizeof sc->sc_txtapu; 834 sc->sc_txtap_len = sizeof sc->sc_txtapu;
835 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 835 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
836 sc->sc_txtap.wt_ihdr.it_present = htole32(IWN_TX_RADIOTAP_PRESENT); 836 sc->sc_txtap.wt_ihdr.it_present = htole32(IWN_TX_RADIOTAP_PRESENT);
837} 837}
838 838
839static int 839static int
840iwn_detach(device_t self, int flags __unused) 840iwn_detach(device_t self, int flags __unused)
841{ 841{
842 struct iwn_softc *sc = device_private(self); 842 struct iwn_softc *sc = device_private(self);
843 struct ifnet *ifp = sc->sc_ic.ic_ifp; 843 struct ifnet *ifp = sc->sc_ic.ic_ifp;
844 int qid; 844 int qid;
845 845
846 if (!(sc->sc_flags & IWN_FLAG_ATTACHED)) 846 if (!(sc->sc_flags & IWN_FLAG_ATTACHED))
847 return 0; 847 return 0;
848 848
849 callout_stop(&sc->calib_to); 849 callout_stop(&sc->calib_to);
850 850
851 /* Uninstall interrupt handler. */ 851 /* Uninstall interrupt handler. */
852 if (sc->sc_ih != NULL) 852 if (sc->sc_ih != NULL)
853 pci_intr_disestablish(sc->sc_pct, sc->sc_ih); 853 pci_intr_disestablish(sc->sc_pct, sc->sc_ih);
854 if (sc->sc_pihp != NULL) 854 if (sc->sc_pihp != NULL)
855 pci_intr_release(sc->sc_pct, sc->sc_pihp, 1); 855 pci_intr_release(sc->sc_pct, sc->sc_pihp, 1);
856 if (sc->sc_soft_ih != NULL) 856 if (sc->sc_soft_ih != NULL)
857 softint_disestablish(sc->sc_soft_ih); 857 softint_disestablish(sc->sc_soft_ih);
858 858
859 /* Free DMA resources. */ 859 /* Free DMA resources. */
860 iwn_free_rx_ring(sc, &sc->rxq); 860 iwn_free_rx_ring(sc, &sc->rxq);
861 for (qid = 0; qid < sc->ntxqs; qid++) 861 for (qid = 0; qid < sc->ntxqs; qid++)
862 iwn_free_tx_ring(sc, &sc->txq[qid]); 862 iwn_free_tx_ring(sc, &sc->txq[qid]);
863#ifdef IWN_USE_RBUF 863#ifdef IWN_USE_RBUF
864 iwn_free_rpool(sc); 864 iwn_free_rpool(sc);
865#endif 865#endif
866 iwn_free_sched(sc); 866 iwn_free_sched(sc);
867 iwn_free_kw(sc); 867 iwn_free_kw(sc);
868 if (sc->ict != NULL) 868 if (sc->ict != NULL)
869 iwn_free_ict(sc); 869 iwn_free_ict(sc);
870 iwn_free_fwmem(sc); 870 iwn_free_fwmem(sc);
871 871
872 bus_space_unmap(sc->sc_st, sc->sc_sh, sc->sc_sz); 872 bus_space_unmap(sc->sc_st, sc->sc_sh, sc->sc_sz);
873 873
874 ieee80211_ifdetach(&sc->sc_ic); 874 ieee80211_ifdetach(&sc->sc_ic);
875 if_detach(ifp); 875 if_detach(ifp);
876 876
877 return 0; 877 return 0;
878} 878}
879 879
880#if 0 880#if 0
881/* 881/*
882 * XXX Investigate if clearing the PCI retry timeout could eliminate 882 * XXX Investigate if clearing the PCI retry timeout could eliminate
883 * the repeated scan calls. Also the calls to if_init and if_start 883 * the repeated scan calls. Also the calls to if_init and if_start
884 * are similar to the effect of adding the call to ifioctl_common . 884 * are similar to the effect of adding the call to ifioctl_common .
885 */ 885 */
886static void 886static void
887iwn_power(int why, void *arg) 887iwn_power(int why, void *arg)
888{ 888{
889 struct iwn_softc *sc = arg; 889 struct iwn_softc *sc = arg;
890 struct ifnet *ifp; 890 struct ifnet *ifp;
891 pcireg_t reg; 891 pcireg_t reg;
892 int s; 892 int s;
893 893
894 if (why != PWR_RESUME) 894 if (why != PWR_RESUME)
895 return; 895 return;
896 896
897 /* Clear device-specific "PCI retry timeout" register (41h). */ 897 /* Clear device-specific "PCI retry timeout" register (41h). */
898 reg = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40); 898 reg = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40);
899 if (reg & 0xff00) 899 if (reg & 0xff00)
900 pci_conf_write(sc->sc_pct, sc->sc_pcitag, 0x40, reg & ~0xff00); 900 pci_conf_write(sc->sc_pct, sc->sc_pcitag, 0x40, reg & ~0xff00);
901 901
902 s = splnet(); 902 s = splnet();
903 ifp = &sc->sc_ic.ic_if; 903 ifp = &sc->sc_ic.ic_if;
904 if (ifp->if_flags & IFF_UP) { 904 if (ifp->if_flags & IFF_UP) {
905 ifp->if_init(ifp); 905 ifp->if_init(ifp);
906 if (ifp->if_flags & IFF_RUNNING) 906 if (ifp->if_flags & IFF_RUNNING)
907 ifp->if_start(ifp); 907 ifp->if_start(ifp);
908 } 908 }
909 splx(s); 909 splx(s);
910} 910}
911#endif 911#endif
912 912
913static bool 913static bool
914iwn_resume(device_t dv, const pmf_qual_t *qual) 914iwn_resume(device_t dv, const pmf_qual_t *qual)
915{ 915{
916 return true; 916 return true;
917} 917}
918 918
919static int 919static int
920iwn_nic_lock(struct iwn_softc *sc) 920iwn_nic_lock(struct iwn_softc *sc)
921{ 921{
922 int ntries; 922 int ntries;
923 923
924 /* Request exclusive access to NIC. */ 924 /* Request exclusive access to NIC. */
925 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ); 925 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
926 926
927 /* Spin until we actually get the lock. */ 927 /* Spin until we actually get the lock. */
928 for (ntries = 0; ntries < 1000; ntries++) { 928 for (ntries = 0; ntries < 1000; ntries++) {
929 if ((IWN_READ(sc, IWN_GP_CNTRL) & 929 if ((IWN_READ(sc, IWN_GP_CNTRL) &
930 (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) == 930 (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) ==
931 IWN_GP_CNTRL_MAC_ACCESS_ENA) 931 IWN_GP_CNTRL_MAC_ACCESS_ENA)
932 return 0; 932 return 0;
933 DELAY(10); 933 DELAY(10);
934 } 934 }
935 return ETIMEDOUT; 935 return ETIMEDOUT;
936} 936}
937 937
938static __inline void 938static __inline void
939iwn_nic_unlock(struct iwn_softc *sc) 939iwn_nic_unlock(struct iwn_softc *sc)
940{ 940{
941 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ); 941 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
942} 942}
943 943
944static __inline uint32_t 944static __inline uint32_t
945iwn_prph_read(struct iwn_softc *sc, uint32_t addr) 945iwn_prph_read(struct iwn_softc *sc, uint32_t addr)
946{ 946{
947 IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr); 947 IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr);
948 IWN_BARRIER_READ_WRITE(sc); 948 IWN_BARRIER_READ_WRITE(sc);
949 return IWN_READ(sc, IWN_PRPH_RDATA); 949 return IWN_READ(sc, IWN_PRPH_RDATA);
950} 950}
951 951
952static __inline void 952static __inline void
953iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data) 953iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
954{ 954{
955 IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr); 955 IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr);
956 IWN_BARRIER_WRITE(sc); 956 IWN_BARRIER_WRITE(sc);
957 IWN_WRITE(sc, IWN_PRPH_WDATA, data); 957 IWN_WRITE(sc, IWN_PRPH_WDATA, data);
958} 958}
959 959
960static __inline void 960static __inline void
961iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask) 961iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
962{ 962{
963 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask); 963 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);
964} 964}
965 965
966static __inline void 966static __inline void
967iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask) 967iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
968{ 968{
969 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask); 969 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);
970} 970}
971 971
972static __inline void 972static __inline void
973iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr, 973iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr,
974 const uint32_t *data, int count) 974 const uint32_t *data, int count)
975{ 975{
976 for (; count > 0; count--, data++, addr += 4) 976 for (; count > 0; count--, data++, addr += 4)
977 iwn_prph_write(sc, addr, *data); 977 iwn_prph_write(sc, addr, *data);
978} 978}
979 979
980static __inline uint32_t 980static __inline uint32_t
981iwn_mem_read(struct iwn_softc *sc, uint32_t addr) 981iwn_mem_read(struct iwn_softc *sc, uint32_t addr)
982{ 982{
983 IWN_WRITE(sc, IWN_MEM_RADDR, addr); 983 IWN_WRITE(sc, IWN_MEM_RADDR, addr);
984 IWN_BARRIER_READ_WRITE(sc); 984 IWN_BARRIER_READ_WRITE(sc);
985 return IWN_READ(sc, IWN_MEM_RDATA); 985 return IWN_READ(sc, IWN_MEM_RDATA);
986} 986}
987 987
988static __inline void 988static __inline void
989iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data) 989iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
990{ 990{
991 IWN_WRITE(sc, IWN_MEM_WADDR, addr); 991 IWN_WRITE(sc, IWN_MEM_WADDR, addr);
992 IWN_BARRIER_WRITE(sc); 992 IWN_BARRIER_WRITE(sc);
993 IWN_WRITE(sc, IWN_MEM_WDATA, data); 993 IWN_WRITE(sc, IWN_MEM_WDATA, data);
994} 994}
995 995
996#ifndef IEEE80211_NO_HT 996#ifndef IEEE80211_NO_HT
997static __inline void 997static __inline void
998iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data) 998iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data)
999{ 999{
1000 uint32_t tmp; 1000 uint32_t tmp;
1001 1001
1002 tmp = iwn_mem_read(sc, addr & ~3); 1002 tmp = iwn_mem_read(sc, addr & ~3);
1003 if (addr & 3) 1003 if (addr & 3)
1004 tmp = (tmp & 0x0000ffff) | data << 16; 1004 tmp = (tmp & 0x0000ffff) | data << 16;
1005 else 1005 else
1006 tmp = (tmp & 0xffff0000) | data; 1006 tmp = (tmp & 0xffff0000) | data;
1007 iwn_mem_write(sc, addr & ~3, tmp); 1007 iwn_mem_write(sc, addr & ~3, tmp);
1008} 1008}
1009#endif 1009#endif
1010 1010
1011static __inline void 1011static __inline void
1012iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data, 1012iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data,
1013 int count) 1013 int count)
1014{ 1014{
1015 for (; count > 0; count--, addr += 4) 1015 for (; count > 0; count--, addr += 4)
1016 *data++ = iwn_mem_read(sc, addr); 1016 *data++ = iwn_mem_read(sc, addr);
1017} 1017}
1018 1018
1019static __inline void 1019static __inline void
1020iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val, 1020iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,
1021 int count) 1021 int count)
1022{ 1022{
1023 for (; count > 0; count--, addr += 4) 1023 for (; count > 0; count--, addr += 4)
1024 iwn_mem_write(sc, addr, val); 1024 iwn_mem_write(sc, addr, val);
1025} 1025}
1026 1026
1027static int 1027static int
1028iwn_eeprom_lock(struct iwn_softc *sc) 1028iwn_eeprom_lock(struct iwn_softc *sc)
1029{ 1029{
1030 int i, ntries; 1030 int i, ntries;
1031 1031
1032 for (i = 0; i < 100; i++) { 1032 for (i = 0; i < 100; i++) {
1033 /* Request exclusive access to EEPROM. */ 1033 /* Request exclusive access to EEPROM. */
1034 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, 1034 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
1035 IWN_HW_IF_CONFIG_EEPROM_LOCKED); 1035 IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1036 1036
1037 /* Spin until we actually get the lock. */ 1037 /* Spin until we actually get the lock. */
1038 for (ntries = 0; ntries < 100; ntries++) { 1038 for (ntries = 0; ntries < 100; ntries++) {
1039 if (IWN_READ(sc, IWN_HW_IF_CONFIG) & 1039 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
1040 IWN_HW_IF_CONFIG_EEPROM_LOCKED) 1040 IWN_HW_IF_CONFIG_EEPROM_LOCKED)
1041 return 0; 1041 return 0;
1042 DELAY(10); 1042 DELAY(10);
1043 } 1043 }
1044 } 1044 }
1045 return ETIMEDOUT; 1045 return ETIMEDOUT;
1046} 1046}
1047 1047
1048static __inline void 1048static __inline void
1049iwn_eeprom_unlock(struct iwn_softc *sc) 1049iwn_eeprom_unlock(struct iwn_softc *sc)
1050{ 1050{
1051 IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED); 1051 IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1052} 1052}
1053 1053
1054/* 1054/*
1055 * Initialize access by host to One Time Programmable ROM. 1055 * Initialize access by host to One Time Programmable ROM.
1056 * NB: This kind of ROM can be found on 1000 or 6000 Series only. 1056 * NB: This kind of ROM can be found on 1000 or 6000 Series only.
1057 */ 1057 */
1058static int 1058static int
1059iwn_init_otprom(struct iwn_softc *sc) 1059iwn_init_otprom(struct iwn_softc *sc)
1060{ 1060{
1061 uint16_t prev = 0, base, next; 1061 uint16_t prev = 0, base, next;
1062 int count, error; 1062 int count, error;
1063 1063
1064 /* Wait for clock stabilization before accessing prph. */ 1064 /* Wait for clock stabilization before accessing prph. */
1065 if ((error = iwn_clock_wait(sc)) != 0) 1065 if ((error = iwn_clock_wait(sc)) != 0)
1066 return error; 1066 return error;
1067 1067
1068 if ((error = iwn_nic_lock(sc)) != 0) 1068 if ((error = iwn_nic_lock(sc)) != 0)
1069 return error; 1069 return error;
1070 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ); 1070 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1071 DELAY(5); 1071 DELAY(5);
1072 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ); 1072 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1073 iwn_nic_unlock(sc); 1073 iwn_nic_unlock(sc);
1074 1074
1075 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */ 1075 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
1076 if (sc->hw_type != IWN_HW_REV_TYPE_1000) { 1076 if (sc->hw_type != IWN_HW_REV_TYPE_1000) {
1077 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT, 1077 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
1078 IWN_RESET_LINK_PWR_MGMT_DIS); 1078 IWN_RESET_LINK_PWR_MGMT_DIS);
1079 } 1079 }
1080 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER); 1080 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
1081 /* Clear ECC status. */ 1081 /* Clear ECC status. */
1082 IWN_SETBITS(sc, IWN_OTP_GP, 1082 IWN_SETBITS(sc, IWN_OTP_GP,
1083 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS); 1083 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
1084 1084
1085 /* 1085 /*
1086 * Find the block before last block (contains the EEPROM image) 1086 * Find the block before last block (contains the EEPROM image)
1087 * for HW without OTP shadow RAM. 1087 * for HW without OTP shadow RAM.
1088 */ 1088 */
1089 if (sc->hw_type == IWN_HW_REV_TYPE_1000) { 1089 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
1090 /* Switch to absolute addressing mode. */ 1090 /* Switch to absolute addressing mode. */
1091 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS); 1091 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
1092 base = 0; 1092 base = 0;
1093 for (count = 0; count < IWN1000_OTP_NBLOCKS; count++) { 1093 for (count = 0; count < IWN1000_OTP_NBLOCKS; count++) {
1094 error = iwn_read_prom_data(sc, base, &next, 2); 1094 error = iwn_read_prom_data(sc, base, &next, 2);
1095 if (error != 0) 1095 if (error != 0)
1096 return error; 1096 return error;
1097 if (next == 0) /* End of linked-list. */ 1097 if (next == 0) /* End of linked-list. */
1098 break; 1098 break;
1099 prev = base; 1099 prev = base;
1100 base = le16toh(next); 1100 base = le16toh(next);
1101 } 1101 }
1102 if (count == 0 || count == IWN1000_OTP_NBLOCKS) 1102 if (count == 0 || count == IWN1000_OTP_NBLOCKS)
1103 return EIO; 1103 return EIO;
1104 /* Skip "next" word. */ 1104 /* Skip "next" word. */
1105 sc->prom_base = prev + 1; 1105 sc->prom_base = prev + 1;
1106 } 1106 }
1107 return 0; 1107 return 0;
1108} 1108}
1109 1109
1110static int 1110static int
1111iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count) 1111iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count)
1112{ 1112{
1113 uint8_t *out = data; 1113 uint8_t *out = data;
1114 uint32_t val, tmp; 1114 uint32_t val, tmp;
1115 int ntries; 1115 int ntries;
1116 1116
1117 addr += sc->prom_base; 1117 addr += sc->prom_base;
1118 for (; count > 0; count -= 2, addr++) { 1118 for (; count > 0; count -= 2, addr++) {
1119 IWN_WRITE(sc, IWN_EEPROM, addr << 2); 1119 IWN_WRITE(sc, IWN_EEPROM, addr << 2);
1120 for (ntries = 0; ntries < 10; ntries++) { 1120 for (ntries = 0; ntries < 10; ntries++) {
1121 val = IWN_READ(sc, IWN_EEPROM); 1121 val = IWN_READ(sc, IWN_EEPROM);
1122 if (val & IWN_EEPROM_READ_VALID) 1122 if (val & IWN_EEPROM_READ_VALID)
1123 break; 1123 break;
1124 DELAY(5); 1124 DELAY(5);
1125 } 1125 }
1126 if (ntries == 10) { 1126 if (ntries == 10) {
1127 aprint_error_dev(sc->sc_dev, 1127 aprint_error_dev(sc->sc_dev,
1128 "timeout reading ROM at 0x%x\n", addr); 1128 "timeout reading ROM at 0x%x\n", addr);
1129 return ETIMEDOUT; 1129 return ETIMEDOUT;
1130 } 1130 }
1131 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) { 1131 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1132 /* OTPROM, check for ECC errors. */ 1132 /* OTPROM, check for ECC errors. */
1133 tmp = IWN_READ(sc, IWN_OTP_GP); 1133 tmp = IWN_READ(sc, IWN_OTP_GP);
1134 if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) { 1134 if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) {
1135 aprint_error_dev(sc->sc_dev, 1135 aprint_error_dev(sc->sc_dev,
1136 "OTPROM ECC error at 0x%x\n", addr); 1136 "OTPROM ECC error at 0x%x\n", addr);
1137 return EIO; 1137 return EIO;
1138 } 1138 }
1139 if (tmp & IWN_OTP_GP_ECC_CORR_STTS) { 1139 if (tmp & IWN_OTP_GP_ECC_CORR_STTS) {
1140 /* Correctable ECC error, clear bit. */ 1140 /* Correctable ECC error, clear bit. */
1141 IWN_SETBITS(sc, IWN_OTP_GP, 1141 IWN_SETBITS(sc, IWN_OTP_GP,
1142 IWN_OTP_GP_ECC_CORR_STTS); 1142 IWN_OTP_GP_ECC_CORR_STTS);
1143 } 1143 }
1144 } 1144 }
1145 *out++ = val >> 16; 1145 *out++ = val >> 16;
1146 if (count > 1) 1146 if (count > 1)
1147 *out++ = val >> 24; 1147 *out++ = val >> 24;
1148 } 1148 }
1149 return 0; 1149 return 0;
1150} 1150}
1151 1151
1152static int 1152static int
1153iwn_dma_contig_alloc(bus_dma_tag_t tag, struct iwn_dma_info *dma, void **kvap, 1153iwn_dma_contig_alloc(bus_dma_tag_t tag, struct iwn_dma_info *dma, void **kvap,
1154 bus_size_t size, bus_size_t alignment) 1154 bus_size_t size, bus_size_t alignment)
1155{ 1155{
1156 int nsegs, error; 1156 int nsegs, error;
1157 1157
1158 dma->tag = tag; 1158 dma->tag = tag;
1159 dma->size = size; 1159 dma->size = size;
1160 1160
1161 error = bus_dmamap_create(tag, size, 1, size, 0, BUS_DMA_NOWAIT, 1161 error = bus_dmamap_create(tag, size, 1, size, 0, BUS_DMA_NOWAIT,
1162 &dma->map); 1162 &dma->map);
1163 if (error != 0) 1163 if (error != 0)
1164 goto fail; 1164 goto fail;
1165 1165
1166 error = bus_dmamem_alloc(tag, size, alignment, 0, &dma->seg, 1, &nsegs, 1166 error = bus_dmamem_alloc(tag, size, alignment, 0, &dma->seg, 1, &nsegs,
1167 BUS_DMA_NOWAIT); /* XXX OpenBSD adds BUS_DMA_ZERO */ 1167 BUS_DMA_NOWAIT); /* XXX OpenBSD adds BUS_DMA_ZERO */
1168 if (error != 0) 1168 if (error != 0)
1169 goto fail; 1169 goto fail;
1170 1170
1171 error = bus_dmamem_map(tag, &dma->seg, 1, size, &dma->vaddr, 1171 error = bus_dmamem_map(tag, &dma->seg, 1, size, &dma->vaddr,
1172 BUS_DMA_NOWAIT); /* XXX OpenBSD adds BUS_DMA_COHERENT */ 1172 BUS_DMA_NOWAIT); /* XXX OpenBSD adds BUS_DMA_COHERENT */
1173 if (error != 0) 1173 if (error != 0)
1174 goto fail; 1174 goto fail;
1175 1175
1176 error = bus_dmamap_load(tag, dma->map, dma->vaddr, size, NULL, 1176 error = bus_dmamap_load(tag, dma->map, dma->vaddr, size, NULL,
1177 BUS_DMA_NOWAIT); 1177 BUS_DMA_NOWAIT);
1178 if (error != 0) 1178 if (error != 0)
1179 goto fail; 1179 goto fail;
1180 1180
1181 /* XXX Presumably needed because of missing BUS_DMA_ZERO, above. */ 1181 /* XXX Presumably needed because of missing BUS_DMA_ZERO, above. */
1182 memset(dma->vaddr, 0, size); 1182 memset(dma->vaddr, 0, size);
1183 bus_dmamap_sync(tag, dma->map, 0, size, BUS_DMASYNC_PREWRITE); 1183 bus_dmamap_sync(tag, dma->map, 0, size, BUS_DMASYNC_PREWRITE);
1184 1184
1185 dma->paddr = dma->map->dm_segs[0].ds_addr; 1185 dma->paddr = dma->map->dm_segs[0].ds_addr;
1186 if (kvap != NULL) 1186 if (kvap != NULL)
1187 *kvap = dma->vaddr; 1187 *kvap = dma->vaddr;
1188 1188
1189 return 0; 1189 return 0;
1190 1190
1191fail: iwn_dma_contig_free(dma); 1191fail: iwn_dma_contig_free(dma);
1192 return error; 1192 return error;
1193} 1193}
1194 1194
1195static void 1195static void
1196iwn_dma_contig_free(struct iwn_dma_info *dma) 1196iwn_dma_contig_free(struct iwn_dma_info *dma)
1197{ 1197{
1198 if (dma->map != NULL) { 1198 if (dma->map != NULL) {
1199 if (dma->vaddr != NULL) { 1199 if (dma->vaddr != NULL) {
1200 bus_dmamap_sync(dma->tag, dma->map, 0, dma->size, 1200 bus_dmamap_sync(dma->tag, dma->map, 0, dma->size,
1201 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1201 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1202 bus_dmamap_unload(dma->tag, dma->map); 1202 bus_dmamap_unload(dma->tag, dma->map);
1203 bus_dmamem_unmap(dma->tag, dma->vaddr, dma->size); 1203 bus_dmamem_unmap(dma->tag, dma->vaddr, dma->size);
1204 bus_dmamem_free(dma->tag, &dma->seg, 1); 1204 bus_dmamem_free(dma->tag, &dma->seg, 1);
1205 dma->vaddr = NULL; 1205 dma->vaddr = NULL;
1206 } 1206 }
1207 bus_dmamap_destroy(dma->tag, dma->map); 1207 bus_dmamap_destroy(dma->tag, dma->map);
1208 dma->map = NULL; 1208 dma->map = NULL;
1209 } 1209 }
1210} 1210}
1211 1211
1212static int 1212static int
1213iwn_alloc_sched(struct iwn_softc *sc) 1213iwn_alloc_sched(struct iwn_softc *sc)
1214{ 1214{
1215 /* TX scheduler rings must be aligned on a 1KB boundary. */ 1215 /* TX scheduler rings must be aligned on a 1KB boundary. */
1216 return iwn_dma_contig_alloc(sc->sc_dmat, &sc->sched_dma, 1216 return iwn_dma_contig_alloc(sc->sc_dmat, &sc->sched_dma,
1217 (void **)&sc->sched, sc->schedsz, 1024); 1217 (void **)&sc->sched, sc->schedsz, 1024);
1218} 1218}
1219 1219
1220static void 1220static void
1221iwn_free_sched(struct iwn_softc *sc) 1221iwn_free_sched(struct iwn_softc *sc)
1222{ 1222{
1223 iwn_dma_contig_free(&sc->sched_dma); 1223 iwn_dma_contig_free(&sc->sched_dma);
1224} 1224}
1225 1225
1226static int 1226static int
1227iwn_alloc_kw(struct iwn_softc *sc) 1227iwn_alloc_kw(struct iwn_softc *sc)
1228{ 1228{
1229 /* "Keep Warm" page must be aligned on a 4KB boundary. */ 1229 /* "Keep Warm" page must be aligned on a 4KB boundary. */
1230 return iwn_dma_contig_alloc(sc->sc_dmat, &sc->kw_dma, NULL, 4096, 1230 return iwn_dma_contig_alloc(sc->sc_dmat, &sc->kw_dma, NULL, 4096,
1231 4096); 1231 4096);
1232} 1232}
1233 1233
1234static void 1234static void
1235iwn_free_kw(struct iwn_softc *sc) 1235iwn_free_kw(struct iwn_softc *sc)
1236{ 1236{
1237 iwn_dma_contig_free(&sc->kw_dma); 1237 iwn_dma_contig_free(&sc->kw_dma);
1238} 1238}
1239 1239
1240static int 1240static int
1241iwn_alloc_ict(struct iwn_softc *sc) 1241iwn_alloc_ict(struct iwn_softc *sc)
1242{ 1242{
1243 /* ICT table must be aligned on a 4KB boundary. */ 1243 /* ICT table must be aligned on a 4KB boundary. */
1244 return iwn_dma_contig_alloc(sc->sc_dmat, &sc->ict_dma, 1244 return iwn_dma_contig_alloc(sc->sc_dmat, &sc->ict_dma,
1245 (void **)&sc->ict, IWN_ICT_SIZE, 4096); 1245 (void **)&sc->ict, IWN_ICT_SIZE, 4096);
1246} 1246}
1247 1247
1248static void 1248static void
1249iwn_free_ict(struct iwn_softc *sc) 1249iwn_free_ict(struct iwn_softc *sc)
1250{ 1250{
1251 iwn_dma_contig_free(&sc->ict_dma); 1251 iwn_dma_contig_free(&sc->ict_dma);
1252} 1252}
1253 1253
1254static int 1254static int
1255iwn_alloc_fwmem(struct iwn_softc *sc) 1255iwn_alloc_fwmem(struct iwn_softc *sc)
1256{ 1256{
1257 /* Must be aligned on a 16-byte boundary. */ 1257 /* Must be aligned on a 16-byte boundary. */
1258 return iwn_dma_contig_alloc(sc->sc_dmat, &sc->fw_dma, NULL, 1258 return iwn_dma_contig_alloc(sc->sc_dmat, &sc->fw_dma, NULL,
1259 sc->fwsz, 16); 1259 sc->fwsz, 16);
1260} 1260}
1261 1261
1262static void 1262static void
1263iwn_free_fwmem(struct iwn_softc *sc) 1263iwn_free_fwmem(struct iwn_softc *sc)
1264{ 1264{
1265 iwn_dma_contig_free(&sc->fw_dma); 1265 iwn_dma_contig_free(&sc->fw_dma);
1266} 1266}
1267 1267
1268static int 1268static int
1269iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring) 1269iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1270{ 1270{
1271 bus_size_t size; 1271 bus_size_t size;
1272 int i, error; 1272 int i, error;
1273 1273
1274 ring->cur = 0; 1274 ring->cur = 0;
1275 1275
1276 /* Allocate RX descriptors (256-byte aligned). */ 1276 /* Allocate RX descriptors (256-byte aligned). */
1277 size = IWN_RX_RING_COUNT * sizeof (uint32_t); 1277 size = IWN_RX_RING_COUNT * sizeof (uint32_t);
1278 error = iwn_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma, 1278 error = iwn_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma,
1279 (void **)&ring->desc, size, 256); 1279 (void **)&ring->desc, size, 256);
1280 if (error != 0) { 1280 if (error != 0) {
1281 aprint_error_dev(sc->sc_dev, 1281 aprint_error_dev(sc->sc_dev,
1282 "could not allocate RX ring DMA memory\n"); 1282 "could not allocate RX ring DMA memory\n");
1283 goto fail; 1283 goto fail;
1284 } 1284 }
1285 1285
1286 /* Allocate RX status area (16-byte aligned). */ 1286 /* Allocate RX status area (16-byte aligned). */
1287 error = iwn_dma_contig_alloc(sc->sc_dmat, &ring->stat_dma, 1287 error = iwn_dma_contig_alloc(sc->sc_dmat, &ring->stat_dma,
1288 (void **)&ring->stat, sizeof (struct iwn_rx_status), 16); 1288 (void **)&ring->stat, sizeof (struct iwn_rx_status), 16);
1289 if (error != 0) { 1289 if (error != 0) {
1290 aprint_error_dev(sc->sc_dev, 1290 aprint_error_dev(sc->sc_dev,
1291 "could not allocate RX status DMA memory\n"); 1291 "could not allocate RX status DMA memory\n");
1292 goto fail; 1292 goto fail;
1293 } 1293 }
1294 1294
1295 /* 1295 /*
1296 * Allocate and map RX buffers. 1296 * Allocate and map RX buffers.
1297 */ 1297 */
1298 for (i = 0; i < IWN_RX_RING_COUNT; i++) { 1298 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1299 struct iwn_rx_data *data = &ring->data[i]; 1299 struct iwn_rx_data *data = &ring->data[i];
1300 1300
1301 error = bus_dmamap_create(sc->sc_dmat, IWN_RBUF_SIZE, 1, 1301 error = bus_dmamap_create(sc->sc_dmat, IWN_RBUF_SIZE, 1,
1302 IWN_RBUF_SIZE, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 1302 IWN_RBUF_SIZE, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
1303 &data->map); 1303 &data->map);
1304 if (error != 0) { 1304 if (error != 0) {
1305 aprint_error_dev(sc->sc_dev, 1305 aprint_error_dev(sc->sc_dev,
1306 "could not create RX buf DMA map\n"); 1306 "could not create RX buf DMA map\n");
1307 goto fail; 1307 goto fail;
1308 } 1308 }
1309 1309
1310 data->m = MCLGETIalt(sc, M_DONTWAIT, NULL, IWN_RBUF_SIZE); 1310 data->m = MCLGETIalt(sc, M_DONTWAIT, NULL, IWN_RBUF_SIZE);
1311 if (data->m == NULL) { 1311 if (data->m == NULL) {
1312 aprint_error_dev(sc->sc_dev, 1312 aprint_error_dev(sc->sc_dev,
1313 "could not allocate RX mbuf\n"); 1313 "could not allocate RX mbuf\n");
1314 error = ENOBUFS; 1314 error = ENOBUFS;
1315 goto fail; 1315 goto fail;
1316 } 1316 }
1317 1317
1318 error = bus_dmamap_load(sc->sc_dmat, data->map, 1318 error = bus_dmamap_load(sc->sc_dmat, data->map,
1319 mtod(data->m, void *), IWN_RBUF_SIZE, NULL, 1319 mtod(data->m, void *), IWN_RBUF_SIZE, NULL,
1320 BUS_DMA_NOWAIT | BUS_DMA_READ); 1320 BUS_DMA_NOWAIT | BUS_DMA_READ);
1321 if (error != 0) { 1321 if (error != 0) {
1322 aprint_error_dev(sc->sc_dev, 1322 aprint_error_dev(sc->sc_dev,
1323 "can't not map mbuf (error %d)\n", error); 1323 "can't not map mbuf (error %d)\n", error);
1324 goto fail; 1324 goto fail;
1325 } 1325 }
1326 1326
1327 /* Set physical address of RX buffer (256-byte aligned). */ 1327 /* Set physical address of RX buffer (256-byte aligned). */
1328 ring->desc[i] = htole32(data->map->dm_segs[0].ds_addr >> 8); 1328 ring->desc[i] = htole32(data->map->dm_segs[0].ds_addr >> 8);
1329 } 1329 }
1330 1330
1331 bus_dmamap_sync(sc->sc_dmat, ring->desc_dma.map, 0, size, 1331 bus_dmamap_sync(sc->sc_dmat, ring->desc_dma.map, 0, size,
1332 BUS_DMASYNC_PREWRITE); 1332 BUS_DMASYNC_PREWRITE);
1333 1333
1334 return 0; 1334 return 0;
1335 1335
1336fail: iwn_free_rx_ring(sc, ring); 1336fail: iwn_free_rx_ring(sc, ring);
1337 return error; 1337 return error;
1338} 1338}
1339 1339
1340static void 1340static void
1341iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring) 1341iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1342{ 1342{
1343 int ntries; 1343 int ntries;
1344 1344
1345 if (iwn_nic_lock(sc) == 0) { 1345 if (iwn_nic_lock(sc) == 0) {
1346 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0); 1346 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
1347 for (ntries = 0; ntries < 1000; ntries++) { 1347 for (ntries = 0; ntries < 1000; ntries++) {
1348 if (IWN_READ(sc, IWN_FH_RX_STATUS) & 1348 if (IWN_READ(sc, IWN_FH_RX_STATUS) &
1349 IWN_FH_RX_STATUS_IDLE) 1349 IWN_FH_RX_STATUS_IDLE)
1350 break; 1350 break;
1351 DELAY(10); 1351 DELAY(10);
1352 } 1352 }
1353 iwn_nic_unlock(sc); 1353 iwn_nic_unlock(sc);
1354 } 1354 }
1355 ring->cur = 0; 1355 ring->cur = 0;
1356 sc->last_rx_valid = 0; 1356 sc->last_rx_valid = 0;
1357} 1357}
1358 1358
1359static void 1359static void
1360iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring) 1360iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1361{ 1361{
1362 int i; 1362 int i;
1363 1363
1364 iwn_dma_contig_free(&ring->desc_dma); 1364 iwn_dma_contig_free(&ring->desc_dma);
1365 iwn_dma_contig_free(&ring->stat_dma); 1365 iwn_dma_contig_free(&ring->stat_dma);
1366 1366
1367 for (i = 0; i < IWN_RX_RING_COUNT; i++) { 1367 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1368 struct iwn_rx_data *data = &ring->data[i]; 1368 struct iwn_rx_data *data = &ring->data[i];
1369 1369
1370 if (data->m != NULL) { 1370 if (data->m != NULL) {
1371 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1371 bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1372 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1372 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD);
1373 bus_dmamap_unload(sc->sc_dmat, data->map); 1373 bus_dmamap_unload(sc->sc_dmat, data->map);
1374 m_freem(data->m); 1374 m_freem(data->m);
1375 } 1375 }
1376 if (data->map != NULL) 1376 if (data->map != NULL)
1377 bus_dmamap_destroy(sc->sc_dmat, data->map); 1377 bus_dmamap_destroy(sc->sc_dmat, data->map);
1378 } 1378 }
1379} 1379}
1380 1380
1381static int 1381static int
1382iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid) 1382iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)
1383{ 1383{
1384 bus_addr_t paddr; 1384 bus_addr_t paddr;
1385 bus_size_t size; 1385 bus_size_t size;
1386 int i, error; 1386 int i, error;
1387 1387
1388 ring->qid = qid; 1388 ring->qid = qid;
1389 ring->queued = 0; 1389 ring->queued = 0;
1390 ring->cur = 0; 1390 ring->cur = 0;
1391 1391
1392 /* Allocate TX descriptors (256-byte aligned). */ 1392 /* Allocate TX descriptors (256-byte aligned). */
1393 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_desc); 1393 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_desc);
1394 error = iwn_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma, 1394 error = iwn_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma,
1395 (void **)&ring->desc, size, 256); 1395 (void **)&ring->desc, size, 256);
1396 if (error != 0) { 1396 if (error != 0) {
1397 aprint_error_dev(sc->sc_dev, 1397 aprint_error_dev(sc->sc_dev,
1398 "could not allocate TX ring DMA memory\n"); 1398 "could not allocate TX ring DMA memory\n");
1399 goto fail; 1399 goto fail;
1400 } 1400 }
1401 /* 1401 /*
1402 * We only use rings 0 through 4 (4 EDCA + cmd) so there is no need 1402 * We only use rings 0 through 4 (4 EDCA + cmd) so there is no need
1403 * to allocate commands space for other rings. 1403 * to allocate commands space for other rings.
1404 * XXX Do we really need to allocate descriptors for other rings? 1404 * XXX Do we really need to allocate descriptors for other rings?
1405 */ 1405 */
1406 if (qid > 4) 1406 if (qid > 4)
1407 return 0; 1407 return 0;
1408 1408
1409 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_cmd); 1409 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_cmd);
1410 error = iwn_dma_contig_alloc(sc->sc_dmat, &ring->cmd_dma, 1410 error = iwn_dma_contig_alloc(sc->sc_dmat, &ring->cmd_dma,
1411 (void **)&ring->cmd, size, 4); 1411 (void **)&ring->cmd, size, 4);
1412 if (error != 0) { 1412 if (error != 0) {
1413 aprint_error_dev(sc->sc_dev, 1413 aprint_error_dev(sc->sc_dev,
1414 "could not allocate TX cmd DMA memory\n"); 1414 "could not allocate TX cmd DMA memory\n");
1415 goto fail; 1415 goto fail;
1416 } 1416 }
1417 1417
1418 paddr = ring->cmd_dma.paddr; 1418 paddr = ring->cmd_dma.paddr;
1419 for (i = 0; i < IWN_TX_RING_COUNT; i++) { 1419 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
1420 struct iwn_tx_data *data = &ring->data[i]; 1420 struct iwn_tx_data *data = &ring->data[i];
1421 1421
1422 data->cmd_paddr = paddr; 1422 data->cmd_paddr = paddr;
1423 data->scratch_paddr = paddr + 12; 1423 data->scratch_paddr = paddr + 12;
1424 paddr += sizeof (struct iwn_tx_cmd); 1424 paddr += sizeof (struct iwn_tx_cmd);
1425 1425
1426 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1426 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
1427 IWN_MAX_SCATTER - 1, MCLBYTES, 0, BUS_DMA_NOWAIT, 1427 IWN_MAX_SCATTER - 1, MCLBYTES, 0, BUS_DMA_NOWAIT,
1428 &data->map); 1428 &data->map);
1429 if (error != 0) { 1429 if (error != 0) {
1430 aprint_error_dev(sc->sc_dev, 1430 aprint_error_dev(sc->sc_dev,
1431 "could not create TX buf DMA map\n"); 1431 "could not create TX buf DMA map\n");
1432 goto fail; 1432 goto fail;
1433 } 1433 }
1434 } 1434 }
1435 return 0; 1435 return 0;
1436 1436
1437fail: iwn_free_tx_ring(sc, ring); 1437fail: iwn_free_tx_ring(sc, ring);
1438 return error; 1438 return error;
1439} 1439}
1440 1440
1441static void 1441static void
1442iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring) 1442iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
1443{ 1443{
1444 int i; 1444 int i;
1445 1445
1446 for (i = 0; i < IWN_TX_RING_COUNT; i++) { 1446 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
1447 struct iwn_tx_data *data = &ring->data[i]; 1447 struct iwn_tx_data *data = &ring->data[i];
1448 1448
1449 if (data->m != NULL) { 1449 if (data->m != NULL) {
1450 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1450 bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1451 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1451 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
1452 bus_dmamap_unload(sc->sc_dmat, data->map); 1452 bus_dmamap_unload(sc->sc_dmat, data->map);
1453 m_freem(data->m); 1453 m_freem(data->m);
1454 data->m = NULL; 1454 data->m = NULL;
1455 } 1455 }
1456 } 1456 }
1457 /* Clear TX descriptors. */ 1457 /* Clear TX descriptors. */
1458 memset(ring->desc, 0, ring->desc_dma.size); 1458 memset(ring->desc, 0, ring->desc_dma.size);
1459 bus_dmamap_sync(sc->sc_dmat, ring->desc_dma.map, 0, 1459 bus_dmamap_sync(sc->sc_dmat, ring->desc_dma.map, 0,
1460 ring->desc_dma.size, BUS_DMASYNC_PREWRITE); 1460 ring->desc_dma.size, BUS_DMASYNC_PREWRITE);
1461 sc->qfullmsk &= ~(1 << ring->qid); 1461 sc->qfullmsk &= ~(1 << ring->qid);
1462 ring->queued = 0; 1462 ring->queued = 0;
1463 ring->cur = 0; 1463 ring->cur = 0;
1464} 1464}
1465 1465
1466static void 1466static void
1467iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring) 1467iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
1468{ 1468{
1469 int i; 1469 int i;
1470 1470
1471 iwn_dma_contig_free(&ring->desc_dma); 1471 iwn_dma_contig_free(&ring->desc_dma);
1472 iwn_dma_contig_free(&ring->cmd_dma); 1472 iwn_dma_contig_free(&ring->cmd_dma);
1473 1473
1474 for (i = 0; i < IWN_TX_RING_COUNT; i++) { 1474 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
1475 struct iwn_tx_data *data = &ring->data[i]; 1475 struct iwn_tx_data *data = &ring->data[i];
1476 1476
1477 if (data->m != NULL) { 1477 if (data->m != NULL) {
1478 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1478 bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1479 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1479 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
1480 bus_dmamap_unload(sc->sc_dmat, data->map); 1480 bus_dmamap_unload(sc->sc_dmat, data->map);
1481 m_freem(data->m); 1481 m_freem(data->m);
1482 } 1482 }
1483 if (data->map != NULL) 1483 if (data->map != NULL)
1484 bus_dmamap_destroy(sc->sc_dmat, data->map); 1484 bus_dmamap_destroy(sc->sc_dmat, data->map);
1485 } 1485 }
1486} 1486}
1487 1487
1488static void 1488static void
1489iwn5000_ict_reset(struct iwn_softc *sc) 1489iwn5000_ict_reset(struct iwn_softc *sc)
1490{ 1490{
1491 /* Disable interrupts. */ 1491 /* Disable interrupts. */
1492 IWN_WRITE(sc, IWN_INT_MASK, 0); 1492 IWN_WRITE(sc, IWN_INT_MASK, 0);
1493 1493
1494 /* Reset ICT table. */ 1494 /* Reset ICT table. */
1495 memset(sc->ict, 0, IWN_ICT_SIZE); 1495 memset(sc->ict, 0, IWN_ICT_SIZE);
1496 bus_dmamap_sync(sc->sc_dmat, sc->ict_dma.map, 0, IWN_ICT_SIZE, 1496 bus_dmamap_sync(sc->sc_dmat, sc->ict_dma.map, 0, IWN_ICT_SIZE,
1497 BUS_DMASYNC_PREWRITE); 1497 BUS_DMASYNC_PREWRITE);
1498 sc->ict_cur = 0; 1498 sc->ict_cur = 0;
1499 1499
1500 /* Set physical address of ICT table (4KB aligned). */ 1500 /* Set physical address of ICT table (4KB aligned). */
1501 DPRINTF(("enabling ICT\n")); 1501 DPRINTF(("enabling ICT\n"));
1502 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE | 1502 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
1503 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12); 1503 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
1504 1504
1505 /* Enable periodic RX interrupt. */ 1505 /* Enable periodic RX interrupt. */
1506 sc->int_mask |= IWN_INT_RX_PERIODIC; 1506 sc->int_mask |= IWN_INT_RX_PERIODIC;
1507 /* Switch to ICT interrupt mode in driver. */ 1507 /* Switch to ICT interrupt mode in driver. */
1508 sc->sc_flags |= IWN_FLAG_USE_ICT; 1508 sc->sc_flags |= IWN_FLAG_USE_ICT;
1509 1509
1510 /* Re-enable interrupts. */ 1510 /* Re-enable interrupts. */
1511 IWN_WRITE(sc, IWN_INT, 0xffffffff); 1511 IWN_WRITE(sc, IWN_INT, 0xffffffff);
1512 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask); 1512 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
1513} 1513}
1514 1514
1515static int 1515static int
1516iwn_read_eeprom(struct iwn_softc *sc) 1516iwn_read_eeprom(struct iwn_softc *sc)
1517{ 1517{
1518 struct iwn_ops *ops = &sc->ops; 1518 struct iwn_ops *ops = &sc->ops;
1519 struct ieee80211com *ic = &sc->sc_ic; 1519 struct ieee80211com *ic = &sc->sc_ic;
1520 uint16_t val; 1520 uint16_t val;
1521 int error; 1521 int error;
1522 1522
1523 /* Check whether adapter has an EEPROM or an OTPROM. */ 1523 /* Check whether adapter has an EEPROM or an OTPROM. */
1524 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 && 1524 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 &&
1525 (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP)) 1525 (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP))
1526 sc->sc_flags |= IWN_FLAG_HAS_OTPROM; 1526 sc->sc_flags |= IWN_FLAG_HAS_OTPROM;
1527 DPRINTF(("%s found\n", (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? 1527 DPRINTF(("%s found\n", (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ?
1528 "OTPROM" : "EEPROM")); 1528 "OTPROM" : "EEPROM"));
1529 1529
1530 /* Adapter has to be powered on for EEPROM access to work. */ 1530 /* Adapter has to be powered on for EEPROM access to work. */
1531 if ((error = iwn_apm_init(sc)) != 0) { 1531 if ((error = iwn_apm_init(sc)) != 0) {
1532 aprint_error_dev(sc->sc_dev, 1532 aprint_error_dev(sc->sc_dev,
1533 "could not power ON adapter\n"); 1533 "could not power ON adapter\n");
1534 return error; 1534 return error;
1535 } 1535 }
1536 1536
1537 if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) { 1537 if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) {
1538 aprint_error_dev(sc->sc_dev, 1538 aprint_error_dev(sc->sc_dev,
1539 "bad ROM signature\n"); 1539 "bad ROM signature\n");
1540 return EIO; 1540 return EIO;
1541 } 1541 }
1542 if ((error = iwn_eeprom_lock(sc)) != 0) { 1542 if ((error = iwn_eeprom_lock(sc)) != 0) {
1543 aprint_error_dev(sc->sc_dev, 1543 aprint_error_dev(sc->sc_dev,
1544 "could not lock ROM (error=%d)\n", error); 1544 "could not lock ROM (error=%d)\n", error);
1545 return error; 1545 return error;
1546 } 1546 }
1547 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) { 1547 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1548 if ((error = iwn_init_otprom(sc)) != 0) { 1548 if ((error = iwn_init_otprom(sc)) != 0) {
1549 aprint_error_dev(sc->sc_dev, 1549 aprint_error_dev(sc->sc_dev,
1550 "could not initialize OTPROM\n"); 1550 "could not initialize OTPROM\n");
1551 return error; 1551 return error;
1552 } 1552 }
1553 } 1553 }
1554 1554
1555 iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2); 1555 iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2);
1556 DPRINTF(("SKU capabilities=0x%04x\n", le16toh(val))); 1556 DPRINTF(("SKU capabilities=0x%04x\n", le16toh(val)));
1557 /* Check if HT support is bonded out. */ 1557 /* Check if HT support is bonded out. */
1558 if (val & htole16(IWN_EEPROM_SKU_CAP_11N)) 1558 if (val & htole16(IWN_EEPROM_SKU_CAP_11N))
1559 sc->sc_flags |= IWN_FLAG_HAS_11N; 1559 sc->sc_flags |= IWN_FLAG_HAS_11N;
1560 1560
1561 iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2); 1561 iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);
1562 sc->rfcfg = le16toh(val); 1562 sc->rfcfg = le16toh(val);
1563 DPRINTF(("radio config=0x%04x\n", sc->rfcfg)); 1563 DPRINTF(("radio config=0x%04x\n", sc->rfcfg));
1564 /* Read Tx/Rx chains from ROM unless it's known to be broken. */ 1564 /* Read Tx/Rx chains from ROM unless it's known to be broken. */
1565 if (sc->txchainmask == 0) 1565 if (sc->txchainmask == 0)
1566 sc->txchainmask = IWN_RFCFG_TXANTMSK(sc->rfcfg); 1566 sc->txchainmask = IWN_RFCFG_TXANTMSK(sc->rfcfg);
1567 if (sc->rxchainmask == 0) 1567 if (sc->rxchainmask == 0)
1568 sc->rxchainmask = IWN_RFCFG_RXANTMSK(sc->rfcfg); 1568 sc->rxchainmask = IWN_RFCFG_RXANTMSK(sc->rfcfg);
1569 1569
1570 /* Read MAC address. */ 1570 /* Read MAC address. */
1571 iwn_read_prom_data(sc, IWN_EEPROM_MAC, ic->ic_myaddr, 6); 1571 iwn_read_prom_data(sc, IWN_EEPROM_MAC, ic->ic_myaddr, ETHER_ADDR_LEN);
1572 1572
1573 /* Read adapter-specific information from EEPROM. */ 1573 /* Read adapter-specific information from EEPROM. */
1574 ops->read_eeprom(sc); 1574 ops->read_eeprom(sc);
1575 1575
1576 iwn_apm_stop(sc); /* Power OFF adapter. */ 1576 iwn_apm_stop(sc); /* Power OFF adapter. */
1577 1577
1578 iwn_eeprom_unlock(sc); 1578 iwn_eeprom_unlock(sc);
1579 return 0; 1579 return 0;
1580} 1580}
1581 1581
1582static void 1582static void
1583iwn4965_read_eeprom(struct iwn_softc *sc) 1583iwn4965_read_eeprom(struct iwn_softc *sc)
1584{ 1584{
1585 uint32_t addr; 1585 uint32_t addr;
1586 uint16_t val; 1586 uint16_t val;
1587 int i; 1587 int i;
1588 1588
1589 /* Read regulatory domain (4 ASCII characters). */ 1589 /* Read regulatory domain (4 ASCII characters). */
1590 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4); 1590 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4);
1591 1591
1592 /* Read the list of authorized channels (20MHz ones only). */ 1592 /* Read the list of authorized channels (20MHz ones only). */
1593 for (i = 0; i < 5; i++) { 1593 for (i = 0; i < 5; i++) {
1594 addr = iwn4965_regulatory_bands[i]; 1594 addr = iwn4965_regulatory_bands[i];
1595 iwn_read_eeprom_channels(sc, i, addr); 1595 iwn_read_eeprom_channels(sc, i, addr);
1596 } 1596 }
1597 1597
1598 /* Read maximum allowed TX power for 2GHz and 5GHz bands. */ 1598 /* Read maximum allowed TX power for 2GHz and 5GHz bands. */
1599 iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2); 1599 iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);
1600 sc->maxpwr2GHz = val & 0xff; 1600 sc->maxpwr2GHz = val & 0xff;
1601 sc->maxpwr5GHz = val >> 8; 1601 sc->maxpwr5GHz = val >> 8;
1602 /* Check that EEPROM values are within valid range. */ 1602 /* Check that EEPROM values are within valid range. */
1603 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50) 1603 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)
1604 sc->maxpwr5GHz = 38; 1604 sc->maxpwr5GHz = 38;
1605 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50) 1605 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)
1606 sc->maxpwr2GHz = 38; 1606 sc->maxpwr2GHz = 38;
1607 DPRINTF(("maxpwr 2GHz=%d 5GHz=%d\n", sc->maxpwr2GHz, sc->maxpwr5GHz)); 1607 DPRINTF(("maxpwr 2GHz=%d 5GHz=%d\n", sc->maxpwr2GHz, sc->maxpwr5GHz));
1608 1608
1609 /* Read samples for each TX power group. */ 1609 /* Read samples for each TX power group. */
1610 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands, 1610 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands,
1611 sizeof sc->bands); 1611 sizeof sc->bands);
1612 1612
1613 /* Read voltage at which samples were taken. */ 1613 /* Read voltage at which samples were taken. */
1614 iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2); 1614 iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);
1615 sc->eeprom_voltage = (int16_t)le16toh(val); 1615 sc->eeprom_voltage = (int16_t)le16toh(val);
1616 DPRINTF(("voltage=%d (in 0.3V)\n", sc->eeprom_voltage)); 1616 DPRINTF(("voltage=%d (in 0.3V)\n", sc->eeprom_voltage));
1617 1617
1618#ifdef IWN_DEBUG 1618#ifdef IWN_DEBUG
1619 /* Print samples. */ 1619 /* Print samples. */
1620 if (iwn_debug > 0) { 1620 if (iwn_debug > 0) {
1621 for (i = 0; i < IWN_NBANDS; i++) 1621 for (i = 0; i < IWN_NBANDS; i++)
1622 iwn4965_print_power_group(sc, i); 1622 iwn4965_print_power_group(sc, i);
1623 } 1623 }
1624#endif 1624#endif
1625} 1625}
1626 1626
1627#ifdef IWN_DEBUG 1627#ifdef IWN_DEBUG
1628static void 1628static void
1629iwn4965_print_power_group(struct iwn_softc *sc, int i) 1629iwn4965_print_power_group(struct iwn_softc *sc, int i)
1630{ 1630{
1631 struct iwn4965_eeprom_band *band = &sc->bands[i]; 1631 struct iwn4965_eeprom_band *band = &sc->bands[i];
1632 struct iwn4965_eeprom_chan_samples *chans = band->chans; 1632 struct iwn4965_eeprom_chan_samples *chans = band->chans;
1633 int j, c; 1633 int j, c;
1634 1634
1635 aprint_normal("===band %d===\n", i); 1635 aprint_normal("===band %d===\n", i);
1636 aprint_normal("chan lo=%d, chan hi=%d\n", band->lo, band->hi); 1636 aprint_normal("chan lo=%d, chan hi=%d\n", band->lo, band->hi);
1637 aprint_normal("chan1 num=%d\n", chans[0].num); 1637 aprint_normal("chan1 num=%d\n", chans[0].num);
1638 for (c = 0; c < 2; c++) { 1638 for (c = 0; c < 2; c++) {
1639 for (j = 0; j < IWN_NSAMPLES; j++) { 1639 for (j = 0; j < IWN_NSAMPLES; j++) {
1640 aprint_normal("chain %d, sample %d: temp=%d gain=%d " 1640 aprint_normal("chain %d, sample %d: temp=%d gain=%d "
1641 "power=%d pa_det=%d\n", c, j, 1641 "power=%d pa_det=%d\n", c, j,
1642 chans[0].samples[c][j].temp, 1642 chans[0].samples[c][j].temp,
1643 chans[0].samples[c][j].gain, 1643 chans[0].samples[c][j].gain,
1644 chans[0].samples[c][j].power, 1644 chans[0].samples[c][j].power,
1645 chans[0].samples[c][j].pa_det); 1645 chans[0].samples[c][j].pa_det);
1646 } 1646 }
1647 } 1647 }
1648 aprint_normal("chan2 num=%d\n", chans[1].num); 1648 aprint_normal("chan2 num=%d\n", chans[1].num);
1649 for (c = 0; c < 2; c++) { 1649 for (c = 0; c < 2; c++) {
1650 for (j = 0; j < IWN_NSAMPLES; j++) { 1650 for (j = 0; j < IWN_NSAMPLES; j++) {
1651 aprint_normal("chain %d, sample %d: temp=%d gain=%d " 1651 aprint_normal("chain %d, sample %d: temp=%d gain=%d "
1652 "power=%d pa_det=%d\n", c, j, 1652 "power=%d pa_det=%d\n", c, j,
1653 chans[1].samples[c][j].temp, 1653 chans[1].samples[c][j].temp,
1654 chans[1].samples[c][j].gain, 1654 chans[1].samples[c][j].gain,
1655 chans[1].samples[c][j].power, 1655 chans[1].samples[c][j].power,
1656 chans[1].samples[c][j].pa_det); 1656 chans[1].samples[c][j].pa_det);
1657 } 1657 }
1658 } 1658 }
1659} 1659}
1660#endif 1660#endif
1661 1661
1662static void 1662static void
1663iwn5000_read_eeprom(struct iwn_softc *sc) 1663iwn5000_read_eeprom(struct iwn_softc *sc)
1664{ 1664{
1665 struct iwn5000_eeprom_calib_hdr hdr; 1665 struct iwn5000_eeprom_calib_hdr hdr;
1666 int32_t volt; 1666 int32_t volt;
1667 uint32_t base, addr; 1667 uint32_t base, addr;
1668 uint16_t val; 1668 uint16_t val;
1669 int i; 1669 int i;
1670 1670
1671 /* Read regulatory domain (4 ASCII characters). */ 1671 /* Read regulatory domain (4 ASCII characters). */
1672 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2); 1672 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
1673 base = le16toh(val); 1673 base = le16toh(val);
1674 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN, 1674 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
1675 sc->eeprom_domain, 4); 1675 sc->eeprom_domain, 4);
1676 1676
1677 /* Read the list of authorized channels (20MHz ones only). */ 1677 /* Read the list of authorized channels (20MHz ones only). */
1678 for (i = 0; i < 5; i++) { 1678 for (i = 0; i < 5; i++) {
1679 addr = base + iwn5000_regulatory_bands[i]; 1679 addr = base + iwn5000_regulatory_bands[i];
1680 iwn_read_eeprom_channels(sc, i, addr); 1680 iwn_read_eeprom_channels(sc, i, addr);
1681 } 1681 }
1682 1682
1683 /* Read enhanced TX power information for 6000 Series. */ 1683 /* Read enhanced TX power information for 6000 Series. */
1684 if (sc->hw_type >= IWN_HW_REV_TYPE_6000) 1684 if (sc->hw_type >= IWN_HW_REV_TYPE_6000)
1685 iwn_read_eeprom_enhinfo(sc); 1685 iwn_read_eeprom_enhinfo(sc);
1686 1686
1687 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2); 1687 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
1688 base = le16toh(val); 1688 base = le16toh(val);
1689 iwn_read_prom_data(sc, base, &hdr, sizeof hdr); 1689 iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
1690 DPRINTF(("calib version=%u pa type=%u voltage=%u\n", 1690 DPRINTF(("calib version=%u pa type=%u voltage=%u\n",
1691 hdr.version, hdr.pa_type, le16toh(hdr.volt))); 1691 hdr.version, hdr.pa_type, le16toh(hdr.volt)));
1692 sc->calib_ver = hdr.version; 1692 sc->calib_ver = hdr.version;
1693 1693
1694 if (sc->hw_type == IWN_HW_REV_TYPE_2030 || 1694 if (sc->hw_type == IWN_HW_REV_TYPE_2030 ||
1695 sc->hw_type == IWN_HW_REV_TYPE_2000 || 1695 sc->hw_type == IWN_HW_REV_TYPE_2000 ||
1696 sc->hw_type == IWN_HW_REV_TYPE_135 || 1696 sc->hw_type == IWN_HW_REV_TYPE_135 ||
1697 sc->hw_type == IWN_HW_REV_TYPE_105) { 1697 sc->hw_type == IWN_HW_REV_TYPE_105) {
1698 sc->eeprom_voltage = le16toh(hdr.volt); 1698 sc->eeprom_voltage = le16toh(hdr.volt);
1699 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2); 1699 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
1700 sc->eeprom_temp = le16toh(val); 1700 sc->eeprom_temp = le16toh(val);
1701 iwn_read_prom_data(sc, base + IWN2000_EEPROM_RAWTEMP, &val, 2); 1701 iwn_read_prom_data(sc, base + IWN2000_EEPROM_RAWTEMP, &val, 2);
1702 sc->eeprom_rawtemp = le16toh(val); 1702 sc->eeprom_rawtemp = le16toh(val);
1703 } 1703 }
1704 1704
1705 if (sc->hw_type == IWN_HW_REV_TYPE_5150) { 1705 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
1706 /* Compute temperature offset. */ 1706 /* Compute temperature offset. */
1707 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2); 1707 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
1708 sc->eeprom_temp = le16toh(val); 1708 sc->eeprom_temp = le16toh(val);
1709 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2); 1709 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
1710 volt = le16toh(val); 1710 volt = le16toh(val);
1711 sc->temp_off = sc->eeprom_temp - (volt / -5); 1711 sc->temp_off = sc->eeprom_temp - (volt / -5);
1712 DPRINTF(("temp=%d volt=%d offset=%dK\n", 1712 DPRINTF(("temp=%d volt=%d offset=%dK\n",
1713 sc->eeprom_temp, volt, sc->temp_off)); 1713 sc->eeprom_temp, volt, sc->temp_off));
1714 } else { 1714 } else {
1715 /* Read crystal calibration. */ 1715 /* Read crystal calibration. */
1716 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL, 1716 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,
1717 &sc->eeprom_crystal, sizeof (uint32_t)); 1717 &sc->eeprom_crystal, sizeof (uint32_t));
1718 DPRINTF(("crystal calibration 0x%08x\n", 1718 DPRINTF(("crystal calibration 0x%08x\n",
1719 le32toh(sc->eeprom_crystal))); 1719 le32toh(sc->eeprom_crystal)));
1720 } 1720 }
1721} 1721}
1722 1722
1723static void 1723static void
1724iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr) 1724iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr)
1725{ 1725{
1726 struct ieee80211com *ic = &sc->sc_ic; 1726 struct ieee80211com *ic = &sc->sc_ic;
1727 const struct iwn_chan_band *band = &iwn_bands[n]; 1727 const struct iwn_chan_band *band = &iwn_bands[n];
1728 struct iwn_eeprom_chan channels[IWN_MAX_CHAN_PER_BAND]; 1728 struct iwn_eeprom_chan channels[IWN_MAX_CHAN_PER_BAND];
1729 uint8_t chan; 1729 uint8_t chan;
1730 int i; 1730 int i;
1731 1731
1732 iwn_read_prom_data(sc, addr, channels, 1732 iwn_read_prom_data(sc, addr, channels,
1733 band->nchan * sizeof (struct iwn_eeprom_chan)); 1733 band->nchan * sizeof (struct iwn_eeprom_chan));
1734 1734
1735 for (i = 0; i < band->nchan; i++) { 1735 for (i = 0; i < band->nchan; i++) {
1736 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) 1736 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID))
1737 continue; 1737 continue;
1738 1738
1739 chan = band->chan[i]; 1739 chan = band->chan[i];
1740 1740
1741 if (n == 0) { /* 2GHz band */ 1741 if (n == 0) { /* 2GHz band */
1742 ic->ic_channels[chan].ic_freq = 1742 ic->ic_channels[chan].ic_freq =
1743 ieee80211_ieee2mhz(chan, IEEE80211_CHAN_2GHZ); 1743 ieee80211_ieee2mhz(chan, IEEE80211_CHAN_2GHZ);
1744 ic->ic_channels[chan].ic_flags = 1744 ic->ic_channels[chan].ic_flags =
1745 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 1745 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
1746 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 1746 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
1747 1747
1748 } else { /* 5GHz band */ 1748 } else { /* 5GHz band */
1749 /* 1749 /*
1750 * Some adapters support channels 7, 8, 11 and 12 1750 * Some adapters support channels 7, 8, 11 and 12
1751 * both in the 2GHz and 4.9GHz bands. 1751 * both in the 2GHz and 4.9GHz bands.
1752 * Because of limitations in our net80211 layer, 1752 * Because of limitations in our net80211 layer,
1753 * we don't support them in the 4.9GHz band. 1753 * we don't support them in the 4.9GHz band.
1754 */ 1754 */
1755 if (chan <= 14) 1755 if (chan <= 14)
1756 continue; 1756 continue;
1757 1757
1758 ic->ic_channels[chan].ic_freq = 1758 ic->ic_channels[chan].ic_freq =
1759 ieee80211_ieee2mhz(chan, IEEE80211_CHAN_5GHZ); 1759 ieee80211_ieee2mhz(chan, IEEE80211_CHAN_5GHZ);
1760 ic->ic_channels[chan].ic_flags = IEEE80211_CHAN_A; 1760 ic->ic_channels[chan].ic_flags = IEEE80211_CHAN_A;
1761 /* We have at least one valid 5GHz channel. */ 1761 /* We have at least one valid 5GHz channel. */
1762 sc->sc_flags |= IWN_FLAG_HAS_5GHZ; 1762 sc->sc_flags |= IWN_FLAG_HAS_5GHZ;
1763 } 1763 }
1764 1764
1765 /* Is active scan allowed on this channel? */ 1765 /* Is active scan allowed on this channel? */
1766 if (!(channels[i].flags & IWN_EEPROM_CHAN_ACTIVE)) { 1766 if (!(channels[i].flags & IWN_EEPROM_CHAN_ACTIVE)) {
1767 ic->ic_channels[chan].ic_flags |= 1767 ic->ic_channels[chan].ic_flags |=
1768 IEEE80211_CHAN_PASSIVE; 1768 IEEE80211_CHAN_PASSIVE;
1769 } 1769 }
1770 1770
1771 /* Save maximum allowed TX power for this channel. */ 1771 /* Save maximum allowed TX power for this channel. */
1772 sc->maxpwr[chan] = channels[i].maxpwr; 1772 sc->maxpwr[chan] = channels[i].maxpwr;
1773 1773
1774 DPRINTF(("adding chan %d flags=0x%x maxpwr=%d\n", 1774 DPRINTF(("adding chan %d flags=0x%x maxpwr=%d\n",
1775 chan, channels[i].flags, sc->maxpwr[chan])); 1775 chan, channels[i].flags, sc->maxpwr[chan]));
1776 } 1776 }
1777} 1777}
1778 1778
1779static void 1779static void
1780iwn_read_eeprom_enhinfo(struct iwn_softc *sc) 1780iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
1781{ 1781{
1782 struct iwn_eeprom_enhinfo enhinfo[35]; 1782 struct iwn_eeprom_enhinfo enhinfo[35];
1783 uint16_t val, base; 1783 uint16_t val, base;
1784 int8_t maxpwr; 1784 int8_t maxpwr;
1785 uint8_t flags; 1785 uint8_t flags;
1786 int i; 1786 int i;
1787 1787
1788 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2); 1788 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
1789 base = le16toh(val); 1789 base = le16toh(val);
1790 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO, 1790 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
1791 enhinfo, sizeof enhinfo); 1791 enhinfo, sizeof enhinfo);
1792 1792
1793 memset(sc->enh_maxpwr, 0, sizeof sc->enh_maxpwr); 1793 memset(sc->enh_maxpwr, 0, sizeof sc->enh_maxpwr);
1794 for (i = 0; i < __arraycount(enhinfo); i++) { 1794 for (i = 0; i < __arraycount(enhinfo); i++) {
1795 flags = enhinfo[i].flags; 1795 flags = enhinfo[i].flags;
1796 if (!(flags & IWN_ENHINFO_VALID)) 1796 if (!(flags & IWN_ENHINFO_VALID))
1797 continue; /* Skip invalid entries. */ 1797 continue; /* Skip invalid entries. */
1798 1798
1799 maxpwr = 0; 1799 maxpwr = 0;
1800 if (sc->txchainmask & IWN_ANT_A) 1800 if (sc->txchainmask & IWN_ANT_A)
1801 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]); 1801 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
1802 if (sc->txchainmask & IWN_ANT_B) 1802 if (sc->txchainmask & IWN_ANT_B)
1803 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]); 1803 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
1804 if (sc->txchainmask & IWN_ANT_C) 1804 if (sc->txchainmask & IWN_ANT_C)
1805 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]); 1805 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
1806 if (sc->ntxchains == 2) 1806 if (sc->ntxchains == 2)
1807 maxpwr = MAX(maxpwr, enhinfo[i].mimo2); 1807 maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
1808 else if (sc->ntxchains == 3) 1808 else if (sc->ntxchains == 3)
1809 maxpwr = MAX(maxpwr, enhinfo[i].mimo3); 1809 maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
1810 maxpwr /= 2; /* Convert half-dBm to dBm. */ 1810 maxpwr /= 2; /* Convert half-dBm to dBm. */
1811 1811
1812 DPRINTF(("enhinfo %d, maxpwr=%d\n", i, maxpwr)); 1812 DPRINTF(("enhinfo %d, maxpwr=%d\n", i, maxpwr));
1813 sc->enh_maxpwr[i] = maxpwr; 1813 sc->enh_maxpwr[i] = maxpwr;
1814 } 1814 }
1815} 1815}
1816 1816
1817static struct ieee80211_node * 1817static struct ieee80211_node *
1818iwn_node_alloc(struct ieee80211_node_table *ic __unused) 1818iwn_node_alloc(struct ieee80211_node_table *ic __unused)
1819{ 1819{
1820 return malloc(sizeof (struct iwn_node), M_80211_NODE, M_NOWAIT | M_ZERO); 1820 return malloc(sizeof (struct iwn_node), M_80211_NODE, M_NOWAIT | M_ZERO);
1821} 1821}
1822 1822
1823static void 1823static void
1824iwn_newassoc(struct ieee80211_node *ni, int isnew) 1824iwn_newassoc(struct ieee80211_node *ni, int isnew)
1825{ 1825{
1826 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc; 1826 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
1827 struct iwn_node *wn = (void *)ni; 1827 struct iwn_node *wn = (void *)ni;
1828 uint8_t rate; 1828 uint8_t rate;
1829 int ridx, i; 1829 int ridx, i;
1830 1830
1831 ieee80211_amrr_node_init(&sc->amrr, &wn->amn); 1831 ieee80211_amrr_node_init(&sc->amrr, &wn->amn);
1832 /* Start at lowest available bit-rate, AMRR will raise. */ 1832 /* Start at lowest available bit-rate, AMRR will raise. */
1833 ni->ni_txrate = 0; 1833 ni->ni_txrate = 0;
1834 1834
1835 for (i = 0; i < ni->ni_rates.rs_nrates; i++) { 1835 for (i = 0; i < ni->ni_rates.rs_nrates; i++) {
1836 rate = ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL; 1836 rate = ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL;
1837 /* Map 802.11 rate to HW rate index. */ 1837 /* Map 802.11 rate to HW rate index. */
1838 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) 1838 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++)
1839 if (iwn_rates[ridx].rate == rate) 1839 if (iwn_rates[ridx].rate == rate)
1840 break; 1840 break;
1841 wn->ridx[i] = ridx; 1841 wn->ridx[i] = ridx;
1842 } 1842 }
1843} 1843}
1844 1844
1845static int 1845static int
1846iwn_media_change(struct ifnet *ifp) 1846iwn_media_change(struct ifnet *ifp)
1847{ 1847{
1848 struct iwn_softc *sc = ifp->if_softc; 1848 struct iwn_softc *sc = ifp->if_softc;
1849 struct ieee80211com *ic = &sc->sc_ic; 1849 struct ieee80211com *ic = &sc->sc_ic;
1850 uint8_t rate, ridx; 1850 uint8_t rate, ridx;
1851 int error; 1851 int error;
1852 1852
1853 error = ieee80211_media_change(ifp); 1853 error = ieee80211_media_change(ifp);
1854 if (error != ENETRESET) 1854 if (error != ENETRESET)
1855 return error; 1855 return error;
1856 1856
1857 if (ic->ic_fixed_rate != -1) { 1857 if (ic->ic_fixed_rate != -1) {
1858 rate = ic->ic_sup_rates[ic->ic_curmode]. 1858 rate = ic->ic_sup_rates[ic->ic_curmode].
1859 rs_rates[ic->ic_fixed_rate] & IEEE80211_RATE_VAL; 1859 rs_rates[ic->ic_fixed_rate] & IEEE80211_RATE_VAL;
1860 /* Map 802.11 rate to HW rate index. */ 1860 /* Map 802.11 rate to HW rate index. */
1861 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) 1861 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++)
1862 if (iwn_rates[ridx].rate == rate) 1862 if (iwn_rates[ridx].rate == rate)
1863 break; 1863 break;
1864 sc->fixed_ridx = ridx; 1864 sc->fixed_ridx = ridx;
1865 } 1865 }
1866 1866
1867 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1867 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1868 (IFF_UP | IFF_RUNNING)) { 1868 (IFF_UP | IFF_RUNNING)) {
1869 iwn_stop(ifp, 0); 1869 iwn_stop(ifp, 0);
1870 error = iwn_init(ifp); 1870 error = iwn_init(ifp);
1871 } 1871 }
1872 return error; 1872 return error;
1873} 1873}
1874 1874
1875static int 1875static int
1876iwn_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 1876iwn_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
1877{ 1877{
1878 struct ifnet *ifp = ic->ic_ifp; 1878 struct ifnet *ifp = ic->ic_ifp;
1879 struct iwn_softc *sc = ifp->if_softc; 1879 struct iwn_softc *sc = ifp->if_softc;
1880 int error; 1880 int error;
1881 1881
1882 callout_stop(&sc->calib_to); 1882 callout_stop(&sc->calib_to);
1883 1883
1884 switch (nstate) { 1884 switch (nstate) {
1885 case IEEE80211_S_SCAN: 1885 case IEEE80211_S_SCAN:
1886 /* XXX Do not abort a running scan. */ 1886 /* XXX Do not abort a running scan. */
1887 if (sc->sc_flags & IWN_FLAG_SCANNING) { 1887 if (sc->sc_flags & IWN_FLAG_SCANNING) {
1888 if (ic->ic_state != nstate) 1888 if (ic->ic_state != nstate)
1889 aprint_debug_dev(sc->sc_dev, "scan request(%d) " 1889 aprint_debug_dev(sc->sc_dev, "scan request(%d) "
1890 "while scanning(%d) ignored\n", nstate, 1890 "while scanning(%d) ignored\n", nstate,
1891 ic->ic_state); 1891 ic->ic_state);
1892 break; 1892 break;
1893 } 1893 }
1894 1894
1895 /* XXX Not sure if call and flags are needed. */ 1895 /* XXX Not sure if call and flags are needed. */
1896 ieee80211_node_table_reset(&ic->ic_scan); 1896 ieee80211_node_table_reset(&ic->ic_scan);
1897 ic->ic_flags |= IEEE80211_F_SCAN | IEEE80211_F_ASCAN; 1897 ic->ic_flags |= IEEE80211_F_SCAN | IEEE80211_F_ASCAN;
1898 sc->sc_flags |= IWN_FLAG_SCANNING_2GHZ; 1898 sc->sc_flags |= IWN_FLAG_SCANNING_2GHZ;
1899 1899
1900 /* Make the link LED blink while we're scanning. */ 1900 /* Make the link LED blink while we're scanning. */
1901 iwn_set_led(sc, IWN_LED_LINK, 10, 10); 1901 iwn_set_led(sc, IWN_LED_LINK, 10, 10);
1902 1902
1903 if ((error = iwn_scan(sc, IEEE80211_CHAN_2GHZ)) != 0) { 1903 if ((error = iwn_scan(sc, IEEE80211_CHAN_2GHZ)) != 0) {
1904 aprint_error_dev(sc->sc_dev, 1904 aprint_error_dev(sc->sc_dev,
1905 "could not initiate scan\n"); 1905 "could not initiate scan\n");
1906 return error; 1906 return error;
1907 } 1907 }
1908 ic->ic_state = nstate; 1908 ic->ic_state = nstate;
1909 return 0; 1909 return 0;
1910 1910
1911 case IEEE80211_S_ASSOC: 1911 case IEEE80211_S_ASSOC:
1912 if (ic->ic_state != IEEE80211_S_RUN) 1912 if (ic->ic_state != IEEE80211_S_RUN)
1913 break; 1913 break;
1914 /* FALLTHROUGH */ 1914 /* FALLTHROUGH */
1915 case IEEE80211_S_AUTH: 1915 case IEEE80211_S_AUTH:
1916 /* Reset state to handle reassociations correctly. */ 1916 /* Reset state to handle reassociations correctly. */
1917 sc->rxon.associd = 0; 1917 sc->rxon.associd = 0;
1918 sc->rxon.filter &= ~htole32(IWN_FILTER_BSS); 1918 sc->rxon.filter &= ~htole32(IWN_FILTER_BSS);
1919 sc->calib.state = IWN_CALIB_STATE_INIT; 1919 sc->calib.state = IWN_CALIB_STATE_INIT;
1920 1920
1921 /* Wait until we hear a beacon before we transmit */ 1921 /* Wait until we hear a beacon before we transmit */
1922 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan)) 1922 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan))
1923 sc->sc_beacon_wait = 1; 1923 sc->sc_beacon_wait = 1;
1924 1924
1925 if ((error = iwn_auth(sc)) != 0) { 1925 if ((error = iwn_auth(sc)) != 0) {
1926 aprint_error_dev(sc->sc_dev, 1926 aprint_error_dev(sc->sc_dev,
1927 "could not move to auth state\n"); 1927 "could not move to auth state\n");
1928 return error; 1928 return error;
1929 } 1929 }
1930 break; 1930 break;
1931 1931
1932 case IEEE80211_S_RUN: 1932 case IEEE80211_S_RUN:
1933 /* 1933 /*
1934 * RUN -> RUN transition; Just restart timers. 1934 * RUN -> RUN transition; Just restart timers.
1935 */ 1935 */
1936 if (ic->ic_state == IEEE80211_S_RUN) { 1936 if (ic->ic_state == IEEE80211_S_RUN) {
1937 sc->calib_cnt = 0; 1937 sc->calib_cnt = 0;
1938 break; 1938 break;
1939 } 1939 }
1940 1940
1941 /* Wait until we hear a beacon before we transmit */ 1941 /* Wait until we hear a beacon before we transmit */
1942 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan)) 1942 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan))
1943 sc->sc_beacon_wait = 1; 1943 sc->sc_beacon_wait = 1;
1944 1944
1945 if ((error = iwn_run(sc)) != 0) { 1945 if ((error = iwn_run(sc)) != 0) {
1946 aprint_error_dev(sc->sc_dev, 1946 aprint_error_dev(sc->sc_dev,
1947 "could not move to run state\n"); 1947 "could not move to run state\n");
1948 return error; 1948 return error;
1949 } 1949 }
1950 break; 1950 break;
1951 1951
1952 case IEEE80211_S_INIT: 1952 case IEEE80211_S_INIT:
1953 sc->sc_flags &= ~IWN_FLAG_SCANNING; 1953 sc->sc_flags &= ~IWN_FLAG_SCANNING;
1954 sc->calib.state = IWN_CALIB_STATE_INIT; 1954 sc->calib.state = IWN_CALIB_STATE_INIT;
1955 /* 1955 /*
1956 * Purge the xmit queue so we don't have old frames 1956 * Purge the xmit queue so we don't have old frames
1957 * during a new association attempt. 1957 * during a new association attempt.
1958 */ 1958 */
1959 sc->sc_beacon_wait = 0; 1959 sc->sc_beacon_wait = 0;
1960 ifp->if_flags &= ~IFF_OACTIVE; 1960 ifp->if_flags &= ~IFF_OACTIVE;
1961 iwn_start(ifp); 1961 iwn_start(ifp);
1962 break; 1962 break;
1963 } 1963 }
1964 1964
1965 return sc->sc_newstate(ic, nstate, arg); 1965 return sc->sc_newstate(ic, nstate, arg);
1966} 1966}
1967 1967
1968static void 1968static void
1969iwn_iter_func(void *arg, struct ieee80211_node *ni) 1969iwn_iter_func(void *arg, struct ieee80211_node *ni)
1970{ 1970{
1971 struct iwn_softc *sc = arg; 1971 struct iwn_softc *sc = arg;
1972 struct iwn_node *wn = (struct iwn_node *)ni; 1972 struct iwn_node *wn = (struct iwn_node *)ni;
1973 1973
1974 ieee80211_amrr_choose(&sc->amrr, ni, &wn->amn); 1974 ieee80211_amrr_choose(&sc->amrr, ni, &wn->amn);
1975} 1975}
1976 1976
1977static void 1977static void
1978iwn_calib_timeout(void *arg) 1978iwn_calib_timeout(void *arg)
1979{ 1979{
1980 struct iwn_softc *sc = arg; 1980 struct iwn_softc *sc = arg;
1981 struct ieee80211com *ic = &sc->sc_ic; 1981 struct ieee80211com *ic = &sc->sc_ic;
1982 int s; 1982 int s;
1983 1983
1984 s = splnet(); 1984 s = splnet();
1985 if (ic->ic_fixed_rate == -1) { 1985 if (ic->ic_fixed_rate == -1) {
1986 if (ic->ic_opmode == IEEE80211_M_STA) 1986 if (ic->ic_opmode == IEEE80211_M_STA)
1987 iwn_iter_func(sc, ic->ic_bss); 1987 iwn_iter_func(sc, ic->ic_bss);
1988 else 1988 else
1989 ieee80211_iterate_nodes(&ic->ic_sta, iwn_iter_func, sc); 1989 ieee80211_iterate_nodes(&ic->ic_sta, iwn_iter_func, sc);
1990 } 1990 }
1991 /* Force automatic TX power calibration every 60 secs. */ 1991 /* Force automatic TX power calibration every 60 secs. */
1992 if (++sc->calib_cnt >= 120) { 1992 if (++sc->calib_cnt >= 120) {
1993 uint32_t flags = 0; 1993 uint32_t flags = 0;
1994 1994
1995 DPRINTF(("sending request for statistics\n")); 1995 DPRINTF(("sending request for statistics\n"));
1996 (void)iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, 1996 (void)iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags,
1997 sizeof flags, 1); 1997 sizeof flags, 1);
1998 sc->calib_cnt = 0; 1998 sc->calib_cnt = 0;
1999 } 1999 }
2000 splx(s); 2000 splx(s);
2001 2001
2002 /* Automatic rate control triggered every 500ms. */ 2002 /* Automatic rate control triggered every 500ms. */
2003 callout_schedule(&sc->calib_to, mstohz(500)); 2003 callout_schedule(&sc->calib_to, mstohz(500));
2004} 2004}
2005 2005
2006/* 2006/*
2007 * Process an RX_PHY firmware notification. This is usually immediately 2007 * Process an RX_PHY firmware notification. This is usually immediately
2008 * followed by an MPDU_RX_DONE notification. 2008 * followed by an MPDU_RX_DONE notification.
2009 */ 2009 */
2010static void 2010static void
2011iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc, 2011iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2012 struct iwn_rx_data *data) 2012 struct iwn_rx_data *data)
2013{ 2013{
2014 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1); 2014 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
2015 2015
2016 DPRINTFN(2, ("received PHY stats\n")); 2016 DPRINTFN(2, ("received PHY stats\n"));
2017 bus_dmamap_sync(sc->sc_dmat, data->map, sizeof (*desc), 2017 bus_dmamap_sync(sc->sc_dmat, data->map, sizeof (*desc),
2018 sizeof (*stat), BUS_DMASYNC_POSTREAD); 2018 sizeof (*stat), BUS_DMASYNC_POSTREAD);
2019 2019
2020 /* Save RX statistics, they will be used on MPDU_RX_DONE. */ 2020 /* Save RX statistics, they will be used on MPDU_RX_DONE. */
2021 memcpy(&sc->last_rx_stat, stat, sizeof (*stat)); 2021 memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
2022 sc->last_rx_valid = 1; 2022 sc->last_rx_valid = 1;
2023} 2023}
2024 2024
2025/* 2025/*
2026 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification. 2026 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
2027 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one. 2027 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
2028 */ 2028 */
2029static void 2029static void
2030iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, 2030iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2031 struct iwn_rx_data *data) 2031 struct iwn_rx_data *data)
2032{ 2032{
2033 struct iwn_ops *ops = &sc->ops; 2033 struct iwn_ops *ops = &sc->ops;
2034 struct ieee80211com *ic = &sc->sc_ic; 2034 struct ieee80211com *ic = &sc->sc_ic;
2035 struct ifnet *ifp = ic->ic_ifp; 2035 struct ifnet *ifp = ic->ic_ifp;
2036 struct iwn_rx_ring *ring = &sc->rxq; 2036 struct iwn_rx_ring *ring = &sc->rxq;
2037 struct ieee80211_frame *wh; 2037 struct ieee80211_frame *wh;
2038 struct ieee80211_node *ni; 2038 struct ieee80211_node *ni;
2039 struct mbuf *m, *m1; 2039 struct mbuf *m, *m1;
2040 struct iwn_rx_stat *stat; 2040 struct iwn_rx_stat *stat;
2041 char *head; 2041 char *head;
2042 uint32_t flags; 2042 uint32_t flags;
2043 int error, len, rssi, s; 2043 int error, len, rssi, s;
2044 2044
2045 if (desc->type == IWN_MPDU_RX_DONE) { 2045 if (desc->type == IWN_MPDU_RX_DONE) {
2046 /* Check for prior RX_PHY notification. */ 2046 /* Check for prior RX_PHY notification. */
2047 if (!sc->last_rx_valid) { 2047 if (!sc->last_rx_valid) {
2048 DPRINTF(("missing RX_PHY\n")); 2048 DPRINTF(("missing RX_PHY\n"));
2049 return; 2049 return;
2050 } 2050 }
2051 sc->last_rx_valid = 0; 2051 sc->last_rx_valid = 0;
2052 stat = &sc->last_rx_stat; 2052 stat = &sc->last_rx_stat;
2053 } else 2053 } else
2054 stat = (struct iwn_rx_stat *)(desc + 1); 2054 stat = (struct iwn_rx_stat *)(desc + 1);
2055 2055
2056 bus_dmamap_sync(sc->sc_dmat, data->map, 0, IWN_RBUF_SIZE, 2056 bus_dmamap_sync(sc->sc_dmat, data->map, 0, IWN_RBUF_SIZE,
2057 BUS_DMASYNC_POSTREAD); 2057 BUS_DMASYNC_POSTREAD);
2058 2058
2059 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) { 2059 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) {
2060 aprint_error_dev(sc->sc_dev, 2060 aprint_error_dev(sc->sc_dev,
2061 "invalid RX statistic header\n"); 2061 "invalid RX statistic header\n");
2062 return; 2062 return;
2063 } 2063 }
2064 if (desc->type == IWN_MPDU_RX_DONE) { 2064 if (desc->type == IWN_MPDU_RX_DONE) {
2065 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1); 2065 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1);
2066 head = (char *)(mpdu + 1); 2066 head = (char *)(mpdu + 1);
2067 len = le16toh(mpdu->len); 2067 len = le16toh(mpdu->len);
2068 } else { 2068 } else {
2069 head = (char *)(stat + 1) + stat->cfg_phy_len; 2069 head = (char *)(stat + 1) + stat->cfg_phy_len;
2070 len = le16toh(stat->len); 2070 len = le16toh(stat->len);
2071 } 2071 }
2072 2072
2073 flags = le32toh(*(uint32_t *)(head + len)); 2073 flags = le32toh(*(uint32_t *)(head + len));
2074 2074
2075 /* Discard frames with a bad FCS early. */ 2075 /* Discard frames with a bad FCS early. */
2076 if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) { 2076 if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) {
2077 DPRINTFN(2, ("RX flags error %x\n", flags)); 2077 DPRINTFN(2, ("RX flags error %x\n", flags));
2078 ifp->if_ierrors++; 2078 ifp->if_ierrors++;
2079 return; 2079 return;
2080 } 2080 }
2081 /* Discard frames that are too short. */ 2081 /* Discard frames that are too short. */
2082 if (len < sizeof (*wh)) { 2082 if (len < sizeof (*wh)) {
2083 DPRINTF(("frame too short: %d\n", len)); 2083 DPRINTF(("frame too short: %d\n", len));
2084 ic->ic_stats.is_rx_tooshort++; 2084 ic->ic_stats.is_rx_tooshort++;
2085 ifp->if_ierrors++; 2085 ifp->if_ierrors++;
2086 return; 2086 return;
2087 } 2087 }
2088 2088
2089 m1 = MCLGETIalt(sc, M_DONTWAIT, NULL, IWN_RBUF_SIZE); 2089 m1 = MCLGETIalt(sc, M_DONTWAIT, NULL, IWN_RBUF_SIZE);
2090 if (m1 == NULL) { 2090 if (m1 == NULL) {
2091 ic->ic_stats.is_rx_nobuf++; 2091 ic->ic_stats.is_rx_nobuf++;
2092 ifp->if_ierrors++; 2092 ifp->if_ierrors++;
2093 return; 2093 return;
2094 } 2094 }
2095 bus_dmamap_unload(sc->sc_dmat, data->map); 2095 bus_dmamap_unload(sc->sc_dmat, data->map);
2096 2096
2097 error = bus_dmamap_load(sc->sc_dmat, data->map, mtod(m1, void *), 2097 error = bus_dmamap_load(sc->sc_dmat, data->map, mtod(m1, void *),
2098 IWN_RBUF_SIZE, NULL, BUS_DMA_NOWAIT | BUS_DMA_READ); 2098 IWN_RBUF_SIZE, NULL, BUS_DMA_NOWAIT | BUS_DMA_READ);
2099 if (error != 0) { 2099 if (error != 0) {
2100 m_freem(m1); 2100 m_freem(m1);
2101 2101
2102 /* Try to reload the old mbuf. */ 2102 /* Try to reload the old mbuf. */
2103 error = bus_dmamap_load(sc->sc_dmat, data->map, 2103 error = bus_dmamap_load(sc->sc_dmat, data->map,
2104 mtod(data->m, void *), IWN_RBUF_SIZE, NULL, 2104 mtod(data->m, void *), IWN_RBUF_SIZE, NULL,
2105 BUS_DMA_NOWAIT | BUS_DMA_READ); 2105 BUS_DMA_NOWAIT | BUS_DMA_READ);
2106 if (error != 0) { 2106 if (error != 0) {
2107 panic("%s: could not load old RX mbuf", 2107 panic("%s: could not load old RX mbuf",
2108 device_xname(sc->sc_dev)); 2108 device_xname(sc->sc_dev));
2109 } 2109 }
2110 /* Physical address may have changed. */ 2110 /* Physical address may have changed. */
2111 ring->desc[ring->cur] = 2111 ring->desc[ring->cur] =
2112 htole32(data->map->dm_segs[0].ds_addr >> 8); 2112 htole32(data->map->dm_segs[0].ds_addr >> 8);
2113 bus_dmamap_sync(sc->sc_dmat, ring->desc_dma.map, 2113 bus_dmamap_sync(sc->sc_dmat, ring->desc_dma.map,
2114 ring->cur * sizeof (uint32_t), sizeof (uint32_t), 2114 ring->cur * sizeof (uint32_t), sizeof (uint32_t),
2115 BUS_DMASYNC_PREWRITE); 2115 BUS_DMASYNC_PREWRITE);
2116 ifp->if_ierrors++; 2116 ifp->if_ierrors++;
2117 return; 2117 return;
2118 } 2118 }
2119 2119
2120 m = data->m; 2120 m = data->m;
2121 data->m = m1; 2121 data->m = m1;
2122 /* Update RX descriptor. */ 2122 /* Update RX descriptor. */
2123 ring->desc[ring->cur] = htole32(data->map->dm_segs[0].ds_addr >> 8); 2123 ring->desc[ring->cur] = htole32(data->map->dm_segs[0].ds_addr >> 8);
2124 bus_dmamap_sync(sc->sc_dmat, ring->desc_dma.map, 2124 bus_dmamap_sync(sc->sc_dmat, ring->desc_dma.map,
2125 ring->cur * sizeof (uint32_t), sizeof (uint32_t), 2125 ring->cur * sizeof (uint32_t), sizeof (uint32_t),
2126 BUS_DMASYNC_PREWRITE); 2126 BUS_DMASYNC_PREWRITE);
2127 2127
2128 /* Finalize mbuf. */ 2128 /* Finalize mbuf. */
2129 m_set_rcvif(m, ifp); 2129 m_set_rcvif(m, ifp);
2130 m->m_data = head; 2130 m->m_data = head;
2131 m->m_pkthdr.len = m->m_len = len; 2131 m->m_pkthdr.len = m->m_len = len;
2132 2132
2133 s = splnet(); 2133 s = splnet();
2134 2134
2135 /* Grab a reference to the source node. */ 2135 /* Grab a reference to the source node. */
2136 wh = mtod(m, struct ieee80211_frame *); 2136 wh = mtod(m, struct ieee80211_frame *);
2137 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 2137 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
2138 2138
2139 /* XXX OpenBSD adds decryption here (see also comments in iwn_tx). */ 2139 /* XXX OpenBSD adds decryption here (see also comments in iwn_tx). */
2140 /* NetBSD does decryption in ieee80211_input. */ 2140 /* NetBSD does decryption in ieee80211_input. */
2141 2141
2142 rssi = ops->get_rssi(stat); 2142 rssi = ops->get_rssi(stat);
2143 2143
2144 /* XXX Added for NetBSD: scans never stop without it */ 2144 /* XXX Added for NetBSD: scans never stop without it */
2145 if (ic->ic_state == IEEE80211_S_SCAN) 2145 if (ic->ic_state == IEEE80211_S_SCAN)
2146 iwn_fix_channel(ic, m, stat); 2146 iwn_fix_channel(ic, m, stat);
2147 2147
2148 if (sc->sc_drvbpf != NULL) { 2148 if (sc->sc_drvbpf != NULL) {
2149 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap; 2149 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap;
2150 2150
2151 tap->wr_flags = 0; 2151 tap->wr_flags = 0;
2152 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE)) 2152 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE))
2153 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2153 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2154 tap->wr_chan_freq = 2154 tap->wr_chan_freq =
2155 htole16(ic->ic_channels[stat->chan].ic_freq); 2155 htole16(ic->ic_channels[stat->chan].ic_freq);
2156 tap->wr_chan_flags = 2156 tap->wr_chan_flags =
2157 htole16(ic->ic_channels[stat->chan].ic_flags); 2157 htole16(ic->ic_channels[stat->chan].ic_flags);
2158 tap->wr_dbm_antsignal = (int8_t)rssi; 2158 tap->wr_dbm_antsignal = (int8_t)rssi;
2159 tap->wr_dbm_antnoise = (int8_t)sc->noise; 2159 tap->wr_dbm_antnoise = (int8_t)sc->noise;
2160 tap->wr_tsft = stat->tstamp; 2160 tap->wr_tsft = stat->tstamp;
2161 switch (stat->rate) { 2161 switch (stat->rate) {
2162 /* CCK rates. */ 2162 /* CCK rates. */
2163 case 10: tap->wr_rate = 2; break; 2163 case 10: tap->wr_rate = 2; break;
2164 case 20: tap->wr_rate = 4; break; 2164 case 20: tap->wr_rate = 4; break;
2165 case 55: tap->wr_rate = 11; break; 2165 case 55: tap->wr_rate = 11; break;
2166 case 110: tap->wr_rate = 22; break; 2166 case 110: tap->wr_rate = 22; break;
2167 /* OFDM rates. */ 2167 /* OFDM rates. */
2168 case 0xd: tap->wr_rate = 12; break; 2168 case 0xd: tap->wr_rate = 12; break;
2169 case 0xf: tap->wr_rate = 18; break; 2169 case 0xf: tap->wr_rate = 18; break;
2170 case 0x5: tap->wr_rate = 24; break; 2170 case 0x5: tap->wr_rate = 24; break;
2171 case 0x7: tap->wr_rate = 36; break; 2171 case 0x7: tap->wr_rate = 36; break;
2172 case 0x9: tap->wr_rate = 48; break; 2172 case 0x9: tap->wr_rate = 48; break;
2173 case 0xb: tap->wr_rate = 72; break; 2173 case 0xb: tap->wr_rate = 72; break;
2174 case 0x1: tap->wr_rate = 96; break; 2174 case 0x1: tap->wr_rate = 96; break;
2175 case 0x3: tap->wr_rate = 108; break; 2175 case 0x3: tap->wr_rate = 108; break;
2176 /* Unknown rate: should not happen. */ 2176 /* Unknown rate: should not happen. */
2177 default: tap->wr_rate = 0; 2177 default: tap->wr_rate = 0;
2178 } 2178 }
2179 2179
2180 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m, BPF_D_IN); 2180 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m, BPF_D_IN);
2181 } 2181 }
2182 2182
2183 /* 2183 /*
2184 * If it's a beacon and we're waiting, then do the wakeup. 2184 * If it's a beacon and we're waiting, then do the wakeup.
2185 */ 2185 */
2186 if (sc->sc_beacon_wait) { 2186 if (sc->sc_beacon_wait) {
2187 uint8_t type, subtype; 2187 uint8_t type, subtype;
2188 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2188 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
2189 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2189 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2190 /* 2190 /*
2191 * This assumes at this point we've received our own 2191 * This assumes at this point we've received our own
2192 * beacon. 2192 * beacon.
2193 */ 2193 */
2194 if (type == IEEE80211_FC0_TYPE_MGT && 2194 if (type == IEEE80211_FC0_TYPE_MGT &&
2195 subtype == IEEE80211_FC0_SUBTYPE_BEACON) { 2195 subtype == IEEE80211_FC0_SUBTYPE_BEACON) {
2196 sc->sc_beacon_wait = 0; 2196 sc->sc_beacon_wait = 0;
2197 ifp->if_flags &= ~IFF_OACTIVE; 2197 ifp->if_flags &= ~IFF_OACTIVE;
2198 iwn_start(ifp); 2198 iwn_start(ifp);
2199 } 2199 }
2200 } 2200 }
2201 2201
2202 /* Send the frame to the 802.11 layer. */ 2202 /* Send the frame to the 802.11 layer. */
2203 ieee80211_input(ic, m, ni, rssi, 0); 2203 ieee80211_input(ic, m, ni, rssi, 0);
2204 2204
2205 /* Node is no longer needed. */ 2205 /* Node is no longer needed. */
2206 ieee80211_free_node(ni); 2206 ieee80211_free_node(ni);
2207 2207
2208 splx(s); 2208 splx(s);
2209} 2209}
2210 2210
2211#ifndef IEEE80211_NO_HT 2211#ifndef IEEE80211_NO_HT
2212/* Process an incoming Compressed BlockAck. */ 2212/* Process an incoming Compressed BlockAck. */
2213static void 2213static void
2214iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc, 2214iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2215 struct iwn_rx_data *data) 2215 struct iwn_rx_data *data)
2216{ 2216{
2217 struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1); 2217 struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
2218 struct iwn_tx_ring *txq; 2218 struct iwn_tx_ring *txq;
2219 2219
2220 bus_dmamap_sync(sc->sc_dmat, data->map, sizeof (*desc), sizeof (*ba), 2220 bus_dmamap_sync(sc->sc_dmat, data->map, sizeof (*desc), sizeof (*ba),
2221 BUS_DMASYNC_POSTREAD); 2221 BUS_DMASYNC_POSTREAD);
2222 2222
2223 txq = &sc->txq[le16toh(ba->qid)]; 2223 txq = &sc->txq[le16toh(ba->qid)];
2224 /* XXX TBD */ 2224 /* XXX TBD */
2225} 2225}
2226#endif 2226#endif
2227 2227
2228/* 2228/*
2229 * Process a CALIBRATION_RESULT notification sent by the initialization 2229 * Process a CALIBRATION_RESULT notification sent by the initialization
2230 * firmware on response to a CMD_CALIB_CONFIG command (5000 only). 2230 * firmware on response to a CMD_CALIB_CONFIG command (5000 only).
2231 */ 2231 */
2232static void 2232static void
2233iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc, 2233iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2234 struct iwn_rx_data *data) 2234 struct iwn_rx_data *data)
2235{ 2235{
2236 struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1); 2236 struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1);
2237 int len, idx = -1; 2237 int len, idx = -1;
2238 2238
2239 /* Runtime firmware should not send such a notification. */ 2239 /* Runtime firmware should not send such a notification. */
2240 if (sc->sc_flags & IWN_FLAG_CALIB_DONE) 2240 if (sc->sc_flags & IWN_FLAG_CALIB_DONE)
2241 return; 2241 return;
2242 2242
2243 len = (le32toh(desc->len) & 0x3fff) - 4; 2243 len = (le32toh(desc->len) & 0x3fff) - 4;
2244 bus_dmamap_sync(sc->sc_dmat, data->map, sizeof (*desc), len, 2244 bus_dmamap_sync(sc->sc_dmat, data->map, sizeof (*desc), len,
2245 BUS_DMASYNC_POSTREAD); 2245 BUS_DMASYNC_POSTREAD);
2246 2246
2247 switch (calib->code) { 2247 switch (calib->code) {
2248 case IWN5000_PHY_CALIB_DC: 2248 case IWN5000_PHY_CALIB_DC:
2249 if (sc->hw_type == IWN_HW_REV_TYPE_5150 || 2249 if (sc->hw_type == IWN_HW_REV_TYPE_5150 ||
2250 sc->hw_type == IWN_HW_REV_TYPE_2030 || 2250 sc->hw_type == IWN_HW_REV_TYPE_2030 ||
2251 sc->hw_type == IWN_HW_REV_TYPE_2000 || 2251 sc->hw_type == IWN_HW_REV_TYPE_2000 ||
2252 sc->hw_type == IWN_HW_REV_TYPE_135 || 2252 sc->hw_type == IWN_HW_REV_TYPE_135 ||
2253 sc->hw_type == IWN_HW_REV_TYPE_105) 2253 sc->hw_type == IWN_HW_REV_TYPE_105)
2254 idx = 0; 2254 idx = 0;
2255 break; 2255 break;
2256 case IWN5000_PHY_CALIB_LO: 2256 case IWN5000_PHY_CALIB_LO:
2257 idx = 1; 2257 idx = 1;
2258 break; 2258 break;
2259 case IWN5000_PHY_CALIB_TX_IQ: 2259 case IWN5000_PHY_CALIB_TX_IQ:
2260 idx = 2; 2260 idx = 2;
2261 break; 2261 break;
2262 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC: 2262 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
2263 if (sc->hw_type < IWN_HW_REV_TYPE_6000 && 2263 if (sc->hw_type < IWN_HW_REV_TYPE_6000 &&
2264 sc->hw_type != IWN_HW_REV_TYPE_5150) 2264 sc->hw_type != IWN_HW_REV_TYPE_5150)
2265 idx = 3; 2265 idx = 3;
2266 break; 2266 break;
2267 case IWN5000_PHY_CALIB_BASE_BAND: 2267 case IWN5000_PHY_CALIB_BASE_BAND:
2268 idx = 4; 2268 idx = 4;
2269 break; 2269 break;
2270 } 2270 }
2271 if (idx == -1) /* Ignore other results. */ 2271 if (idx == -1) /* Ignore other results. */
2272 return; 2272 return;
2273 2273
2274 /* Save calibration result. */ 2274 /* Save calibration result. */
2275 if (sc->calibcmd[idx].buf != NULL) 2275 if (sc->calibcmd[idx].buf != NULL)
2276 free(sc->calibcmd[idx].buf, M_DEVBUF); 2276 free(sc->calibcmd[idx].buf, M_DEVBUF);
2277 sc->calibcmd[idx].buf = malloc(len, M_DEVBUF, M_NOWAIT); 2277 sc->calibcmd[idx].buf = malloc(len, M_DEVBUF, M_NOWAIT);
2278 if (sc->calibcmd[idx].buf == NULL) { 2278 if (sc->calibcmd[idx].buf == NULL) {
2279 DPRINTF(("not enough memory for calibration result %d\n", 2279 DPRINTF(("not enough memory for calibration result %d\n",
2280 calib->code)); 2280 calib->code));
2281 return; 2281 return;
2282 } 2282 }
2283 DPRINTF(("saving calibration result code=%d len=%d\n", 2283 DPRINTF(("saving calibration result code=%d len=%d\n",
2284 calib->code, len)); 2284 calib->code, len));
2285 sc->calibcmd[idx].len = len; 2285 sc->calibcmd[idx].len = len;
2286 memcpy(sc->calibcmd[idx].buf, calib, len); 2286 memcpy(sc->calibcmd[idx].buf, calib, len);
2287} 2287}
2288 2288
2289/* 2289/*
2290 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification. 2290 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
2291 * The latter is sent by the firmware after each received beacon. 2291 * The latter is sent by the firmware after each received beacon.
2292 */ 2292 */
2293static void 2293static void
2294iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc, 2294iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2295 struct iwn_rx_data *data) 2295 struct iwn_rx_data *data)
2296{ 2296{
2297 struct iwn_ops *ops = &sc->ops; 2297 struct iwn_ops *ops = &sc->ops;
2298 struct ieee80211com *ic = &sc->sc_ic; 2298 struct ieee80211com *ic = &sc->sc_ic;
2299 struct iwn_calib_state *calib = &sc->calib; 2299 struct iwn_calib_state *calib = &sc->calib;
2300 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1); 2300 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
2301 int temp; 2301 int temp;
2302 2302
2303 /* Ignore statistics received during a scan. */ 2303 /* Ignore statistics received during a scan. */
2304 if (ic->ic_state != IEEE80211_S_RUN) 2304 if (ic->ic_state != IEEE80211_S_RUN)
2305 return; 2305 return;
2306 2306
2307 bus_dmamap_sync(sc->sc_dmat, data->map, sizeof (*desc), 2307 bus_dmamap_sync(sc->sc_dmat, data->map, sizeof (*desc),
2308 sizeof (*stats), BUS_DMASYNC_POSTREAD); 2308 sizeof (*stats), BUS_DMASYNC_POSTREAD);
2309 2309
2310 DPRINTFN(3, ("received statistics (cmd=%d)\n", desc->type)); 2310 DPRINTFN(3, ("received statistics (cmd=%d)\n", desc->type));
2311 sc->calib_cnt = 0; /* Reset TX power calibration timeout. */ 2311 sc->calib_cnt = 0; /* Reset TX power calibration timeout. */
2312 2312
2313 /* Test if temperature has changed. */ 2313 /* Test if temperature has changed. */
2314 if (stats->general.temp != sc->rawtemp) { 2314 if (stats->general.temp != sc->rawtemp) {
2315 /* Convert "raw" temperature to degC. */ 2315 /* Convert "raw" temperature to degC. */
2316 sc->rawtemp = stats->general.temp; 2316 sc->rawtemp = stats->general.temp;
2317 temp = ops->get_temperature(sc); 2317 temp = ops->get_temperature(sc);
2318 DPRINTFN(2, ("temperature=%dC\n", temp)); 2318 DPRINTFN(2, ("temperature=%dC\n", temp));
2319 2319
2320 /* Update TX power if need be (4965AGN only). */ 2320 /* Update TX power if need be (4965AGN only). */
2321 if (sc->hw_type == IWN_HW_REV_TYPE_4965) 2321 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
2322 iwn4965_power_calibration(sc, temp); 2322 iwn4965_power_calibration(sc, temp);
2323 } 2323 }
2324 2324
2325 if (desc->type != IWN_BEACON_STATISTICS) 2325 if (desc->type != IWN_BEACON_STATISTICS)
2326 return; /* Reply to a statistics request. */ 2326 return; /* Reply to a statistics request. */
2327 2327
2328 sc->noise = iwn_get_noise(&stats->rx.general); 2328 sc->noise = iwn_get_noise(&stats->rx.general);
2329 2329
2330 /* Test that RSSI and noise are present in stats report. */ 2330 /* Test that RSSI and noise are present in stats report. */
2331 if (le32toh(stats->rx.general.flags) != 1) { 2331 if (le32toh(stats->rx.general.flags) != 1) {
2332 DPRINTF(("received statistics without RSSI\n")); 2332 DPRINTF(("received statistics without RSSI\n"));
2333 return; 2333 return;
2334 } 2334 }
2335 2335
2336 /* 2336 /*
2337 * XXX Differential gain calibration makes the 6005 firmware 2337 * XXX Differential gain calibration makes the 6005 firmware
2338 * crap out, so skip it for now. This effectively disables 2338 * crap out, so skip it for now. This effectively disables
2339 * sensitivity tuning as well. 2339 * sensitivity tuning as well.
2340 */ 2340 */
2341 if (sc->hw_type == IWN_HW_REV_TYPE_6005) 2341 if (sc->hw_type == IWN_HW_REV_TYPE_6005)
2342 return; 2342 return;
2343 2343
2344 if (calib->state == IWN_CALIB_STATE_ASSOC) 2344 if (calib->state == IWN_CALIB_STATE_ASSOC)
2345 iwn_collect_noise(sc, &stats->rx.general); 2345 iwn_collect_noise(sc, &stats->rx.general);
2346 else if (calib->state == IWN_CALIB_STATE_RUN) 2346 else if (calib->state == IWN_CALIB_STATE_RUN)
2347 iwn_tune_sensitivity(sc, &stats->rx); 2347 iwn_tune_sensitivity(sc, &stats->rx);
2348} 2348}
2349 2349
2350/* 2350/*
2351 * Process a TX_DONE firmware notification. Unfortunately, the 4965AGN 2351 * Process a TX_DONE firmware notification. Unfortunately, the 4965AGN
2352 * and 5000 adapters have different incompatible TX status formats. 2352 * and 5000 adapters have different incompatible TX status formats.
2353 */ 2353 */
2354static void 2354static void
2355iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, 2355iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2356 struct iwn_rx_data *data) 2356 struct iwn_rx_data *data)
2357{ 2357{
2358 struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1); 2358 struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1);
2359 2359
2360 bus_dmamap_sync(sc->sc_dmat, data->map, sizeof (*desc), 2360 bus_dmamap_sync(sc->sc_dmat, data->map, sizeof (*desc),
2361 sizeof (*stat), BUS_DMASYNC_POSTREAD); 2361 sizeof (*stat), BUS_DMASYNC_POSTREAD);
2362 iwn_tx_done(sc, desc, stat->ackfailcnt, le32toh(stat->status) & 0xff); 2362 iwn_tx_done(sc, desc, stat->ackfailcnt, le32toh(stat->status) & 0xff);
2363} 2363}
2364 2364
2365static void 2365static void
2366iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, 2366iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2367 struct iwn_rx_data *data) 2367 struct iwn_rx_data *data)
2368{ 2368{
2369 struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1); 2369 struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1);
2370 2370
2371#ifdef notyet 2371#ifdef notyet
2372 /* Reset TX scheduler slot. */ 2372 /* Reset TX scheduler slot. */
2373 iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx); 2373 iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx);
2374#endif 2374#endif
2375 2375
2376 bus_dmamap_sync(sc->sc_dmat, data->map, sizeof (*desc), 2376 bus_dmamap_sync(sc->sc_dmat, data->map, sizeof (*desc),
2377 sizeof (*stat), BUS_DMASYNC_POSTREAD); 2377 sizeof (*stat), BUS_DMASYNC_POSTREAD);
2378 iwn_tx_done(sc, desc, stat->ackfailcnt, le16toh(stat->status) & 0xff); 2378 iwn_tx_done(sc, desc, stat->ackfailcnt, le16toh(stat->status) & 0xff);
2379} 2379}
2380 2380
2381/* 2381/*
2382 * Adapter-independent backend for TX_DONE firmware notifications. 2382 * Adapter-independent backend for TX_DONE firmware notifications.
2383 */ 2383 */
2384static void 2384static void
2385iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int ackfailcnt, 2385iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int ackfailcnt,
2386 uint8_t status) 2386 uint8_t status)
2387{ 2387{
2388 struct ieee80211com *ic = &sc->sc_ic; 2388 struct ieee80211com *ic = &sc->sc_ic;
2389 struct ifnet *ifp = ic->ic_ifp; 2389 struct ifnet *ifp = ic->ic_ifp;
2390 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf]; 2390 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
2391 struct iwn_tx_data *data = &ring->data[desc->idx]; 2391 struct iwn_tx_data *data = &ring->data[desc->idx];
2392 struct iwn_node *wn = (struct iwn_node *)data->ni; 2392 struct iwn_node *wn = (struct iwn_node *)data->ni;
2393 int s; 2393 int s;
2394 2394
2395 s = splnet(); 2395 s = splnet();
2396 2396
2397 /* Update rate control statistics. */ 2397 /* Update rate control statistics. */
2398 wn->amn.amn_txcnt++; 2398 wn->amn.amn_txcnt++;
2399 if (ackfailcnt > 0) 2399 if (ackfailcnt > 0)
2400 wn->amn.amn_retrycnt++; 2400 wn->amn.amn_retrycnt++;
2401 2401
2402 if (status != 1 && status != 2) 2402 if (status != 1 && status != 2)
2403 ifp->if_oerrors++; 2403 ifp->if_oerrors++;
2404 else 2404 else
2405 ifp->if_opackets++; 2405 ifp->if_opackets++;
2406 2406
2407 /* Unmap and free mbuf. */ 2407 /* Unmap and free mbuf. */
2408 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 2408 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
2409 BUS_DMASYNC_POSTWRITE); 2409 BUS_DMASYNC_POSTWRITE);
2410 bus_dmamap_unload(sc->sc_dmat, data->map); 2410 bus_dmamap_unload(sc->sc_dmat, data->map);
2411 m_freem(data->m); 2411 m_freem(data->m);
2412 data->m = NULL; 2412 data->m = NULL;
2413 ieee80211_free_node(data->ni); 2413 ieee80211_free_node(data->ni);
2414 data->ni = NULL; 2414 data->ni = NULL;
2415 2415
2416 sc->sc_tx_timer = 0; 2416 sc->sc_tx_timer = 0;
2417 if (--ring->queued < IWN_TX_RING_LOMARK) { 2417 if (--ring->queued < IWN_TX_RING_LOMARK) {
2418 sc->qfullmsk &= ~(1 << ring->qid); 2418 sc->qfullmsk &= ~(1 << ring->qid);
2419 if (sc->qfullmsk == 0 && (ifp->if_flags & IFF_OACTIVE)) { 2419 if (sc->qfullmsk == 0 && (ifp->if_flags & IFF_OACTIVE)) {
2420 ifp->if_flags &= ~IFF_OACTIVE; 2420 ifp->if_flags &= ~IFF_OACTIVE;
2421 iwn_start(ifp); 2421 iwn_start(ifp);
2422 } 2422 }
2423 } 2423 }
2424 2424
2425 splx(s); 2425 splx(s);
2426} 2426}
2427 2427
2428/* 2428/*
2429 * Process a "command done" firmware notification. This is where we wakeup 2429 * Process a "command done" firmware notification. This is where we wakeup
2430 * processes waiting for a synchronous command completion. 2430 * processes waiting for a synchronous command completion.
2431 */ 2431 */
2432static void 2432static void
2433iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc) 2433iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
2434{ 2434{
2435 struct iwn_tx_ring *ring = &sc->txq[4]; 2435 struct iwn_tx_ring *ring = &sc->txq[4];
2436 struct iwn_tx_data *data; 2436 struct iwn_tx_data *data;
2437 2437
2438 if ((desc->qid & 0xf) != 4) 2438 if ((desc->qid & 0xf) != 4)
2439 return; /* Not a command ack. */ 2439 return; /* Not a command ack. */
2440 2440
2441 data = &ring->data[desc->idx]; 2441 data = &ring->data[desc->idx];
2442 2442
2443 /* If the command was mapped in an mbuf, free it. */ 2443 /* If the command was mapped in an mbuf, free it. */
2444 if (data->m != NULL) { 2444 if (data->m != NULL) {
2445 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 2445 bus_dmamap_sync(sc->sc_dmat, data->map, 0,
2446 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 2446 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
2447 bus_dmamap_unload(sc->sc_dmat, data->map); 2447 bus_dmamap_unload(sc->sc_dmat, data->map);
2448 m_freem(data->m); 2448 m_freem(data->m);
2449 data->m = NULL; 2449 data->m = NULL;
2450 } 2450 }
2451 wakeup(&ring->desc[desc->idx]); 2451 wakeup(&ring->desc[desc->idx]);
2452} 2452}
2453 2453
2454/* 2454/*
2455 * Process an INT_FH_RX or INT_SW_RX interrupt. 2455 * Process an INT_FH_RX or INT_SW_RX interrupt.
2456 */ 2456 */
2457static void 2457static void
2458iwn_notif_intr(struct iwn_softc *sc) 2458iwn_notif_intr(struct iwn_softc *sc)
2459{ 2459{
2460 struct iwn_ops *ops = &sc->ops; 2460 struct iwn_ops *ops = &sc->ops;
2461 struct ieee80211com *ic = &sc->sc_ic; 2461 struct ieee80211com *ic = &sc->sc_ic;
2462 struct ifnet *ifp = ic->ic_ifp; 2462 struct ifnet *ifp = ic->ic_ifp;
2463 uint16_t hw; 2463 uint16_t hw;
2464 int s; 2464 int s;
2465 2465
2466 bus_dmamap_sync(sc->sc_dmat, sc->rxq.stat_dma.map, 2466 bus_dmamap_sync(sc->sc_dmat, sc->rxq.stat_dma.map,
2467 0, sc->rxq.stat_dma.size, BUS_DMASYNC_POSTREAD); 2467 0, sc->rxq.stat_dma.size, BUS_DMASYNC_POSTREAD);
2468 2468
2469 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff; 2469 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;
2470 while (sc->rxq.cur != hw) { 2470 while (sc->rxq.cur != hw) {
2471 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur]; 2471 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];
2472 struct iwn_rx_desc *desc; 2472 struct iwn_rx_desc *desc;
2473 2473
2474 bus_dmamap_sync(sc->sc_dmat, data->map, 0, sizeof (*desc), 2474 bus_dmamap_sync(sc->sc_dmat, data->map, 0, sizeof (*desc),
2475 BUS_DMASYNC_POSTREAD); 2475 BUS_DMASYNC_POSTREAD);
2476 desc = mtod(data->m, struct iwn_rx_desc *); 2476 desc = mtod(data->m, struct iwn_rx_desc *);
2477 2477
2478 DPRINTFN(4, ("notification qid=%d idx=%d flags=%x type=%d\n", 2478 DPRINTFN(4, ("notification qid=%d idx=%d flags=%x type=%d\n",
2479 desc->qid & 0xf, desc->idx, desc->flags, desc->type)); 2479 desc->qid & 0xf, desc->idx, desc->flags, desc->type));
2480 2480
2481 if (!(desc->qid & 0x80)) /* Reply to a command. */ 2481 if (!(desc->qid & 0x80)) /* Reply to a command. */
2482 iwn_cmd_done(sc, desc); 2482 iwn_cmd_done(sc, desc);
2483 2483
2484 switch (desc->type) { 2484 switch (desc->type) {
2485 case IWN_RX_PHY: 2485 case IWN_RX_PHY:
2486 iwn_rx_phy(sc, desc, data); 2486 iwn_rx_phy(sc, desc, data);
2487 break; 2487 break;
2488 2488
2489 case IWN_RX_DONE: /* 4965AGN only. */ 2489 case IWN_RX_DONE: /* 4965AGN only. */
2490 case IWN_MPDU_RX_DONE: 2490 case IWN_MPDU_RX_DONE:
2491 /* An 802.11 frame has been received. */ 2491 /* An 802.11 frame has been received. */
2492 iwn_rx_done(sc, desc, data); 2492 iwn_rx_done(sc, desc, data);
2493 break; 2493 break;
2494#ifndef IEEE80211_NO_HT 2494#ifndef IEEE80211_NO_HT
2495 case IWN_RX_COMPRESSED_BA: 2495 case IWN_RX_COMPRESSED_BA:
2496 /* A Compressed BlockAck has been received. */ 2496 /* A Compressed BlockAck has been received. */
2497 iwn_rx_compressed_ba(sc, desc, data); 2497 iwn_rx_compressed_ba(sc, desc, data);
2498 break; 2498 break;
2499#endif 2499#endif
2500 case IWN_TX_DONE: 2500 case IWN_TX_DONE:
2501 /* An 802.11 frame has been transmitted. */ 2501 /* An 802.11 frame has been transmitted. */
2502 ops->tx_done(sc, desc, data); 2502 ops->tx_done(sc, desc, data);
2503 break; 2503 break;
2504 2504
2505 case IWN_RX_STATISTICS: 2505 case IWN_RX_STATISTICS:
2506 case IWN_BEACON_STATISTICS: 2506 case IWN_BEACON_STATISTICS:
2507 iwn_rx_statistics(sc, desc, data); 2507 iwn_rx_statistics(sc, desc, data);
2508 break; 2508 break;
2509 2509
2510 case IWN_BEACON_MISSED: 2510 case IWN_BEACON_MISSED:
2511 { 2511 {
2512 struct iwn_beacon_missed *miss = 2512 struct iwn_beacon_missed *miss =
2513 (struct iwn_beacon_missed *)(desc + 1); 2513 (struct iwn_beacon_missed *)(desc + 1);
2514 2514
2515 bus_dmamap_sync(sc->sc_dmat, data->map, sizeof (*desc), 2515 bus_dmamap_sync(sc->sc_dmat, data->map, sizeof (*desc),
2516 sizeof (*miss), BUS_DMASYNC_POSTREAD); 2516 sizeof (*miss), BUS_DMASYNC_POSTREAD);
2517 /* 2517 /*
2518 * If more than 5 consecutive beacons are missed, 2518 * If more than 5 consecutive beacons are missed,
2519 * reinitialize the sensitivity state machine. 2519 * reinitialize the sensitivity state machine.
2520 */ 2520 */
2521 DPRINTF(("beacons missed %d/%d\n", 2521 DPRINTF(("beacons missed %d/%d\n",
2522 le32toh(miss->consecutive), le32toh(miss->total))); 2522 le32toh(miss->consecutive), le32toh(miss->total)));
2523 if (ic->ic_state == IEEE80211_S_RUN && 2523 if (ic->ic_state == IEEE80211_S_RUN &&
2524 le32toh(miss->consecutive) > 5) 2524 le32toh(miss->consecutive) > 5)
2525 (void)iwn_init_sensitivity(sc); 2525 (void)iwn_init_sensitivity(sc);
2526 break; 2526 break;
2527 } 2527 }
2528 case IWN_UC_READY: 2528 case IWN_UC_READY:
2529 { 2529 {
2530 struct iwn_ucode_info *uc = 2530 struct iwn_ucode_info *uc =
2531 (struct iwn_ucode_info *)(desc + 1); 2531 (struct iwn_ucode_info *)(desc + 1);
2532 2532
2533 /* The microcontroller is ready. */ 2533 /* The microcontroller is ready. */
2534 bus_dmamap_sync(sc->sc_dmat, data->map, sizeof (*desc), 2534 bus_dmamap_sync(sc->sc_dmat, data->map, sizeof (*desc),
2535 sizeof (*uc), BUS_DMASYNC_POSTREAD); 2535 sizeof (*uc), BUS_DMASYNC_POSTREAD);
2536 DPRINTF(("microcode alive notification version=%d.%d " 2536 DPRINTF(("microcode alive notification version=%d.%d "
2537 "subtype=%x alive=%x\n", uc->major, uc->minor, 2537 "subtype=%x alive=%x\n", uc->major, uc->minor,
2538 uc->subtype, le32toh(uc->valid))); 2538 uc->subtype, le32toh(uc->valid)));
2539 2539
2540 if (le32toh(uc->valid) != 1) { 2540 if (le32toh(uc->valid) != 1) {
2541 aprint_error_dev(sc->sc_dev, 2541 aprint_error_dev(sc->sc_dev,
2542 "microcontroller initialization " 2542 "microcontroller initialization "
2543 "failed\n"); 2543 "failed\n");
2544 break; 2544 break;
2545 } 2545 }
2546 if (uc->subtype == IWN_UCODE_INIT) { 2546 if (uc->subtype == IWN_UCODE_INIT) {
2547 /* Save microcontroller report. */ 2547 /* Save microcontroller report. */
2548 memcpy(&sc->ucode_info, uc, sizeof (*uc)); 2548 memcpy(&sc->ucode_info, uc, sizeof (*uc));
2549 } 2549 }
2550 /* Save the address of the error log in SRAM. */ 2550 /* Save the address of the error log in SRAM. */
2551 sc->errptr = le32toh(uc->errptr); 2551 sc->errptr = le32toh(uc->errptr);
2552 break; 2552 break;
2553 } 2553 }
2554 case IWN_STATE_CHANGED: 2554 case IWN_STATE_CHANGED:
2555 { 2555 {
2556 uint32_t *status = (uint32_t *)(desc + 1); 2556 uint32_t *status = (uint32_t *)(desc + 1);
2557 2557
2558 /* Enabled/disabled notification. */ 2558 /* Enabled/disabled notification. */
2559 bus_dmamap_sync(sc->sc_dmat, data->map, sizeof (*desc), 2559 bus_dmamap_sync(sc->sc_dmat, data->map, sizeof (*desc),
2560 sizeof (*status), BUS_DMASYNC_POSTREAD); 2560 sizeof (*status), BUS_DMASYNC_POSTREAD);
2561 DPRINTF(("state changed to %x\n", le32toh(*status))); 2561 DPRINTF(("state changed to %x\n", le32toh(*status)));
2562 2562
2563 if (le32toh(*status) & 1) { 2563 if (le32toh(*status) & 1) {
2564 /* The radio button has to be pushed. */ 2564 /* The radio button has to be pushed. */
2565 aprint_error_dev(sc->sc_dev, 2565 aprint_error_dev(sc->sc_dev,
2566 "Radio transmitter is off\n"); 2566 "Radio transmitter is off\n");
2567 /* Turn the interface down. */ 2567 /* Turn the interface down. */
2568 s = splnet(); 2568 s = splnet();
2569 ifp->if_flags &= ~IFF_UP; 2569 ifp->if_flags &= ~IFF_UP;
2570 iwn_stop(ifp, 1); 2570 iwn_stop(ifp, 1);