Use unsigned to avoid undefined behavior. Found by kUBSan.diff -r1.9 -r1.10 src/sys/dev/ic/am79900reg.h
(msaitoh)
--- src/sys/dev/ic/am79900reg.h 2008/04/28 20:23:49 1.9
+++ src/sys/dev/ic/am79900reg.h 2019/10/11 14:22:46 1.10
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: am79900reg.h,v 1.9 2008/04/28 20:23:49 martin Exp $ */ | 1 | /* $NetBSD: am79900reg.h,v 1.10 2019/10/11 14:22:46 msaitoh Exp $ */ | |
2 | 2 | |||
3 | /*- | 3 | /*- | |
4 | * Copyright (c) 1998 The NetBSD Foundation, Inc. | 4 | * Copyright (c) 1998 The NetBSD Foundation, Inc. | |
5 | * All rights reserved. | 5 | * All rights reserved. | |
6 | * | 6 | * | |
7 | * This code is derived from software contributed to The NetBSD Foundation | 7 | * This code is derived from software contributed to The NetBSD Foundation | |
8 | * by Charles M. Hannum. | 8 | * by Charles M. Hannum. | |
9 | * | 9 | * | |
10 | * Redistribution and use in source and binary forms, with or without | 10 | * Redistribution and use in source and binary forms, with or without | |
11 | * modification, are permitted provided that the following conditions | 11 | * modification, are permitted provided that the following conditions | |
12 | * are met: | 12 | * are met: | |
13 | * 1. Redistributions of source code must retain the above copyright | 13 | * 1. Redistributions of source code must retain the above copyright | |
14 | * notice, this list of conditions and the following disclaimer. | 14 | * notice, this list of conditions and the following disclaimer. | |
@@ -86,42 +86,42 @@ struct letmd { | @@ -86,42 +86,42 @@ struct letmd { | |||
86 | /* | 86 | /* | |
87 | * Initialization block | 87 | * Initialization block | |
88 | */ | 88 | */ | |
89 | struct leinit { | 89 | struct leinit { | |
90 | u_int32_t init_mode; /* +0x0000 */ | 90 | u_int32_t init_mode; /* +0x0000 */ | |
91 | u_int32_t init_padr[2]; /* +0x0002 */ | 91 | u_int32_t init_padr[2]; /* +0x0002 */ | |
92 | u_int16_t init_ladrf[4]; /* +0x0008 */ | 92 | u_int16_t init_ladrf[4]; /* +0x0008 */ | |
93 | u_int32_t init_rdra; /* +0x0010 */ | 93 | u_int32_t init_rdra; /* +0x0010 */ | |
94 | u_int32_t init_tdra; /* +0x0014 */ | 94 | u_int32_t init_tdra; /* +0x0014 */ | |
95 | int32_t pad; /* Pad to 16 shorts */ | 95 | int32_t pad; /* Pad to 16 shorts */ | |
96 | }; | 96 | }; | |
97 | 97 | |||
98 | /* Receive message descriptor 1 (rmd1_bits) */ | 98 | /* Receive message descriptor 1 (rmd1_bits) */ | |
99 | #define LE_R1_OWN (1<<31) /* LANCE owns the packet */ | 99 | #define LE_R1_OWN (1U<<31) /* LANCE owns the packet */ | |
100 | #define LE_R1_ERR (1<<30) /* error summary */ | 100 | #define LE_R1_ERR (1<<30) /* error summary */ | |
101 | #define LE_R1_FRAM (1<<29) /* framing error */ | 101 | #define LE_R1_FRAM (1<<29) /* framing error */ | |
102 | #define LE_R1_OFLO (1<<28) /* overflow error */ | 102 | #define LE_R1_OFLO (1<<28) /* overflow error */ | |
103 | #define LE_R1_CRC (1<<27) /* CRC error */ | 103 | #define LE_R1_CRC (1<<27) /* CRC error */ | |
104 | #define LE_R1_BUFF (1<<26) /* buffer error */ | 104 | #define LE_R1_BUFF (1<<26) /* buffer error */ | |
105 | #define LE_R1_STP (1<<25) /* start of packet */ | 105 | #define LE_R1_STP (1<<25) /* start of packet */ | |
106 | #define LE_R1_ENP (1<<24) /* end of packet */ | 106 | #define LE_R1_ENP (1<<24) /* end of packet */ | |
107 | #define LE_R1_ONES (0xf<<12) /* must be ones */ | 107 | #define LE_R1_ONES (0xf<<12) /* must be ones */ | |
108 | #define LE_R1_BCNT_MASK (0xfff) /* byte count mask */ | 108 | #define LE_R1_BCNT_MASK (0xfff) /* byte count mask */ | |
109 | 109 | |||
110 | #define LE_R1_BITS \ | 110 | #define LE_R1_BITS \ | |
111 | "\20\40OWN\37ERR\36FRAM\35OFLO\34CRC\33BUFF\32STP\31ENP" | 111 | "\20\40OWN\37ERR\36FRAM\35OFLO\34CRC\33BUFF\32STP\31ENP" | |
112 | 112 | |||
113 | /* Transmit message descriptor 1 (tmd1_bits) */ | 113 | /* Transmit message descriptor 1 (tmd1_bits) */ | |
114 | #define LE_T1_OWN (1<<31) /* LANCE owns the packet */ | 114 | #define LE_T1_OWN (1U<<31) /* LANCE owns the packet */ | |
115 | #define LE_T1_ERR (1<<30) /* error summary */ | 115 | #define LE_T1_ERR (1<<30) /* error summary */ | |
116 | #define LE_T1_ADD_FCS (1<<29) /* add FCS (PCnet-PCI) */ | 116 | #define LE_T1_ADD_FCS (1<<29) /* add FCS (PCnet-PCI) */ | |
117 | #define LE_T1_NO_FCS (1<<29) /* no FCS (ILACC) */ | 117 | #define LE_T1_NO_FCS (1<<29) /* no FCS (ILACC) */ | |
118 | #define LE_T1_MORE (1<<28) /* multiple collisions */ | 118 | #define LE_T1_MORE (1<<28) /* multiple collisions */ | |
119 | #define LE_T1_LTINT (1<<28) /* transmit interrupt (if LTINTEN) */ | 119 | #define LE_T1_LTINT (1<<28) /* transmit interrupt (if LTINTEN) */ | |
120 | #define LE_T1_ONE (1<<27) /* single collision */ | 120 | #define LE_T1_ONE (1<<27) /* single collision */ | |
121 | #define LE_T1_DEF (1<<26) /* deferred transmit */ | 121 | #define LE_T1_DEF (1<<26) /* deferred transmit */ | |
122 | #define LE_T1_STP (1<<25) /* start of packet */ | 122 | #define LE_T1_STP (1<<25) /* start of packet */ | |
123 | #define LE_T1_ENP (1<<24) /* end of packet */ | 123 | #define LE_T1_ENP (1<<24) /* end of packet */ | |
124 | #define LE_T1_ONES (0xf<<12) /* must be ones */ | 124 | #define LE_T1_ONES (0xf<<12) /* must be ones */ | |
125 | #define LE_T1_BCNT_MASK (0xfff) /* byte count mask */ | 125 | #define LE_T1_BCNT_MASK (0xfff) /* byte count mask */ | |
126 | 126 | |||
127 | #define LE_T1_BITS \ | 127 | #define LE_T1_BITS \ |
--- src/sys/dev/pci/if_pcn.c 2019/05/28 07:41:49 1.71
+++ src/sys/dev/pci/if_pcn.c 2019/10/11 14:22:46 1.72
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: if_pcn.c,v 1.71 2019/05/28 07:41:49 msaitoh Exp $ */ | 1 | /* $NetBSD: if_pcn.c,v 1.72 2019/10/11 14:22:46 msaitoh Exp $ */ | |
2 | 2 | |||
3 | /* | 3 | /* | |
4 | * Copyright (c) 2001 Wasabi Systems, Inc. | 4 | * Copyright (c) 2001 Wasabi Systems, Inc. | |
5 | * All rights reserved. | 5 | * All rights reserved. | |
6 | * | 6 | * | |
7 | * Written by Jason R. Thorpe for Wasabi Systems, Inc. | 7 | * Written by Jason R. Thorpe for Wasabi Systems, Inc. | |
8 | * | 8 | * | |
9 | * Redistribution and use in source and binary forms, with or without | 9 | * Redistribution and use in source and binary forms, with or without | |
10 | * modification, are permitted provided that the following conditions | 10 | * modification, are permitted provided that the following conditions | |
11 | * are met: | 11 | * are met: | |
12 | * 1. Redistributions of source code must retain the above copyright | 12 | * 1. Redistributions of source code must retain the above copyright | |
13 | * notice, this list of conditions and the following disclaimer. | 13 | * notice, this list of conditions and the following disclaimer. | |
14 | * 2. Redistributions in binary form must reproduce the above copyright | 14 | * 2. Redistributions in binary form must reproduce the above copyright | |
@@ -55,27 +55,27 @@ | @@ -55,27 +55,27 @@ | |||
55 | * Ethernet Controller with Integrated PHY | 55 | * Ethernet Controller with Integrated PHY | |
56 | * | 56 | * | |
57 | * This also supports the virtual PCnet-PCI Ethernet interface found | 57 | * This also supports the virtual PCnet-PCI Ethernet interface found | |
58 | * in VMware. | 58 | * in VMware. | |
59 | * | 59 | * | |
60 | * TODO: | 60 | * TODO: | |
61 | * | 61 | * | |
62 | * * Split this into bus-specific and bus-independent portions. | 62 | * * Split this into bus-specific and bus-independent portions. | |
63 | * The core could also be used for the ILACC (Am79900) 32-bit | 63 | * The core could also be used for the ILACC (Am79900) 32-bit | |
64 | * Ethernet chip (XXX only if we use an ILACC-compatible SWSTYLE). | 64 | * Ethernet chip (XXX only if we use an ILACC-compatible SWSTYLE). | |
65 | */ | 65 | */ | |
66 | 66 | |||
67 | #include <sys/cdefs.h> | 67 | #include <sys/cdefs.h> | |
68 | __KERNEL_RCSID(0, "$NetBSD: if_pcn.c,v 1.71 2019/05/28 07:41:49 msaitoh Exp $"); | 68 | __KERNEL_RCSID(0, "$NetBSD: if_pcn.c,v 1.72 2019/10/11 14:22:46 msaitoh Exp $"); | |
69 | 69 | |||
70 | #include <sys/param.h> | 70 | #include <sys/param.h> | |
71 | #include <sys/systm.h> | 71 | #include <sys/systm.h> | |
72 | #include <sys/callout.h> | 72 | #include <sys/callout.h> | |
73 | #include <sys/mbuf.h> | 73 | #include <sys/mbuf.h> | |
74 | #include <sys/malloc.h> | 74 | #include <sys/malloc.h> | |
75 | #include <sys/kernel.h> | 75 | #include <sys/kernel.h> | |
76 | #include <sys/socket.h> | 76 | #include <sys/socket.h> | |
77 | #include <sys/ioctl.h> | 77 | #include <sys/ioctl.h> | |
78 | #include <sys/errno.h> | 78 | #include <sys/errno.h> | |
79 | #include <sys/device.h> | 79 | #include <sys/device.h> | |
80 | #include <sys/queue.h> | 80 | #include <sys/queue.h> | |
81 | 81 | |||
@@ -1698,32 +1698,33 @@ pcn_init(struct ifnet *ifp) | @@ -1698,32 +1698,33 @@ pcn_init(struct ifnet *ifp) | |||
1698 | */ | 1698 | */ | |
1699 | pcn_bcr_write(sc, LE_BCR32, | 1699 | pcn_bcr_write(sc, LE_BCR32, | |
1700 | pcn_bcr_read(sc, LE_BCR32) | LE_B32_DANAS); | 1700 | pcn_bcr_read(sc, LE_BCR32) | LE_B32_DANAS); | |
1701 | } | 1701 | } | |
1702 | 1702 | |||
1703 | /* | 1703 | /* | |
1704 | * Set the Tx and Rx descriptor ring addresses in the init | 1704 | * Set the Tx and Rx descriptor ring addresses in the init | |
1705 | * block, the TLEN and RLEN other fields of the init block | 1705 | * block, the TLEN and RLEN other fields of the init block | |
1706 | * MODE register. | 1706 | * MODE register. | |
1707 | */ | 1707 | */ | |
1708 | sc->sc_initblock.init_rdra = htole32(PCN_CDRXADDR(sc, 0)); | 1708 | sc->sc_initblock.init_rdra = htole32(PCN_CDRXADDR(sc, 0)); | |
1709 | sc->sc_initblock.init_tdra = htole32(PCN_CDTXADDR(sc, 0)); | 1709 | sc->sc_initblock.init_tdra = htole32(PCN_CDTXADDR(sc, 0)); | |
1710 | sc->sc_initblock.init_mode = htole32(sc->sc_mode | | 1710 | sc->sc_initblock.init_mode = htole32(sc->sc_mode | | |
1711 | ((ffs(PCN_NTXDESC) - 1) << 28) | | 1711 | (((uint32_t)ffs(PCN_NTXDESC) - 1) << 28) | | |
1712 | ((ffs(PCN_NRXDESC) - 1) << 20)); | 1712 | ((ffs(PCN_NRXDESC) - 1) << 20)); | |
1713 | 1713 | |||
1714 | /* Set the station address in the init block. */ | 1714 | /* Set the station address in the init block. */ | |
1715 | sc->sc_initblock.init_padr[0] = htole32(enaddr[0] | | 1715 | sc->sc_initblock.init_padr[0] = htole32(enaddr[0] | | |
1716 | (enaddr[1] << 8) | (enaddr[2] << 16) | (enaddr[3] << 24)); | 1716 | (enaddr[1] << 8) | (enaddr[2] << 16) | | |
1717 | ((uint32_t)enaddr[3] << 24)); | |||
1717 | sc->sc_initblock.init_padr[1] = htole32(enaddr[4] | | 1718 | sc->sc_initblock.init_padr[1] = htole32(enaddr[4] | | |
1718 | (enaddr[5] << 8)); | 1719 | (enaddr[5] << 8)); | |
1719 | 1720 | |||
1720 | /* Set the multicast filter in the init block. */ | 1721 | /* Set the multicast filter in the init block. */ | |
1721 | pcn_set_filter(sc); | 1722 | pcn_set_filter(sc); | |
1722 | 1723 | |||
1723 | /* Initialize CSR3. */ | 1724 | /* Initialize CSR3. */ | |
1724 | pcn_csr_write(sc, LE_CSR3, LE_C3_MISSM | LE_C3_IDONM | LE_C3_DXSUFLO); | 1725 | pcn_csr_write(sc, LE_CSR3, LE_C3_MISSM | LE_C3_IDONM | LE_C3_DXSUFLO); | |
1725 | 1726 | |||
1726 | /* Initialize CSR4. */ | 1727 | /* Initialize CSR4. */ | |
1727 | pcn_csr_write(sc, LE_CSR4, LE_C4_DMAPLUS | LE_C4_APAD_XMT | | 1728 | pcn_csr_write(sc, LE_CSR4, LE_C4_DMAPLUS | LE_C4_APAD_XMT | | |
1728 | LE_C4_MFCOM | LE_C4_RCVCCOM | LE_C4_TXSTRTM); | 1729 | LE_C4_MFCOM | LE_C4_RCVCCOM | LE_C4_TXSTRTM); | |
1729 | 1730 |