 @@ -1,14 +1,14 @@
-/* $NetBSD: sun50i_a64_ccu.c,v 1.13.2.1 2019/11/18 19:31:00 martin Exp $ */
+/* $NetBSD: sun50i_a64_ccu.c,v 1.13.2.2 2019/11/18 19:36:03 martin Exp $ */
 /*-
  * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -18,27 +18,27 @@
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: sun50i_a64_ccu.c,v 1.13.2.1 2019/11/18 19:31:00 martin Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun50i_a64_ccu.c,v 1.13.2.2 2019/11/18 19:36:03 martin Exp $");
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/device.h>
 #include <sys/systm.h>
 #include <dev/fdt/fdtvar.h>
 #include <arm/sunxi/sunxi_ccu.h>
 #include <arm/sunxi/sun50i_a64_ccu.h>
 #define	PLL_CPUX_CTRL_REG	0x000
 #define	PLL_AUDIO_CTRL_REG	0x008
 @@ -50,26 +50,28 @@ __KERNEL_RCSID(1, "$NetBSD: sun50i_a64_c
 #define	PLL_DE_CTRL_REG		0x048
 #define	AHB1_APB1_CFG_REG	0x054
 #define	APB2_CFG_REG		0x058
 #define	AHB2_CFG_REG		0x05c
 #define	BUS_CLK_GATING_REG0	0x060
 #define	BUS_CLK_GATING_REG1	0x064
 #define	BUS_CLK_GATING_REG2	0x068
 #define	BUS_CLK_GATING_REG3	0x06c
 #define	BUS_CLK_GATING_REG4	0x070
 #define	THS_CLK_REG		0x074
 #define	SDMMC0_CLK_REG		0x088
 #define	SDMMC1_CLK_REG		0x08c
 #define	SDMMC2_CLK_REG		0x090
 #define	SPI0_CLK_REG		0x0a0
 #define	SPI1_CLK_REG		0x0a4
 #define	I2SPCM0_CLK_REG		0x0b0
 #define	I2SPCM1_CLK_REG		0x0b4
 #define	I2SPCM2_CLK_REG		0x0b8
 #define	USBPHY_CFG_REG		0x0cc
 #define	DRAM_CFG_REG		0x0f4
 #define	MBUS_RST_REG		0x0fc
 #define	DE_CLK_REG		0x104
 #define	TCON1_CLK_REG		0x11c
 #define	AC_DIG_CLK_REG		0x140
 #define	HDMI_CLK_REG		0x150
 #define	HDMI_SLOW_CLK_REG	0x154
 #define	GPU_CLK_REG		0x1a0
 #define	BUS_SOFT_RST_REG0	0x2c0
 @@ -148,26 +150,27 @@ static struct sunxi_ccu_reset sun50i_a64
 	SUNXI_CCU_RESET(A64_RST_BUS_UART2, BUS_SOFT_RST_REG4, 18),
 	SUNXI_CCU_RESET(A64_RST_BUS_UART3, BUS_SOFT_RST_REG4, 19),
 };
 static const char *ahb1_parents[] = { "losc", "hosc", "axi", "pll_periph0" };
 static const char *ahb2_parents[] = { "ahb1", "pll_periph0" };
 static const char *apb1_parents[] = { "ahb1" };
 static const char *apb2_parents[] = { "losc", "hosc", "pll_periph0" };
 static const char *mmc_parents[] = { "hosc", "pll_periph0_2x", "pll_periph1_2x" };
 static const char *ths_parents[] = { "hosc", NULL, NULL, NULL };
 static const char *de_parents[] = { "pll_periph0_2x", "pll_de" };
 static const char *hdmi_parents[] = { "pll_video0", "pll_video1" };
 static const char *i2s_parents[] = { "pll_audio_8x", "pll_audio_4x", "pll_audio_2x", "pll_audio" };
 static const char *spi_parents[] = { "hosc", "pll_periph0", "pll_periph1", NULL };
 static const char *tcon1_parents[] = { "pll_video0", NULL, "pll_video1", NULL };
 static const char *gpu_parents[] = { "pll_gpu" };
 static const struct sunxi_ccu_nkmp_tbl sun50i_a64_cpux_table[] = {
 	{ 60000000, 9, 0, 0, 2 },
 	{ 66000000, 10, 0, 0, 2 },
 	{ 72000000, 11, 0, 0, 2 },
 	{ 78000000, 12, 0, 0, 2 },
 	{ 84000000, 13, 0, 0, 2 },
 	{ 90000000, 14, 0, 0, 2 },
 	{ 96000000, 15, 0, 0, 2 },
 	{ 102000000, 16, 0, 0, 2 },
 	{ 108000000, 17, 0, 0, 2 },
 @@ -250,26 +253,36 @@ static struct sunxi_ccu_clk sun50i_a64_c
 	    sun50i_a64_cpux_table,	/* table */
 	    SUNXI_CCU_NKMP_SCALE_CLOCK | SUNXI_CCU_NKMP_FACTOR_P_POW2),
 	SUNXI_CCU_NKMP(A64_CLK_PLL_PERIPH0, "pll_periph0", "hosc",
 	    PLL_PERIPH0_CTRL_REG,	/* reg */
 	    __BITS(12,8),		/* n */
 	    __BITS(5,4), 		/* k */
 ,				/* m */
 	    __BITS(17,16),		/* p */
 	    __BIT(31),			/* enable */
 	    SUNXI_CCU_NKMP_DIVIDE_BY_TWO),
 	SUNXI_CCU_FIXED_FACTOR(A64_CLK_PLL_PERIPH0_2X, "pll_periph0_2x", "pll_periph0", 1, 2),
 	SUNXI_CCU_NKMP(A64_CLK_PLL_PERIPH1, "pll_periph1", "hosc",
 	    PLL_PERIPH1_CTRL_REG,	/* reg */
 	    __BITS(12,8),		/* n */
 	    __BITS(5,4), 		/* k */
 ,				/* m */
 	    __BITS(17,16),		/* p */
 	    __BIT(31),			/* enable */
 	    SUNXI_CCU_NKMP_DIVIDE_BY_TWO),
 	SUNXI_CCU_FIXED_FACTOR(A64_CLK_PLL_PERIPH1_2X, "pll_periph1_2x", "pll_periph1", 1, 2),
 	SUNXI_CCU_NKMP_TABLE(A64_CLK_PLL_AUDIO_BASE, "pll_audio_base", "hosc",
 	    PLL_AUDIO_CTRL_REG,		/* reg */
 	    __BITS(14,8),		/* n */
 ,				/* k */
 	    __BITS(4,0),		/* m */
 	    __BITS(19,16),		/* p */
 	    __BIT(31),			/* enable */
 	    __BIT(28),			/* lock */
 	    sun50i_a64_ac_dig_table,	/* table */
 ),
 	SUNXI_CCU_FIXED_FACTOR(A64_CLK_PLL_AUDIO, "pll_audio", "pll_audio_base", 1, 1),
 	SUNXI_CCU_FIXED_FACTOR(A64_CLK_PLL_AUDIO_2X, "pll_audio_2x", "pll_audio_base", 1, 2),
 @@ -420,26 +433,41 @@ static struct sunxi_ccu_clk sun50i_a64_c
 	SUNXI_CCU_DIV_GATE(A64_CLK_I2S1, "i2s1", i2s_parents,
 	    I2SPCM1_CLK_REG,	/* reg */
 ,			/* div */
 	    __BITS(17,16),	/* sel */
 	    __BIT(31),		/* enable */
 ),
 	SUNXI_CCU_DIV_GATE(A64_CLK_I2S2, "i2s2", i2s_parents,
 	    I2SPCM2_CLK_REG,	/* reg */
 ,			/* div */
 	    __BITS(17,16),	/* sel */
 	    __BIT(31),		/* enable */
 ),
 	SUNXI_CCU_NM(A64_CLK_SPI0, "spi0", spi_parents,
 	    SPI0_CLK_REG,	/* reg */
 	    __BITS(17,16),	/* n */
 	    __BITS(3,0),	/* m */
 	    __BITS(25,24),	/* sel */
 	    __BIT(31),		/* enable */
 	    SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN),
 	SUNXI_CCU_NM(A64_CLK_SPI1, "spi1", spi_parents,
 	    SPI1_CLK_REG,	/* reg */
 	    __BITS(17,16),	/* n */
 	    __BITS(3,0),	/* m */
 	    __BITS(25,24),	/* sel */
 	    __BIT(31),		/* enable */
 	    SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN),
 	SUNXI_CCU_DIV_GATE(A64_CLK_TCON1, "tcon1", tcon1_parents,
 	    TCON1_CLK_REG,	/* reg */
 	    __BITS(3,0),	/* div */
 	    __BITS(25,24),	/* sel */
 	    __BIT(31),		/* enable */
 ),
 	SUNXI_CCU_DIV_GATE(A64_CLK_GPU, "gpu", gpu_parents,
 	    GPU_CLK_REG,	/* reg */
 	    __BITS(2,0),	/* div */
 ,			/* sel */
 	    __BIT(31),		/* enable */

 @@ -1,15 +1,15 @@
+#
-#	$NetBSD: GENERIC64,v 1.103.2.4 2019/11/18 19:33:10 martin Exp $
+#	$NetBSD: GENERIC64,v 1.103.2.5 2019/11/18 19:36:03 martin Exp $
+#
 #	GENERIC ARM (aarch64) kernel
+#
 include	"arch/evbarm/conf/std.generic64"
 include "arch/evbarm/conf/files.generic64"
 include	"arch/evbarm/conf/GENERIC.common"
 maxusers	64
+#
 # FDT files supported by this kernel - add to DTSSUBDIR and DTS as
 # appropriate
 @@ -392,26 +392,27 @@ ahcisata*	at fdt?			# AHCI SATA
 ahcisata*	at acpi?
 ahcisata*	at pci? dev ? function ?
 atabus*		at ata?
 atapibus*	at atapi?
 wd*		at atabus? drive ?
 cd*		at atapibus? drive ?
 # NVMe
 nvme*		at pci? dev ? function ?
 ld*		at nvme? nsid ?
 # SPI controllers
 bcmspi*		at fdt?			# Broadcom BCM283x SPI
 sun6ispi*	at fdt?			# Allwinner SPI
 spi*		at spibus?
 # Audio support
 hdaudio*	at fdt?			# Intel HDA
 hdaudio*	at pci? dev ? function ?
 hdafg*		at hdaudiobus?
 options 	HDAUDIOVERBOSE
 options 	HDAUDIO_ENABLE_HDMI
 options 	HDAUDIO_ENABLE_DISPLAYPORT
 ausoc*		at fdt?			# Simple SoC audio card
 spdiftx*	at fdt?			# SPDIF transmitter
 rki2s*		at fdt?			# Rockchip I2S/PCM
 sunxicodec*	at fdt?			# Allwinner audio codec