 @@ -1,14 +1,14 @@
-/* $NetBSD: sun50i_a64_ccu.c,v 1.16 2019/11/22 19:46:38 jmcneill Exp $ */
+/* $NetBSD: sun50i_a64_ccu.c,v 1.17 2019/11/23 12:29:20 jmcneill Exp $ */
 /*-
  * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -18,27 +18,27 @@
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: sun50i_a64_ccu.c,v 1.16 2019/11/22 19:46:38 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun50i_a64_ccu.c,v 1.17 2019/11/23 12:29:20 jmcneill Exp $");
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/device.h>
 #include <sys/systm.h>
 #include <dev/fdt/fdtvar.h>
 #include <arm/sunxi/sunxi_ccu.h>
 #include <arm/sunxi/sun50i_a64_ccu.h>
 #define	PLL_CPUX_CTRL_REG	0x000
 #define	PLL_AUDIO_CTRL_REG	0x008
 @@ -59,26 +59,27 @@ __KERNEL_RCSID(1, "$NetBSD: sun50i_a64_c
 #define	THS_CLK_REG		0x074
 #define	SDMMC0_CLK_REG		0x088
 #define	SDMMC1_CLK_REG		0x08c
 #define	SDMMC2_CLK_REG		0x090
 #define	SPI0_CLK_REG		0x0a0
 #define	SPI1_CLK_REG		0x0a4
 #define	I2SPCM0_CLK_REG		0x0b0
 #define	I2SPCM1_CLK_REG		0x0b4
 #define	I2SPCM2_CLK_REG		0x0b8
 #define	USBPHY_CFG_REG		0x0cc
 #define	DRAM_CFG_REG		0x0f4
 #define	MBUS_RST_REG		0x0fc
 #define	DE_CLK_REG		0x104
 #define	TCON0_CLK_REG		0x118
 #define	TCON1_CLK_REG		0x11c
 #define	AC_DIG_CLK_REG		0x140
 #define	HDMI_CLK_REG		0x150
 #define	HDMI_SLOW_CLK_REG	0x154
 #define	GPU_CLK_REG		0x1a0
 #define	BUS_SOFT_RST_REG0	0x2c0
 #define	BUS_SOFT_RST_REG1	0x2c4
 #define	BUS_SOFT_RST_REG2	0x2c8
 #define	BUS_SOFT_RST_REG3	0x2d0
 #define	BUS_SOFT_RST_REG4	0x2d8
 static int sun50i_a64_ccu_match(device_t, cfdata_t, void *);
 static void sun50i_a64_ccu_attach(device_t, device_t, void *);
 @@ -151,26 +152,27 @@ static struct sunxi_ccu_reset sun50i_a64
 	SUNXI_CCU_RESET(A64_RST_BUS_UART3, BUS_SOFT_RST_REG4, 19),
 };
 static const char *ahb1_parents[] = { "losc", "hosc", "axi", "pll_periph0" };
 static const char *ahb2_parents[] = { "ahb1", "pll_periph0" };
 static const char *apb1_parents[] = { "ahb1" };
 static const char *apb2_parents[] = { "losc", "hosc", "pll_periph0" };
 static const char *mmc_parents[] = { "hosc", "pll_periph0_2x", "pll_periph1_2x" };
 static const char *ths_parents[] = { "hosc", NULL, NULL, NULL };
 static const char *de_parents[] = { "pll_periph0_2x", "pll_de" };
 static const char *hdmi_parents[] = { "pll_video0", "pll_video1" };
 static const char *i2s_parents[] = { "pll_audio_8x", "pll_audio_4x", "pll_audio_2x", "pll_audio" };
 static const char *spi_parents[] = { "hosc", "pll_periph0", "pll_periph1", NULL };
 static const char *tcon0_parents[] = { "pll_mipi", NULL, "pll_video0_2x", NULL };
 static const char *tcon1_parents[] = { "pll_video0", NULL, "pll_video1", NULL };
 static const char *gpu_parents[] = { "pll_gpu" };
 static const struct sunxi_ccu_nkmp_tbl sun50i_a64_cpux_table[] = {
 	{ 60000000, 9, 0, 0, 2 },
 	{ 66000000, 10, 0, 0, 2 },
 	{ 72000000, 11, 0, 0, 2 },
 	{ 78000000, 12, 0, 0, 2 },
 	{ 84000000, 13, 0, 0, 2 },
 	{ 90000000, 14, 0, 0, 2 },
 	{ 96000000, 15, 0, 0, 2 },
 	{ 102000000, 16, 0, 0, 2 },
 	{ 108000000, 17, 0, 0, 2 },
 @@ -449,26 +451,33 @@ static struct sunxi_ccu_clk sun50i_a64_c
 	    __BITS(3,0),	/* m */
 	    __BITS(25,24),	/* sel */
 	    __BIT(31),		/* enable */
 	    SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN),
 	SUNXI_CCU_NM(A64_CLK_SPI1, "spi1", spi_parents,
 	    SPI1_CLK_REG,	/* reg */
 	    __BITS(17,16),	/* n */
 	    __BITS(3,0),	/* m */
 	    __BITS(25,24),	/* sel */
 	    __BIT(31),		/* enable */
 	    SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN),
 	SUNXI_CCU_DIV_GATE(A64_CLK_TCON0, "tcon0", tcon0_parents,
 	    TCON0_CLK_REG,	/* reg */
 ,			/* div */
 	    __BITS(26,24),	/* sel */
 	    __BIT(31),		/* enable */
 ),
 	SUNXI_CCU_DIV_GATE(A64_CLK_TCON1, "tcon1", tcon1_parents,
 	    TCON1_CLK_REG,	/* reg */
 	    __BITS(3,0),	/* div */
 	    __BITS(25,24),	/* sel */
 	    __BIT(31),		/* enable */
 ),
 	SUNXI_CCU_DIV_GATE(A64_CLK_GPU, "gpu", gpu_parents,
 	    GPU_CLK_REG,	/* reg */
 	    __BITS(2,0),	/* div */
 ,			/* sel */
 	    __BIT(31),		/* enable */
 ),