Thu Dec 5 03:59:39 2019 UTC ()
Only need one ci_onproc member.


(riastradh)
diff -r1.7 -r1.8 src/sys/arch/hppa/include/cpu.h

cvs diff -r1.7 -r1.8 src/sys/arch/hppa/include/cpu.h (switch to unified diff)

--- src/sys/arch/hppa/include/cpu.h 2019/12/04 07:49:39 1.7
+++ src/sys/arch/hppa/include/cpu.h 2019/12/05 03:59:39 1.8
@@ -1,441 +1,440 @@ @@ -1,441 +1,440 @@
1/* $NetBSD: cpu.h,v 1.7 2019/12/04 07:49:39 skrll Exp $ */ 1/* $NetBSD: cpu.h,v 1.8 2019/12/05 03:59:39 riastradh Exp $ */
2 2
3/* $OpenBSD: cpu.h,v 1.55 2008/07/23 17:39:35 kettenis Exp $ */ 3/* $OpenBSD: cpu.h,v 1.55 2008/07/23 17:39:35 kettenis Exp $ */
4 4
5/* 5/*
6 * Copyright (c) 2000-2004 Michael Shalayeff 6 * Copyright (c) 2000-2004 Michael Shalayeff
7 * All rights reserved. 7 * All rights reserved.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the 15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution. 16 * documentation and/or other materials provided with the distribution.
17 * 17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 21 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
26 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 26 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
27 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28 * THE POSSIBILITY OF SUCH DAMAGE. 28 * THE POSSIBILITY OF SUCH DAMAGE.
29 */ 29 */
30/* 30/*
31 * Copyright (c) 1988-1994, The University of Utah and 31 * Copyright (c) 1988-1994, The University of Utah and
32 * the Computer Systems Laboratory at the University of Utah (CSL). 32 * the Computer Systems Laboratory at the University of Utah (CSL).
33 * All rights reserved. 33 * All rights reserved.
34 * 34 *
35 * Permission to use, copy, modify and distribute this software is hereby 35 * Permission to use, copy, modify and distribute this software is hereby
36 * granted provided that (1) source code retains these copyright, permission, 36 * granted provided that (1) source code retains these copyright, permission,
37 * and disclaimer notices, and (2) redistributions including binaries 37 * and disclaimer notices, and (2) redistributions including binaries
38 * reproduce the notices in supporting documentation, and (3) all advertising 38 * reproduce the notices in supporting documentation, and (3) all advertising
39 * materials mentioning features or use of this software display the following 39 * materials mentioning features or use of this software display the following
40 * acknowledgement: ``This product includes software developed by the 40 * acknowledgement: ``This product includes software developed by the
41 * Computer Systems Laboratory at the University of Utah.'' 41 * Computer Systems Laboratory at the University of Utah.''
42 * 42 *
43 * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS 43 * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
44 * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF 44 * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
45 * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 45 * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
46 * 46 *
47 * CSL requests users of this software to return to csl-dist@cs.utah.edu any 47 * CSL requests users of this software to return to csl-dist@cs.utah.edu any
48 * improvements that they make and grant CSL redistribution rights. 48 * improvements that they make and grant CSL redistribution rights.
49 * 49 *
50 * Utah $Hdr: cpu.h 1.19 94/12/16$ 50 * Utah $Hdr$
51 */ 51 */
52 52
53#ifndef _MACHINE_CPU_H_ 53#ifndef _MACHINE_CPU_H_
54#define _MACHINE_CPU_H_ 54#define _MACHINE_CPU_H_
55 55
56#ifdef _KERNEL_OPT 56#ifdef _KERNEL_OPT
57#include "opt_cputype.h" 57#include "opt_cputype.h"
58#include "opt_multiprocessor.h" 58#include "opt_multiprocessor.h"
59#endif 59#endif
60 60
61#include <machine/trap.h> 61#include <machine/trap.h>
62#include <machine/frame.h> 62#include <machine/frame.h>
63#include <machine/reg.h> 63#include <machine/reg.h>
64#include <machine/intrdefs.h> 64#include <machine/intrdefs.h>
65 65
66#ifndef __ASSEMBLER__ 66#ifndef __ASSEMBLER__
67#include <machine/intr.h> 67#include <machine/intr.h>
68#endif 68#endif
69 69
70#ifndef _LOCORE 70#ifndef _LOCORE
71 71
72/* types */ 72/* types */
73enum hppa_cpu_type { 73enum hppa_cpu_type {
74 hpc_unknown, 74 hpc_unknown,
75 hpcx, /* PA7000 (x) PA 1.0 */ 75 hpcx, /* PA7000 (x) PA 1.0 */
76 hpcxs, /* PA7000 (s) PA 1.1a */ 76 hpcxs, /* PA7000 (s) PA 1.1a */
77 hpcxt, /* PA7100 (t) PA 1.1b */ 77 hpcxt, /* PA7100 (t) PA 1.1b */
78 hpcxl, /* PA7100LC (l) PA 1.1c */ 78 hpcxl, /* PA7100LC (l) PA 1.1c */
79 hpcxtp, /* PA7200 (t') PA 1.1d */ 79 hpcxtp, /* PA7200 (t') PA 1.1d */
80 hpcxl2, /* PA7300LC (l2) PA 1.1e */ 80 hpcxl2, /* PA7300LC (l2) PA 1.1e */
81 hpcxu, /* PA8000 (u) PA 2.0 */ 81 hpcxu, /* PA8000 (u) PA 2.0 */
82 hpcxup, /* PA8200 (u+) PA 2.0 */ 82 hpcxup, /* PA8200 (u+) PA 2.0 */
83 hpcxw, /* PA8500 (w) PA 2.0 */ 83 hpcxw, /* PA8500 (w) PA 2.0 */
84 hpcxwp, /* PA8600 (w+) PA 2.0 */ 84 hpcxwp, /* PA8600 (w+) PA 2.0 */
85 hpcxw2, /* PA8700 (piranha) PA 2.0 */ 85 hpcxw2, /* PA8700 (piranha) PA 2.0 */
86 mako /* PA8800 (mako) PA 2.0 */ 86 mako /* PA8800 (mako) PA 2.0 */
87}; 87};
88 88
89#ifdef _KERNEL 89#ifdef _KERNEL
90/* 90/*
91 * A CPU description. 91 * A CPU description.
92 */ 92 */
93struct hppa_cpu_info { 93struct hppa_cpu_info {
94 /* The official name of the chip. */ 94 /* The official name of the chip. */
95 const char *hci_chip_name; 95 const char *hci_chip_name;
96 96
97 /* The nickname for the chip. */ 97 /* The nickname for the chip. */
98 const char *hci_chip_nickname; 98 const char *hci_chip_nickname;
99 99
100 /* The type and PA-RISC specification of the chip. */ 100 /* The type and PA-RISC specification of the chip. */
101 const char hci_chip_type[8]; 101 const char hci_chip_type[8];
102 enum hppa_cpu_type hci_cputype; 102 enum hppa_cpu_type hci_cputype;
103 int hci_cpuversion; 103 int hci_cpuversion;
104 int hci_features; /* CPU types and features */ 104 int hci_features; /* CPU types and features */
105#define HPPA_FTRS_TLBU 0x00000001 105#define HPPA_FTRS_TLBU 0x00000001
106#define HPPA_FTRS_BTLBU 0x00000002 106#define HPPA_FTRS_BTLBU 0x00000002
107#define HPPA_FTRS_HVT 0x00000004 107#define HPPA_FTRS_HVT 0x00000004
108#define HPPA_FTRS_W32B 0x00000008 108#define HPPA_FTRS_W32B 0x00000008
109 109
110 const char *hci_chip_spec; 110 const char *hci_chip_spec;
111 111
112 int (*desidhash)(void); 112 int (*desidhash)(void);
113 const u_int *itlbh, *dtlbh, *itlbnah, *dtlbnah, *tlbdh; 113 const u_int *itlbh, *dtlbh, *itlbnah, *dtlbnah, *tlbdh;
114 int (*dbtlbins)(int, pa_space_t, vaddr_t, paddr_t, vsize_t, u_int); 114 int (*dbtlbins)(int, pa_space_t, vaddr_t, paddr_t, vsize_t, u_int);
115 int (*ibtlbins)(int, pa_space_t, vaddr_t, paddr_t, vsize_t, u_int); 115 int (*ibtlbins)(int, pa_space_t, vaddr_t, paddr_t, vsize_t, u_int);
116 int (*btlbprg)(int); 116 int (*btlbprg)(int);
117 int (*hptinit)(vaddr_t, vsize_t); 117 int (*hptinit)(vaddr_t, vsize_t);
118}; 118};
119 119
120extern const struct hppa_cpu_info *hppa_cpu_info; 120extern const struct hppa_cpu_info *hppa_cpu_info;
121extern int cpu_modelno; 121extern int cpu_modelno;
122extern int cpu_revision; 122extern int cpu_revision;
123#endif 123#endif
124#endif 124#endif
125 125
126/* 126/*
127 * COPR/SFUs 127 * COPR/SFUs
128 */ 128 */
129#define HPPA_FPUS 0xc0 129#define HPPA_FPUS 0xc0
130#define HPPA_PMSFUS 0x20 /* ??? */ 130#define HPPA_PMSFUS 0x20 /* ??? */
131 131
132/* 132/*
133 * Exported definitions unique to hppa/PA-RISC cpu support. 133 * Exported definitions unique to hppa/PA-RISC cpu support.
134 */ 134 */
135 135
136/* 136/*
137 * COPR/SFUs 137 * COPR/SFUs
138 */ 138 */
139#define HPPA_FPUVER(w) (((w) & 0x003ff800) >> 11) 139#define HPPA_FPUVER(w) (((w) & 0x003ff800) >> 11)
140#define HPPA_FPU_OP(w) ((w) >> 26) 140#define HPPA_FPU_OP(w) ((w) >> 26)
141#define HPPA_FPU_UNMPL 0x01 /* exception reg, the rest is << 1 */ 141#define HPPA_FPU_UNMPL 0x01 /* exception reg, the rest is << 1 */
142#define HPPA_FPU_ILL 0x80 /* software-only */ 142#define HPPA_FPU_ILL 0x80 /* software-only */
143#define HPPA_FPU_I 0x01 143#define HPPA_FPU_I 0x01
144#define HPPA_FPU_U 0x02 144#define HPPA_FPU_U 0x02
145#define HPPA_FPU_O 0x04 145#define HPPA_FPU_O 0x04
146#define HPPA_FPU_Z 0x08 146#define HPPA_FPU_Z 0x08
147#define HPPA_FPU_V 0x10 147#define HPPA_FPU_V 0x10
148#define HPPA_FPU_D 0x20 148#define HPPA_FPU_D 0x20
149#define HPPA_FPU_T 0x40 149#define HPPA_FPU_T 0x40
150#define HPPA_FPU_XMASK 0x7f 150#define HPPA_FPU_XMASK 0x7f
151#define HPPA_FPU_T_POS 25 151#define HPPA_FPU_T_POS 25
152#define HPPA_FPU_RM 0x00000600 152#define HPPA_FPU_RM 0x00000600
153#define HPPA_FPU_CQ 0x00fff800 153#define HPPA_FPU_CQ 0x00fff800
154#define HPPA_FPU_C 0x04000000 154#define HPPA_FPU_C 0x04000000
155#define HPPA_FPU_FLSH 27 155#define HPPA_FPU_FLSH 27
156#define HPPA_FPU_INIT (0) 156#define HPPA_FPU_INIT (0)
157#define HPPA_FPU_FORK(s) ((s) & ~((uint64_t)(HPPA_FPU_XMASK) << 32)) 157#define HPPA_FPU_FORK(s) ((s) & ~((uint64_t)(HPPA_FPU_XMASK) << 32))
158 158
159/* 159/*
160 * definitions of cpu-dependent requirements 160 * definitions of cpu-dependent requirements
161 * referenced in generic code 161 * referenced in generic code
162 */ 162 */
163#if defined(HP8000_CPU) || defined(HP8200_CPU) || \ 163#if defined(HP8000_CPU) || defined(HP8200_CPU) || \
164 defined(HP8500_CPU) || defined(HP8600_CPU) 164 defined(HP8500_CPU) || defined(HP8600_CPU)
165 165
166/* PA2.0 aliases */ 166/* PA2.0 aliases */
167#define HPPA_PGALIAS 0x00400000 167#define HPPA_PGALIAS 0x00400000
168#define HPPA_PGAMASK 0xffc00000 /* PA bits 0-9 not used in index */ 168#define HPPA_PGAMASK 0xffc00000 /* PA bits 0-9 not used in index */
169#define HPPA_PGAOFF 0x003fffff 169#define HPPA_PGAOFF 0x003fffff
170 170
171#else 171#else
172 172
173/* PA1.x aliases */ 173/* PA1.x aliases */
174#define HPPA_PGALIAS 0x00100000 174#define HPPA_PGALIAS 0x00100000
175#define HPPA_PGAMASK 0xfff00000 /* PA bits 0-11 not used in index */ 175#define HPPA_PGAMASK 0xfff00000 /* PA bits 0-11 not used in index */
176#define HPPA_PGAOFF 0x000fffff 176#define HPPA_PGAOFF 0x000fffff
177 177
178#endif 178#endif
179 179
180#define HPPA_SPAMASK 0xf0f0f000 /* PA bits 0-3,8-11,16-19 not used */ 180#define HPPA_SPAMASK 0xf0f0f000 /* PA bits 0-3,8-11,16-19 not used */
181 181
182#define HPPA_IOSPACE 0xf0000000 182#define HPPA_IOSPACE 0xf0000000
183#define HPPA_IOLEN 0x10000000 183#define HPPA_IOLEN 0x10000000
184#define HPPA_PDC_LOW 0xef000000 184#define HPPA_PDC_LOW 0xef000000
185#define HPPA_PDC_HIGH 0xf1000000 185#define HPPA_PDC_HIGH 0xf1000000
186#define HPPA_IOBCAST 0xfffc0000 186#define HPPA_IOBCAST 0xfffc0000
187#define HPPA_LBCAST 0xfffc0000 187#define HPPA_LBCAST 0xfffc0000
188#define HPPA_GBCAST 0xfffe0000 188#define HPPA_GBCAST 0xfffe0000
189#define HPPA_FPA 0xfff80000 189#define HPPA_FPA 0xfff80000
190#define HPPA_FLEX_DATA 0xfff80001 190#define HPPA_FLEX_DATA 0xfff80001
191#define HPPA_DMA_ENABLE 0x00000001 191#define HPPA_DMA_ENABLE 0x00000001
192#define HPPA_SPA_ENABLE 0x00000020 192#define HPPA_SPA_ENABLE 0x00000020
193#define HPPA_NMODSPBUS 64 193#define HPPA_NMODSPBUS 64
194 194
195#ifdef MULTIPROCESSOR 195#ifdef MULTIPROCESSOR
196 196
197#define GET_CURCPU(r) mfctl CR_CURCPU, r 197#define GET_CURCPU(r) mfctl CR_CURCPU, r
198#define GET_CURCPU_SPACE(s, r) GET_CURCPU(r) 198#define GET_CURCPU_SPACE(s, r) GET_CURCPU(r)
199#define GET_CURLWP(r) mfctl CR_CURCPU, r ! ldw CI_CURLWP(r), r 199#define GET_CURLWP(r) mfctl CR_CURCPU, r ! ldw CI_CURLWP(r), r
200#define GET_CURLWP_SPACE(s, r) mfctl CR_CURCPU, r ! ldw CI_CURLWP(s, r), r 200#define GET_CURLWP_SPACE(s, r) mfctl CR_CURCPU, r ! ldw CI_CURLWP(s, r), r
201 201
202#define SET_CURLWP(r,t) mfctl CR_CURCPU, t ! stw r, CI_CURLWP(t) 202#define SET_CURLWP(r,t) mfctl CR_CURCPU, t ! stw r, CI_CURLWP(t)
203 203
204#else /* MULTIPROCESSOR */ 204#else /* MULTIPROCESSOR */
205 205
206#define GET_CURCPU(r) mfctl CR_CURLWP, r ! ldw L_CPU(r), r 206#define GET_CURCPU(r) mfctl CR_CURLWP, r ! ldw L_CPU(r), r
207#define GET_CURCPU_SPACE(s, r) mfctl CR_CURLWP, r ! ldw L_CPU(s, r), r 207#define GET_CURCPU_SPACE(s, r) mfctl CR_CURLWP, r ! ldw L_CPU(s, r), r
208#define GET_CURLWP(r) mfctl CR_CURLWP, r 208#define GET_CURLWP(r) mfctl CR_CURLWP, r
209#define GET_CURLWP_SPACE(s, r) GET_CURLWP(r) 209#define GET_CURLWP_SPACE(s, r) GET_CURLWP(r)
210 210
211#define SET_CURLWP(r,t) mtctl r, CR_CURLWP 211#define SET_CURLWP(r,t) mtctl r, CR_CURLWP
212 212
213#endif /* MULTIPROCESSOR */ 213#endif /* MULTIPROCESSOR */
214 214
215#ifndef _LOCORE 215#ifndef _LOCORE
216#ifdef _KERNEL 216#ifdef _KERNEL
217 217
218/* 218/*
219 * External definitions unique to PA-RISC cpu support. 219 * External definitions unique to PA-RISC cpu support.
220 * These are the "public" declarations - those needed in 220 * These are the "public" declarations - those needed in
221 * machine-independent source code. The "private" ones 221 * machine-independent source code. The "private" ones
222 * are in machdep.h. 222 * are in machdep.h.
223 * 223 *
224 * Note that the name of this file is NOT meant to imply 224 * Note that the name of this file is NOT meant to imply
225 * that it has anything to do with PA-RISC CPU stuff. 225 * that it has anything to do with PA-RISC CPU stuff.
226 * The name "cpu" is historical, and used in the common 226 * The name "cpu" is historical, and used in the common
227 * code to identify machine-dependent functions, etc. 227 * code to identify machine-dependent functions, etc.
228 */ 228 */
229 229
230/* clockframe describes the system before we took an interrupt. */ 230/* clockframe describes the system before we took an interrupt. */
231struct clockframe { 231struct clockframe {
232 int cf_flags; 232 int cf_flags;
233 int cf_spl; 233 int cf_spl;
234 u_int cf_pc; 234 u_int cf_pc;
235}; 235};
236#define CLKF_PC(framep) ((framep)->cf_pc) 236#define CLKF_PC(framep) ((framep)->cf_pc)
237#define CLKF_INTR(framep) ((framep)->cf_flags & TFF_INTR) 237#define CLKF_INTR(framep) ((framep)->cf_flags & TFF_INTR)
238#define CLKF_USERMODE(framep) ((framep)->cf_flags & T_USER) 238#define CLKF_USERMODE(framep) ((framep)->cf_flags & T_USER)
239 239
240int clock_intr(void *); 240int clock_intr(void *);
241 241
242/* 242/*
243 * LWP_PC: the program counter for the given lwp. 243 * LWP_PC: the program counter for the given lwp.
244 */ 244 */
245#define LWP_PC(l) ((l)->l_md.md_regs->tf_iioq_head) 245#define LWP_PC(l) ((l)->l_md.md_regs->tf_iioq_head)
246 246
247#define cpu_signotify(l) (setsoftast(l)) 247#define cpu_signotify(l) (setsoftast(l))
248#define cpu_need_proftick(l) ((l)->l_pflag |= LP_OWEUPC, setsoftast(l)) 248#define cpu_need_proftick(l) ((l)->l_pflag |= LP_OWEUPC, setsoftast(l))
249 249
250#endif /* _KERNEL */ 250#endif /* _KERNEL */
251 251
252#ifndef __ASSEMBLER__ 252#ifndef __ASSEMBLER__
253#if defined(_KERNEL) || defined(_KMEMUSER) 253#if defined(_KERNEL) || defined(_KMEMUSER)
254 254
255#include <sys/cpu_data.h> 255#include <sys/cpu_data.h>
256#include <sys/evcnt.h> 256#include <sys/evcnt.h>
257 257
258/* 258/*
259 * Note that the alignment of ci_trap_save is important since we want to keep 259 * Note that the alignment of ci_trap_save is important since we want to keep
260 * it within a single cache line. As a result, it must be kept as the first 260 * it within a single cache line. As a result, it must be kept as the first
261 * entry within the cpu_info struct. 261 * entry within the cpu_info struct.
262 */ 262 */
263struct cpu_info { 263struct cpu_info {
264 /* Keep this first to simplify the trap handlers */ 264 /* Keep this first to simplify the trap handlers */
265 register_t ci_trapsave[16];/* the "phys" part of frame */ 265 register_t ci_trapsave[16];/* the "phys" part of frame */
266 266
267 struct cpu_data ci_data; /* MI per-cpu data */ 267 struct cpu_data ci_data; /* MI per-cpu data */
268 268
269#ifndef _KMEMUSER 269#ifndef _KMEMUSER
270 hppa_hpa_t ci_hpa; 270 hppa_hpa_t ci_hpa;
271 register_t ci_psw; /* Processor Status Word. */ 271 register_t ci_psw; /* Processor Status Word. */
272 paddr_t ci_fpu_state; /* LWP FPU state address, or zero. */ 272 paddr_t ci_fpu_state; /* LWP FPU state address, or zero. */
273 u_long ci_itmr; 273 u_long ci_itmr;
274 274
275 int ci_cpuid; /* CPU index (see cpus[] array) */ 275 int ci_cpuid; /* CPU index (see cpus[] array) */
276 int ci_mtx_count; 276 int ci_mtx_count;
277 int ci_mtx_oldspl; 277 int ci_mtx_oldspl;
278 int ci_want_resched; 278 int ci_want_resched;
279 279
280 volatile int ci_cpl; 280 volatile int ci_cpl;
281 volatile int ci_ipending; /* The pending interrupts. */ 281 volatile int ci_ipending; /* The pending interrupts. */
282 u_int ci_intr_depth; /* Nonzero iff running an interrupt. */ 282 u_int ci_intr_depth; /* Nonzero iff running an interrupt. */
283 u_int ci_ishared; 283 u_int ci_ishared;
284 u_int ci_eiem; 284 u_int ci_eiem;
285 285
286 u_int ci_imask[NIPL]; 286 u_int ci_imask[NIPL];
287 287
288 struct hppa_interrupt_register ci_ir; 288 struct hppa_interrupt_register ci_ir;
289 struct hppa_interrupt_bit ci_ib[HPPA_INTERRUPT_BITS]; 289 struct hppa_interrupt_bit ci_ib[HPPA_INTERRUPT_BITS];
290 290
291 struct lwp *ci_onproc; /* current user LWP / kthread */ 291 struct lwp *ci_onproc; /* current user LWP / kthread */
292#if defined(MULTIPROCESSOR) 292#if defined(MULTIPROCESSOR)
293 struct lwp *ci_curlwp; /* CPU owner */ 293 struct lwp *ci_curlwp; /* CPU owner */
294 paddr_t ci_stack; /* stack for spin up */ 294 paddr_t ci_stack; /* stack for spin up */
295 volatile int ci_flags; /* CPU status flags */ 295 volatile int ci_flags; /* CPU status flags */
296#define CPUF_PRIMARY 0x0001 /* ... is monarch/primary */ 296#define CPUF_PRIMARY 0x0001 /* ... is monarch/primary */
297#define CPUF_RUNNING 0x0002 /* ... is running. */ 297#define CPUF_RUNNING 0x0002 /* ... is running. */
298 298
299 struct lwp *ci_onproc; /* current user LWP / kthread */ 
300 volatile u_long ci_ipi; /* IPIs pending */ 299 volatile u_long ci_ipi; /* IPIs pending */
301 300
302 struct cpu_softc *ci_softc; 301 struct cpu_softc *ci_softc;
303#endif 302#endif
304 303
305#endif /* !_KMEMUSER */ 304#endif /* !_KMEMUSER */
306} __aligned(64); 305} __aligned(64);
307 306
308#endif /* _KERNEL || _KMEMUSER */ 307#endif /* _KERNEL || _KMEMUSER */
309#endif /* __ASSEMBLER__ */ 308#endif /* __ASSEMBLER__ */
310 309
311#if defined(_KERNEL) 310#if defined(_KERNEL)
312 311
313/* 312/*
314 * definitions of cpu-dependent requirements 313 * definitions of cpu-dependent requirements
315 * referenced in generic code 314 * referenced in generic code
316 */ 315 */
317 316
318void cpu_proc_fork(struct proc *, struct proc *); 317void cpu_proc_fork(struct proc *, struct proc *);
319 318
320#ifdef MULTIPROCESSOR 319#ifdef MULTIPROCESSOR
321 320
322/* Number of CPUs in the system */ 321/* Number of CPUs in the system */
323extern int hppa_ncpu; 322extern int hppa_ncpu;
324 323
325#define HPPA_MAXCPUS 4 324#define HPPA_MAXCPUS 4
326#define cpu_number() (curcpu()->ci_cpuid) 325#define cpu_number() (curcpu()->ci_cpuid)
327 326
328#define CPU_IS_PRIMARY(ci) ((ci)->ci_cpuid == 0) 327#define CPU_IS_PRIMARY(ci) ((ci)->ci_cpuid == 0)
329#define CPU_INFO_ITERATOR int 328#define CPU_INFO_ITERATOR int
330#define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = &cpus[0]; cii < hppa_ncpu; cii++, ci++ 329#define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = &cpus[0]; cii < hppa_ncpu; cii++, ci++
331 330
332void cpu_boot_secondary_processors(void); 331void cpu_boot_secondary_processors(void);
333 332
334static __inline struct cpu_info * 333static __inline struct cpu_info *
335hppa_curcpu(void) 334hppa_curcpu(void)
336{ 335{
337 struct cpu_info *ci; 336 struct cpu_info *ci;
338 337
339 __asm volatile("mfctl %1, %0" : "=r" (ci): "i" (CR_CURCPU)); 338 __asm volatile("mfctl %1, %0" : "=r" (ci): "i" (CR_CURCPU));
340 339
341 return ci; 340 return ci;
342} 341}
343 342
344#define curcpu() hppa_curcpu() 343#define curcpu() hppa_curcpu()
345 344
346#else /* MULTIPROCESSOR */ 345#else /* MULTIPROCESSOR */
347 346
348#define HPPA_MAXCPUS 1 347#define HPPA_MAXCPUS 1
349#define curcpu() (&cpus[0]) 348#define curcpu() (&cpus[0])
350#define cpu_number() 0 349#define cpu_number() 0
351 350
352static __inline struct lwp * 351static __inline struct lwp *
353hppa_curlwp(void) 352hppa_curlwp(void)
354{ 353{
355 struct lwp *l; 354 struct lwp *l;
356 355
357 __asm volatile("mfctl %1, %0" : "=r" (l): "i" (CR_CURLWP)); 356 __asm volatile("mfctl %1, %0" : "=r" (l): "i" (CR_CURLWP));
358 357
359 return l; 358 return l;
360} 359}
361 360
362#define curlwp hppa_curlwp() 361#define curlwp hppa_curlwp()
363 362
364#endif /* MULTIPROCESSOR */ 363#endif /* MULTIPROCESSOR */
365 364
366extern struct cpu_info cpus[HPPA_MAXCPUS]; 365extern struct cpu_info cpus[HPPA_MAXCPUS];
367 366
368#define DELAY(x) delay(x) 367#define DELAY(x) delay(x)
369 368
370static __inline paddr_t 369static __inline paddr_t
371kvtop(const void *va) 370kvtop(const void *va)
372{ 371{
373 paddr_t pa; 372 paddr_t pa;
374 373
375 __asm volatile ("lpa %%r0(%1), %0" : "=r" (pa) : "r" (va)); 374 __asm volatile ("lpa %%r0(%1), %0" : "=r" (pa) : "r" (va));
376 return pa; 375 return pa;
377} 376}
378 377
379extern int (*cpu_desidhash)(void); 378extern int (*cpu_desidhash)(void);
380 379
381static __inline bool 380static __inline bool
382hppa_cpu_ispa20_p(void) 381hppa_cpu_ispa20_p(void)
383{ 382{
384 383
385 return (hppa_cpu_info->hci_features & HPPA_FTRS_W32B) != 0; 384 return (hppa_cpu_info->hci_features & HPPA_FTRS_W32B) != 0;
386} 385}
387 386
388static __inline bool 387static __inline bool
389hppa_cpu_hastlbu_p(void) 388hppa_cpu_hastlbu_p(void)
390{ 389{
391 390
392 return (hppa_cpu_info->hci_features & HPPA_FTRS_TLBU) != 0; 391 return (hppa_cpu_info->hci_features & HPPA_FTRS_TLBU) != 0;
393} 392}
394 393
395void delay(u_int); 394void delay(u_int);
396void hppa_init(paddr_t, void *); 395void hppa_init(paddr_t, void *);
397void trap(int, struct trapframe *); 396void trap(int, struct trapframe *);
398void hppa_ras(struct lwp *); 397void hppa_ras(struct lwp *);
399int spcopy(pa_space_t, const void *, pa_space_t, void *, size_t); 398int spcopy(pa_space_t, const void *, pa_space_t, void *, size_t);
400int spstrcpy(pa_space_t, const void *, pa_space_t, void *, size_t, 399int spstrcpy(pa_space_t, const void *, pa_space_t, void *, size_t,
401 size_t *); 400 size_t *);
402int copy_on_fault(void); 401int copy_on_fault(void);
403void lwp_trampoline(void); 402void lwp_trampoline(void);
404int cpu_dumpsize(void); 403int cpu_dumpsize(void);
405int cpu_dump(void); 404int cpu_dump(void);
406 405
407#ifdef MULTIPROCESSOR 406#ifdef MULTIPROCESSOR
408void cpu_boot_secondary_processors(void); 407void cpu_boot_secondary_processors(void);
409void cpu_hw_init(void); 408void cpu_hw_init(void);
410void cpu_hatch(void); 409void cpu_hatch(void);
411#endif 410#endif
412#endif /* _KERNEL */ 411#endif /* _KERNEL */
413 412
414/* 413/*
415 * Boot arguments stuff 414 * Boot arguments stuff
416 */ 415 */
417 416
418#define BOOTARG_LEN (PAGE_SIZE) 417#define BOOTARG_LEN (PAGE_SIZE)
419#define BOOTARG_OFF (0x10000) 418#define BOOTARG_OFF (0x10000)
420 419
421/* 420/*
422 * CTL_MACHDEP definitions. 421 * CTL_MACHDEP definitions.
423 */ 422 */
424#define CPU_CONSDEV 1 /* dev_t: console terminal device */ 423#define CPU_CONSDEV 1 /* dev_t: console terminal device */
425#define CPU_BOOTED_KERNEL 2 /* string: booted kernel name */ 424#define CPU_BOOTED_KERNEL 2 /* string: booted kernel name */
426#define CPU_LCD_BLINK 3 /* int: twiddle heartbeat LED/LCD */ 425#define CPU_LCD_BLINK 3 /* int: twiddle heartbeat LED/LCD */
427 426
428#ifdef _KERNEL 427#ifdef _KERNEL
429#include <sys/queue.h> 428#include <sys/queue.h>
430 429
431struct blink_lcd { 430struct blink_lcd {
432 void (*bl_func)(void *, int); 431 void (*bl_func)(void *, int);
433 void *bl_arg; 432 void *bl_arg;
434 SLIST_ENTRY(blink_lcd) bl_next; 433 SLIST_ENTRY(blink_lcd) bl_next;
435}; 434};
436 435
437extern void blink_lcd_register(struct blink_lcd *); 436extern void blink_lcd_register(struct blink_lcd *);
438#endif /* _KERNEL */ 437#endif /* _KERNEL */
439#endif /* !_LOCORE */ 438#endif /* !_LOCORE */
440 439
441#endif /* _MACHINE_CPU_H_ */ 440#endif /* _MACHINE_CPU_H_ */