Sun Dec 15 06:05:00 2019 UTC ()
Do not mask out LK bit (bit 31) from M_BCTR, which distinguishes
bcctr and bcctrl.

Fix build failure for ibm4xx kernels with GCC8.

XXX
pullup to netbsd-9, -8, and -7


(rin)
diff -r1.26 -r1.27 src/sys/arch/powerpc/include/db_machdep.h

cvs diff -r1.26 -r1.27 src/sys/arch/powerpc/include/db_machdep.h (expand / switch to unified diff)

--- src/sys/arch/powerpc/include/db_machdep.h 2017/11/06 03:47:48 1.26
+++ src/sys/arch/powerpc/include/db_machdep.h 2019/12/15 06:05:00 1.27
@@ -1,15 +1,15 @@ @@ -1,15 +1,15 @@
1/* $OpenBSD: db_machdep.h,v 1.2 1997/03/21 00:48:48 niklas Exp $ */ 1/* $OpenBSD: db_machdep.h,v 1.2 1997/03/21 00:48:48 niklas Exp $ */
2/* $NetBSD: db_machdep.h,v 1.26 2017/11/06 03:47:48 christos Exp $ */ 2/* $NetBSD: db_machdep.h,v 1.27 2019/12/15 06:05:00 rin Exp $ */
3 3
4/*  4/*
5 * Mach Operating System 5 * Mach Operating System
6 * Copyright (c) 1992 Carnegie Mellon University 6 * Copyright (c) 1992 Carnegie Mellon University
7 * All Rights Reserved. 7 * All Rights Reserved.
8 *  8 *
9 * Permission to use, copy, modify and distribute this software and its 9 * Permission to use, copy, modify and distribute this software and its
10 * documentation is hereby granted, provided that both the copyright 10 * documentation is hereby granted, provided that both the copyright
11 * notice and this permission notice appear in all copies of the 11 * notice and this permission notice appear in all copies of the
12 * software, derivative works or modified versions, and any portions 12 * software, derivative works or modified versions, and any portions
13 * thereof, and that both notices appear in supporting documentation. 13 * thereof, and that both notices appear in supporting documentation.
14 *  14 *
15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
@@ -88,27 +88,27 @@ extern db_regs_t ddb_regs; /* register  @@ -88,27 +88,27 @@ extern db_regs_t ddb_regs; /* register
88#else 88#else
89#define IS_WATCHPOINT_TRAP(type, code) 0 89#define IS_WATCHPOINT_TRAP(type, code) 0
90#endif 90#endif
91 91
92#define M_RTS 0xfc0007ff 92#define M_RTS 0xfc0007ff
93#define I_RTS 0x4c000020 93#define I_RTS 0x4c000020
94#define I_BLRL 0x4c000021 94#define I_BLRL 0x4c000021
95#define M_BC 0xfc000001 95#define M_BC 0xfc000001
96#define I_BC 0x40000000 96#define I_BC 0x40000000
97#define I_BCL 0x40000001 97#define I_BCL 0x40000001
98#define M_B 0xfc000001 98#define M_B 0xfc000001
99#define I_B 0x48000000 99#define I_B 0x48000000
100#define I_BL 0x48000001 100#define I_BL 0x48000001
101#define M_BCTR 0xfc0007fe 101#define M_BCTR 0xfc0007ff
102#define I_BCTR 0x4c000420 102#define I_BCTR 0x4c000420
103#define I_BCTRL 0x4c000421 103#define I_BCTRL 0x4c000421
104#define M_RFI 0xfc0007fe 104#define M_RFI 0xfc0007fe
105#define I_RFI 0x4c000064 105#define I_RFI 0x4c000064
106 106
107#define inst_trap_return(ins) (((ins)&M_RFI) == I_RFI) 107#define inst_trap_return(ins) (((ins)&M_RFI) == I_RFI)
108#define inst_return(ins) (((ins)&M_RTS) == I_RTS) 108#define inst_return(ins) (((ins)&M_RTS) == I_RTS)
109#define inst_call(ins) (((ins)&M_BC ) == I_BCL || \ 109#define inst_call(ins) (((ins)&M_BC ) == I_BCL || \
110 ((ins)&M_B ) == I_BL || \ 110 ((ins)&M_B ) == I_BL || \
111 ((ins)&M_BCTR) == I_BCTRL || \ 111 ((ins)&M_BCTR) == I_BCTRL || \
112 ((ins)&M_RTS ) == I_BLRL ) 112 ((ins)&M_RTS ) == I_BLRL )
113#define inst_branch(ins) (((ins)&M_BC ) == I_BC || \ 113#define inst_branch(ins) (((ins)&M_BC ) == I_BC || \
114 ((ins)&M_B ) == I_B || \ 114 ((ins)&M_B ) == I_B || \