 @@ -1,250 +1,256 @@
-/*	$NetBSD: bcm2835reg.h,v 1.28 2019/12/26 11:09:11 skrll Exp $	*/
+/*	$NetBSD: bcm2835reg.h,v 1.29 2019/12/30 16:19:27 skrll Exp $	*/
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Nick Hudson
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * Reference: BCM2835 ARM Periperhals
+ *
  * 	http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
  */
 #ifndef	_BCM2835REG_H_
 #define	_BCM2835REG_H_
 #include "opt_bcm283x.h"
 #if defined(SOC_BCM2835) + defined(SOC_BCM2836) != 1
 #error Must define SOC_BCM2835 or SOC_BCM2836, and not both
 #endif
 #define	BCM2711_PERIPHERALS_BASE	0xfe000000
 #define	BCM2836_PERIPHERALS_BASE	0x3f000000
 #define	BCM2835_PERIPHERALS_BASE	0x20000000
 #define	BCM283X_PERIPHERALS_SIZE	0x01000000	/* 16MBytes */
 #define	BCM283X_PERIPHERALS_BASE_BUS	0x7e000000
 #define	BCM2711_PERIPHERALS_PHYS_TO_BUS(a) \
     ((a) - BCM2711_PERIPHERALS_BASE + BCM283X_PERIPHERALS_BASE_BUS)
 #define	BCM2711_PERIPHERALS_BUS_TO_PHYS(a) \
     ((a) - BCM283X_PERIPHERALS_BASE_BUS + BCM2711_PERIPHERALS_BASE)
 #define	BCM2836_PERIPHERALS_PHYS_TO_BUS(a) \
     ((a) - BCM2836_PERIPHERALS_BASE + BCM283X_PERIPHERALS_BASE_BUS)
 #define	BCM2836_PERIPHERALS_BUS_TO_PHYS(a) \
     ((a) - BCM283X_PERIPHERALS_BASE_BUS + BCM2836_PERIPHERALS_BASE)
 #define	BCM2835_PERIPHERALS_PHYS_TO_BUS(a) \
     ((a) - BCM2835_PERIPHERALS_BASE + BCM283X_PERIPHERALS_BASE_BUS)
 #define	BCM2835_PERIPHERALS_BUS_TO_PHYS(a) \
     ((a) - BCM283X_PERIPHERALS_BASE_BUS + BCM2835_PERIPHERALS_BASE)
 #define	BCM2835_STIMER_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x00003000)
 #define	BCM2835_DMA0_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x00007000)
 #define	BCM2835_ARM_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x0000B000)
 #define	BCM2835_PM_BASE		(BCM283X_PERIPHERALS_BASE_BUS + 0x00100000)
 #define	BCM2835_CM_BASE  	(BCM283X_PERIPHERALS_BASE_BUS + 0x00101000)
 #define	BCM2835_RNG_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x00104000)
 #define	BCM2835_GPIO_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x00200000)
 #define	BCM2835_UART0_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x00201000)
 #define	BCM2835_SDHOST_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x00202000)
 #define	BCM2835_PCM_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x00203000)
 #define	BCM2835_SPI0_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x00204000)
 #define	BCM2835_BSC0_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x00205000)
 #define	BCM2835_PWM_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x0020C000)
 #define	BCM2835_BSCSPISLV_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x00214000)
 #define	BCM2835_AUX_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x00215000)
 #define	BCM2835_AUX_UART_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x00215040)
 #define	BCM2835_EMMC_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x00300000)
 #define	BCM2835_BSC1_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x00804000)
 #define	BCM2835_BSC2_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x00805000)
 #define	BCM2835_USB_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x00980000)
 #define	BCM2835_DMA15_BASE	(BCM283X_PERIPHERALS_BASE_BUS + 0x00E05000)
 #define	BCM2835_STIMER_SIZE	0x1c
 #define	BCM2835_DMA0_SIZE	0x1000
 #define	BCM2835_ARM_SIZE	0x1000
 #define	BCM2835_PM_SIZE		0x1000
 #define	BCM2835_CM_SIZE		0xa8
 #define	BCM2835_RNG_SIZE	0x1000
 #define	BCM2835_GPIO_SIZE	0x1000
 #define	BCM2835_UART0_SIZE	0x90
 #define	BCM2835_PCM_SIZE	0x1000
 #define	BCM2835_SPI0_SIZE	0x1000
 #define	BCM2835_BSC_SIZE	0x1000
 #define	BCM2835_PWM_SIZE	0x28
 #define	BCM2835_AUX_SIZE	0x8
 #define	BCM2835_AUX_UART_SIZE	0x40
 #define	BCM2835_SDHOST_SIZE	0x1000
 #define	BCM2835_EMMC_SIZE	0x1000
 #define	BCM2835_USB_SIZE	0x20000
 #define	BCM2835_DMA15_SIZE	0x100
 #define	BCM2835_BUSADDR_CACHE_MASK	0xc0000000
 #define	BCM2835_BUSADDR_CACHE_COHERENT	0x40000000
 #define	BCM2835_BUSADDR_CACHE_L1L2	0x00000000
 #define	BCM2835_BUSADDR_CACHE_L2ONLY	0x80000000
 #define	BCM2835_BUSADDR_CACHE_DIRECT	0xc0000000
 #define	BCM2835_ARMICU_BASE	(BCM2835_ARM_BASE + 0x0200)
 #define	BCM2835_ARMICU_SIZE	0x200
 #define	BCM2835_VCHIQ_BASE	(BCM2835_ARM_BASE + 0x0800)
 #define	BCM2835_VCHIQ_SIZE	0x50
 #define	BCM2835_ARMMBOX_BASE	(BCM2835_ARM_BASE + 0x0880)
 #define	BCM2835_ARMMBOX_SIZE	0x40
 #define	BCM2835_INTC_BASE	(0x0)	/* Relative to BCM2835_ARMICU_BASE */
 /* Interrupt controller */
 #define	BCM2835_INTC_IRQBPENDING	(BCM2835_INTC_BASE + 0x00)	/* IRQ Basic pending */
 #define	BCM2835_INTC_IRQ1PENDING	(BCM2835_INTC_BASE + 0x04)	/* IRQ pending 1 */
 #define	BCM2835_INTC_IRQ2PENDING	(BCM2835_INTC_BASE + 0x08)	/* IRQ pending 2 */
 #define	BCM2835_INTC_FIQCTL		(BCM2835_INTC_BASE + 0x0c)	/* FIQ control */
 #define	BCM2835_INTC_IRQ1ENABLE		(BCM2835_INTC_BASE + 0x10)	/* Enable IRQs 1 */
 #define	BCM2835_INTC_IRQ2ENABLE		(BCM2835_INTC_BASE + 0x14)	/* Enable IRQs 2 */
 #define	BCM2835_INTC_IRQBENABLE		(BCM2835_INTC_BASE + 0x18)	/* Enable Basic IRQs */
 #define	BCM2835_INTC_IRQ1DISABLE	(BCM2835_INTC_BASE + 0x1c)	/* Disable IRQ 1 */
 #define	BCM2835_INTC_IRQ2DISABLE	(BCM2835_INTC_BASE + 0x20)	/* Disable IRQ 2 */
 #define	BCM2835_INTC_IRQBDISABLE	(BCM2835_INTC_BASE + 0x24)	/* Disable Basic IRQs */
 #define	BCM2835_INTC_ENABLEBASE		(BCM2835_INTC_BASE + 0x10)
 #define	BCM2835_INTC_DISABLEBASE	(BCM2835_INTC_BASE + 0x1c)
 #define	BCM2836_NCPUS			4
 #define	BCM2836_NIRQPERCPU		32
 #define	BCM2836_INT_CNTPSIRQ		0
 #define	BCM2836_INT_CNTPNSIRQ		1
 #define	BCM2836_INT_CNTHPIRQ		2
 #define	BCM2836_INT_CNTVIRQ		3
 #define	BCM2836_INT_MAILBOX0		4
 #define	BCM2836_INT_MAILBOX1		5
 #define	BCM2836_INT_MAILBOX2		6
 #define	BCM2836_INT_MAILBOX3		7
 #define	BCM2836_INT_GPU_FAST		8
 #define	BCM2836_INT_PMU_FAST		9
 #define	BCM2836_INT_ZERO		10
 #define	BCM2836_INT_TIMER		11
 #define	BCM2836_INT_NLOCAL		12
 #define	BCM2836_INT_CNTPSIRQ_CPUN(n)	(BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTPSIRQ)
 #define	BCM2836_INT_CNTPNSIRQ_CPUN(n)	(BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTPNSIRQ)
 #define	BCM2836_INT_CNTVIRQ_CPUN(n)	(BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTVIRQ)
 #define	BCM2836_INT_CNTHPIRQ_CPUN(n)	(BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTHPIRQ)
 #define	BCM2836_INT_MAILBOX0_CPUN(n)	(BCM2836_INT_BASECPUN(n) + BCM2836_INT_MAILBOX0)
 /* Periperal Interrupt sources */
 #define	BCM2835_NIRQ			96
 #define	BCM2835_INT_GPU0BASE		(BCM2835_INT_BASE + 0)
 #define	BCM2835_INT_TIMER0		(BCM2835_INT_GPU0BASE + 0)
 #define	BCM2835_INT_TIMER1		(BCM2835_INT_GPU0BASE + 1)
 #define	BCM2835_INT_TIMER2		(BCM2835_INT_GPU0BASE + 2)
 #define	BCM2835_INT_TIMER3		(BCM2835_INT_GPU0BASE + 3)
 #define	BCM2835_INT_USB			(BCM2835_INT_GPU0BASE + 9)
 #define	BCM2835_INT_DMA0		(BCM2835_INT_GPU0BASE + 16)
 #define	BCM2835_INT_DMA2		(BCM2835_INT_GPU0BASE + 18)
 #define	BCM2835_INT_DMA3		(BCM2835_INT_GPU0BASE + 19)
 #define	BCM2835_INT_AUX			(BCM2835_INT_GPU0BASE + 29)
 #define	BCM2835_INT_ARM			(BCM2835_INT_GPU0BASE + 30)
 #define	BCM2835_INT_GPU1BASE		(BCM2835_INT_BASE + 32)
 #define	BCM2835_INT_GPIO0		(BCM2835_INT_GPU1BASE + 17)
 #define	BCM2835_INT_GPIO1		(BCM2835_INT_GPU1BASE + 18)
 #define	BCM2835_INT_GPIO2		(BCM2835_INT_GPU1BASE + 19)
 #define	BCM2835_INT_GPIO3		(BCM2835_INT_GPU1BASE + 20)
 #define	BCM2835_INT_BSC			(BCM2835_INT_GPU1BASE + 21)
 #define	BCM2835_INT_SPI0		(BCM2835_INT_GPU1BASE + 22)
 #define	BCM2835_INT_PCM			(BCM2835_INT_GPU1BASE + 23)
 #define	BCM2835_INT_SDHOST		(BCM2835_INT_GPU1BASE + 24)
 #define	BCM2835_INT_UART0		(BCM2835_INT_GPU1BASE + 25)
 #define	BCM2835_INT_EMMC		(BCM2835_INT_GPU1BASE + 30)
 #define	BCM2835_INT_BASICBASE		(BCM2835_INT_BASE + 64)
 #define	BCM2835_INT_ARMTIMER		(BCM2835_INT_BASICBASE + 0)
 #define	BCM2835_INT_ARMMAILBOX		(BCM2835_INT_BASICBASE + 1)
 #define	BCM2835_INT_ARMDOORBELL0	(BCM2835_INT_BASICBASE + 2)
 #define	BCM2835_INT_ARMDOORBELL1	(BCM2835_INT_BASICBASE + 3)
 #define	BCM2835_INT_GPU0HALTED		(BCM2835_INT_BASICBASE + 4)
 #define	BCM2835_INT_GPU1HALTED		(BCM2835_INT_BASICBASE + 5)
 #define	BCM2835_INT_ILLEGALTYPE0	(BCM2835_INT_BASICBASE + 6)
 #define	BCM2835_INT_ILLEGALTYPE1	(BCM2835_INT_BASICBASE + 7)
 #define	BCM2835_UART0_CLK		3000000
 #define	BCM2711_ARM_LOCAL_BASE_BUS	0x40000000
 #define	BCM2711_ARM_LOCAL_BASE		0xff800000
-#define	BCM2711_ARM_LOCAL_SIZE		0x00100000	/* 1MByte */
+#define	BCM2711_ARM_LOCAL_SIZE		0x00100000	/* 1MBytes */
 #define	BCM2711_ARM_LOCAL_PHYS_TO_BUS(a) \
     ((a) - BCM2711_ARM_LOCAL_BASE + BCM2711_ARM_LOCAL_BASE_BUS)
 #define	BCM2711_ARM_LOCAL_BUS_TO_PHYS(a) \
     ((a) - BCM2711_ARM_LOCAL_BASE_BUS + BCM2711_ARM_LOCAL_BASE)
 #define	BCM2836_ARM_LOCAL_BASE		0x40000000
 #define	BCM2836_ARM_LOCAL_SIZE		0x00001000	/* 4KBytes */
 #define	BCM2836_LOCAL_CONTROL		0x000
 #define	BCM2836_LOCAL_PRESCALER		0x008
 #define	BCM2836_LOCAL_GPU_INT_ROUTING	0x00c
 #define	BCM2836_LOCAL_PM_ROUTING_SET	0x010
 #define	BCM2836_LOCAL_PM_ROUTING_CLR	0x014
 #define	BCM2836_LOCAL_TIMER_LS		0x01c
 #define	BCM2836_LOCAL_TIMER_MS		0x020
 #define	BCM2836_LOCAL_INT_ROUTING	0x024
 #define	BCM2836_LOCAL_AXI_COUNT		0x02c
 #define	BCM2836_LOCAL_AXI_IRQ		0x030
 #define	BCM2836_LOCAL_TIMER_CONTROL	0x034
 #define	BCM2836_LOCAL_TIMER_WRITE	0x038
 #define	BCM2836_LOCAL_TIMER_IRQ_CONTROL_BASE	0x40
 #define	BCM2836_LOCAL_MAILBOX_IRQ_CONTROL_BASE	0x50
 #define	BCM2836_LOCAL_INTC_IRQPENDING_BASE	0x60
 #define	BCM2836_LOCAL_INTC_FIQPENDING_BASE	0x70
 #define	BCM2836_LOCAL_TIMER_IRQ_CONTROL_SIZE	0x10
 #define	BCM2836_LOCAL_MAILBOX_IRQ_CONTROL_SIZE	0x10
 #define	BCM2836_LOCAL_TIMER_IRQ_CONTROLN(n)	(BCM2836_LOCAL_TIMER_IRQ_CONTROL_BASE + 4*(n))
 #define	BCM2836_LOCAL_MAILBOX_IRQ_CONTROLN(n)	(BCM2836_LOCAL_MAILBOX_IRQ_CONTROL_BASE + 4*(n))
 #define	BCM2836_LOCAL_INTC_IRQPENDINGN(n)	(BCM2836_LOCAL_INTC_IRQPENDING_BASE + 4*(n))
 #define	BCM2836_LOCAL_INTC_FIQPENDINGN(n)	(BCM2836_LOCAL_INTC_FIQPENDING_BASE + 4*(n))
 #define	BCM2836_LOCAL_MAILBOX0_SETN(n)		(0x80 + 0x10 * (n))
 #define	BCM2836_LOCAL_MAILBOX1_SETN(n)		(0x84 + 0x10 * (n))
 #define	BCM2836_LOCAL_MAILBOX2_SETN(n)		(0x88 + 0x10 * (n))
 #define	BCM2836_LOCAL_MAILBOX3_SETN(n)		(0x8c + 0x10 * (n))
 #define	BCM2836_LOCAL_MAILBOX0_CLRN(n)		(0xc0 + 0x10 * (n))
 #define	BCM2836_LOCAL_MAILBOX1_CLRN(n)		(0xc4 + 0x10 * (n))
 #define	BCM2836_LOCAL_MAILBOX2_CLRN(n)		(0xc8 + 0x10 * (n))
 #define	BCM2836_LOCAL_MAILBOX3_CLRN(n)		(0xcc + 0x10 * (n))
 #define	BCM2836_ARM_SMP_BASE		0x00000000
 #define	BCM2836_ARM_SMP_SIZE		0x00001000	/* 4KBytes */
 #endif /* _BCM2835REG_H_ */

 @@ -1,1335 +1,1335 @@
-/*	$NetBSD: bcm283x_platform.c,v 1.30 2019/12/30 16:06:29 skrll Exp $	*/
+/*	$NetBSD: bcm283x_platform.c,v 1.31 2019/12/30 16:19:27 skrll Exp $	*/
 /*-
  * Copyright (c) 2017 Jared D. McNeill <jmcneill@invisible.ca>
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcm283x_platform.c,v 1.30 2019/12/30 16:06:29 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm283x_platform.c,v 1.31 2019/12/30 16:19:27 skrll Exp $");
 #include "opt_arm_debug.h"
 #include "opt_bcm283x.h"
 #include "opt_cpuoptions.h"
 #include "opt_ddb.h"
 #include "opt_evbarm_boardtype.h"
 #include "opt_kgdb.h"
 #include "opt_fdt.h"
 #include "opt_rpi.h"
 #include "opt_vcprop.h"
 #include "sdhc.h"
 #include "bcmsdhost.h"
 #include "bcmdwctwo.h"
 #include "bcmspi.h"
 #include "bsciic.h"
 #include "plcom.h"
 #include "com.h"
 #include "genfb.h"
 #include "ukbd.h"
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/cpu.h>
 #include <sys/device.h>
 #include <sys/termios.h>
 #include <net/if_ether.h>
 #include <prop/proplib.h>
 #include <dev/fdt/fdtvar.h>
 #include <uvm/uvm_extern.h>
 #include <machine/bootconfig.h>
 #include <arm/armreg.h>
 #include <arm/cpufunc.h>
 #include <libfdt.h>
 #include <arm/broadcom/bcm2835reg.h>
 #include <arm/broadcom/bcm2835var.h>
 #include <arm/broadcom/bcm283x_platform.h>
 #include <arm/broadcom/bcm2835_intr.h>
 #include <arm/broadcom/bcm2835_mbox.h>
 #include <arm/broadcom/bcm2835_pmwdogvar.h>
 #include <evbarm/dev/plcomreg.h>
 #include <evbarm/dev/plcomvar.h>
 #include <evbarm/fdt/machdep.h>
 #include <dev/ic/ns16550reg.h>
 #include <dev/ic/comreg.h>
 #include <evbarm/rpi/vcio.h>
 #include <evbarm/rpi/vcpm.h>
 #include <evbarm/rpi/vcprop.h>
 #include <arm/fdt/arm_fdtvar.h>
 #include <arm/cortex/gtmr_var.h>
 #if NGENFB > 0
 #include <dev/videomode/videomode.h>
 #include <dev/videomode/edidvar.h>
 #include <dev/wscons/wsconsio.h>
 #endif
 #if NUKBD > 0
 #include <dev/usb/ukbdvar.h>
 #endif
 #ifdef DDB
 #include <machine/db_machdep.h>
 #include <ddb/db_sym.h>
 #include <ddb/db_extern.h>
 #endif
 #define RPI_CPU_MAX	4
 void bcm2835_platform_early_putchar(char c);
 void bcm2836_platform_early_putchar(char c);
 void bcm2837_platform_early_putchar(char c);
 void bcm2711_platform_early_putchar(char c);
 extern void bcmgenfb_set_console_dev(device_t dev);
 void bcmgenfb_set_ioctl(int(*)(void *, void *, u_long, void *, int, struct lwp *));
 extern void bcmgenfb_ddb_trap_callback(int where);
 static int rpi_ioctl(void *, void *, u_long, void *, int, lwp_t *);
 extern struct bus_space arm_generic_bs_tag;
 extern struct bus_space arm_generic_a4x_bs_tag;
 /* Prototypes for all the bus_space structure functions */
 bs_protos(arm_generic);
 bs_protos(arm_generic_a4x);
 bs_protos(bcm2835);
 bs_protos(bcm2835_a4x);
 bs_protos(bcm2836);
 bs_protos(bcm2836_a4x);
 bs_protos(bcm2711);
 bs_protos(bcm2711_a4x);
 struct bus_space bcm2835_bs_tag;
 struct bus_space bcm2835_a4x_bs_tag;
 struct bus_space bcm2836_bs_tag;
 struct bus_space bcm2836_a4x_bs_tag;
 struct bus_space bcm2711_bs_tag;
 struct bus_space bcm2711_a4x_bs_tag;
 static paddr_t bcm2835_bus_to_phys(bus_addr_t);
 static paddr_t bcm2836_bus_to_phys(bus_addr_t);
 static paddr_t bcm2711_bus_to_phys(bus_addr_t);
 #ifdef VERBOSE_INIT_ARM
 #define VPRINTF(...)	printf(__VA_ARGS__)
 #else
 #define VPRINTF(...)	__nothing
 #endif
 static paddr_t
 bcm2835_bus_to_phys(bus_addr_t ba)
+{
 	/* Attempt to find the PA device mapping */
 	if (ba >= BCM283X_PERIPHERALS_BASE_BUS &&
 	    ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE)
 		return BCM2835_PERIPHERALS_BUS_TO_PHYS(ba);
 	return ba & ~BCM2835_BUSADDR_CACHE_MASK;
+}
 static paddr_t
 bcm2836_bus_to_phys(bus_addr_t ba)
+{
 	/* Attempt to find the PA device mapping */
 	if (ba >= BCM283X_PERIPHERALS_BASE_BUS &&
 	    ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE)
 		return BCM2836_PERIPHERALS_BUS_TO_PHYS(ba);
 	if (ba >= BCM2836_ARM_LOCAL_BASE &&
 	    ba < BCM2836_ARM_LOCAL_BASE + BCM2836_ARM_LOCAL_SIZE)
 		return ba;
 	return ba & ~BCM2835_BUSADDR_CACHE_MASK;
+}
 static paddr_t
 bcm2711_bus_to_phys(bus_addr_t ba)
+{
 	/* Attempt to find the PA device mapping */
 	if (ba >= BCM283X_PERIPHERALS_BASE_BUS &&
 	    ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE)
 		return BCM2711_PERIPHERALS_BUS_TO_PHYS(ba);
-	if (ba >= BCM2711_ARM_LOCAL_BASE &&
+	if (ba >= BCM2711_ARM_LOCAL_BASE_BUS &&
-	    ba < BCM2711_ARM_LOCAL_BASE + BCM2711_ARM_LOCAL_SIZE)
+	    ba < BCM2711_ARM_LOCAL_BASE_BUS + BCM2711_ARM_LOCAL_SIZE)
-		return ba;
+		return BCM2711_ARM_LOCAL_BUS_TO_PHYS(ba);
 	return ba & ~BCM2835_BUSADDR_CACHE_MASK;
+}
 int
 bcm2835_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag,
     bus_space_handle_t *bshp)
+{
 	const paddr_t pa = bcm2835_bus_to_phys(ba);
 	return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp);
+}
 paddr_t
 bcm2835_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
+{
 	const paddr_t pa = bcm2835_bus_to_phys(ba);
 	return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags);
+}
 paddr_t
 bcm2835_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
+{
 	return bcm2835_bs_mmap(t, ba, 4 * offset, prot, flags);
+}
 int
 bcm2836_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag,
     bus_space_handle_t *bshp)
+{
 	const paddr_t pa = bcm2836_bus_to_phys(ba);
 	return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp);
+}
 paddr_t
 bcm2836_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
+{
 	const paddr_t pa = bcm2836_bus_to_phys(ba);
 	return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags);
+}
 paddr_t
 bcm2836_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
+{
 	return bcm2836_bs_mmap(t, ba, 4 * offset, prot, flags);
+}
 int
 bcm2711_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag,
     bus_space_handle_t *bshp)
+{
 	const paddr_t pa = bcm2711_bus_to_phys(ba);
 	return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp);
+}
 paddr_t
 bcm2711_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
+{
 	const paddr_t pa = bcm2711_bus_to_phys(ba);
 	return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags);
+}
 paddr_t
 bcm2711_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
+{
 	return bcm2711_bs_mmap(t, ba, 4 * offset, prot, flags);
+}
 struct arm32_dma_range bcm2835_dma_ranges[] = {
 	[0] = {
 		.dr_sysbase = 0,
 		.dr_busbase = BCM2835_BUSADDR_CACHE_COHERENT,
+	}
 };
 struct arm32_dma_range bcm2836_dma_ranges[] = {
 	[0] = {
 		.dr_sysbase = 0,
 		.dr_busbase = BCM2835_BUSADDR_CACHE_DIRECT,
+	}
 };
 struct arm32_dma_range bcm2711_dma_ranges[] = {
 	[0] = {
 		.dr_sysbase = 0,
 		.dr_busbase = BCM2835_BUSADDR_CACHE_DIRECT,
+	}
 };
 #if defined(SOC_BCM2835)
 static const struct pmap_devmap *
 bcm2835_platform_devmap(void)
+{
 	static const struct pmap_devmap devmap[] = {
 		DEVMAP_ENTRY(BCM2835_PERIPHERALS_VBASE, BCM2835_PERIPHERALS_BASE,
 		    BCM283X_PERIPHERALS_SIZE),	/* 16Mb */
 		DEVMAP_ENTRY_END
 	};
 	return devmap;
+}
 #endif
 #if defined(SOC_BCM2836)
 static const struct pmap_devmap *
 bcm2836_platform_devmap(void)
+{
 	static const struct pmap_devmap devmap[] = {
 		DEVMAP_ENTRY(BCM2836_PERIPHERALS_VBASE, BCM2836_PERIPHERALS_BASE,
 		    BCM283X_PERIPHERALS_SIZE),	/* 16Mb */
 		DEVMAP_ENTRY(BCM2836_ARM_LOCAL_VBASE, BCM2836_ARM_LOCAL_BASE,
 		    BCM2836_ARM_LOCAL_SIZE),
 #if defined(MULTIPROCESSOR) && defined(__aarch64__)
 		/* for fdt cpu spin-table */
 		DEVMAP_ENTRY(BCM2836_ARM_SMP_VBASE, BCM2836_ARM_SMP_BASE,
 		    BCM2836_ARM_SMP_SIZE),
 #endif
 		DEVMAP_ENTRY_END
 	};
 	return devmap;
+}
 static const struct pmap_devmap *
 bcm2711_platform_devmap(void)
+{
 	static const struct pmap_devmap devmap[] = {
 		DEVMAP_ENTRY(BCM2711_PERIPHERALS_VBASE, BCM2711_PERIPHERALS_BASE,
 		    BCM283X_PERIPHERALS_SIZE),	/* 16Mb */
 		DEVMAP_ENTRY(BCM2711_ARM_LOCAL_VBASE, BCM2711_ARM_LOCAL_BASE,
 		    BCM2711_ARM_LOCAL_SIZE),
 #if defined(MULTIPROCESSOR) && defined(__aarch64__)
 		/* for fdt cpu spin-table */
-		DEVMAP_ENTRY(BCM2836_ARM_SMP_VBASE, BCM2836_ARM_SMP_BASE,
+		DEVMAP_ENTRY(BCM2711_ARM_SMP_VBASE, BCM2836_ARM_SMP_BASE,
 		    BCM2836_ARM_SMP_SIZE),
 #endif
 		DEVMAP_ENTRY_END
 	};
 	return devmap;
+}
 #endif
 /*
  * Macros to translate between physical and virtual for a subset of the
  * kernel address space.  *Not* for general use.
  */
 #ifndef RPI_FB_WIDTH
 #define RPI_FB_WIDTH	1280
 #endif
 #ifndef RPI_FB_HEIGHT
 #define RPI_FB_HEIGHT	720
 #endif
 int uart_clk = BCM2835_UART0_CLK;
 int core_clk;
 static struct {
 	struct vcprop_buffer_hdr	vb_hdr;
 	struct vcprop_tag_clockrate	vbt_uartclockrate;
 	struct vcprop_tag_clockrate	vbt_vpuclockrate;
 	struct vcprop_tag end;
 } vb_uart __cacheline_aligned = {
 	.vb_hdr = {
 		.vpb_len = sizeof(vb_uart),
 		.vpb_rcode = VCPROP_PROCESS_REQUEST,
 	},
 	.vbt_uartclockrate = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_GET_CLOCKRATE,
 			.vpt_len = VCPROPTAG_LEN(vb_uart.vbt_uartclockrate),
 			.vpt_rcode = VCPROPTAG_REQUEST
 		},
 		.id = VCPROP_CLK_UART
 	},
 	.vbt_vpuclockrate = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_GET_CLOCKRATE,
 			.vpt_len = VCPROPTAG_LEN(vb_uart.vbt_vpuclockrate),
 			.vpt_rcode = VCPROPTAG_REQUEST
 		},
 		.id = VCPROP_CLK_CORE
 	},
 	.end = {
 		.vpt_tag = VCPROPTAG_NULL
+	}
 };
 static struct {
 	struct vcprop_buffer_hdr	vb_hdr;
 	struct vcprop_tag_fwrev		vbt_fwrev;
 	struct vcprop_tag_boardmodel	vbt_boardmodel;
 	struct vcprop_tag_boardrev	vbt_boardrev;
 	struct vcprop_tag_macaddr	vbt_macaddr;
 	struct vcprop_tag_memory	vbt_memory;
 	struct vcprop_tag_boardserial	vbt_serial;
 	struct vcprop_tag_dmachan	vbt_dmachan;
 	struct vcprop_tag_cmdline	vbt_cmdline;
 	struct vcprop_tag_clockrate	vbt_emmcclockrate;
 	struct vcprop_tag_clockrate	vbt_armclockrate;
 	struct vcprop_tag_clockrate	vbt_vpuclockrate;
 	struct vcprop_tag_clockrate	vbt_emmc2clockrate;
 	struct vcprop_tag end;
 } vb __cacheline_aligned = {
 	.vb_hdr = {
 		.vpb_len = sizeof(vb),
 		.vpb_rcode = VCPROP_PROCESS_REQUEST,
 	},
 	.vbt_fwrev = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_GET_FIRMWAREREV,
 			.vpt_len = VCPROPTAG_LEN(vb.vbt_fwrev),
 			.vpt_rcode = VCPROPTAG_REQUEST
 		},
 	},
 	.vbt_boardmodel = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_GET_BOARDMODEL,
 			.vpt_len = VCPROPTAG_LEN(vb.vbt_boardmodel),
 			.vpt_rcode = VCPROPTAG_REQUEST
 		},
 	},
 	.vbt_boardrev = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_GET_BOARDREVISION,
 			.vpt_len = VCPROPTAG_LEN(vb.vbt_boardrev),
 			.vpt_rcode = VCPROPTAG_REQUEST
 		},
 	},
 	.vbt_macaddr = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_GET_MACADDRESS,
 			.vpt_len = VCPROPTAG_LEN(vb.vbt_macaddr),
 			.vpt_rcode = VCPROPTAG_REQUEST
 		},
 	},
 	.vbt_memory = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_GET_ARMMEMORY,
 			.vpt_len = VCPROPTAG_LEN(vb.vbt_memory),
 			.vpt_rcode = VCPROPTAG_REQUEST
 		},
 	},
 	.vbt_serial = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_GET_BOARDSERIAL,
 			.vpt_len = VCPROPTAG_LEN(vb.vbt_serial),
 			.vpt_rcode = VCPROPTAG_REQUEST
 		},
 	},
 	.vbt_dmachan = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_GET_DMACHAN,
 			.vpt_len = VCPROPTAG_LEN(vb.vbt_dmachan),
 			.vpt_rcode = VCPROPTAG_REQUEST
 		},
 	},
 	.vbt_cmdline = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_GET_CMDLINE,
 			.vpt_len = VCPROPTAG_LEN(vb.vbt_cmdline),
 			.vpt_rcode = VCPROPTAG_REQUEST
 		},
 	},
 	.vbt_emmcclockrate = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_GET_CLOCKRATE,
 			.vpt_len = VCPROPTAG_LEN(vb.vbt_emmcclockrate),
 			.vpt_rcode = VCPROPTAG_REQUEST
 		},
 		.id = VCPROP_CLK_EMMC
 	},
 	.vbt_armclockrate = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_GET_CLOCKRATE,
 			.vpt_len = VCPROPTAG_LEN(vb.vbt_armclockrate),
 			.vpt_rcode = VCPROPTAG_REQUEST
 		},
 		.id = VCPROP_CLK_ARM
 	},
 	.vbt_vpuclockrate = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_GET_CLOCKRATE,
 			.vpt_len = VCPROPTAG_LEN(vb.vbt_vpuclockrate),
 			.vpt_rcode = VCPROPTAG_REQUEST
 		},
 		.id = VCPROP_CLK_CORE
 	},
 	.vbt_emmc2clockrate = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_GET_CLOCKRATE,
 			.vpt_len = VCPROPTAG_LEN(vb.vbt_emmc2clockrate),
 			.vpt_rcode = VCPROPTAG_REQUEST
 		},
 		.id = VCPROP_CLK_EMMC2
 	},
 	.end = {
 		.vpt_tag = VCPROPTAG_NULL
+	}
 };
 #if NGENFB > 0
 static struct {
 	struct vcprop_buffer_hdr	vb_hdr;
 	struct vcprop_tag_edidblock	vbt_edid;
 	struct vcprop_tag end;
 } vb_edid __cacheline_aligned = {
 	.vb_hdr = {
 		.vpb_len = sizeof(vb_edid),
 		.vpb_rcode = VCPROP_PROCESS_REQUEST,
 	},
 	.vbt_edid = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_GET_EDID_BLOCK,
 			.vpt_len = VCPROPTAG_LEN(vb_edid.vbt_edid),
 			.vpt_rcode = VCPROPTAG_REQUEST,
 		},
 		.blockno = 0,
 	},
 	.end = {
 		.vpt_tag = VCPROPTAG_NULL
+	}
 };
 static struct {
 	struct vcprop_buffer_hdr	vb_hdr;
 	struct vcprop_tag_fbres		vbt_res;
 	struct vcprop_tag_fbres		vbt_vres;
 	struct vcprop_tag_fbdepth	vbt_depth;
 	struct vcprop_tag_fbalpha	vbt_alpha;
 	struct vcprop_tag_allocbuf	vbt_allocbuf;
 	struct vcprop_tag_blankscreen	vbt_blank;
 	struct vcprop_tag_fbpitch	vbt_pitch;
 	struct vcprop_tag end;
 } vb_setfb __cacheline_aligned = {
 	.vb_hdr = {
 		.vpb_len = sizeof(vb_setfb),
 		.vpb_rcode = VCPROP_PROCESS_REQUEST,
 	},
 	.vbt_res = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_SET_FB_RES,
 			.vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_res),
 			.vpt_rcode = VCPROPTAG_REQUEST,
 		},
 		.width = 0,
 		.height = 0,
 	},
 	.vbt_vres = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_SET_FB_VRES,
 			.vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_vres),
 			.vpt_rcode = VCPROPTAG_REQUEST,
 		},
 		.width = 0,
 		.height = 0,
 	},
 	.vbt_depth = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_SET_FB_DEPTH,
 			.vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_depth),
 			.vpt_rcode = VCPROPTAG_REQUEST,
 		},
 		.bpp = 32,
 	},
 	.vbt_alpha = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_SET_FB_ALPHA_MODE,
 			.vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_alpha),
 			.vpt_rcode = VCPROPTAG_REQUEST,
 		},
 		.state = VCPROP_ALPHA_IGNORED,
 	},
 	.vbt_allocbuf = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_ALLOCATE_BUFFER,
 			.vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_allocbuf),
 			.vpt_rcode = VCPROPTAG_REQUEST,
 		},
 		.address = PAGE_SIZE,	/* alignment */
 	},
 	.vbt_blank = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_BLANK_SCREEN,
 			.vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_blank),
 			.vpt_rcode = VCPROPTAG_REQUEST,
 		},
 		.state = VCPROP_BLANK_OFF,
 	},
 	.vbt_pitch = {
 		.tag = {
 			.vpt_tag = VCPROPTAG_GET_FB_PITCH,
 			.vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_pitch),
 			.vpt_rcode = VCPROPTAG_REQUEST,
 		},
 	},
 	.end = {
 		.vpt_tag = VCPROPTAG_NULL,
 	},
 };
 #endif
 static int rpi_video_on = WSDISPLAYIO_VIDEO_ON;
 #if defined(RPI_HWCURSOR)
 #define CURSOR_BITMAP_SIZE	(64 * 8)
 #define CURSOR_ARGB_SIZE	(64 * 64 * 4)
 static uint32_t hcursor = 0;
 static bus_addr_t pcursor = 0;
 static uint32_t *cmem = NULL;
 static int cursor_x = 0, cursor_y = 0, hot_x = 0, hot_y = 0, cursor_on = 0;
 static uint32_t cursor_cmap[4];
 static uint8_t cursor_mask[8 * 64], cursor_bitmap[8 * 64];
 #endif
 u_int
 bcm283x_clk_get_rate_uart(void)
+{
 	if (vcprop_tag_success_p(&vb_uart.vbt_uartclockrate.tag))
 		return vb_uart.vbt_uartclockrate.rate;
 	return 0;
+}
 u_int
 bcm283x_clk_get_rate_vpu(void)
+{
 	if (vcprop_tag_success_p(&vb.vbt_vpuclockrate.tag) &&
 	    vb.vbt_vpuclockrate.rate > 0) {
 		return vb.vbt_vpuclockrate.rate;
+	}
 	return 0;
+}
 u_int
 bcm283x_clk_get_rate_emmc(void)
+{
 	if (vcprop_tag_success_p(&vb.vbt_emmcclockrate.tag) &&
 	    vb.vbt_emmcclockrate.rate > 0) {
 		return vb.vbt_emmcclockrate.rate;
+	}
 	return 0;
+}
 u_int
 bcm283x_clk_get_rate_emmc2(void)
+{
 	if (vcprop_tag_success_p(&vb.vbt_emmc2clockrate.tag) &&
 	    vb.vbt_emmc2clockrate.rate > 0) {
 		return vb.vbt_emmc2clockrate.rate;
+	}
 	return 0;
+}
 static void
 bcm283x_uartinit(bus_space_tag_t iot, bus_space_handle_t ioh)
+{
 	uint32_t res;
 	bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANARM2VC,
 	    KERN_VTOPHYS((vaddr_t)&vb_uart));
 	bcm2835_mbox_read(iot, ioh, BCMMBOX_CHANARM2VC, &res);
 	if (vcprop_tag_success_p(&vb_uart.vbt_uartclockrate.tag))
 		uart_clk = vb_uart.vbt_uartclockrate.rate;
 	if (vcprop_tag_success_p(&vb_uart.vbt_vpuclockrate.tag))
 		core_clk = vb_uart.vbt_vpuclockrate.rate;
+}
 #if defined(SOC_BCM2835)
 static void
 bcm2835_uartinit(void)
+{
 	const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
 	const bus_space_tag_t iot = &bcm2835_bs_tag;
 	const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
 	bcm283x_uartinit(iot, ioh);
+}
 #endif
 #if defined(SOC_BCM2836)
 static void
 bcm2836_uartinit(void)
+{
 	const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
 	const bus_space_tag_t iot = &bcm2836_bs_tag;
 	const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
 	bcm283x_uartinit(iot, ioh);
+}
 static void
 bcm2711_uartinit(void)
+{
 	const paddr_t pa = BCM2711_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
 	const bus_space_tag_t iot = &bcm2711_bs_tag;
 	const bus_space_handle_t ioh = BCM2711_IOPHYSTOVIRT(pa);
 	bcm283x_uartinit(iot, ioh);
+}
 #endif
 #define	BCM283x_MINIMUM_SPLIT	(128U * 1024 * 1024)
 static size_t bcm283x_memorysize;
 static void
 bcm283x_bootparams(bus_space_tag_t iot, bus_space_handle_t ioh)
+{
 	uint32_t res;
 	bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANPM, (
 #if (NSDHC > 0)
 	    (1 << VCPM_POWER_SDCARD) |
 #endif
 #if (NPLCOM > 0)
 	    (1 << VCPM_POWER_UART0) |
 #endif
 #if (NBCMDWCTWO > 0)
 	    (1 << VCPM_POWER_USB) |
 #endif
 #if (NBSCIIC > 0)
 	    (1 << VCPM_POWER_I2C0) | (1 << VCPM_POWER_I2C1) |
 	/*  (1 << VCPM_POWER_I2C2) | */
 #endif
 #if (NBCMSPI > 0)
 	    (1 << VCPM_POWER_SPI) |
 #endif
 ) << 4);
 	bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANARM2VC,
 	    KERN_VTOPHYS((vaddr_t)&vb));
 	bcm2835_mbox_read(iot, ioh, BCMMBOX_CHANARM2VC, &res);
 	/*
 	 * RPI4 has Cortex A72 processors which do speculation, so
 	 * we need to invalidate the cache for an updates done by
 	 * the firmware
 	 */
 	cpu_dcache_inv_range((vaddr_t)&vb, sizeof(vb));
 	if (!vcprop_buffer_success_p(&vb.vb_hdr)) {
 		bootconfig.dramblocks = 1;
 		bootconfig.dram[0].address = 0x0;
 		bootconfig.dram[0].pages = atop(BCM283x_MINIMUM_SPLIT);
 		return;
+	}
 	struct vcprop_tag_memory *vptp_mem = &vb.vbt_memory;
 	if (vcprop_tag_success_p(&vptp_mem->tag)) {
 		size_t n = vcprop_tag_resplen(&vptp_mem->tag) /
 		    sizeof(struct vcprop_memory);
 		bcm283x_memorysize = 0;
 		bootconfig.dramblocks = 0;
 		for (int i = 0; i < n && i < DRAM_BLOCKS; i++) {
 			bootconfig.dram[i].address = vptp_mem->mem[i].base;
 			bootconfig.dram[i].pages = atop(vptp_mem->mem[i].size);
 			bootconfig.dramblocks++;
 			bcm283x_memorysize += vptp_mem->mem[i].size;
+		}
+	}
 	if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag))
 		curcpu()->ci_data.cpu_cc_freq = vb.vbt_armclockrate.rate;
 #ifdef VERBOSE_INIT_ARM
 	if (vcprop_tag_success_p(&vb.vbt_memory.tag))
 		printf("%s: memory size  %zu\n", __func__,
 		    bcm283x_memorysize);
 	if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag))
 		printf("%s: arm clock    %d\n", __func__,
 		    vb.vbt_armclockrate.rate);
 	if (vcprop_tag_success_p(&vb.vbt_vpuclockrate.tag))
 		printf("%s: vpu clock    %d\n", __func__,
 		    vb.vbt_vpuclockrate.rate);
 	if (vcprop_tag_success_p(&vb.vbt_emmcclockrate.tag))
 		printf("%s: emmc clock   %d\n", __func__,
 		    vb.vbt_emmcclockrate.rate);
 	if (vcprop_tag_success_p(&vb.vbt_emmc2clockrate.tag))
 		printf("%s: emmc2 clock  %d\n", __func__,
 		    vb.vbt_emmcclockrate.rate);
 	if (vcprop_tag_success_p(&vb.vbt_fwrev.tag))
 		printf("%s: firmware rev %x\n", __func__,
 		    vb.vbt_fwrev.rev);
 	if (vcprop_tag_success_p(&vb.vbt_boardmodel.tag))
 		printf("%s: board model  %x\n", __func__,
 		    vb.vbt_boardmodel.model);
 	if (vcprop_tag_success_p(&vb.vbt_macaddr.tag))
 		printf("%s: mac-address  %" PRIx64 "\n", __func__,
 		    vb.vbt_macaddr.addr);
 	if (vcprop_tag_success_p(&vb.vbt_boardrev.tag))
 		printf("%s: board rev    %x\n", __func__,
 		    vb.vbt_boardrev.rev);
 	if (vcprop_tag_success_p(&vb.vbt_serial.tag))
 		printf("%s: board serial %" PRIx64 "\n", __func__,
 		    vb.vbt_serial.sn);
 	if (vcprop_tag_success_p(&vb.vbt_dmachan.tag))
 		printf("%s: DMA channel mask 0x%08x\n", __func__,
 		    vb.vbt_dmachan.mask);
 	if (vcprop_tag_success_p(&vb.vbt_cmdline.tag))
 		printf("%s: cmdline      %s\n", __func__,
 		    vb.vbt_cmdline.cmdline);
 #endif
+}
 #if defined(SOC_BCM2835)
 static void
 bcm2835_bootparams(void)
+{
 	const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
 	const bus_space_tag_t iot = &bcm2835_bs_tag;
 	const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
 	bcm283x_bootparams(iot, ioh);
+}
 #endif
 #if defined(SOC_BCM2836)
 static void
 bcm2836_bootparams(void)
+{
 	const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
 	const bus_space_tag_t iot = &bcm2836_bs_tag;
 	const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
 	bcm283x_bootparams(iot, ioh);
+}
 static void
 bcm2711_bootparams(void)
+{
 	const paddr_t pa = BCM2711_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
 	const bus_space_tag_t iot = &bcm2711_bs_tag;
 	const bus_space_handle_t ioh = BCM2711_IOPHYSTOVIRT(pa);
 	bcm283x_bootparams(iot, ioh);
+}
 #if defined(MULTIPROCESSOR)
 static int
 cpu_enable_bcm2836(int phandle)
+{
 	bus_space_tag_t iot = &bcm2836_bs_tag;
 	bus_space_handle_t ioh = BCM2836_ARM_LOCAL_VBASE;
 	uint64_t mpidr;
 	fdtbus_get_reg64(phandle, 0, &mpidr, NULL);
 	const u_int cpuno = __SHIFTOUT(mpidr, MPIDR_AFF0);
 	bus_space_write_4(iot, ioh, BCM2836_LOCAL_MAILBOX3_SETN(cpuno),
 	    KERN_VTOPHYS((vaddr_t)cpu_mpstart));
 	return 0;
+}
 ARM_CPU_METHOD(bcm2836, "brcm,bcm2836-smp", cpu_enable_bcm2836);
 #endif
 #endif	/* SOC_BCM2836 */
 #if NGENFB > 0
 static bool
 rpi_fb_parse_mode(const char *s, uint32_t *pwidth, uint32_t *pheight)
+{
 	char *x;
 	if (strncmp(s, "disable", 7) == 0)
 		return false;
 	x = strchr(s, 'x');
 	if (x) {
 		*pwidth = strtoul(s, NULL, 10);
 		*pheight = strtoul(x + 1, NULL, 10);
+	}
 	return true;
+}
 static bool
 rpi_fb_get_edid_mode(uint32_t *pwidth, uint32_t *pheight)
+{
 	struct edid_info ei;
 	uint8_t edid_data[1024];
 	uint32_t res;
 	int error;
 	error = bcmmbox_request(BCMMBOX_CHANARM2VC, &vb_edid,
 	    sizeof(vb_edid), &res);
 	if (error) {
 		printf("%s: mbox request failed (%d)\n", __func__, error);
 		return false;
+	}
 	if (!vcprop_buffer_success_p(&vb_edid.vb_hdr) ||
 	    !vcprop_tag_success_p(&vb_edid.vbt_edid.tag) ||
 	    vb_edid.vbt_edid.status != 0)
 		return false;
 	memset(edid_data, 0, sizeof(edid_data));
 	memcpy(edid_data, vb_edid.vbt_edid.data,
 	    sizeof(vb_edid.vbt_edid.data));
 	edid_parse(edid_data, &ei);
 #ifdef VERBOSE_INIT_ARM
 	edid_print(&ei);
 #endif
 	if (ei.edid_preferred_mode) {
 		*pwidth = ei.edid_preferred_mode->hdisplay;
 		*pheight = ei.edid_preferred_mode->vdisplay;
+	}
 	return true;
+}
 /*
  * Initialize framebuffer console.
+ *
  * Some notes about boot parameters:
  *  - If "fb=disable" is present, ignore framebuffer completely.
  *  - If "fb=<width>x<height> is present, use the specified mode.
  *  - If "console=fb" is present, attach framebuffer to console.
  */
 static bool
 rpi_fb_init(prop_dictionary_t dict, void *aux)
+{
 	uint32_t width = 0, height = 0;
 	uint32_t res;
 	char *ptr;
 	int integer;
 	int error;
 	bool is_bgr = true;
 	if (get_bootconf_option(boot_args, "fb",
 			      BOOTOPT_TYPE_STRING, &ptr)) {
 		if (rpi_fb_parse_mode(ptr, &width, &height) == false)
 			return false;
+	}
 	if (width == 0 || height == 0) {
 		rpi_fb_get_edid_mode(&width, &height);
+	}
 	if (width == 0 || height == 0) {
 		width = RPI_FB_WIDTH;
 		height = RPI_FB_HEIGHT;
+	}
 	vb_setfb.vbt_res.width = width;
 	vb_setfb.vbt_res.height = height;
 	vb_setfb.vbt_vres.width = width;
 	vb_setfb.vbt_vres.height = height;
 	error = bcmmbox_request(BCMMBOX_CHANARM2VC, &vb_setfb,
 	    sizeof(vb_setfb), &res);
 	if (error) {
 		printf("%s: mbox request failed (%d)\n", __func__, error);
 		return false;
+	}
 	if (!vcprop_buffer_success_p(&vb_setfb.vb_hdr) ||
 	    !vcprop_tag_success_p(&vb_setfb.vbt_res.tag) ||
 	    !vcprop_tag_success_p(&vb_setfb.vbt_vres.tag) ||
 	    !vcprop_tag_success_p(&vb_setfb.vbt_depth.tag) ||
 	    !vcprop_tag_success_p(&vb_setfb.vbt_allocbuf.tag) ||
 	    !vcprop_tag_success_p(&vb_setfb.vbt_blank.tag) ||
 	    !vcprop_tag_success_p(&vb_setfb.vbt_pitch.tag)) {
 		printf("%s: prop tag failed\n", __func__);
 		return false;
+	}
 #ifdef VERBOSE_INIT_ARM
 	printf("%s: addr = 0x%x size = %d\n", __func__,
 	    vb_setfb.vbt_allocbuf.address,
 	    vb_setfb.vbt_allocbuf.size);
 	printf("%s: depth = %d\n", __func__, vb_setfb.vbt_depth.bpp);
 	printf("%s: pitch = %d\n", __func__,
 	    vb_setfb.vbt_pitch.linebytes);
 	printf("%s: width = %d height = %d\n", __func__,
 	    vb_setfb.vbt_res.width, vb_setfb.vbt_res.height);
 	printf("%s: vwidth = %d vheight = %d\n", __func__,
 	    vb_setfb.vbt_vres.width, vb_setfb.vbt_vres.height);
 #endif
 	if (vb_setfb.vbt_allocbuf.address == 0 ||
 	    vb_setfb.vbt_allocbuf.size == 0 ||
 	    vb_setfb.vbt_res.width == 0 ||
 	    vb_setfb.vbt_res.height == 0 ||
 	    vb_setfb.vbt_vres.width == 0 ||
 	    vb_setfb.vbt_vres.height == 0 ||
 	    vb_setfb.vbt_pitch.linebytes == 0) {
 		printf("%s: failed to set mode %ux%u\n", __func__,
 		    width, height);
 		return false;
+	}
 	prop_dictionary_set_uint32(dict, "width", vb_setfb.vbt_res.width);
 	prop_dictionary_set_uint32(dict, "height", vb_setfb.vbt_res.height);
 	prop_dictionary_set_uint8(dict, "depth", vb_setfb.vbt_depth.bpp);
 	prop_dictionary_set_uint16(dict, "linebytes",
 	    vb_setfb.vbt_pitch.linebytes);
 	prop_dictionary_set_uint32(dict, "address",
 	    vb_setfb.vbt_allocbuf.address);
 	/*
 	 * Old firmware uses BGR. New firmware uses RGB. The get and set
 	 * pixel order mailbox properties don't seem to work. The firmware
 	 * adds a kernel cmdline option bcm2708_fb.fbswap=<0|1>, so use it
 	 * to determine pixel order. 0 means BGR, 1 means RGB.
+	 *
 	 * See https://github.com/raspberrypi/linux/issues/514
 	 */
 	if (get_bootconf_option(boot_args, "bcm2708_fb.fbswap",
 				BOOTOPT_TYPE_INT, &integer)) {
 		is_bgr = integer == 0;
+	}
 	prop_dictionary_set_bool(dict, "is_bgr", is_bgr);
 	/* if "genfb.type=<n>" is passed in cmdline, override wsdisplay type */
 	if (get_bootconf_option(boot_args, "genfb.type",
 				BOOTOPT_TYPE_INT, &integer)) {
 		prop_dictionary_set_uint32(dict, "wsdisplay_type", integer);
+	}
 #if defined(RPI_HWCURSOR)
 	struct fdt_attach_args *faa = aux;
 	bus_space_handle_t hc;
 	hcursor = rpi_alloc_mem(CURSOR_ARGB_SIZE, PAGE_SIZE,
 	    MEM_FLAG_L1_NONALLOCATING | MEM_FLAG_HINT_PERMALOCK);
 	pcursor = rpi_lock_mem(hcursor);
 #ifdef RPI_IOCTL_DEBUG
 	printf("hcursor: %08x\n", hcursor);
 	printf("pcursor: %08x\n", (uint32_t)pcursor);
 	printf("fb: %08x\n", (uint32_t)vb_setfb.vbt_allocbuf.address);
 #endif
 	if (bus_space_map(faa->faa_bst, pcursor, CURSOR_ARGB_SIZE,
 	    BUS_SPACE_MAP_LINEAR|BUS_SPACE_MAP_PREFETCHABLE, &hc) != 0) {
 		printf("couldn't map cursor memory\n");
 	} else {
 		int i, j, k;
 		cmem = bus_space_vaddr(faa->faa_bst, hc);
 		k = 0;
 		for (j = 0; j < 64; j++) {
 			for (i = 0; i < 64; i++) {
 				cmem[i + k] =
 				 ((i & 8) ^ (j & 8)) ? 0xa0ff0000 : 0xa000ff00;
+			}
 			k += 64;
+		}
 		cpu_dcache_wb_range((vaddr_t)cmem, CURSOR_ARGB_SIZE);
 		rpi_fb_initcursor(pcursor, 0, 0);
 #ifdef RPI_IOCTL_DEBUG
 		rpi_fb_movecursor(600, 400, 1);
 #else
 		rpi_fb_movecursor(cursor_x, cursor_y, cursor_on);
 #endif
+	}
 #endif
 	return true;
+}
 #if defined(RPI_HWCURSOR)
 static int
 rpi_fb_do_cursor(struct wsdisplay_cursor *cur)
+{
 	int pos = 0;
 	int shape = 0;
 	if (cur->which & WSDISPLAY_CURSOR_DOCUR) {
 		if (cursor_on != cur->enable) {
 			cursor_on = cur->enable;
 			pos = 1;
+		}
+	}
 	if (cur->which & WSDISPLAY_CURSOR_DOHOT) {
 		hot_x = cur->hot.x;
 		hot_y = cur->hot.y;
 		pos = 1;
 		shape = 1;
+	}
 	if (cur->which & WSDISPLAY_CURSOR_DOPOS) {
 		cursor_x = cur->pos.x;
 		cursor_y = cur->pos.y;
 		pos = 1;
+	}
 	if (cur->which & WSDISPLAY_CURSOR_DOCMAP) {
 		int i;
 		uint32_t val;
 		for (i = 0; i < uimin(cur->cmap.count, 3); i++) {
 			val = (cur->cmap.red[i] << 16 ) |
 			      (cur->cmap.green[i] << 8) |
 			      (cur->cmap.blue[i] ) |
 xff000000;
 			cursor_cmap[i + cur->cmap.index + 2] = val;
+		}
 		shape = 1;
+	}
 	if (cur->which & WSDISPLAY_CURSOR_DOSHAPE) {
 		int err;
 		err = copyin(cur->mask, cursor_mask, CURSOR_BITMAP_SIZE);
 		err += copyin(cur->image, cursor_bitmap, CURSOR_BITMAP_SIZE);
 		if (err != 0)
 			return EFAULT;
 		shape = 1;
+	}
 	if (shape) {
 		int i, j, idx;
 		uint8_t mask;
 		for (i = 0; i < CURSOR_BITMAP_SIZE; i++) {
 			mask = 0x01;
 			for (j = 0; j < 8; j++) {
 				idx = ((cursor_mask[i] & mask) ? 2 : 0) |
 				    ((cursor_bitmap[i] & mask) ? 1 : 0);
 				cmem[i * 8 + j] = cursor_cmap[idx];
 				mask = mask << 1;
+			}
+		}
 		/* just in case */
 		cpu_dcache_wb_range((vaddr_t)cmem, CURSOR_ARGB_SIZE);
 		rpi_fb_initcursor(pcursor, hot_x, hot_y);
+	}
 	if (pos) {
 		rpi_fb_movecursor(cursor_x, cursor_y, cursor_on);
+	}
 	return 0;
+}
 #endif
 static int
 rpi_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, lwp_t *l)
+{
 	switch (cmd) {
 	case WSDISPLAYIO_SVIDEO:
+		{
 			int d = *(int *)data;
 			if (d == rpi_video_on)
 				return 0;
 			rpi_video_on = d;
 			rpi_fb_set_video(d);
 #if defined(RPI_HWCURSOR)
 			rpi_fb_movecursor(cursor_x, cursor_y,
 			                  d ? cursor_on : 0);
 #endif
+		}
 		return 0;
 	case WSDISPLAYIO_GVIDEO:
 		*(int *)data = rpi_video_on;
 		return 0;
 #if defined(RPI_HWCURSOR)
 	case WSDISPLAYIO_GCURPOS:
+		{
 			struct wsdisplay_curpos *cp = (void *)data;
 			cp->x = cursor_x;
 			cp->y = cursor_y;
+		}
 		return 0;
 	case WSDISPLAYIO_SCURPOS:
+		{
 			struct wsdisplay_curpos *cp = (void *)data;
 			cursor_x = cp->x;
 			cursor_y = cp->y;
 			rpi_fb_movecursor(cursor_x, cursor_y, cursor_on);
+		}
 		return 0;
 	case WSDISPLAYIO_GCURMAX:
+		{
 			struct wsdisplay_curpos *cp = (void *)data;
 			cp->x = 64;
 			cp->y = 64;
+		}
 		return 0;
 	case WSDISPLAYIO_SCURSOR:
+		{
 			struct wsdisplay_cursor *cursor = (void *)data;
 			return rpi_fb_do_cursor(cursor);
+		}
 #endif
 	default:
 		return EPASSTHROUGH;
+	}
+}
 #endif
 SYSCTL_SETUP(sysctl_machdep_rpi, "sysctl machdep subtree setup (rpi)")
+{
 	sysctl_createv(clog, 0, NULL, NULL,
 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "machdep", NULL,
 	    NULL, 0, NULL, 0, CTL_MACHDEP, CTL_EOL);
 	sysctl_createv(clog, 0, NULL, NULL,
 	    CTLFLAG_PERMANENT|CTLFLAG_READONLY,
 	    CTLTYPE_INT, "firmware_revision", NULL, NULL, 0,
 	    &vb.vbt_fwrev.rev, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
 	sysctl_createv(clog, 0, NULL, NULL,
 	    CTLFLAG_PERMANENT|CTLFLAG_READONLY,
 	    CTLTYPE_INT, "board_model", NULL, NULL, 0,
 	    &vb.vbt_boardmodel.model, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
 	sysctl_createv(clog, 0, NULL, NULL,
 	    CTLFLAG_PERMANENT|CTLFLAG_READONLY,
 	    CTLTYPE_INT, "board_revision", NULL, NULL, 0,
 	    &vb.vbt_boardrev.rev, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
 	sysctl_createv(clog, 0, NULL, NULL,
 	    CTLFLAG_PERMANENT|CTLFLAG_READONLY|CTLFLAG_HEX|CTLFLAG_PRIVATE,
 	    CTLTYPE_QUAD, "serial", NULL, NULL, 0,
 	    &vb.vbt_serial.sn, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
+}
 #if defined(SOC_BCM2835)
 static void
 bcm2835_platform_bootstrap(void)
+{
 	bcm2835_bs_tag = arm_generic_bs_tag;
 	bcm2835_a4x_bs_tag = arm_generic_a4x_bs_tag;
 	bcm2835_bs_tag.bs_map = bcm2835_bs_map;
 	bcm2835_bs_tag.bs_mmap = bcm2835_bs_mmap;
 	bcm2835_a4x_bs_tag.bs_map = bcm2835_bs_map;
 	bcm2835_a4x_bs_tag.bs_mmap = bcm2835_a4x_bs_mmap;
 	fdtbus_set_decoderegprop(false);
 	bcm2835_uartinit();
 	bcm2835_bootparams();
+}
 #endif
 #if defined(SOC_BCM2836)
 static void
 bcm2836_platform_bootstrap(void)
+{
 	bcm2836_bs_tag = arm_generic_bs_tag;
 	bcm2836_a4x_bs_tag = arm_generic_a4x_bs_tag;
 	bcm2836_bs_tag.bs_map = bcm2836_bs_map;
 	bcm2836_bs_tag.bs_mmap = bcm2836_bs_mmap;
 	bcm2836_a4x_bs_tag.bs_map = bcm2836_bs_map;
 	bcm2836_a4x_bs_tag.bs_mmap = bcm2836_a4x_bs_mmap;
 	fdtbus_set_decoderegprop(false);
 	bcm2836_uartinit();
 	bcm2836_bootparams();
 #ifdef MULTIPROCESSOR
 	arm_cpu_max = RPI_CPU_MAX;
 	arm_fdt_cpu_bootstrap();
 #endif
+}
 static void
 bcm2711_platform_bootstrap(void)
+{
 	bcm2711_bs_tag = arm_generic_bs_tag;
 	bcm2711_a4x_bs_tag = arm_generic_a4x_bs_tag;
 	bcm2711_bs_tag.bs_map = bcm2711_bs_map;
 	bcm2711_bs_tag.bs_mmap = bcm2711_bs_mmap;
 	bcm2711_a4x_bs_tag.bs_map = bcm2711_bs_map;
 	bcm2711_a4x_bs_tag.bs_mmap = bcm2711_a4x_bs_mmap;
 	fdtbus_set_decoderegprop(false);
 	bcm2711_uartinit();
 	bcm2711_bootparams();
 #ifdef MULTIPROCESSOR
 	arm_cpu_max = RPI_CPU_MAX;
 	arm_fdt_cpu_bootstrap();
 #endif
+}
 #endif
 #if defined(SOC_BCM2835)
 static void
 bcm2835_platform_init_attach_args(struct fdt_attach_args *faa)
+{
 	faa->faa_bst = &bcm2835_bs_tag;
 	faa->faa_a4x_bst = &bcm2835_a4x_bs_tag;
 	faa->faa_dmat = &bcm2835_bus_dma_tag;
 	bcm2835_bus_dma_tag._ranges = bcm2835_dma_ranges;
 	bcm2835_bus_dma_tag._nranges = __arraycount(bcm2835_dma_ranges);
 	bcm2835_dma_ranges[0].dr_len = bcm283x_memorysize;
+}
 #endif
 #if defined(SOC_BCM2836)
 static void
 bcm2836_platform_init_attach_args(struct fdt_attach_args *faa)
+{
 	faa->faa_bst = &bcm2836_bs_tag;
 	faa->faa_a4x_bst = &bcm2836_a4x_bs_tag;
 	faa->faa_dmat = &bcm2835_bus_dma_tag;
 	bcm2835_bus_dma_tag._ranges = bcm2836_dma_ranges;
 	bcm2835_bus_dma_tag._nranges = __arraycount(bcm2836_dma_ranges);
 	bcm2836_dma_ranges[0].dr_len = bcm283x_memorysize;