Tue Jan 28 07:47:26 2020 UTC ()
Traiing whitespace


(skrll)
diff -r1.16 -r1.17 src/sys/arch/arm/mainbus/cpu_mainbus.c

cvs diff -r1.16 -r1.17 src/sys/arch/arm/mainbus/cpu_mainbus.c (switch to unified diff)

--- src/sys/arch/arm/mainbus/cpu_mainbus.c 2014/10/29 14:14:14 1.16
+++ src/sys/arch/arm/mainbus/cpu_mainbus.c 2020/01/28 07:47:26 1.17
@@ -1,126 +1,126 @@ @@ -1,126 +1,126 @@
1/* $NetBSD: cpu_mainbus.c,v 1.16 2014/10/29 14:14:14 skrll Exp $ */ 1/* $NetBSD: cpu_mainbus.c,v 1.17 2020/01/28 07:47:26 skrll Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1995 Mark Brinicombe. 4 * Copyright (c) 1995 Mark Brinicombe.
5 * Copyright (c) 1995 Brini. 5 * Copyright (c) 1995 Brini.
6 * All rights reserved. 6 * All rights reserved.
7 * 7 *
8 * Redistribution and use in source and binary forms, with or without 8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions 9 * modification, are permitted provided that the following conditions
10 * are met: 10 * are met:
11 * 1. Redistributions of source code must retain the above copyright 11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer. 12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright 13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the 14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution. 15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software 16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement: 17 * must display the following acknowledgement:
18 * This product includes software developed by Brini. 18 * This product includes software developed by Brini.
19 * 4. The name of the company nor the name of the author may be used to 19 * 4. The name of the company nor the name of the author may be used to
20 * endorse or promote products derived from this software without specific 20 * endorse or promote products derived from this software without specific
21 * prior written permission. 21 * prior written permission.
22 * 22 *
23 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 23 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 26 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE. 33 * SUCH DAMAGE.
34 * 34 *
35 * RiscBSD kernel project 35 * RiscBSD kernel project
36 * 36 *
37 * cpu.c 37 * cpu.c
38 * 38 *
39 * Probing and configuration for the master cpu 39 * Probing and configuration for the master cpu
40 * 40 *
41 * Created : 10/10/95 41 * Created : 10/10/95
42 */ 42 */
43 43
44#include "locators.h" 44#include "locators.h"
45#include "opt_multiprocessor.h" 45#include "opt_multiprocessor.h"
46 46
47#include <sys/cdefs.h> 47#include <sys/cdefs.h>
48__KERNEL_RCSID(0, "$NetBSD: cpu_mainbus.c,v 1.16 2014/10/29 14:14:14 skrll Exp $"); 48__KERNEL_RCSID(0, "$NetBSD: cpu_mainbus.c,v 1.17 2020/01/28 07:47:26 skrll Exp $");
49 49
50#include <sys/param.h> 50#include <sys/param.h>
51#include <sys/systm.h> 51#include <sys/systm.h>
52#include <sys/cpu.h> 52#include <sys/cpu.h>
53#include <sys/device.h> 53#include <sys/device.h>
54#include <sys/proc.h> 54#include <sys/proc.h>
55 55
56#include <arm/mainbus/mainbus.h> 56#include <arm/mainbus/mainbus.h>
57 57
58/* 58/*
59 * Prototypes 59 * Prototypes
60 */ 60 */
61static int cpu_mainbus_match(device_t, cfdata_t, void *); 61static int cpu_mainbus_match(device_t, cfdata_t, void *);
62static void cpu_mainbus_attach(device_t, device_t, void *); 62static void cpu_mainbus_attach(device_t, device_t, void *);
63  63
64/* 64/*
65 * int cpumatch(device_t parent, cfdata_t cf, void *aux) 65 * int cpumatch(device_t parent, cfdata_t cf, void *aux)
66 * 66 *
67 * Probe for the main cpu. Currently all this does is return 1 to 67 * Probe for the main cpu. Currently all this does is return 1 to
68 * indicate that the cpu was found. 68 * indicate that the cpu was found.
69 */  69 */
70#ifdef MULTIPROCESSOR 70#ifdef MULTIPROCESSOR
71extern u_int arm_cpu_max; 71extern u_int arm_cpu_max;
72#else 72#else
73#define arm_cpu_max 1 73#define arm_cpu_max 1
74#endif 74#endif
75  75
76static int 76static int
77cpu_mainbus_match(device_t parent, cfdata_t cf, void *aux) 77cpu_mainbus_match(device_t parent, cfdata_t cf, void *aux)
78{ 78{
79 struct mainbus_attach_args * const mb = aux; 79 struct mainbus_attach_args * const mb = aux;
80 int id = mb->mb_core; 80 int id = mb->mb_core;
81 81
82 if (id != MAINBUSCF_CORE_DEFAULT) { 82 if (id != MAINBUSCF_CORE_DEFAULT) {
83 if (id == 0) 83 if (id == 0)
84 return cpu_info_store.ci_dev == NULL; 84 return cpu_info_store.ci_dev == NULL;
85 if (id >= arm_cpu_max) 85 if (id >= arm_cpu_max)
86 return 0; 86 return 0;
87#ifdef MULTIPROCESSOR 87#ifdef MULTIPROCESSOR
88 if (cpu_info[id] != NULL) 88 if (cpu_info[id] != NULL)
89 return 0; 89 return 0;
90#endif 90#endif
91 return 1; 91 return 1;
92 } 92 }
93 93
94 if (cpu_info_store.ci_dev == NULL) { 94 if (cpu_info_store.ci_dev == NULL) {
95 mb->mb_core = 0; 95 mb->mb_core = 0;
96 return 1; 96 return 1;
97 } 97 }
98 98
99#ifdef MULTIPROCESSOR 99#ifdef MULTIPROCESSOR
100 for (id = 1; id < arm_cpu_max; id++) { 100 for (id = 1; id < arm_cpu_max; id++) {
101 if (cpu_info[id] != NULL) 101 if (cpu_info[id] != NULL)
102 continue; 102 continue;
103 mb->mb_core = id; 103 mb->mb_core = id;
104 return 1; 104 return 1;
105 } 105 }
106#endif 106#endif
107 107
108 return 0; 108 return 0;
109} 109}
110 110
111/* 111/*
112 * void cpusattach(device_t parent, device_t dev, void *aux) 112 * void cpusattach(device_t parent, device_t dev, void *aux)
113 * 113 *
114 * Attach the main cpu 114 * Attach the main cpu
115 */ 115 */
116  116
117static void 117static void
118cpu_mainbus_attach(device_t parent, device_t self, void *aux) 118cpu_mainbus_attach(device_t parent, device_t self, void *aux)
119{ 119{
120 struct mainbus_attach_args * const mb = aux; 120 struct mainbus_attach_args * const mb = aux;
121 121
122 cpu_attach(self, mb->mb_core); 122 cpu_attach(self, mb->mb_core);
123} 123}
124 124
125CFATTACH_DECL_NEW(cpu_mainbus, 0, 125CFATTACH_DECL_NEW(cpu_mainbus, 0,
126 cpu_mainbus_match, cpu_mainbus_attach, NULL, NULL); 126 cpu_mainbus_match, cpu_mainbus_attach, NULL, NULL);