Tue Jan 28 18:02:30 2020 UTC ()

More SCTLR.


(maxv)

diff -r1.33 -r1.34 src/sys/arch/aarch64/include/armreg.h

--- src/sys/arch/aarch64/include/armreg.h 2020/01/28 17:47:51	1.33
+++ src/sys/arch/aarch64/include/armreg.h 2020/01/28 18:02:30	1.34

 @@ -1,14 +1,14 @@
-/* $NetBSD: armreg.h,v 1.33 2020/01/28 17:47:51 maxv Exp $ */
+/* $NetBSD: armreg.h,v 1.34 2020/01/28 18:02:30 maxv Exp $ */
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Matt Thomas of 3am Software Foundry.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -700,39 +700,55 @@ AARCH64REG_WRITE_INLINE(sctlr_el1)
 #define	SCTLR_RES0		0xc8222400	// Reserved ARMv8.0, write 0
 #define	SCTLR_RES1		0x30d00800	// Reserved ARMv8.0, write 1
 #define	SCTLR_M			__BIT(0)
 #define	SCTLR_A			__BIT(1)
 #define	SCTLR_C			__BIT(2)
 #define	SCTLR_SA		__BIT(3)
 #define	SCTLR_SA0		__BIT(4)
 #define	SCTLR_CP15BEN		__BIT(5)
 #define	SCTLR_nAA		__BIT(6)
 #define	SCTLR_ITD		__BIT(7)
 #define	SCTLR_SED		__BIT(8)
 #define	SCTLR_UMA		__BIT(9)
 #define	SCTLR_EnRCTX		__BIT(10)
 #define	SCTLR_EOS		__BIT(11)
 #define	SCTLR_I			__BIT(12)
 #define	SCTLR_EnDB		__BIT(13)
 #define	SCTLR_DZE		__BIT(14)
 #define	SCTLR_UCT		__BIT(15)
 #define	SCTLR_nTWI		__BIT(16)
 #define	SCTLR_nTWE		__BIT(18)
 #define	SCTLR_WXN		__BIT(19)
 #define	SCTLR_TSCXT		__BIT(20)
 #define	SCTLR_IESB		__BIT(21)
 #define	SCTLR_EIS		__BIT(22)
 #define	SCTLR_SPAN		__BIT(23)
 #define	SCTLR_EOE		__BIT(24)
 #define	SCTLR_EE		__BIT(25)
 #define	SCTLR_UCI		__BIT(26)
 #define	SCTLR_EnDA		__BIT(27)
 #define	SCTLR_nTLSMD		__BIT(28)
 #define	SCTLR_LSMAOE		__BIT(29)
 #define	SCTLR_EnIB		__BIT(30)
 #define	SCTLR_EnIA		__BIT(31)
 #define	SCTLR_BT0		__BIT(35)
 #define	SCTLR_BT1		__BIT(36)
 #define	SCTLR_ITFSB		__BIT(37)
 #define	SCTLR_TCF0		__BITS(39,38)
 #define	SCTLR_TCF		__BITS(41,40)
 #define	SCTLR_ATA0		__BIT(42)
 #define	SCTLR_ATA		__BIT(43)
 #define	SCTLR_DSSBS		__BIT(44)
 // current EL stack pointer
 static __inline uint64_t
 reg_sp_read(void)
+{
 	uint64_t __rv;
 	__asm __volatile ("mov %0, sp" : "=r"(__rv));
 	return __rv;
+}
 AARCH64REG_READ_INLINE(sp_el0)		// EL0 Stack Pointer
 AARCH64REG_WRITE_INLINE(sp_el0)