| @@ -1,2504 +1,2506 @@ | | | @@ -1,2504 +1,2506 @@ |
1 | /* $NetBSD: tulip.c,v 1.200 2019/11/10 21:16:35 chs Exp $ */ | | 1 | /* $NetBSD: tulip.c,v 1.201 2020/01/29 14:18:54 thorpej Exp $ */ |
2 | | | 2 | |
3 | /*- | | 3 | /*- |
4 | * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. | | 4 | * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. |
5 | * All rights reserved. | | 5 | * All rights reserved. |
6 | * | | 6 | * |
7 | * This code is derived from software contributed to The NetBSD Foundation | | 7 | * This code is derived from software contributed to The NetBSD Foundation |
8 | * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, | | 8 | * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, |
9 | * NASA Ames Research Center; and by Charles M. Hannum. | | 9 | * NASA Ames Research Center; and by Charles M. Hannum. |
10 | * | | 10 | * |
11 | * Redistribution and use in source and binary forms, with or without | | 11 | * Redistribution and use in source and binary forms, with or without |
12 | * modification, are permitted provided that the following conditions | | 12 | * modification, are permitted provided that the following conditions |
13 | * are met: | | 13 | * are met: |
14 | * 1. Redistributions of source code must retain the above copyright | | 14 | * 1. Redistributions of source code must retain the above copyright |
15 | * notice, this list of conditions and the following disclaimer. | | 15 | * notice, this list of conditions and the following disclaimer. |
16 | * 2. Redistributions in binary form must reproduce the above copyright | | 16 | * 2. Redistributions in binary form must reproduce the above copyright |
17 | * notice, this list of conditions and the following disclaimer in the | | 17 | * notice, this list of conditions and the following disclaimer in the |
18 | * documentation and/or other materials provided with the distribution. | | 18 | * documentation and/or other materials provided with the distribution. |
19 | * | | 19 | * |
20 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS | | 20 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
21 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | | 21 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
22 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | | 22 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
23 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS | | 23 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
24 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | | 24 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
25 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | | 25 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
26 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | | 26 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
27 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | | 27 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
28 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | | 28 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
29 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | | 29 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
30 | * POSSIBILITY OF SUCH DAMAGE. | | 30 | * POSSIBILITY OF SUCH DAMAGE. |
31 | */ | | 31 | */ |
32 | | | 32 | |
33 | /* | | 33 | /* |
34 | * Device driver for the Digital Semiconductor ``Tulip'' (21x4x) | | 34 | * Device driver for the Digital Semiconductor ``Tulip'' (21x4x) |
35 | * Ethernet controller family, and a variety of clone chips. | | 35 | * Ethernet controller family, and a variety of clone chips. |
36 | */ | | 36 | */ |
37 | | | 37 | |
38 | #include <sys/cdefs.h> | | 38 | #include <sys/cdefs.h> |
39 | __KERNEL_RCSID(0, "$NetBSD: tulip.c,v 1.200 2019/11/10 21:16:35 chs Exp $"); | | 39 | __KERNEL_RCSID(0, "$NetBSD: tulip.c,v 1.201 2020/01/29 14:18:54 thorpej Exp $"); |
40 | | | 40 | |
41 | | | 41 | |
42 | #include <sys/param.h> | | 42 | #include <sys/param.h> |
43 | #include <sys/systm.h> | | 43 | #include <sys/systm.h> |
44 | #include <sys/callout.h> | | 44 | #include <sys/callout.h> |
45 | #include <sys/mbuf.h> | | 45 | #include <sys/mbuf.h> |
46 | #include <sys/malloc.h> | | 46 | #include <sys/malloc.h> |
47 | #include <sys/kernel.h> | | 47 | #include <sys/kernel.h> |
48 | #include <sys/socket.h> | | 48 | #include <sys/socket.h> |
49 | #include <sys/ioctl.h> | | 49 | #include <sys/ioctl.h> |
50 | #include <sys/errno.h> | | 50 | #include <sys/errno.h> |
51 | #include <sys/device.h> | | 51 | #include <sys/device.h> |
52 | | | 52 | |
53 | #include <machine/endian.h> | | 53 | #include <machine/endian.h> |
54 | | | 54 | |
55 | #include <net/if.h> | | 55 | #include <net/if.h> |
56 | #include <net/if_dl.h> | | 56 | #include <net/if_dl.h> |
57 | #include <net/if_media.h> | | 57 | #include <net/if_media.h> |
58 | #include <net/if_ether.h> | | 58 | #include <net/if_ether.h> |
59 | | | 59 | |
60 | #include <net/bpf.h> | | 60 | #include <net/bpf.h> |
61 | | | 61 | |
62 | #include <sys/bus.h> | | 62 | #include <sys/bus.h> |
63 | #include <sys/intr.h> | | 63 | #include <sys/intr.h> |
64 | | | 64 | |
65 | #include <dev/mii/mii.h> | | 65 | #include <dev/mii/mii.h> |
66 | #include <dev/mii/miivar.h> | | 66 | #include <dev/mii/miivar.h> |
67 | #include <dev/mii/mii_bitbang.h> | | 67 | #include <dev/mii/mii_bitbang.h> |
68 | | | 68 | |
69 | #include <dev/ic/tulipreg.h> | | 69 | #include <dev/ic/tulipreg.h> |
70 | #include <dev/ic/tulipvar.h> | | 70 | #include <dev/ic/tulipvar.h> |
71 | | | 71 | |
72 | static const char * const tlp_chip_names[] = TULIP_CHIP_NAMES; | | 72 | static const char * const tlp_chip_names[] = TULIP_CHIP_NAMES; |
73 | | | 73 | |
74 | static const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = | | 74 | static const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = |
75 | TLP_TXTHRESH_TAB_10; | | 75 | TLP_TXTHRESH_TAB_10; |
76 | | | 76 | |
77 | static const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = | | 77 | static const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = |
78 | TLP_TXTHRESH_TAB_10_100; | | 78 | TLP_TXTHRESH_TAB_10_100; |
79 | | | 79 | |
80 | static const struct tulip_txthresh_tab tlp_dm9102_txthresh_tab[] = | | 80 | static const struct tulip_txthresh_tab tlp_dm9102_txthresh_tab[] = |
81 | TLP_TXTHRESH_TAB_DM9102; | | 81 | TLP_TXTHRESH_TAB_DM9102; |
82 | | | 82 | |
83 | static void tlp_start(struct ifnet *); | | 83 | static void tlp_start(struct ifnet *); |
84 | static void tlp_watchdog(struct ifnet *); | | 84 | static void tlp_watchdog(struct ifnet *); |
85 | static int tlp_ioctl(struct ifnet *, u_long, void *); | | 85 | static int tlp_ioctl(struct ifnet *, u_long, void *); |
86 | static int tlp_init(struct ifnet *); | | 86 | static int tlp_init(struct ifnet *); |
87 | static void tlp_stop(struct ifnet *, int); | | 87 | static void tlp_stop(struct ifnet *, int); |
88 | static int tlp_ifflags_cb(struct ethercom *); | | 88 | static int tlp_ifflags_cb(struct ethercom *); |
89 | | | 89 | |
90 | static void tlp_rxdrain(struct tulip_softc *); | | 90 | static void tlp_rxdrain(struct tulip_softc *); |
91 | static int tlp_add_rxbuf(struct tulip_softc *, int); | | 91 | static int tlp_add_rxbuf(struct tulip_softc *, int); |
92 | static void tlp_srom_idle(struct tulip_softc *); | | 92 | static void tlp_srom_idle(struct tulip_softc *); |
93 | static int tlp_srom_size(struct tulip_softc *); | | 93 | static int tlp_srom_size(struct tulip_softc *); |
94 | | | 94 | |
95 | static int tlp_enable(struct tulip_softc *); | | 95 | static int tlp_enable(struct tulip_softc *); |
96 | static void tlp_disable(struct tulip_softc *); | | 96 | static void tlp_disable(struct tulip_softc *); |
97 | | | 97 | |
98 | static void tlp_filter_setup(struct tulip_softc *); | | 98 | static void tlp_filter_setup(struct tulip_softc *); |
99 | static void tlp_winb_filter_setup(struct tulip_softc *); | | 99 | static void tlp_winb_filter_setup(struct tulip_softc *); |
100 | static void tlp_al981_filter_setup(struct tulip_softc *); | | 100 | static void tlp_al981_filter_setup(struct tulip_softc *); |
101 | static void tlp_asix_filter_setup(struct tulip_softc *); | | 101 | static void tlp_asix_filter_setup(struct tulip_softc *); |
102 | | | 102 | |
103 | static void tlp_rxintr(struct tulip_softc *); | | 103 | static void tlp_rxintr(struct tulip_softc *); |
104 | static void tlp_txintr(struct tulip_softc *); | | 104 | static void tlp_txintr(struct tulip_softc *); |
105 | | | 105 | |
106 | static void tlp_mii_tick(void *); | | 106 | static void tlp_mii_tick(void *); |
107 | static void tlp_mii_statchg(struct ifnet *); | | 107 | static void tlp_mii_statchg(struct ifnet *); |
108 | static void tlp_winb_mii_statchg(struct ifnet *); | | 108 | static void tlp_winb_mii_statchg(struct ifnet *); |
109 | static void tlp_dm9102_mii_statchg(struct ifnet *); | | 109 | static void tlp_dm9102_mii_statchg(struct ifnet *); |
110 | | | 110 | |
111 | static void tlp_mii_getmedia(struct tulip_softc *, struct ifmediareq *); | | 111 | static void tlp_mii_getmedia(struct tulip_softc *, struct ifmediareq *); |
112 | static int tlp_mii_setmedia(struct tulip_softc *); | | 112 | static int tlp_mii_setmedia(struct tulip_softc *); |
113 | | | 113 | |
114 | static int tlp_bitbang_mii_readreg(device_t, int, int, uint16_t *); | | 114 | static int tlp_bitbang_mii_readreg(device_t, int, int, uint16_t *); |
115 | static int tlp_bitbang_mii_writereg(device_t, int, int, uint16_t); | | 115 | static int tlp_bitbang_mii_writereg(device_t, int, int, uint16_t); |
116 | | | 116 | |
117 | static int tlp_pnic_mii_readreg(device_t, int, int, uint16_t *); | | 117 | static int tlp_pnic_mii_readreg(device_t, int, int, uint16_t *); |
118 | static int tlp_pnic_mii_writereg(device_t, int, int, uint16_t); | | 118 | static int tlp_pnic_mii_writereg(device_t, int, int, uint16_t); |
119 | | | 119 | |
120 | static int tlp_al981_mii_readreg(device_t, int, int, uint16_t *); | | 120 | static int tlp_al981_mii_readreg(device_t, int, int, uint16_t *); |
121 | static int tlp_al981_mii_writereg(device_t, int, int, uint16_t); | | 121 | static int tlp_al981_mii_writereg(device_t, int, int, uint16_t); |
122 | | | 122 | |
123 | static void tlp_2114x_preinit(struct tulip_softc *); | | 123 | static void tlp_2114x_preinit(struct tulip_softc *); |
124 | static void tlp_2114x_mii_preinit(struct tulip_softc *); | | 124 | static void tlp_2114x_mii_preinit(struct tulip_softc *); |
125 | static void tlp_pnic_preinit(struct tulip_softc *); | | 125 | static void tlp_pnic_preinit(struct tulip_softc *); |
126 | static void tlp_dm9102_preinit(struct tulip_softc *); | | 126 | static void tlp_dm9102_preinit(struct tulip_softc *); |
127 | static void tlp_asix_preinit(struct tulip_softc *); | | 127 | static void tlp_asix_preinit(struct tulip_softc *); |
128 | | | 128 | |
129 | static void tlp_21140_reset(struct tulip_softc *); | | 129 | static void tlp_21140_reset(struct tulip_softc *); |
130 | static void tlp_21142_reset(struct tulip_softc *); | | 130 | static void tlp_21142_reset(struct tulip_softc *); |
131 | static void tlp_pmac_reset(struct tulip_softc *); | | 131 | static void tlp_pmac_reset(struct tulip_softc *); |
132 | #if 0 | | 132 | #if 0 |
133 | static void tlp_dm9102_reset(struct tulip_softc *); | | 133 | static void tlp_dm9102_reset(struct tulip_softc *); |
134 | #endif | | 134 | #endif |
135 | | | 135 | |
136 | static void tlp_2114x_nway_tick(void *); | | 136 | static void tlp_2114x_nway_tick(void *); |
137 | | | 137 | |
138 | #define tlp_mchash(addr, sz) \ | | 138 | #define tlp_mchash(addr, sz) \ |
139 | (ether_crc32_le((addr), ETHER_ADDR_LEN) & ((sz) - 1)) | | 139 | (ether_crc32_le((addr), ETHER_ADDR_LEN) & ((sz) - 1)) |
140 | | | 140 | |
141 | /* | | 141 | /* |
142 | * MII bit-bang glue. | | 142 | * MII bit-bang glue. |
143 | */ | | 143 | */ |
144 | static uint32_t tlp_sio_mii_bitbang_read(device_t); | | 144 | static uint32_t tlp_sio_mii_bitbang_read(device_t); |
145 | static void tlp_sio_mii_bitbang_write(device_t, uint32_t); | | 145 | static void tlp_sio_mii_bitbang_write(device_t, uint32_t); |
146 | | | 146 | |
147 | static const struct mii_bitbang_ops tlp_sio_mii_bitbang_ops = { | | 147 | static const struct mii_bitbang_ops tlp_sio_mii_bitbang_ops = { |
148 | tlp_sio_mii_bitbang_read, | | 148 | tlp_sio_mii_bitbang_read, |
149 | tlp_sio_mii_bitbang_write, | | 149 | tlp_sio_mii_bitbang_write, |
150 | { | | 150 | { |
151 | MIIROM_MDO, /* MII_BIT_MDO */ | | 151 | MIIROM_MDO, /* MII_BIT_MDO */ |
152 | MIIROM_MDI, /* MII_BIT_MDI */ | | 152 | MIIROM_MDI, /* MII_BIT_MDI */ |
153 | MIIROM_MDC, /* MII_BIT_MDC */ | | 153 | MIIROM_MDC, /* MII_BIT_MDC */ |
154 | 0, /* MII_BIT_DIR_HOST_PHY */ | | 154 | 0, /* MII_BIT_DIR_HOST_PHY */ |
155 | MIIROM_MIIDIR, /* MII_BIT_DIR_PHY_HOST */ | | 155 | MIIROM_MIIDIR, /* MII_BIT_DIR_PHY_HOST */ |
156 | } | | 156 | } |
157 | }; | | 157 | }; |
158 | | | 158 | |
159 | #ifdef TLP_DEBUG | | 159 | #ifdef TLP_DEBUG |
160 | #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \ | | 160 | #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \ |
161 | printf x | | 161 | printf x |
162 | #else | | 162 | #else |
163 | #define DPRINTF(sc, x) /* nothing */ | | 163 | #define DPRINTF(sc, x) /* nothing */ |
164 | #endif | | 164 | #endif |
165 | | | 165 | |
166 | #ifdef TLP_STATS | | 166 | #ifdef TLP_STATS |
167 | static void tlp_print_stats(struct tulip_softc *); | | 167 | static void tlp_print_stats(struct tulip_softc *); |
168 | #endif | | 168 | #endif |
169 | | | 169 | |
170 | /* | | 170 | /* |
171 | * Can be used to debug the SROM-related things, including contents. | | 171 | * Can be used to debug the SROM-related things, including contents. |
172 | * Initialized so that it's patchable. | | 172 | * Initialized so that it's patchable. |
173 | */ | | 173 | */ |
174 | int tlp_srom_debug = 0; | | 174 | int tlp_srom_debug = 0; |
175 | | | 175 | |
176 | /* | | 176 | /* |
177 | * tlp_attach: | | 177 | * tlp_attach: |
178 | * | | 178 | * |
179 | * Attach a Tulip interface to the system. | | 179 | * Attach a Tulip interface to the system. |
180 | */ | | 180 | */ |
181 | int | | 181 | int |
182 | tlp_attach(struct tulip_softc *sc, const uint8_t *enaddr) | | 182 | tlp_attach(struct tulip_softc *sc, const uint8_t *enaddr) |
183 | { | | 183 | { |
184 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; | | 184 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; |
185 | device_t self = sc->sc_dev; | | 185 | device_t self = sc->sc_dev; |
186 | int i, error; | | 186 | int i, error; |
187 | | | 187 | |
188 | callout_init(&sc->sc_nway_callout, 0); | | 188 | callout_init(&sc->sc_nway_callout, 0); |
189 | callout_init(&sc->sc_tick_callout, 0); | | 189 | callout_init(&sc->sc_tick_callout, 0); |
190 | | | 190 | |
191 | /* | | 191 | /* |
192 | * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift! | | 192 | * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift! |
193 | */ | | 193 | */ |
194 | | | 194 | |
195 | /* | | 195 | /* |
196 | * Setup the transmit threshold table. | | 196 | * Setup the transmit threshold table. |
197 | */ | | 197 | */ |
198 | switch (sc->sc_chip) { | | 198 | switch (sc->sc_chip) { |
199 | case TULIP_CHIP_DE425: | | 199 | case TULIP_CHIP_DE425: |
200 | case TULIP_CHIP_21040: | | 200 | case TULIP_CHIP_21040: |
201 | case TULIP_CHIP_21041: | | 201 | case TULIP_CHIP_21041: |
202 | sc->sc_txth = tlp_10_txthresh_tab; | | 202 | sc->sc_txth = tlp_10_txthresh_tab; |
203 | break; | | 203 | break; |
204 | | | 204 | |
205 | case TULIP_CHIP_DM9102: | | 205 | case TULIP_CHIP_DM9102: |
206 | case TULIP_CHIP_DM9102A: | | 206 | case TULIP_CHIP_DM9102A: |
207 | sc->sc_txth = tlp_dm9102_txthresh_tab; | | 207 | sc->sc_txth = tlp_dm9102_txthresh_tab; |
208 | break; | | 208 | break; |
209 | | | 209 | |
210 | default: | | 210 | default: |
211 | sc->sc_txth = tlp_10_100_txthresh_tab; | | 211 | sc->sc_txth = tlp_10_100_txthresh_tab; |
212 | break; | | 212 | break; |
213 | } | | 213 | } |
214 | | | 214 | |
215 | /* | | 215 | /* |
216 | * Setup the filter setup function. | | 216 | * Setup the filter setup function. |
217 | */ | | 217 | */ |
218 | switch (sc->sc_chip) { | | 218 | switch (sc->sc_chip) { |
219 | case TULIP_CHIP_WB89C840F: | | 219 | case TULIP_CHIP_WB89C840F: |
220 | sc->sc_filter_setup = tlp_winb_filter_setup; | | 220 | sc->sc_filter_setup = tlp_winb_filter_setup; |
221 | break; | | 221 | break; |
222 | | | 222 | |
223 | case TULIP_CHIP_AL981: | | 223 | case TULIP_CHIP_AL981: |
224 | case TULIP_CHIP_AN983: | | 224 | case TULIP_CHIP_AN983: |
225 | case TULIP_CHIP_AN985: | | 225 | case TULIP_CHIP_AN985: |
226 | sc->sc_filter_setup = tlp_al981_filter_setup; | | 226 | sc->sc_filter_setup = tlp_al981_filter_setup; |
227 | break; | | 227 | break; |
228 | | | 228 | |
229 | case TULIP_CHIP_AX88140: | | 229 | case TULIP_CHIP_AX88140: |
230 | case TULIP_CHIP_AX88141: | | 230 | case TULIP_CHIP_AX88141: |
231 | sc->sc_filter_setup = tlp_asix_filter_setup; | | 231 | sc->sc_filter_setup = tlp_asix_filter_setup; |
232 | break; | | 232 | break; |
233 | | | 233 | |
234 | default: | | 234 | default: |
235 | sc->sc_filter_setup = tlp_filter_setup; | | 235 | sc->sc_filter_setup = tlp_filter_setup; |
236 | break; | | 236 | break; |
237 | } | | 237 | } |
238 | | | 238 | |
239 | /* | | 239 | /* |
240 | * Set up the media status change function. | | 240 | * Set up the media status change function. |
241 | */ | | 241 | */ |
242 | switch (sc->sc_chip) { | | 242 | switch (sc->sc_chip) { |
243 | case TULIP_CHIP_WB89C840F: | | 243 | case TULIP_CHIP_WB89C840F: |
244 | sc->sc_statchg = tlp_winb_mii_statchg; | | 244 | sc->sc_statchg = tlp_winb_mii_statchg; |
245 | break; | | 245 | break; |
246 | | | 246 | |
247 | case TULIP_CHIP_DM9102: | | 247 | case TULIP_CHIP_DM9102: |
248 | case TULIP_CHIP_DM9102A: | | 248 | case TULIP_CHIP_DM9102A: |
249 | sc->sc_statchg = tlp_dm9102_mii_statchg; | | 249 | sc->sc_statchg = tlp_dm9102_mii_statchg; |
250 | break; | | 250 | break; |
251 | | | 251 | |
252 | default: | | 252 | default: |
253 | /* | | 253 | /* |
254 | * We may override this if we have special media | | 254 | * We may override this if we have special media |
255 | * handling requirements (e.g. flipping GPIO pins). | | 255 | * handling requirements (e.g. flipping GPIO pins). |
256 | * | | 256 | * |
257 | * The pure-MII statchg function covers the basics. | | 257 | * The pure-MII statchg function covers the basics. |
258 | */ | | 258 | */ |
259 | sc->sc_statchg = tlp_mii_statchg; | | 259 | sc->sc_statchg = tlp_mii_statchg; |
260 | break; | | 260 | break; |
261 | } | | 261 | } |
262 | | | 262 | |
263 | /* | | 263 | /* |
264 | * Default to no FS|LS in setup packet descriptors. They're | | 264 | * Default to no FS|LS in setup packet descriptors. They're |
265 | * supposed to be zero according to the 21040 and 21143 | | 265 | * supposed to be zero according to the 21040 and 21143 |
266 | * manuals, and some chips fall over badly if they're | | 266 | * manuals, and some chips fall over badly if they're |
267 | * included. Yet, other chips seem to require them. Sigh. | | 267 | * included. Yet, other chips seem to require them. Sigh. |
268 | */ | | 268 | */ |
269 | switch (sc->sc_chip) { | | 269 | switch (sc->sc_chip) { |
270 | case TULIP_CHIP_X3201_3: | | 270 | case TULIP_CHIP_X3201_3: |
271 | sc->sc_setup_fsls = TDCTL_Tx_FS | TDCTL_Tx_LS; | | 271 | sc->sc_setup_fsls = TDCTL_Tx_FS | TDCTL_Tx_LS; |
272 | break; | | 272 | break; |
273 | | | 273 | |
274 | default: | | 274 | default: |
275 | sc->sc_setup_fsls = 0; | | 275 | sc->sc_setup_fsls = 0; |
276 | } | | 276 | } |
277 | | | 277 | |
278 | /* | | 278 | /* |
279 | * Set up various chip-specific quirks. | | 279 | * Set up various chip-specific quirks. |
280 | * | | 280 | * |
281 | * Note that wherever we can, we use the "ring" option for | | 281 | * Note that wherever we can, we use the "ring" option for |
282 | * transmit and receive descriptors. This is because some | | 282 | * transmit and receive descriptors. This is because some |
283 | * clone chips apparently have problems when using chaining, | | 283 | * clone chips apparently have problems when using chaining, |
284 | * although some *only* support chaining. | | 284 | * although some *only* support chaining. |
285 | * | | 285 | * |
286 | * What we do is always program the "next" pointer, and then | | 286 | * What we do is always program the "next" pointer, and then |
287 | * conditionally set the TDCTL_CH and TDCTL_ER bits in the | | 287 | * conditionally set the TDCTL_CH and TDCTL_ER bits in the |
288 | * appropriate places. | | 288 | * appropriate places. |
289 | */ | | 289 | */ |
290 | switch (sc->sc_chip) { | | 290 | switch (sc->sc_chip) { |
291 | case TULIP_CHIP_21140: | | 291 | case TULIP_CHIP_21140: |
292 | case TULIP_CHIP_21140A: | | 292 | case TULIP_CHIP_21140A: |
293 | case TULIP_CHIP_21142: | | 293 | case TULIP_CHIP_21142: |
294 | case TULIP_CHIP_21143: | | 294 | case TULIP_CHIP_21143: |
295 | case TULIP_CHIP_82C115: /* 21143-like */ | | 295 | case TULIP_CHIP_82C115: /* 21143-like */ |
296 | case TULIP_CHIP_MX98713: /* 21140-like */ | | 296 | case TULIP_CHIP_MX98713: /* 21140-like */ |
297 | case TULIP_CHIP_MX98713A: /* 21143-like */ | | 297 | case TULIP_CHIP_MX98713A: /* 21143-like */ |
298 | case TULIP_CHIP_MX98715: /* 21143-like */ | | 298 | case TULIP_CHIP_MX98715: /* 21143-like */ |
299 | case TULIP_CHIP_MX98715A: /* 21143-like */ | | 299 | case TULIP_CHIP_MX98715A: /* 21143-like */ |
300 | case TULIP_CHIP_MX98715AEC_X: /* 21143-like */ | | 300 | case TULIP_CHIP_MX98715AEC_X: /* 21143-like */ |
301 | case TULIP_CHIP_MX98725: /* 21143-like */ | | 301 | case TULIP_CHIP_MX98725: /* 21143-like */ |
302 | case TULIP_CHIP_RS7112: /* 21143-like */ | | 302 | case TULIP_CHIP_RS7112: /* 21143-like */ |
303 | /* | | 303 | /* |
304 | * Run these chips in ring mode. | | 304 | * Run these chips in ring mode. |
305 | */ | | 305 | */ |
306 | sc->sc_tdctl_ch = 0; | | 306 | sc->sc_tdctl_ch = 0; |
307 | sc->sc_tdctl_er = TDCTL_ER; | | 307 | sc->sc_tdctl_er = TDCTL_ER; |
308 | sc->sc_preinit = tlp_2114x_preinit; | | 308 | sc->sc_preinit = tlp_2114x_preinit; |
309 | break; | | 309 | break; |
310 | | | 310 | |
311 | case TULIP_CHIP_82C168: | | 311 | case TULIP_CHIP_82C168: |
312 | case TULIP_CHIP_82C169: | | 312 | case TULIP_CHIP_82C169: |
313 | /* | | 313 | /* |
314 | * Run these chips in ring mode. | | 314 | * Run these chips in ring mode. |
315 | */ | | 315 | */ |
316 | sc->sc_tdctl_ch = 0; | | 316 | sc->sc_tdctl_ch = 0; |
317 | sc->sc_tdctl_er = TDCTL_ER; | | 317 | sc->sc_tdctl_er = TDCTL_ER; |
318 | sc->sc_preinit = tlp_pnic_preinit; | | 318 | sc->sc_preinit = tlp_pnic_preinit; |
319 | | | 319 | |
320 | /* | | 320 | /* |
321 | * These chips seem to have busted DMA engines; just put them | | 321 | * These chips seem to have busted DMA engines; just put them |
322 | * in Store-and-Forward mode from the get-go. | | 322 | * in Store-and-Forward mode from the get-go. |
323 | */ | | 323 | */ |
324 | sc->sc_txthresh = TXTH_SF; | | 324 | sc->sc_txthresh = TXTH_SF; |
325 | break; | | 325 | break; |
326 | | | 326 | |
327 | case TULIP_CHIP_WB89C840F: | | 327 | case TULIP_CHIP_WB89C840F: |
328 | /* | | 328 | /* |
329 | * Run this chip in chained mode. | | 329 | * Run this chip in chained mode. |
330 | */ | | 330 | */ |
331 | sc->sc_tdctl_ch = TDCTL_CH; | | 331 | sc->sc_tdctl_ch = TDCTL_CH; |
332 | sc->sc_tdctl_er = 0; | | 332 | sc->sc_tdctl_er = 0; |
333 | sc->sc_flags |= TULIPF_IC_FS; | | 333 | sc->sc_flags |= TULIPF_IC_FS; |
334 | break; | | 334 | break; |
335 | | | 335 | |
336 | case TULIP_CHIP_DM9102: | | 336 | case TULIP_CHIP_DM9102: |
337 | case TULIP_CHIP_DM9102A: | | 337 | case TULIP_CHIP_DM9102A: |
338 | /* | | 338 | /* |
339 | * Run these chips in chained mode. | | 339 | * Run these chips in chained mode. |
340 | */ | | 340 | */ |
341 | sc->sc_tdctl_ch = TDCTL_CH; | | 341 | sc->sc_tdctl_ch = TDCTL_CH; |
342 | sc->sc_tdctl_er = 0; | | 342 | sc->sc_tdctl_er = 0; |
343 | sc->sc_preinit = tlp_dm9102_preinit; | | 343 | sc->sc_preinit = tlp_dm9102_preinit; |
344 | | | 344 | |
345 | /* | | 345 | /* |
346 | * These chips have a broken bus interface, so we | | 346 | * These chips have a broken bus interface, so we |
347 | * can't use any optimized bus commands. For this | | 347 | * can't use any optimized bus commands. For this |
348 | * reason, we tend to underrun pretty quickly, so | | 348 | * reason, we tend to underrun pretty quickly, so |
349 | * just to Store-and-Forward mode from the get-go. | | 349 | * just to Store-and-Forward mode from the get-go. |
350 | */ | | 350 | */ |
351 | sc->sc_txthresh = TXTH_DM9102_SF; | | 351 | sc->sc_txthresh = TXTH_DM9102_SF; |
352 | break; | | 352 | break; |
353 | | | 353 | |
354 | case TULIP_CHIP_AX88140: | | 354 | case TULIP_CHIP_AX88140: |
355 | case TULIP_CHIP_AX88141: | | 355 | case TULIP_CHIP_AX88141: |
356 | /* | | 356 | /* |
357 | * Run these chips in ring mode. | | 357 | * Run these chips in ring mode. |
358 | */ | | 358 | */ |
359 | sc->sc_tdctl_ch = 0; | | 359 | sc->sc_tdctl_ch = 0; |
360 | sc->sc_tdctl_er = TDCTL_ER; | | 360 | sc->sc_tdctl_er = TDCTL_ER; |
361 | sc->sc_preinit = tlp_asix_preinit; | | 361 | sc->sc_preinit = tlp_asix_preinit; |
362 | break; | | 362 | break; |
363 | | | 363 | |
364 | default: | | 364 | default: |
365 | /* | | 365 | /* |
366 | * Default to running in ring mode. | | 366 | * Default to running in ring mode. |
367 | */ | | 367 | */ |
368 | sc->sc_tdctl_ch = 0; | | 368 | sc->sc_tdctl_ch = 0; |
369 | sc->sc_tdctl_er = TDCTL_ER; | | 369 | sc->sc_tdctl_er = TDCTL_ER; |
370 | } | | 370 | } |
371 | | | 371 | |
372 | /* | | 372 | /* |
373 | * Set up the MII bit-bang operations. | | 373 | * Set up the MII bit-bang operations. |
374 | */ | | 374 | */ |
375 | switch (sc->sc_chip) { | | 375 | switch (sc->sc_chip) { |
376 | case TULIP_CHIP_WB89C840F: /* XXX direction bit different? */ | | 376 | case TULIP_CHIP_WB89C840F: /* XXX direction bit different? */ |
377 | sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops; | | 377 | sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops; |
378 | break; | | 378 | break; |
379 | | | 379 | |
380 | default: | | 380 | default: |
381 | sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops; | | 381 | sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops; |
382 | } | | 382 | } |
383 | | | 383 | |
384 | SIMPLEQ_INIT(&sc->sc_txfreeq); | | 384 | SIMPLEQ_INIT(&sc->sc_txfreeq); |
385 | SIMPLEQ_INIT(&sc->sc_txdirtyq); | | 385 | SIMPLEQ_INIT(&sc->sc_txdirtyq); |
386 | | | 386 | |
387 | /* | | 387 | /* |
388 | * Allocate the control data structures, and create and load the | | 388 | * Allocate the control data structures, and create and load the |
389 | * DMA map for it. | | 389 | * DMA map for it. |
390 | */ | | 390 | */ |
391 | if ((error = bus_dmamem_alloc(sc->sc_dmat, | | 391 | if ((error = bus_dmamem_alloc(sc->sc_dmat, |
392 | sizeof(struct tulip_control_data), PAGE_SIZE, 0, &sc->sc_cdseg, | | 392 | sizeof(struct tulip_control_data), PAGE_SIZE, 0, &sc->sc_cdseg, |
393 | 1, &sc->sc_cdnseg, 0)) != 0) { | | 393 | 1, &sc->sc_cdnseg, 0)) != 0) { |
394 | aprint_error_dev(self, | | 394 | aprint_error_dev(self, |
395 | "unable to allocate control data, error = %d\n", error); | | 395 | "unable to allocate control data, error = %d\n", error); |
396 | goto fail_0; | | 396 | goto fail_0; |
397 | } | | 397 | } |
398 | | | 398 | |
399 | if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg, | | 399 | if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg, |
400 | sizeof(struct tulip_control_data), (void **)&sc->sc_control_data, | | 400 | sizeof(struct tulip_control_data), (void **)&sc->sc_control_data, |
401 | BUS_DMA_COHERENT)) != 0) { | | 401 | BUS_DMA_COHERENT)) != 0) { |
402 | aprint_error_dev(self, | | 402 | aprint_error_dev(self, |
403 | "unable to map control data, error = %d\n", error); | | 403 | "unable to map control data, error = %d\n", error); |
404 | goto fail_1; | | 404 | goto fail_1; |
405 | } | | 405 | } |
406 | | | 406 | |
407 | if ((error = bus_dmamap_create(sc->sc_dmat, | | 407 | if ((error = bus_dmamap_create(sc->sc_dmat, |
408 | sizeof(struct tulip_control_data), 1, | | 408 | sizeof(struct tulip_control_data), 1, |
409 | sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) { | | 409 | sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) { |
410 | sc->sc_cddmamap = NULL; | | 410 | sc->sc_cddmamap = NULL; |
411 | aprint_error_dev(self, | | 411 | aprint_error_dev(self, |
412 | "unable to create control data DMA map, error = %d\n", | | 412 | "unable to create control data DMA map, error = %d\n", |
413 | error); | | 413 | error); |
414 | goto fail_2; | | 414 | goto fail_2; |
415 | } | | 415 | } |
416 | | | 416 | |
417 | if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap, | | 417 | if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap, |
418 | sc->sc_control_data, sizeof(struct tulip_control_data), NULL, | | 418 | sc->sc_control_data, sizeof(struct tulip_control_data), NULL, |
419 | 0)) != 0) { | | 419 | 0)) != 0) { |
420 | aprint_error_dev(self, | | 420 | aprint_error_dev(self, |
421 | "unable to load control data DMA map, error = %d\n", | | 421 | "unable to load control data DMA map, error = %d\n", |
422 | error); | | 422 | error); |
423 | goto fail_3; | | 423 | goto fail_3; |
424 | } | | 424 | } |
425 | | | 425 | |
426 | /* | | 426 | /* |
427 | * Create the transmit buffer DMA maps. | | 427 | * Create the transmit buffer DMA maps. |
428 | * | | 428 | * |
429 | * Note that on the Xircom clone, transmit buffers must be | | 429 | * Note that on the Xircom clone, transmit buffers must be |
430 | * 4-byte aligned. We're almost guaranteed to have to copy | | 430 | * 4-byte aligned. We're almost guaranteed to have to copy |
431 | * the packet in that case, so we just limit ourselves to | | 431 | * the packet in that case, so we just limit ourselves to |
432 | * one segment. | | 432 | * one segment. |
433 | * | | 433 | * |
434 | * On the DM9102, the transmit logic can only handle one | | 434 | * On the DM9102, the transmit logic can only handle one |
435 | * DMA segment. | | 435 | * DMA segment. |
436 | */ | | 436 | */ |
437 | switch (sc->sc_chip) { | | 437 | switch (sc->sc_chip) { |
438 | case TULIP_CHIP_X3201_3: | | 438 | case TULIP_CHIP_X3201_3: |
439 | case TULIP_CHIP_DM9102: | | 439 | case TULIP_CHIP_DM9102: |
440 | case TULIP_CHIP_DM9102A: | | 440 | case TULIP_CHIP_DM9102A: |
441 | case TULIP_CHIP_AX88140: | | 441 | case TULIP_CHIP_AX88140: |
442 | case TULIP_CHIP_AX88141: | | 442 | case TULIP_CHIP_AX88141: |
443 | sc->sc_ntxsegs = 1; | | 443 | sc->sc_ntxsegs = 1; |
444 | break; | | 444 | break; |
445 | | | 445 | |
446 | default: | | 446 | default: |
447 | sc->sc_ntxsegs = TULIP_NTXSEGS; | | 447 | sc->sc_ntxsegs = TULIP_NTXSEGS; |
448 | } | | 448 | } |
449 | for (i = 0; i < TULIP_TXQUEUELEN; i++) { | | 449 | for (i = 0; i < TULIP_TXQUEUELEN; i++) { |
450 | if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, | | 450 | if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, |
451 | sc->sc_ntxsegs, MCLBYTES, 0, 0, | | 451 | sc->sc_ntxsegs, MCLBYTES, 0, 0, |
452 | &sc->sc_txsoft[i].txs_dmamap)) != 0) { | | 452 | &sc->sc_txsoft[i].txs_dmamap)) != 0) { |
453 | sc->sc_txsoft[i].txs_dmamap = NULL; | | 453 | sc->sc_txsoft[i].txs_dmamap = NULL; |
454 | aprint_error_dev(self, | | 454 | aprint_error_dev(self, |
455 | "unable to create tx DMA map %d, error = %d\n", i, | | 455 | "unable to create tx DMA map %d, error = %d\n", i, |
456 | error); | | 456 | error); |
457 | goto fail_4; | | 457 | goto fail_4; |
458 | } | | 458 | } |
459 | } | | 459 | } |
460 | | | 460 | |
461 | /* | | 461 | /* |
462 | * Create the receive buffer DMA maps. | | 462 | * Create the receive buffer DMA maps. |
463 | */ | | 463 | */ |
464 | for (i = 0; i < TULIP_NRXDESC; i++) { | | 464 | for (i = 0; i < TULIP_NRXDESC; i++) { |
465 | if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, | | 465 | if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, |
466 | MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) { | | 466 | MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) { |
467 | sc->sc_rxsoft[i].rxs_dmamap = NULL; | | 467 | sc->sc_rxsoft[i].rxs_dmamap = NULL; |
468 | aprint_error_dev(self, | | 468 | aprint_error_dev(self, |
469 | "unable to create rx DMA map %d, error = %d\n", i, | | 469 | "unable to create rx DMA map %d, error = %d\n", i, |
470 | error); | | 470 | error); |
471 | goto fail_5; | | 471 | goto fail_5; |
472 | } | | 472 | } |
473 | sc->sc_rxsoft[i].rxs_mbuf = NULL; | | 473 | sc->sc_rxsoft[i].rxs_mbuf = NULL; |
474 | } | | 474 | } |
475 | | | 475 | |
476 | /* | | 476 | /* |
477 | * From this point forward, the attachment cannot fail. A failure | | 477 | * From this point forward, the attachment cannot fail. A failure |
478 | * before this point releases all resources that may have been | | 478 | * before this point releases all resources that may have been |
479 | * allocated. | | 479 | * allocated. |
480 | */ | | 480 | */ |
481 | sc->sc_flags |= TULIPF_ATTACHED; | | 481 | sc->sc_flags |= TULIPF_ATTACHED; |
482 | | | 482 | |
483 | /* | | 483 | /* |
484 | * Reset the chip to a known state. | | 484 | * Reset the chip to a known state. |
485 | */ | | 485 | */ |
486 | tlp_reset(sc); | | 486 | tlp_reset(sc); |
487 | | | 487 | |
488 | /* Announce ourselves. */ | | 488 | /* Announce ourselves. */ |
489 | aprint_normal_dev(self, "%s%sEthernet address %s\n", | | 489 | aprint_normal_dev(self, "%s%sEthernet address %s\n", |
490 | sc->sc_name[0] != '\0' ? sc->sc_name : "", | | 490 | sc->sc_name[0] != '\0' ? sc->sc_name : "", |
491 | sc->sc_name[0] != '\0' ? ", " : "", | | 491 | sc->sc_name[0] != '\0' ? ", " : "", |
492 | ether_sprintf(enaddr)); | | 492 | ether_sprintf(enaddr)); |
493 | | | 493 | |
494 | /* | | 494 | /* |
495 | * Check to see if we're the simulated Ethernet on Connectix | | 495 | * Check to see if we're the simulated Ethernet on Connectix |
496 | * Virtual PC. | | 496 | * Virtual PC. |
497 | */ | | 497 | */ |
498 | if (enaddr[0] == 0x00 && enaddr[1] == 0x03 && enaddr[2] == 0xff) | | 498 | if (enaddr[0] == 0x00 && enaddr[1] == 0x03 && enaddr[2] == 0xff) |
499 | sc->sc_flags |= TULIPF_VPC; | | 499 | sc->sc_flags |= TULIPF_VPC; |
500 | | | 500 | |
501 | /* | | 501 | /* |
502 | * Initialize our media structures. This may probe the MII, if | | 502 | * Initialize our media structures. This may probe the MII, if |
503 | * present. | | 503 | * present. |
504 | */ | | 504 | */ |
505 | (*sc->sc_mediasw->tmsw_init)(sc); | | 505 | (*sc->sc_mediasw->tmsw_init)(sc); |
506 | | | 506 | |
507 | strlcpy(ifp->if_xname, device_xname(self), IFNAMSIZ); | | 507 | strlcpy(ifp->if_xname, device_xname(self), IFNAMSIZ); |
508 | ifp->if_softc = sc; | | 508 | ifp->if_softc = sc; |
509 | ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; | | 509 | ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; |
510 | sc->sc_if_flags = ifp->if_flags; | | 510 | sc->sc_if_flags = ifp->if_flags; |
511 | ifp->if_ioctl = tlp_ioctl; | | 511 | ifp->if_ioctl = tlp_ioctl; |
512 | ifp->if_start = tlp_start; | | 512 | ifp->if_start = tlp_start; |
513 | ifp->if_watchdog = tlp_watchdog; | | 513 | ifp->if_watchdog = tlp_watchdog; |
514 | ifp->if_init = tlp_init; | | 514 | ifp->if_init = tlp_init; |
515 | ifp->if_stop = tlp_stop; | | 515 | ifp->if_stop = tlp_stop; |
516 | IFQ_SET_READY(&ifp->if_snd); | | 516 | IFQ_SET_READY(&ifp->if_snd); |
517 | | | 517 | |
518 | /* | | 518 | /* |
519 | * We can support 802.1Q VLAN-sized frames. | | 519 | * We can support 802.1Q VLAN-sized frames. |
520 | */ | | 520 | */ |
521 | sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; | | 521 | sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; |
522 | | | 522 | |
523 | /* | | 523 | /* |
524 | * Attach the interface. | | 524 | * Attach the interface. |
525 | */ | | 525 | */ |
526 | if_attach(ifp); | | 526 | if_attach(ifp); |
527 | if_deferred_start_init(ifp, NULL); | | 527 | if_deferred_start_init(ifp, NULL); |
528 | ether_ifattach(ifp, enaddr); | | 528 | ether_ifattach(ifp, enaddr); |
529 | ether_set_ifflags_cb(&sc->sc_ethercom, tlp_ifflags_cb); | | 529 | ether_set_ifflags_cb(&sc->sc_ethercom, tlp_ifflags_cb); |
530 | | | 530 | |
531 | rnd_attach_source(&sc->sc_rnd_source, device_xname(self), | | 531 | rnd_attach_source(&sc->sc_rnd_source, device_xname(self), |
532 | RND_TYPE_NET, RND_FLAG_DEFAULT); | | 532 | RND_TYPE_NET, RND_FLAG_DEFAULT); |
533 | | | 533 | |
534 | if (pmf_device_register(self, NULL, NULL)) | | 534 | if (pmf_device_register(self, NULL, NULL)) |
535 | pmf_class_network_register(self, ifp); | | 535 | pmf_class_network_register(self, ifp); |
536 | else | | 536 | else |
537 | aprint_error_dev(self, "couldn't establish power handler\n"); | | 537 | aprint_error_dev(self, "couldn't establish power handler\n"); |
538 | | | 538 | |
539 | return 0; | | 539 | return 0; |
540 | | | 540 | |
541 | /* | | 541 | /* |
542 | * Free any resources we've allocated during the failed attach | | 542 | * Free any resources we've allocated during the failed attach |
543 | * attempt. Do this in reverse order and fall through. | | 543 | * attempt. Do this in reverse order and fall through. |
544 | */ | | 544 | */ |
545 | fail_5: | | 545 | fail_5: |
546 | for (i = 0; i < TULIP_NRXDESC; i++) { | | 546 | for (i = 0; i < TULIP_NRXDESC; i++) { |
547 | if (sc->sc_rxsoft[i].rxs_dmamap != NULL) | | 547 | if (sc->sc_rxsoft[i].rxs_dmamap != NULL) |
548 | bus_dmamap_destroy(sc->sc_dmat, | | 548 | bus_dmamap_destroy(sc->sc_dmat, |
549 | sc->sc_rxsoft[i].rxs_dmamap); | | 549 | sc->sc_rxsoft[i].rxs_dmamap); |
550 | } | | 550 | } |
551 | fail_4: | | 551 | fail_4: |
552 | for (i = 0; i < TULIP_TXQUEUELEN; i++) { | | 552 | for (i = 0; i < TULIP_TXQUEUELEN; i++) { |
553 | if (sc->sc_txsoft[i].txs_dmamap != NULL) | | 553 | if (sc->sc_txsoft[i].txs_dmamap != NULL) |
554 | bus_dmamap_destroy(sc->sc_dmat, | | 554 | bus_dmamap_destroy(sc->sc_dmat, |
555 | sc->sc_txsoft[i].txs_dmamap); | | 555 | sc->sc_txsoft[i].txs_dmamap); |
556 | } | | 556 | } |
557 | bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); | | 557 | bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); |
558 | fail_3: | | 558 | fail_3: |
559 | bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); | | 559 | bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); |
560 | fail_2: | | 560 | fail_2: |
561 | bus_dmamem_unmap(sc->sc_dmat, (void *)sc->sc_control_data, | | 561 | bus_dmamem_unmap(sc->sc_dmat, (void *)sc->sc_control_data, |
562 | sizeof(struct tulip_control_data)); | | 562 | sizeof(struct tulip_control_data)); |
563 | fail_1: | | 563 | fail_1: |
564 | bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg); | | 564 | bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg); |
565 | fail_0: | | 565 | fail_0: |
566 | return error; | | 566 | return error; |
567 | } | | 567 | } |
568 | | | 568 | |
569 | /* | | 569 | /* |
570 | * tlp_activate: | | 570 | * tlp_activate: |
571 | * | | 571 | * |
572 | * Handle device activation/deactivation requests. | | 572 | * Handle device activation/deactivation requests. |
573 | */ | | 573 | */ |
574 | int | | 574 | int |
575 | tlp_activate(device_t self, enum devact act) | | 575 | tlp_activate(device_t self, enum devact act) |
576 | { | | 576 | { |
577 | struct tulip_softc *sc = device_private(self); | | 577 | struct tulip_softc *sc = device_private(self); |
578 | | | 578 | |
579 | switch (act) { | | 579 | switch (act) { |
580 | case DVACT_DEACTIVATE: | | 580 | case DVACT_DEACTIVATE: |
581 | if_deactivate(&sc->sc_ethercom.ec_if); | | 581 | if_deactivate(&sc->sc_ethercom.ec_if); |
582 | return 0; | | 582 | return 0; |
583 | default: | | 583 | default: |
584 | return EOPNOTSUPP; | | 584 | return EOPNOTSUPP; |
585 | } | | 585 | } |
586 | } | | 586 | } |
587 | | | 587 | |
588 | /* | | 588 | /* |
589 | * tlp_detach: | | 589 | * tlp_detach: |
590 | * | | 590 | * |
591 | * Detach a Tulip interface. | | 591 | * Detach a Tulip interface. |
592 | */ | | 592 | */ |
593 | int | | 593 | int |
594 | tlp_detach(struct tulip_softc *sc) | | 594 | tlp_detach(struct tulip_softc *sc) |
595 | { | | 595 | { |
596 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; | | 596 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; |
597 | struct tulip_rxsoft *rxs; | | 597 | struct tulip_rxsoft *rxs; |
598 | struct tulip_txsoft *txs; | | 598 | struct tulip_txsoft *txs; |
599 | device_t self = sc->sc_dev; | | 599 | device_t self = sc->sc_dev; |
600 | int i, s; | | 600 | int i, s; |
601 | | | 601 | |
602 | /* | | 602 | /* |
603 | * Succeed now if there isn't any work to do. | | 603 | * Succeed now if there isn't any work to do. |
604 | */ | | 604 | */ |
605 | if ((sc->sc_flags & TULIPF_ATTACHED) == 0) | | 605 | if ((sc->sc_flags & TULIPF_ATTACHED) == 0) |
606 | return 0; | | 606 | return 0; |
607 | | | 607 | |
608 | s = splnet(); | | 608 | s = splnet(); |
609 | /* Stop the interface. Callouts are stopped in it. */ | | 609 | /* Stop the interface. Callouts are stopped in it. */ |
610 | tlp_stop(ifp, 1); | | 610 | tlp_stop(ifp, 1); |
611 | splx(s); | | 611 | splx(s); |
612 | | | 612 | |
613 | /* Destroy our callouts. */ | | 613 | /* Destroy our callouts. */ |
614 | callout_destroy(&sc->sc_nway_callout); | | 614 | callout_destroy(&sc->sc_nway_callout); |
615 | callout_destroy(&sc->sc_tick_callout); | | 615 | callout_destroy(&sc->sc_tick_callout); |
616 | | | 616 | |
617 | if (sc->sc_flags & TULIPF_HAS_MII) { | | 617 | if (sc->sc_flags & TULIPF_HAS_MII) { |
618 | /* Detach all PHYs */ | | 618 | /* Detach all PHYs */ |
619 | mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); | | 619 | mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); |
620 | } | | 620 | } |
621 | | | 621 | |
622 | /* Delete all remaining media. */ | | 622 | /* Delete all remaining media. */ |
623 | ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); | | 623 | ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); |
624 | | | 624 | |
625 | rnd_detach_source(&sc->sc_rnd_source); | | 625 | rnd_detach_source(&sc->sc_rnd_source); |
626 | | | 626 | |
627 | ether_ifdetach(ifp); | | 627 | ether_ifdetach(ifp); |
628 | if_detach(ifp); | | 628 | if_detach(ifp); |
629 | | | 629 | |
630 | for (i = 0; i < TULIP_NRXDESC; i++) { | | 630 | for (i = 0; i < TULIP_NRXDESC; i++) { |
631 | rxs = &sc->sc_rxsoft[i]; | | 631 | rxs = &sc->sc_rxsoft[i]; |
632 | if (rxs->rxs_mbuf != NULL) { | | 632 | if (rxs->rxs_mbuf != NULL) { |
633 | bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); | | 633 | bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); |
634 | m_freem(rxs->rxs_mbuf); | | 634 | m_freem(rxs->rxs_mbuf); |
635 | rxs->rxs_mbuf = NULL; | | 635 | rxs->rxs_mbuf = NULL; |
636 | } | | 636 | } |
637 | bus_dmamap_destroy(sc->sc_dmat, rxs->rxs_dmamap); | | 637 | bus_dmamap_destroy(sc->sc_dmat, rxs->rxs_dmamap); |
638 | } | | 638 | } |
639 | for (i = 0; i < TULIP_TXQUEUELEN; i++) { | | 639 | for (i = 0; i < TULIP_TXQUEUELEN; i++) { |
640 | txs = &sc->sc_txsoft[i]; | | 640 | txs = &sc->sc_txsoft[i]; |
641 | if (txs->txs_mbuf != NULL) { | | 641 | if (txs->txs_mbuf != NULL) { |
642 | bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); | | 642 | bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); |
643 | m_freem(txs->txs_mbuf); | | 643 | m_freem(txs->txs_mbuf); |
644 | txs->txs_mbuf = NULL; | | 644 | txs->txs_mbuf = NULL; |
645 | } | | 645 | } |
646 | bus_dmamap_destroy(sc->sc_dmat, txs->txs_dmamap); | | 646 | bus_dmamap_destroy(sc->sc_dmat, txs->txs_dmamap); |
647 | } | | 647 | } |
648 | bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); | | 648 | bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); |
649 | bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); | | 649 | bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); |
650 | bus_dmamem_unmap(sc->sc_dmat, (void *)sc->sc_control_data, | | 650 | bus_dmamem_unmap(sc->sc_dmat, (void *)sc->sc_control_data, |
651 | sizeof(struct tulip_control_data)); | | 651 | sizeof(struct tulip_control_data)); |
652 | bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg); | | 652 | bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg); |
653 | | | 653 | |
654 | pmf_device_deregister(self); | | 654 | pmf_device_deregister(self); |
655 | | | 655 | |
656 | if (sc->sc_srom) | | 656 | if (sc->sc_srom) |
657 | free(sc->sc_srom, M_DEVBUF); | | 657 | free(sc->sc_srom, M_DEVBUF); |
658 | | | 658 | |
659 | return 0; | | 659 | return 0; |
660 | } | | 660 | } |
661 | | | 661 | |
662 | /* | | 662 | /* |
663 | * tlp_start: [ifnet interface function] | | 663 | * tlp_start: [ifnet interface function] |
664 | * | | 664 | * |
665 | * Start packet transmission on the interface. | | 665 | * Start packet transmission on the interface. |
666 | */ | | 666 | */ |
667 | static void | | 667 | static void |
668 | tlp_start(struct ifnet *ifp) | | 668 | tlp_start(struct ifnet *ifp) |
669 | { | | 669 | { |
670 | struct tulip_softc *sc = ifp->if_softc; | | 670 | struct tulip_softc *sc = ifp->if_softc; |
671 | struct mbuf *m0, *m; | | 671 | struct mbuf *m0, *m; |
672 | struct tulip_txsoft *txs, *last_txs = NULL; | | 672 | struct tulip_txsoft *txs, *last_txs = NULL; |
673 | bus_dmamap_t dmamap; | | 673 | bus_dmamap_t dmamap; |
674 | int error, firsttx, nexttx, lasttx = 1, ofree, seg; | | 674 | int error, firsttx, nexttx, lasttx = 1, ofree, seg; |
675 | struct tulip_desc *txd; | | 675 | struct tulip_desc *txd; |
676 | | | 676 | |
677 | DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n", | | 677 | DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n", |
678 | device_xname(sc->sc_dev), sc->sc_flags, ifp->if_flags)); | | 678 | device_xname(sc->sc_dev), sc->sc_flags, ifp->if_flags)); |
679 | | | 679 | |
680 | /* | | 680 | /* |
681 | * If we want a filter setup, it means no more descriptors were | | 681 | * If we want a filter setup, it means no more descriptors were |
682 | * available for the setup routine. Let it get a chance to wedge | | 682 | * available for the setup routine. Let it get a chance to wedge |
683 | * itself into the ring. | | 683 | * itself into the ring. |
684 | */ | | 684 | */ |
685 | if (sc->sc_flags & TULIPF_WANT_SETUP) | | 685 | if (sc->sc_flags & TULIPF_WANT_SETUP) |
686 | ifp->if_flags |= IFF_OACTIVE; | | 686 | ifp->if_flags |= IFF_OACTIVE; |
687 | | | 687 | |
688 | if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) | | 688 | if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) |
689 | return; | | 689 | return; |
690 | | | 690 | |
691 | if (sc->sc_tick == tlp_2114x_nway_tick && | | 691 | if (sc->sc_tick == tlp_2114x_nway_tick && |
692 | (sc->sc_flags & TULIPF_LINK_UP) == 0 && ifp->if_snd.ifq_len < 10) | | 692 | (sc->sc_flags & TULIPF_LINK_UP) == 0 && ifp->if_snd.ifq_len < 10) |
693 | return; | | 693 | return; |
694 | | | 694 | |
695 | /* | | 695 | /* |
696 | * Remember the previous number of free descriptors and | | 696 | * Remember the previous number of free descriptors and |
697 | * the first descriptor we'll use. | | 697 | * the first descriptor we'll use. |
698 | */ | | 698 | */ |
699 | ofree = sc->sc_txfree; | | 699 | ofree = sc->sc_txfree; |
700 | firsttx = sc->sc_txnext; | | 700 | firsttx = sc->sc_txnext; |
701 | | | 701 | |
702 | DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n", | | 702 | DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n", |
703 | device_xname(sc->sc_dev), ofree, firsttx)); | | 703 | device_xname(sc->sc_dev), ofree, firsttx)); |
704 | | | 704 | |
705 | /* | | 705 | /* |
706 | * Loop through the send queue, setting up transmit descriptors | | 706 | * Loop through the send queue, setting up transmit descriptors |
707 | * until we drain the queue, or use up all available transmit | | 707 | * until we drain the queue, or use up all available transmit |
708 | * descriptors. | | 708 | * descriptors. |
709 | */ | | 709 | */ |
710 | while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL && | | 710 | while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL && |
711 | sc->sc_txfree != 0) { | | 711 | sc->sc_txfree != 0) { |
712 | /* | | 712 | /* |
713 | * Grab a packet off the queue. | | 713 | * Grab a packet off the queue. |
714 | */ | | 714 | */ |
715 | IFQ_POLL(&ifp->if_snd, m0); | | 715 | IFQ_POLL(&ifp->if_snd, m0); |
716 | if (m0 == NULL) | | 716 | if (m0 == NULL) |
717 | break; | | 717 | break; |
718 | m = NULL; | | 718 | m = NULL; |
719 | | | 719 | |
720 | dmamap = txs->txs_dmamap; | | 720 | dmamap = txs->txs_dmamap; |
721 | | | 721 | |
722 | /* | | 722 | /* |
723 | * Load the DMA map. If this fails, the packet either | | 723 | * Load the DMA map. If this fails, the packet either |
724 | * didn't fit in the alloted number of segments, or we were | | 724 | * didn't fit in the alloted number of segments, or we were |
725 | * short on resources. In this case, we'll copy and try | | 725 | * short on resources. In this case, we'll copy and try |
726 | * again. | | 726 | * again. |
727 | * | | 727 | * |
728 | * Note that if we're only allowed 1 Tx segment, we | | 728 | * Note that if we're only allowed 1 Tx segment, we |
729 | * have an alignment restriction. Do this test before | | 729 | * have an alignment restriction. Do this test before |
730 | * attempting to load the DMA map, because it's more | | 730 | * attempting to load the DMA map, because it's more |
731 | * likely we'll trip the alignment test than the | | 731 | * likely we'll trip the alignment test than the |
732 | * more-than-one-segment test. | | 732 | * more-than-one-segment test. |
733 | */ | | 733 | */ |
734 | if ((sc->sc_ntxsegs == 1 && (mtod(m0, uintptr_t) & 3) != 0) || | | 734 | if ((sc->sc_ntxsegs == 1 && (mtod(m0, uintptr_t) & 3) != 0) || |
735 | bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0, | | 735 | bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0, |
736 | BUS_DMA_WRITE | BUS_DMA_NOWAIT) != 0) { | | 736 | BUS_DMA_WRITE | BUS_DMA_NOWAIT) != 0) { |
737 | MGETHDR(m, M_DONTWAIT, MT_DATA); | | 737 | MGETHDR(m, M_DONTWAIT, MT_DATA); |
738 | if (m == NULL) { | | 738 | if (m == NULL) { |
739 | aprint_error_dev(sc->sc_dev, "unable to allocate Tx mbuf\n"); | | 739 | aprint_error_dev(sc->sc_dev, "unable to allocate Tx mbuf\n"); |
740 | break; | | 740 | break; |
741 | } | | 741 | } |
742 | MCLAIM(m, &sc->sc_ethercom.ec_tx_mowner); | | 742 | MCLAIM(m, &sc->sc_ethercom.ec_tx_mowner); |
743 | if (m0->m_pkthdr.len > MHLEN) { | | 743 | if (m0->m_pkthdr.len > MHLEN) { |
744 | MCLGET(m, M_DONTWAIT); | | 744 | MCLGET(m, M_DONTWAIT); |
745 | if ((m->m_flags & M_EXT) == 0) { | | 745 | if ((m->m_flags & M_EXT) == 0) { |
746 | aprint_error_dev(sc->sc_dev, | | 746 | aprint_error_dev(sc->sc_dev, |
747 | "unable to allocate Tx cluster\n"); | | 747 | "unable to allocate Tx cluster\n"); |
748 | m_freem(m); | | 748 | m_freem(m); |
749 | break; | | 749 | break; |
750 | } | | 750 | } |
751 | } | | 751 | } |
752 | m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, void *)); | | 752 | m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, void *)); |
753 | m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len; | | 753 | m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len; |
754 | error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, | | 754 | error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, |
755 | m, BUS_DMA_WRITE | BUS_DMA_NOWAIT); | | 755 | m, BUS_DMA_WRITE | BUS_DMA_NOWAIT); |
756 | if (error) { | | 756 | if (error) { |
757 | aprint_error_dev(sc->sc_dev, | | 757 | aprint_error_dev(sc->sc_dev, |
758 | "unable to load Tx buffer, error = %d", | | 758 | "unable to load Tx buffer, error = %d", |
759 | error); | | 759 | error); |
760 | break; | | 760 | break; |
761 | } | | 761 | } |
762 | } | | 762 | } |
763 | | | 763 | |
764 | /* | | 764 | /* |
765 | * Ensure we have enough descriptors free to describe | | 765 | * Ensure we have enough descriptors free to describe |
766 | * the packet. | | 766 | * the packet. |
767 | */ | | 767 | */ |
768 | if (dmamap->dm_nsegs > sc->sc_txfree) { | | 768 | if (dmamap->dm_nsegs > sc->sc_txfree) { |
769 | /* | | 769 | /* |
770 | * Not enough free descriptors to transmit this | | 770 | * Not enough free descriptors to transmit this |
771 | * packet. We haven't committed to anything yet, | | 771 | * packet. We haven't committed to anything yet, |
772 | * so just unload the DMA map, put the packet | | 772 | * so just unload the DMA map, put the packet |
773 | * back on the queue, and punt. Notify the upper | | 773 | * back on the queue, and punt. Notify the upper |
774 | * layer that there are no more slots left. | | 774 | * layer that there are no more slots left. |
775 | * | | 775 | * |
776 | * XXX We could allocate an mbuf and copy, but | | 776 | * XXX We could allocate an mbuf and copy, but |
777 | * XXX it is worth it? | | 777 | * XXX it is worth it? |
778 | */ | | 778 | */ |
779 | ifp->if_flags |= IFF_OACTIVE; | | 779 | ifp->if_flags |= IFF_OACTIVE; |
780 | bus_dmamap_unload(sc->sc_dmat, dmamap); | | 780 | bus_dmamap_unload(sc->sc_dmat, dmamap); |
781 | if (m != NULL) | | 781 | if (m != NULL) |
782 | m_freem(m); | | 782 | m_freem(m); |
783 | break; | | 783 | break; |
784 | } | | 784 | } |
785 | | | 785 | |
786 | IFQ_DEQUEUE(&ifp->if_snd, m0); | | 786 | IFQ_DEQUEUE(&ifp->if_snd, m0); |
787 | if (m != NULL) { | | 787 | if (m != NULL) { |
788 | m_freem(m0); | | 788 | m_freem(m0); |
789 | m0 = m; | | 789 | m0 = m; |
790 | } | | 790 | } |
791 | | | 791 | |
792 | /* | | 792 | /* |
793 | * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET. | | 793 | * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET. |
794 | */ | | 794 | */ |
795 | | | 795 | |
796 | /* Sync the DMA map. */ | | 796 | /* Sync the DMA map. */ |
797 | bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, | | 797 | bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, |
798 | BUS_DMASYNC_PREWRITE); | | 798 | BUS_DMASYNC_PREWRITE); |
799 | | | 799 | |
800 | /* | | 800 | /* |
801 | * Initialize the transmit descriptors. | | 801 | * Initialize the transmit descriptors. |
802 | */ | | 802 | */ |
803 | for (nexttx = sc->sc_txnext, seg = 0; | | 803 | for (nexttx = sc->sc_txnext, seg = 0; |
804 | seg < dmamap->dm_nsegs; | | 804 | seg < dmamap->dm_nsegs; |
805 | seg++, nexttx = TULIP_NEXTTX(nexttx)) { | | 805 | seg++, nexttx = TULIP_NEXTTX(nexttx)) { |
806 | /* | | 806 | /* |
807 | * If this is the first descriptor we're | | 807 | * If this is the first descriptor we're |
808 | * enqueueing, don't set the OWN bit just | | 808 | * enqueueing, don't set the OWN bit just |
809 | * yet. That could cause a race condition. | | 809 | * yet. That could cause a race condition. |
810 | * We'll do it below. | | 810 | * We'll do it below. |
811 | */ | | 811 | */ |
812 | txd = &sc->sc_txdescs[nexttx]; | | 812 | txd = &sc->sc_txdescs[nexttx]; |
813 | txd->td_status = | | 813 | txd->td_status = |
814 | (nexttx == firsttx) ? 0 : htole32(TDSTAT_OWN); | | 814 | (nexttx == firsttx) ? 0 : htole32(TDSTAT_OWN); |
815 | txd->td_bufaddr1 = | | 815 | txd->td_bufaddr1 = |
816 | htole32(dmamap->dm_segs[seg].ds_addr); | | 816 | htole32(dmamap->dm_segs[seg].ds_addr); |
817 | txd->td_ctl = | | 817 | txd->td_ctl = |
818 | htole32((dmamap->dm_segs[seg].ds_len << | | 818 | htole32((dmamap->dm_segs[seg].ds_len << |
819 | TDCTL_SIZE1_SHIFT) | sc->sc_tdctl_ch | | | 819 | TDCTL_SIZE1_SHIFT) | sc->sc_tdctl_ch | |
820 | (nexttx == (TULIP_NTXDESC - 1) ? | | 820 | (nexttx == (TULIP_NTXDESC - 1) ? |
821 | sc->sc_tdctl_er : 0)); | | 821 | sc->sc_tdctl_er : 0)); |
822 | lasttx = nexttx; | | 822 | lasttx = nexttx; |
823 | } | | 823 | } |
824 | | | 824 | |
825 | KASSERT(lasttx != -1); | | 825 | KASSERT(lasttx != -1); |
826 | | | 826 | |
827 | /* Set `first segment' and `last segment' appropriately. */ | | 827 | /* Set `first segment' and `last segment' appropriately. */ |
828 | sc->sc_txdescs[sc->sc_txnext].td_ctl |= htole32(TDCTL_Tx_FS); | | 828 | sc->sc_txdescs[sc->sc_txnext].td_ctl |= htole32(TDCTL_Tx_FS); |
829 | sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_LS); | | 829 | sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_LS); |
830 | | | 830 | |
831 | #ifdef TLP_DEBUG | | 831 | #ifdef TLP_DEBUG |
832 | if (ifp->if_flags & IFF_DEBUG) { | | 832 | if (ifp->if_flags & IFF_DEBUG) { |
833 | printf(" txsoft %p transmit chain:\n", txs); | | 833 | printf(" txsoft %p transmit chain:\n", txs); |
834 | for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) { | | 834 | for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) { |
835 | txd = &sc->sc_txdescs[seg]; | | 835 | txd = &sc->sc_txdescs[seg]; |
836 | printf(" descriptor %d:\n", seg); | | 836 | printf(" descriptor %d:\n", seg); |
837 | printf(" td_status: 0x%08x\n", | | 837 | printf(" td_status: 0x%08x\n", |
838 | le32toh(txd->td_status)); | | 838 | le32toh(txd->td_status)); |
839 | printf(" td_ctl: 0x%08x\n", | | 839 | printf(" td_ctl: 0x%08x\n", |
840 | le32toh(txd->td_ctl)); | | 840 | le32toh(txd->td_ctl)); |
841 | printf(" td_bufaddr1: 0x%08x\n", | | 841 | printf(" td_bufaddr1: 0x%08x\n", |
842 | le32toh(txd->td_bufaddr1)); | | 842 | le32toh(txd->td_bufaddr1)); |
843 | printf(" td_bufaddr2: 0x%08x\n", | | 843 | printf(" td_bufaddr2: 0x%08x\n", |
844 | le32toh(txd->td_bufaddr2)); | | 844 | le32toh(txd->td_bufaddr2)); |
845 | if (seg == lasttx) | | 845 | if (seg == lasttx) |
846 | break; | | 846 | break; |
847 | } | | 847 | } |
848 | } | | 848 | } |
849 | #endif | | 849 | #endif |
850 | | | 850 | |
851 | /* Sync the descriptors we're using. */ | | 851 | /* Sync the descriptors we're using. */ |
852 | TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs, | | 852 | TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs, |
853 | BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); | | 853 | BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); |
854 | | | 854 | |
855 | /* | | 855 | /* |
856 | * Store a pointer to the packet so we can free it later, | | 856 | * Store a pointer to the packet so we can free it later, |
857 | * and remember what txdirty will be once the packet is | | 857 | * and remember what txdirty will be once the packet is |
858 | * done. | | 858 | * done. |
859 | */ | | 859 | */ |
860 | txs->txs_mbuf = m0; | | 860 | txs->txs_mbuf = m0; |
861 | txs->txs_firstdesc = sc->sc_txnext; | | 861 | txs->txs_firstdesc = sc->sc_txnext; |
862 | txs->txs_lastdesc = lasttx; | | 862 | txs->txs_lastdesc = lasttx; |
863 | txs->txs_ndescs = dmamap->dm_nsegs; | | 863 | txs->txs_ndescs = dmamap->dm_nsegs; |
864 | | | 864 | |
865 | /* Advance the tx pointer. */ | | 865 | /* Advance the tx pointer. */ |
866 | sc->sc_txfree -= dmamap->dm_nsegs; | | 866 | sc->sc_txfree -= dmamap->dm_nsegs; |
867 | sc->sc_txnext = nexttx; | | 867 | sc->sc_txnext = nexttx; |
868 | | | 868 | |
869 | SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs_q); | | 869 | SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs_q); |
870 | SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); | | 870 | SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); |
871 | | | 871 | |
872 | last_txs = txs; | | 872 | last_txs = txs; |
873 | | | 873 | |
874 | /* | | 874 | /* |
875 | * Pass the packet to any BPF listeners. | | 875 | * Pass the packet to any BPF listeners. |
876 | */ | | 876 | */ |
877 | bpf_mtap(ifp, m0, BPF_D_OUT); | | 877 | bpf_mtap(ifp, m0, BPF_D_OUT); |
878 | } | | 878 | } |
879 | | | 879 | |
880 | if (txs == NULL || sc->sc_txfree == 0) { | | 880 | if (txs == NULL || sc->sc_txfree == 0) { |
881 | /* No more slots left; notify upper layer. */ | | 881 | /* No more slots left; notify upper layer. */ |
882 | ifp->if_flags |= IFF_OACTIVE; | | 882 | ifp->if_flags |= IFF_OACTIVE; |
883 | } | | 883 | } |
884 | | | 884 | |
885 | if (sc->sc_txfree != ofree) { | | 885 | if (sc->sc_txfree != ofree) { |
886 | DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n", | | 886 | DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n", |
887 | device_xname(sc->sc_dev), lasttx, firsttx)); | | 887 | device_xname(sc->sc_dev), lasttx, firsttx)); |
888 | /* | | 888 | /* |
889 | * Cause a transmit interrupt to happen on the | | 889 | * Cause a transmit interrupt to happen on the |
890 | * last packet we enqueued. | | 890 | * last packet we enqueued. |
891 | */ | | 891 | */ |
892 | sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_IC); | | 892 | sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_IC); |
893 | TULIP_CDTXSYNC(sc, lasttx, 1, | | 893 | TULIP_CDTXSYNC(sc, lasttx, 1, |
894 | BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); | | 894 | BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); |
895 | | | 895 | |
896 | /* | | 896 | /* |
897 | * Some clone chips want IC on the *first* segment in | | 897 | * Some clone chips want IC on the *first* segment in |
898 | * the packet. Appease them. | | 898 | * the packet. Appease them. |
899 | */ | | 899 | */ |
900 | KASSERT(last_txs != NULL); | | 900 | KASSERT(last_txs != NULL); |
901 | if ((sc->sc_flags & TULIPF_IC_FS) != 0 && | | 901 | if ((sc->sc_flags & TULIPF_IC_FS) != 0 && |
902 | last_txs->txs_firstdesc != lasttx) { | | 902 | last_txs->txs_firstdesc != lasttx) { |
903 | sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |= | | 903 | sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |= |
904 | htole32(TDCTL_Tx_IC); | | 904 | htole32(TDCTL_Tx_IC); |
905 | TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1, | | 905 | TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1, |
906 | BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); | | 906 | BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); |
907 | } | | 907 | } |
908 | | | 908 | |
909 | /* | | 909 | /* |
910 | * The entire packet chain is set up. Give the | | 910 | * The entire packet chain is set up. Give the |
911 | * first descriptor to the chip now. | | 911 | * first descriptor to the chip now. |
912 | */ | | 912 | */ |
913 | sc->sc_txdescs[firsttx].td_status |= htole32(TDSTAT_OWN); | | 913 | sc->sc_txdescs[firsttx].td_status |= htole32(TDSTAT_OWN); |
914 | TULIP_CDTXSYNC(sc, firsttx, 1, | | 914 | TULIP_CDTXSYNC(sc, firsttx, 1, |
915 | BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); | | 915 | BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); |
916 | | | 916 | |
917 | /* Wake up the transmitter. */ | | 917 | /* Wake up the transmitter. */ |
918 | /* XXX USE AUTOPOLLING? */ | | 918 | /* XXX USE AUTOPOLLING? */ |
919 | TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); | | 919 | TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); |
920 | | | 920 | |
921 | /* Set a watchdog timer in case the chip flakes out. */ | | 921 | /* Set a watchdog timer in case the chip flakes out. */ |
922 | ifp->if_timer = 5; | | 922 | ifp->if_timer = 5; |
923 | } | | 923 | } |
924 | } | | 924 | } |
925 | | | 925 | |
926 | /* | | 926 | /* |
927 | * tlp_watchdog: [ifnet interface function] | | 927 | * tlp_watchdog: [ifnet interface function] |
928 | * | | 928 | * |
929 | * Watchdog timer handler. | | 929 | * Watchdog timer handler. |
930 | */ | | 930 | */ |
931 | static void | | 931 | static void |
932 | tlp_watchdog(struct ifnet *ifp) | | 932 | tlp_watchdog(struct ifnet *ifp) |
933 | { | | 933 | { |
934 | struct tulip_softc *sc = ifp->if_softc; | | 934 | struct tulip_softc *sc = ifp->if_softc; |
935 | int doing_setup, doing_transmit; | | 935 | int doing_setup, doing_transmit; |
936 | | | 936 | |
937 | doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP); | | 937 | doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP); |
938 | doing_transmit = (! SIMPLEQ_EMPTY(&sc->sc_txdirtyq)); | | 938 | doing_transmit = (! SIMPLEQ_EMPTY(&sc->sc_txdirtyq)); |
939 | | | 939 | |
940 | if (doing_setup && doing_transmit) { | | 940 | if (doing_setup && doing_transmit) { |
941 | printf("%s: filter setup and transmit timeout\n", | | 941 | printf("%s: filter setup and transmit timeout\n", |
942 | device_xname(sc->sc_dev)); | | 942 | device_xname(sc->sc_dev)); |
943 | ifp->if_oerrors++; | | 943 | if_statinc(ifp, if_oerrors); |
944 | } else if (doing_transmit) { | | 944 | } else if (doing_transmit) { |
945 | printf("%s: transmit timeout\n", device_xname(sc->sc_dev)); | | 945 | printf("%s: transmit timeout\n", device_xname(sc->sc_dev)); |
946 | ifp->if_oerrors++; | | 946 | if_statinc(ifp, if_oerrors); |
947 | } else if (doing_setup) | | 947 | } else if (doing_setup) |
948 | printf("%s: filter setup timeout\n", device_xname(sc->sc_dev)); | | 948 | printf("%s: filter setup timeout\n", device_xname(sc->sc_dev)); |
949 | else | | 949 | else |
950 | printf("%s: spurious watchdog timeout\n", | | 950 | printf("%s: spurious watchdog timeout\n", |
951 | device_xname(sc->sc_dev)); | | 951 | device_xname(sc->sc_dev)); |
952 | | | 952 | |
953 | (void) tlp_init(ifp); | | 953 | (void) tlp_init(ifp); |
954 | | | 954 | |
955 | /* Try to get more packets going. */ | | 955 | /* Try to get more packets going. */ |
956 | tlp_start(ifp); | | 956 | tlp_start(ifp); |
957 | } | | 957 | } |
958 | | | 958 | |
959 | /* If the interface is up and running, only modify the receive | | 959 | /* If the interface is up and running, only modify the receive |
960 | * filter when setting promiscuous or debug mode. Otherwise fall | | 960 | * filter when setting promiscuous or debug mode. Otherwise fall |
961 | * through to ether_ioctl, which will reset the chip. | | 961 | * through to ether_ioctl, which will reset the chip. |
962 | */ | | 962 | */ |
963 | static int | | 963 | static int |
964 | tlp_ifflags_cb(struct ethercom *ec) | | 964 | tlp_ifflags_cb(struct ethercom *ec) |
965 | { | | 965 | { |
966 | struct ifnet *ifp = &ec->ec_if; | | 966 | struct ifnet *ifp = &ec->ec_if; |
967 | struct tulip_softc *sc = ifp->if_softc; | | 967 | struct tulip_softc *sc = ifp->if_softc; |
968 | u_short change = ifp->if_flags ^ sc->sc_if_flags; | | 968 | u_short change = ifp->if_flags ^ sc->sc_if_flags; |
969 | | | 969 | |
970 | if ((change & ~(IFF_CANTCHANGE | IFF_DEBUG)) != 0) | | 970 | if ((change & ~(IFF_CANTCHANGE | IFF_DEBUG)) != 0) |
971 | return ENETRESET; | | 971 | return ENETRESET; |
972 | if ((change & IFF_PROMISC) != 0) | | 972 | if ((change & IFF_PROMISC) != 0) |
973 | (*sc->sc_filter_setup)(sc); | | 973 | (*sc->sc_filter_setup)(sc); |
974 | return 0; | | 974 | return 0; |
975 | } | | 975 | } |
976 | | | 976 | |
977 | /* | | 977 | /* |
978 | * tlp_ioctl: [ifnet interface function] | | 978 | * tlp_ioctl: [ifnet interface function] |
979 | * | | 979 | * |
980 | * Handle control requests from the operator. | | 980 | * Handle control requests from the operator. |
981 | */ | | 981 | */ |
982 | static int | | 982 | static int |
983 | tlp_ioctl(struct ifnet *ifp, u_long cmd, void *data) | | 983 | tlp_ioctl(struct ifnet *ifp, u_long cmd, void *data) |
984 | { | | 984 | { |
985 | struct tulip_softc *sc = ifp->if_softc; | | 985 | struct tulip_softc *sc = ifp->if_softc; |
986 | int s, error; | | 986 | int s, error; |
987 | | | 987 | |
988 | s = splnet(); | | 988 | s = splnet(); |
989 | | | 989 | |
990 | switch (cmd) { | | 990 | switch (cmd) { |
991 | default: | | 991 | default: |
992 | error = ether_ioctl(ifp, cmd, data); | | 992 | error = ether_ioctl(ifp, cmd, data); |
993 | if (error == ENETRESET) { | | 993 | if (error == ENETRESET) { |
994 | if (ifp->if_flags & IFF_RUNNING) { | | 994 | if (ifp->if_flags & IFF_RUNNING) { |
995 | /* | | 995 | /* |
996 | * Multicast list has changed. Set the | | 996 | * Multicast list has changed. Set the |
997 | * hardware filter accordingly. | | 997 | * hardware filter accordingly. |
998 | */ | | 998 | */ |
999 | (*sc->sc_filter_setup)(sc); | | 999 | (*sc->sc_filter_setup)(sc); |
1000 | } | | 1000 | } |
1001 | error = 0; | | 1001 | error = 0; |
1002 | } | | 1002 | } |
1003 | break; | | 1003 | break; |
1004 | } | | 1004 | } |
1005 | | | 1005 | |
1006 | /* Try to get more packets going. */ | | 1006 | /* Try to get more packets going. */ |
1007 | if (TULIP_IS_ENABLED(sc)) | | 1007 | if (TULIP_IS_ENABLED(sc)) |
1008 | tlp_start(ifp); | | 1008 | tlp_start(ifp); |
1009 | | | 1009 | |
1010 | sc->sc_if_flags = ifp->if_flags; | | 1010 | sc->sc_if_flags = ifp->if_flags; |
1011 | splx(s); | | 1011 | splx(s); |
1012 | return error; | | 1012 | return error; |
1013 | } | | 1013 | } |
1014 | | | 1014 | |
1015 | /* | | 1015 | /* |
1016 | * tlp_intr: | | 1016 | * tlp_intr: |
1017 | * | | 1017 | * |
1018 | * Interrupt service routine. | | 1018 | * Interrupt service routine. |
1019 | */ | | 1019 | */ |
1020 | int | | 1020 | int |
1021 | tlp_intr(void *arg) | | 1021 | tlp_intr(void *arg) |
1022 | { | | 1022 | { |
1023 | struct tulip_softc *sc = arg; | | 1023 | struct tulip_softc *sc = arg; |
1024 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; | | 1024 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; |
1025 | uint32_t status, rxstatus, txstatus; | | 1025 | uint32_t status, rxstatus, txstatus; |
1026 | int handled = 0, txthresh; | | 1026 | int handled = 0, txthresh; |
1027 | | | 1027 | |
1028 | DPRINTF(sc, ("%s: tlp_intr\n", device_xname(sc->sc_dev))); | | 1028 | DPRINTF(sc, ("%s: tlp_intr\n", device_xname(sc->sc_dev))); |
1029 | | | 1029 | |
1030 | #ifdef DEBUG | | 1030 | #ifdef DEBUG |
1031 | if (TULIP_IS_ENABLED(sc) == 0) | | 1031 | if (TULIP_IS_ENABLED(sc) == 0) |
1032 | panic("%s: tlp_intr: not enabled", device_xname(sc->sc_dev)); | | 1032 | panic("%s: tlp_intr: not enabled", device_xname(sc->sc_dev)); |
1033 | #endif | | 1033 | #endif |
1034 | | | 1034 | |
1035 | /* | | 1035 | /* |
1036 | * If the interface isn't running, the interrupt couldn't | | 1036 | * If the interface isn't running, the interrupt couldn't |
1037 | * possibly have come from us. | | 1037 | * possibly have come from us. |
1038 | */ | | 1038 | */ |
1039 | if ((ifp->if_flags & IFF_RUNNING) == 0 || | | 1039 | if ((ifp->if_flags & IFF_RUNNING) == 0 || |
1040 | !device_is_active(sc->sc_dev)) | | 1040 | !device_is_active(sc->sc_dev)) |
1041 | return 0; | | 1041 | return 0; |
1042 | | | 1042 | |
1043 | /* Disable interrupts on the DM9102 (interrupt edge bug). */ | | 1043 | /* Disable interrupts on the DM9102 (interrupt edge bug). */ |
1044 | switch (sc->sc_chip) { | | 1044 | switch (sc->sc_chip) { |
1045 | case TULIP_CHIP_DM9102: | | 1045 | case TULIP_CHIP_DM9102: |
1046 | case TULIP_CHIP_DM9102A: | | 1046 | case TULIP_CHIP_DM9102A: |
1047 | TULIP_WRITE(sc, CSR_INTEN, 0); | | 1047 | TULIP_WRITE(sc, CSR_INTEN, 0); |
1048 | break; | | 1048 | break; |
1049 | | | 1049 | |
1050 | default: | | 1050 | default: |
1051 | /* Nothing. */ | | 1051 | /* Nothing. */ |
1052 | break; | | 1052 | break; |
1053 | } | | 1053 | } |
1054 | | | 1054 | |
1055 | for (;;) { | | 1055 | for (;;) { |
1056 | status = TULIP_READ(sc, CSR_STATUS); | | 1056 | status = TULIP_READ(sc, CSR_STATUS); |
1057 | if (status) | | 1057 | if (status) |
1058 | TULIP_WRITE(sc, CSR_STATUS, status); | | 1058 | TULIP_WRITE(sc, CSR_STATUS, status); |
1059 | | | 1059 | |
1060 | if ((status & sc->sc_inten) == 0) | | 1060 | if ((status & sc->sc_inten) == 0) |
1061 | break; | | 1061 | break; |
1062 | | | 1062 | |
1063 | handled = 1; | | 1063 | handled = 1; |
1064 | | | 1064 | |
1065 | rxstatus = status & sc->sc_rxint_mask; | | 1065 | rxstatus = status & sc->sc_rxint_mask; |
1066 | txstatus = status & sc->sc_txint_mask; | | 1066 | txstatus = status & sc->sc_txint_mask; |
1067 | | | 1067 | |
1068 | if (rxstatus) { | | 1068 | if (rxstatus) { |
1069 | /* Grab new any new packets. */ | | 1069 | /* Grab new any new packets. */ |
1070 | tlp_rxintr(sc); | | 1070 | tlp_rxintr(sc); |
1071 | | | 1071 | |
1072 | if (rxstatus & STATUS_RWT) | | 1072 | if (rxstatus & STATUS_RWT) |
1073 | printf("%s: receive watchdog timeout\n", | | 1073 | printf("%s: receive watchdog timeout\n", |
1074 | device_xname(sc->sc_dev)); | | 1074 | device_xname(sc->sc_dev)); |
1075 | | | 1075 | |
1076 | if (rxstatus & STATUS_RU) { | | 1076 | if (rxstatus & STATUS_RU) { |
1077 | printf("%s: receive ring overrun\n", | | 1077 | printf("%s: receive ring overrun\n", |
1078 | device_xname(sc->sc_dev)); | | 1078 | device_xname(sc->sc_dev)); |
1079 | /* Get the receive process going again. */ | | 1079 | /* Get the receive process going again. */ |
1080 | if (sc->sc_tdctl_er != TDCTL_ER) { | | 1080 | if (sc->sc_tdctl_er != TDCTL_ER) { |
1081 | tlp_idle(sc, OPMODE_SR); | | 1081 | tlp_idle(sc, OPMODE_SR); |
1082 | TULIP_WRITE(sc, CSR_RXLIST, | | 1082 | TULIP_WRITE(sc, CSR_RXLIST, |
1083 | TULIP_CDRXADDR(sc, sc->sc_rxptr)); | | 1083 | TULIP_CDRXADDR(sc, sc->sc_rxptr)); |
1084 | TULIP_WRITE(sc, CSR_OPMODE, | | 1084 | TULIP_WRITE(sc, CSR_OPMODE, |
1085 | sc->sc_opmode); | | 1085 | sc->sc_opmode); |
1086 | } | | 1086 | } |
1087 | TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); | | 1087 | TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); |
1088 | break; | | 1088 | break; |
1089 | } | | 1089 | } |
1090 | } | | 1090 | } |
1091 | | | 1091 | |
1092 | if (txstatus) { | | 1092 | if (txstatus) { |
1093 | /* Sweep up transmit descriptors. */ | | 1093 | /* Sweep up transmit descriptors. */ |
1094 | tlp_txintr(sc); | | 1094 | tlp_txintr(sc); |
1095 | | | 1095 | |
1096 | if (txstatus & STATUS_TJT) | | 1096 | if (txstatus & STATUS_TJT) |
1097 | printf("%s: transmit jabber timeout\n", | | 1097 | printf("%s: transmit jabber timeout\n", |
1098 | device_xname(sc->sc_dev)); | | 1098 | device_xname(sc->sc_dev)); |
1099 | | | 1099 | |
1100 | if (txstatus & STATUS_UNF) { | | 1100 | if (txstatus & STATUS_UNF) { |
1101 | /* | | 1101 | /* |
1102 | * Increase our transmit threshold if | | 1102 | * Increase our transmit threshold if |
1103 | * another is available. | | 1103 | * another is available. |
1104 | */ | | 1104 | */ |
1105 | txthresh = sc->sc_txthresh + 1; | | 1105 | txthresh = sc->sc_txthresh + 1; |
1106 | if (sc->sc_txth[txthresh].txth_name != NULL) { | | 1106 | if (sc->sc_txth[txthresh].txth_name != NULL) { |
1107 | /* Idle the transmit process. */ | | 1107 | /* Idle the transmit process. */ |
1108 | tlp_idle(sc, OPMODE_ST); | | 1108 | tlp_idle(sc, OPMODE_ST); |
1109 | | | 1109 | |
1110 | sc->sc_txthresh = txthresh; | | 1110 | sc->sc_txthresh = txthresh; |
1111 | sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF); | | 1111 | sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF); |
1112 | sc->sc_opmode |= | | 1112 | sc->sc_opmode |= |
1113 | sc->sc_txth[txthresh].txth_opmode; | | 1113 | sc->sc_txth[txthresh].txth_opmode; |
1114 | printf("%s: transmit underrun; new " | | 1114 | printf("%s: transmit underrun; new " |
1115 | "threshold: %s\n", | | 1115 | "threshold: %s\n", |
1116 | device_xname(sc->sc_dev), | | 1116 | device_xname(sc->sc_dev), |
1117 | sc->sc_txth[txthresh].txth_name); | | 1117 | sc->sc_txth[txthresh].txth_name); |
1118 | | | 1118 | |
1119 | /* | | 1119 | /* |
1120 | * Set the new threshold and restart | | 1120 | * Set the new threshold and restart |
1121 | * the transmit process. | | 1121 | * the transmit process. |
1122 | */ | | 1122 | */ |
1123 | TULIP_WRITE(sc, CSR_OPMODE, | | 1123 | TULIP_WRITE(sc, CSR_OPMODE, |
1124 | sc->sc_opmode); | | 1124 | sc->sc_opmode); |
1125 | } | | 1125 | } |
1126 | /* | | 1126 | /* |
1127 | * XXX Log every Nth underrun from | | 1127 | * XXX Log every Nth underrun from |
1128 | * XXX now on? | | 1128 | * XXX now on? |
1129 | */ | | 1129 | */ |
1130 | } | | 1130 | } |
1131 | } | | 1131 | } |
1132 | | | 1132 | |
1133 | if (status & (STATUS_TPS | STATUS_RPS)) { | | 1133 | if (status & (STATUS_TPS | STATUS_RPS)) { |
1134 | if (status & STATUS_TPS) | | 1134 | if (status & STATUS_TPS) |
1135 | printf("%s: transmit process stopped\n", | | 1135 | printf("%s: transmit process stopped\n", |
1136 | device_xname(sc->sc_dev)); | | 1136 | device_xname(sc->sc_dev)); |
1137 | if (status & STATUS_RPS) | | 1137 | if (status & STATUS_RPS) |
1138 | printf("%s: receive process stopped\n", | | 1138 | printf("%s: receive process stopped\n", |
1139 | device_xname(sc->sc_dev)); | | 1139 | device_xname(sc->sc_dev)); |
1140 | (void) tlp_init(ifp); | | 1140 | (void) tlp_init(ifp); |
1141 | break; | | 1141 | break; |
1142 | } | | 1142 | } |
1143 | | | 1143 | |
1144 | if (status & STATUS_SE) { | | 1144 | if (status & STATUS_SE) { |
1145 | const char *str; | | 1145 | const char *str; |
1146 | switch (status & STATUS_EB) { | | 1146 | switch (status & STATUS_EB) { |
1147 | case STATUS_EB_PARITY: | | 1147 | case STATUS_EB_PARITY: |
1148 | str = "parity error"; | | 1148 | str = "parity error"; |
1149 | break; | | 1149 | break; |
1150 | | | 1150 | |
1151 | case STATUS_EB_MABT: | | 1151 | case STATUS_EB_MABT: |
1152 | str = "master abort"; | | 1152 | str = "master abort"; |
1153 | break; | | 1153 | break; |
1154 | | | 1154 | |
1155 | case STATUS_EB_TABT: | | 1155 | case STATUS_EB_TABT: |
1156 | str = "target abort"; | | 1156 | str = "target abort"; |
1157 | break; | | 1157 | break; |
1158 | | | 1158 | |
1159 | default: | | 1159 | default: |
1160 | str = "unknown error"; | | 1160 | str = "unknown error"; |
1161 | break; | | 1161 | break; |
1162 | } | | 1162 | } |
1163 | aprint_error_dev(sc->sc_dev, | | 1163 | aprint_error_dev(sc->sc_dev, |
1164 | "fatal system error: %s\n", str); | | 1164 | "fatal system error: %s\n", str); |
1165 | (void) tlp_init(ifp); | | 1165 | (void) tlp_init(ifp); |
1166 | break; | | 1166 | break; |
1167 | } | | 1167 | } |
1168 | | | 1168 | |
1169 | /* | | 1169 | /* |
1170 | * Not handled: | | 1170 | * Not handled: |
1171 | * | | 1171 | * |
1172 | * Transmit buffer unavailable -- normal | | 1172 | * Transmit buffer unavailable -- normal |
1173 | * condition, nothing to do, really. | | 1173 | * condition, nothing to do, really. |
1174 | * | | 1174 | * |
1175 | * General purpose timer experied -- we don't | | 1175 | * General purpose timer experied -- we don't |
1176 | * use the general purpose timer. | | 1176 | * use the general purpose timer. |
1177 | * | | 1177 | * |
1178 | * Early receive interrupt -- not available on | | 1178 | * Early receive interrupt -- not available on |
1179 | * all chips, we just use RI. We also only | | 1179 | * all chips, we just use RI. We also only |
1180 | * use single-segment receive DMA, so this | | 1180 | * use single-segment receive DMA, so this |
1181 | * is mostly useless. | | 1181 | * is mostly useless. |
1182 | */ | | 1182 | */ |
1183 | } | | 1183 | } |
1184 | | | 1184 | |
1185 | /* Bring interrupts back up on the DM9102. */ | | 1185 | /* Bring interrupts back up on the DM9102. */ |
1186 | switch (sc->sc_chip) { | | 1186 | switch (sc->sc_chip) { |
1187 | case TULIP_CHIP_DM9102: | | 1187 | case TULIP_CHIP_DM9102: |
1188 | case TULIP_CHIP_DM9102A: | | 1188 | case TULIP_CHIP_DM9102A: |
1189 | TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); | | 1189 | TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); |
1190 | break; | | 1190 | break; |
1191 | | | 1191 | |
1192 | default: | | 1192 | default: |
1193 | /* Nothing. */ | | 1193 | /* Nothing. */ |
1194 | break; | | 1194 | break; |
1195 | } | | 1195 | } |
1196 | | | 1196 | |
1197 | /* Try to get more packets going. */ | | 1197 | /* Try to get more packets going. */ |
1198 | if_schedule_deferred_start(ifp); | | 1198 | if_schedule_deferred_start(ifp); |
1199 | | | 1199 | |
1200 | if (handled) | | 1200 | if (handled) |
1201 | rnd_add_uint32(&sc->sc_rnd_source, status); | | 1201 | rnd_add_uint32(&sc->sc_rnd_source, status); |
1202 | | | 1202 | |
1203 | return handled; | | 1203 | return handled; |
1204 | } | | 1204 | } |
1205 | | | 1205 | |
1206 | /* | | 1206 | /* |
1207 | * tlp_rxintr: | | 1207 | * tlp_rxintr: |
1208 | * | | 1208 | * |
1209 | * Helper; handle receive interrupts. | | 1209 | * Helper; handle receive interrupts. |
1210 | */ | | 1210 | */ |
1211 | static void | | 1211 | static void |
1212 | tlp_rxintr(struct tulip_softc *sc) | | 1212 | tlp_rxintr(struct tulip_softc *sc) |
1213 | { | | 1213 | { |
1214 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; | | 1214 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; |
1215 | struct ether_header *eh; | | 1215 | struct ether_header *eh; |
1216 | struct tulip_rxsoft *rxs; | | 1216 | struct tulip_rxsoft *rxs; |
1217 | struct mbuf *m; | | 1217 | struct mbuf *m; |
1218 | uint32_t rxstat, errors; | | 1218 | uint32_t rxstat, errors; |
1219 | int i, len; | | 1219 | int i, len; |
1220 | | | 1220 | |
1221 | for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) { | | 1221 | for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) { |
1222 | rxs = &sc->sc_rxsoft[i]; | | 1222 | rxs = &sc->sc_rxsoft[i]; |
1223 | | | 1223 | |
1224 | TULIP_CDRXSYNC(sc, i, | | 1224 | TULIP_CDRXSYNC(sc, i, |
1225 | BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); | | 1225 | BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); |
1226 | | | 1226 | |
1227 | rxstat = le32toh(sc->sc_rxdescs[i].td_status); | | 1227 | rxstat = le32toh(sc->sc_rxdescs[i].td_status); |
1228 | | | 1228 | |
1229 | if (rxstat & TDSTAT_OWN) { | | 1229 | if (rxstat & TDSTAT_OWN) { |
1230 | /* | | 1230 | /* |
1231 | * We have processed all of the receive buffers. | | 1231 | * We have processed all of the receive buffers. |
1232 | */ | | 1232 | */ |
1233 | break; | | 1233 | break; |
1234 | } | | 1234 | } |
1235 | | | 1235 | |
1236 | /* | | 1236 | /* |
1237 | * Make sure the packet fit in one buffer. This should | | 1237 | * Make sure the packet fit in one buffer. This should |
1238 | * always be the case. But the Lite-On PNIC, rev 33 | | 1238 | * always be the case. But the Lite-On PNIC, rev 33 |
1239 | * has an awful receive engine bug, which may require | | 1239 | * has an awful receive engine bug, which may require |
1240 | * a very icky work-around. | | 1240 | * a very icky work-around. |
1241 | */ | | 1241 | */ |
1242 | if ((rxstat & (TDSTAT_Rx_FS | TDSTAT_Rx_LS)) != | | 1242 | if ((rxstat & (TDSTAT_Rx_FS | TDSTAT_Rx_LS)) != |
1243 | (TDSTAT_Rx_FS | TDSTAT_Rx_LS)) { | | 1243 | (TDSTAT_Rx_FS | TDSTAT_Rx_LS)) { |
1244 | printf("%s: incoming packet spilled, resetting\n", | | 1244 | printf("%s: incoming packet spilled, resetting\n", |
1245 | device_xname(sc->sc_dev)); | | 1245 | device_xname(sc->sc_dev)); |
1246 | (void) tlp_init(ifp); | | 1246 | (void) tlp_init(ifp); |
1247 | return; | | 1247 | return; |
1248 | } | | 1248 | } |
1249 | | | 1249 | |
1250 | /* | | 1250 | /* |
1251 | * If any collisions were seen on the wire, count one. | | 1251 | * If any collisions were seen on the wire, count one. |
1252 | */ | | 1252 | */ |
1253 | if (rxstat & TDSTAT_Rx_CS) | | 1253 | if (rxstat & TDSTAT_Rx_CS) |
1254 | ifp->if_collisions++; | | 1254 | if_statinc(ifp, if_collisions); |
1255 | | | 1255 | |
1256 | /* | | 1256 | /* |
1257 | * If an error occurred, update stats, clear the status | | 1257 | * If an error occurred, update stats, clear the status |
1258 | * word, and leave the packet buffer in place. It will | | 1258 | * word, and leave the packet buffer in place. It will |
1259 | * simply be reused the next time the ring comes around. | | 1259 | * simply be reused the next time the ring comes around. |
1260 | */ | | 1260 | */ |
1261 | errors = TDSTAT_Rx_DE | TDSTAT_Rx_RF | TDSTAT_Rx_TL | | | 1261 | errors = TDSTAT_Rx_DE | TDSTAT_Rx_RF | TDSTAT_Rx_TL | |
1262 | TDSTAT_Rx_CS | TDSTAT_Rx_RE | TDSTAT_Rx_DB | TDSTAT_Rx_CE; | | 1262 | TDSTAT_Rx_CS | TDSTAT_Rx_RE | TDSTAT_Rx_DB | TDSTAT_Rx_CE; |
1263 | /* | | 1263 | /* |
1264 | * If 802.1Q VLAN MTU is enabled, ignore the Frame Too Long | | 1264 | * If 802.1Q VLAN MTU is enabled, ignore the Frame Too Long |
1265 | * error. | | 1265 | * error. |
1266 | */ | | 1266 | */ |
1267 | if ((sc->sc_ethercom.ec_capenable & ETHERCAP_VLAN_MTU) != 0) | | 1267 | if ((sc->sc_ethercom.ec_capenable & ETHERCAP_VLAN_MTU) != 0) |
1268 | errors &= ~TDSTAT_Rx_TL; | | 1268 | errors &= ~TDSTAT_Rx_TL; |
1269 | /* | | 1269 | /* |
1270 | * If chip doesn't have MII, ignore the MII error bit. | | 1270 | * If chip doesn't have MII, ignore the MII error bit. |
1271 | */ | | 1271 | */ |
1272 | if ((sc->sc_flags & TULIPF_HAS_MII) == 0) | | 1272 | if ((sc->sc_flags & TULIPF_HAS_MII) == 0) |
1273 | errors &= ~TDSTAT_Rx_RE; | | 1273 | errors &= ~TDSTAT_Rx_RE; |
1274 | | | 1274 | |
1275 | if ((rxstat & TDSTAT_ES) != 0 && | | 1275 | if ((rxstat & TDSTAT_ES) != 0 && |
1276 | (rxstat & errors) != 0) { | | 1276 | (rxstat & errors) != 0) { |
1277 | rxstat &= errors; | | 1277 | rxstat &= errors; |
1278 | #define PRINTERR(bit, str) \ | | 1278 | #define PRINTERR(bit, str) \ |
1279 | if (rxstat & (bit)) \ | | 1279 | if (rxstat & (bit)) \ |
1280 | aprint_error_dev(sc->sc_dev, \ | | 1280 | aprint_error_dev(sc->sc_dev, \ |
1281 | "receive error: %s\n", str) | | 1281 | "receive error: %s\n", str) |
1282 | ifp->if_ierrors++; | | 1282 | if_statinc(ifp, if_ierrors); |
1283 | PRINTERR(TDSTAT_Rx_DE, "descriptor error"); | | 1283 | PRINTERR(TDSTAT_Rx_DE, "descriptor error"); |
1284 | PRINTERR(TDSTAT_Rx_RF, "runt frame"); | | 1284 | PRINTERR(TDSTAT_Rx_RF, "runt frame"); |
1285 | PRINTERR(TDSTAT_Rx_TL, "frame too long"); | | 1285 | PRINTERR(TDSTAT_Rx_TL, "frame too long"); |
1286 | PRINTERR(TDSTAT_Rx_RE, "MII error"); | | 1286 | PRINTERR(TDSTAT_Rx_RE, "MII error"); |
1287 | PRINTERR(TDSTAT_Rx_DB, "dribbling bit"); | | 1287 | PRINTERR(TDSTAT_Rx_DB, "dribbling bit"); |
1288 | PRINTERR(TDSTAT_Rx_CE, "CRC error"); | | 1288 | PRINTERR(TDSTAT_Rx_CE, "CRC error"); |
1289 | #undef PRINTERR | | 1289 | #undef PRINTERR |
1290 | TULIP_INIT_RXDESC(sc, i); | | 1290 | TULIP_INIT_RXDESC(sc, i); |
1291 | continue; | | 1291 | continue; |
1292 | } | | 1292 | } |
1293 | | | 1293 | |
1294 | bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, | | 1294 | bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, |
1295 | rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); | | 1295 | rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); |
1296 | | | 1296 | |
1297 | /* | | 1297 | /* |
1298 | * No errors; receive the packet. Note the Tulip | | 1298 | * No errors; receive the packet. Note the Tulip |
1299 | * includes the CRC with every packet. | | 1299 | * includes the CRC with every packet. |
1300 | */ | | 1300 | */ |
1301 | len = TDSTAT_Rx_LENGTH(rxstat) - ETHER_CRC_LEN; | | 1301 | len = TDSTAT_Rx_LENGTH(rxstat) - ETHER_CRC_LEN; |
1302 | | | 1302 | |
1303 | #ifdef __NO_STRICT_ALIGNMENT | | 1303 | #ifdef __NO_STRICT_ALIGNMENT |
1304 | /* | | 1304 | /* |
1305 | * Allocate a new mbuf cluster. If that fails, we are | | 1305 | * Allocate a new mbuf cluster. If that fails, we are |
1306 | * out of memory, and must drop the packet and recycle | | 1306 | * out of memory, and must drop the packet and recycle |
1307 | * the buffer that's already attached to this descriptor. | | 1307 | * the buffer that's already attached to this descriptor. |
1308 | */ | | 1308 | */ |
1309 | m = rxs->rxs_mbuf; | | 1309 | m = rxs->rxs_mbuf; |
1310 | if (tlp_add_rxbuf(sc, i) != 0) { | | 1310 | if (tlp_add_rxbuf(sc, i) != 0) { |
1311 | ifp->if_ierrors++; | | 1311 | if_statinc(ifp, if_ierrors); |
1312 | TULIP_INIT_RXDESC(sc, i); | | 1312 | TULIP_INIT_RXDESC(sc, i); |
1313 | bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, | | 1313 | bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, |
1314 | rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); | | 1314 | rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); |
1315 | continue; | | 1315 | continue; |
1316 | } | | 1316 | } |
1317 | #else | | 1317 | #else |
1318 | /* | | 1318 | /* |
1319 | * The Tulip's receive buffers must be 4-byte aligned. | | 1319 | * The Tulip's receive buffers must be 4-byte aligned. |
1320 | * But this means that the data after the Ethernet header | | 1320 | * But this means that the data after the Ethernet header |
1321 | * is misaligned. We must allocate a new buffer and | | 1321 | * is misaligned. We must allocate a new buffer and |
1322 | * copy the data, shifted forward 2 bytes. | | 1322 | * copy the data, shifted forward 2 bytes. |
1323 | */ | | 1323 | */ |
1324 | MGETHDR(m, M_DONTWAIT, MT_DATA); | | 1324 | MGETHDR(m, M_DONTWAIT, MT_DATA); |
1325 | if (m == NULL) { | | 1325 | if (m == NULL) { |
1326 | dropit: | | 1326 | dropit: |
1327 | ifp->if_ierrors++; | | 1327 | if_statinc(ifp, if_ierrors); |
1328 | TULIP_INIT_RXDESC(sc, i); | | 1328 | TULIP_INIT_RXDESC(sc, i); |
1329 | bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, | | 1329 | bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, |
1330 | rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); | | 1330 | rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); |
1331 | continue; | | 1331 | continue; |
1332 | } | | 1332 | } |
1333 | MCLAIM(m, &sc->sc_ethercom.ec_rx_mowner); | | 1333 | MCLAIM(m, &sc->sc_ethercom.ec_rx_mowner); |
1334 | if (len > (MHLEN - 2)) { | | 1334 | if (len > (MHLEN - 2)) { |
1335 | MCLGET(m, M_DONTWAIT); | | 1335 | MCLGET(m, M_DONTWAIT); |
1336 | if ((m->m_flags & M_EXT) == 0) { | | 1336 | if ((m->m_flags & M_EXT) == 0) { |
1337 | m_freem(m); | | 1337 | m_freem(m); |
1338 | goto dropit; | | 1338 | goto dropit; |
1339 | } | | 1339 | } |
1340 | } | | 1340 | } |
1341 | m->m_data += 2; | | 1341 | m->m_data += 2; |
1342 | | | 1342 | |
1343 | /* | | 1343 | /* |
1344 | * Note that we use clusters for incoming frames, so the | | 1344 | * Note that we use clusters for incoming frames, so the |
1345 | * buffer is virtually contiguous. | | 1345 | * buffer is virtually contiguous. |
1346 | */ | | 1346 | */ |
1347 | memcpy(mtod(m, void *), mtod(rxs->rxs_mbuf, void *), len); | | 1347 | memcpy(mtod(m, void *), mtod(rxs->rxs_mbuf, void *), len); |
1348 | | | 1348 | |
1349 | /* Allow the receive descriptor to continue using its mbuf. */ | | 1349 | /* Allow the receive descriptor to continue using its mbuf. */ |
1350 | TULIP_INIT_RXDESC(sc, i); | | 1350 | TULIP_INIT_RXDESC(sc, i); |
1351 | bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, | | 1351 | bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, |
1352 | rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); | | 1352 | rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); |
1353 | #endif /* __NO_STRICT_ALIGNMENT */ | | 1353 | #endif /* __NO_STRICT_ALIGNMENT */ |
1354 | | | 1354 | |
1355 | eh = mtod(m, struct ether_header *); | | 1355 | eh = mtod(m, struct ether_header *); |
1356 | m_set_rcvif(m, ifp); | | 1356 | m_set_rcvif(m, ifp); |
1357 | m->m_pkthdr.len = m->m_len = len; | | 1357 | m->m_pkthdr.len = m->m_len = len; |
1358 | | | 1358 | |
1359 | /* | | 1359 | /* |
1360 | * XXX Work-around for a weird problem with the emulated | | 1360 | * XXX Work-around for a weird problem with the emulated |
1361 | * 21041 on Connectix Virtual PC: | | 1361 | * 21041 on Connectix Virtual PC: |
1362 | * | | 1362 | * |
1363 | * When we receive a full-size TCP segment, we seem to get | | 1363 | * When we receive a full-size TCP segment, we seem to get |
1364 | * a packet there the Rx status says 1522 bytes, yet we do | | 1364 | * a packet there the Rx status says 1522 bytes, yet we do |
1365 | * not get a frame-too-long error from the chip. The extra | | 1365 | * not get a frame-too-long error from the chip. The extra |
1366 | * bytes seem to always be zeros. Perhaps Virtual PC is | | 1366 | * bytes seem to always be zeros. Perhaps Virtual PC is |
1367 | * inserting 4 bytes of zeros after every packet. In any | | 1367 | * inserting 4 bytes of zeros after every packet. In any |
1368 | * case, let's try and detect this condition and truncate | | 1368 | * case, let's try and detect this condition and truncate |
1369 | * the length so that it will pass up the stack. | | 1369 | * the length so that it will pass up the stack. |
1370 | */ | | 1370 | */ |
1371 | if (__predict_false((sc->sc_flags & TULIPF_VPC) != 0)) { | | 1371 | if (__predict_false((sc->sc_flags & TULIPF_VPC) != 0)) { |
1372 | uint16_t etype = ntohs(eh->ether_type); | | 1372 | uint16_t etype = ntohs(eh->ether_type); |
1373 | | | 1373 | |
1374 | if (len > ETHER_MAX_FRAME(ifp, etype, 0)) | | 1374 | if (len > ETHER_MAX_FRAME(ifp, etype, 0)) |
1375 | m->m_pkthdr.len = m->m_len = len = | | 1375 | m->m_pkthdr.len = m->m_len = len = |
1376 | ETHER_MAX_FRAME(ifp, etype, 0); | | 1376 | ETHER_MAX_FRAME(ifp, etype, 0); |
1377 | } | | 1377 | } |
1378 | | | 1378 | |
1379 | /* | | 1379 | /* |
1380 | * We sometimes have to run the 21140 in Hash-Only | | 1380 | * We sometimes have to run the 21140 in Hash-Only |
1381 | * mode. If we're in that mode, and not in promiscuous | | 1381 | * mode. If we're in that mode, and not in promiscuous |
1382 | * mode, and we have a unicast packet that isn't for | | 1382 | * mode, and we have a unicast packet that isn't for |
1383 | * us, then drop it. | | 1383 | * us, then drop it. |
1384 | */ | | 1384 | */ |
1385 | if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY && | | 1385 | if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY && |
1386 | (ifp->if_flags & IFF_PROMISC) == 0 && | | 1386 | (ifp->if_flags & IFF_PROMISC) == 0 && |
1387 | ETHER_IS_MULTICAST(eh->ether_dhost) == 0 && | | 1387 | ETHER_IS_MULTICAST(eh->ether_dhost) == 0 && |
1388 | memcmp(CLLADDR(ifp->if_sadl), eh->ether_dhost, | | 1388 | memcmp(CLLADDR(ifp->if_sadl), eh->ether_dhost, |
1389 | ETHER_ADDR_LEN) != 0) { | | 1389 | ETHER_ADDR_LEN) != 0) { |
1390 | m_freem(m); | | 1390 | m_freem(m); |
1391 | continue; | | 1391 | continue; |
1392 | } | | 1392 | } |
1393 | | | 1393 | |
1394 | /* Pass it on. */ | | 1394 | /* Pass it on. */ |
1395 | if_percpuq_enqueue(ifp->if_percpuq, m); | | 1395 | if_percpuq_enqueue(ifp->if_percpuq, m); |
1396 | } | | 1396 | } |
1397 | | | 1397 | |
1398 | /* Update the receive pointer. */ | | 1398 | /* Update the receive pointer. */ |
1399 | sc->sc_rxptr = i; | | 1399 | sc->sc_rxptr = i; |
1400 | } | | 1400 | } |
1401 | | | 1401 | |
1402 | /* | | 1402 | /* |
1403 | * tlp_txintr: | | 1403 | * tlp_txintr: |
1404 | * | | 1404 | * |
1405 | * Helper; handle transmit interrupts. | | 1405 | * Helper; handle transmit interrupts. |
1406 | */ | | 1406 | */ |
1407 | static void | | 1407 | static void |
1408 | tlp_txintr(struct tulip_softc *sc) | | 1408 | tlp_txintr(struct tulip_softc *sc) |
1409 | { | | 1409 | { |
1410 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; | | 1410 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; |
1411 | struct tulip_txsoft *txs; | | 1411 | struct tulip_txsoft *txs; |
1412 | uint32_t txstat; | | 1412 | uint32_t txstat; |
1413 | | | 1413 | |
1414 | DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n", | | 1414 | DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n", |
1415 | device_xname(sc->sc_dev), sc->sc_flags)); | | 1415 | device_xname(sc->sc_dev), sc->sc_flags)); |
1416 | | | 1416 | |
1417 | ifp->if_flags &= ~IFF_OACTIVE; | | 1417 | ifp->if_flags &= ~IFF_OACTIVE; |
1418 | | | 1418 | |
1419 | /* | | 1419 | /* |
1420 | * Go through our Tx list and free mbufs for those | | 1420 | * Go through our Tx list and free mbufs for those |
1421 | * frames that have been transmitted. | | 1421 | * frames that have been transmitted. |
1422 | */ | | 1422 | */ |
1423 | while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { | | 1423 | while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { |
1424 | TULIP_CDTXSYNC(sc, txs->txs_lastdesc, txs->txs_ndescs, | | 1424 | TULIP_CDTXSYNC(sc, txs->txs_lastdesc, txs->txs_ndescs, |
1425 | BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); | | 1425 | BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); |
1426 | | | 1426 | |
1427 | #ifdef TLP_DEBUG | | 1427 | #ifdef TLP_DEBUG |
1428 | if (ifp->if_flags & IFF_DEBUG) { | | 1428 | if (ifp->if_flags & IFF_DEBUG) { |
1429 | int i; | | 1429 | int i; |
1430 | struct tulip_desc *txd; | | 1430 | struct tulip_desc *txd; |
1431 | printf(" txsoft %p transmit chain:\n", txs); | | 1431 | printf(" txsoft %p transmit chain:\n", txs); |
1432 | for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) { | | 1432 | for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) { |
1433 | txd = &sc->sc_txdescs[i]; | | 1433 | txd = &sc->sc_txdescs[i]; |
1434 | printf(" descriptor %d:\n", i); | | 1434 | printf(" descriptor %d:\n", i); |
1435 | printf(" td_status: 0x%08x\n", | | 1435 | printf(" td_status: 0x%08x\n", |
1436 | le32toh(txd->td_status)); | | 1436 | le32toh(txd->td_status)); |
1437 | printf(" td_ctl: 0x%08x\n", | | 1437 | printf(" td_ctl: 0x%08x\n", |
1438 | le32toh(txd->td_ctl)); | | 1438 | le32toh(txd->td_ctl)); |
1439 | printf(" td_bufaddr1: 0x%08x\n", | | 1439 | printf(" td_bufaddr1: 0x%08x\n", |
1440 | le32toh(txd->td_bufaddr1)); | | 1440 | le32toh(txd->td_bufaddr1)); |
1441 | printf(" td_bufaddr2: 0x%08x\n", | | 1441 | printf(" td_bufaddr2: 0x%08x\n", |
1442 | le32toh(sc->sc_txdescs[i].td_bufaddr2)); | | 1442 | le32toh(sc->sc_txdescs[i].td_bufaddr2)); |
1443 | if (i == txs->txs_lastdesc) | | 1443 | if (i == txs->txs_lastdesc) |
1444 | break; | | 1444 | break; |
1445 | } | | 1445 | } |
1446 | } | | 1446 | } |
1447 | #endif | | 1447 | #endif |
1448 | | | 1448 | |
1449 | txstat = le32toh(sc->sc_txdescs[txs->txs_lastdesc].td_status); | | 1449 | txstat = le32toh(sc->sc_txdescs[txs->txs_lastdesc].td_status); |
1450 | if (txstat & TDSTAT_OWN) | | 1450 | if (txstat & TDSTAT_OWN) |
1451 | break; | | 1451 | break; |
1452 | | | 1452 | |
1453 | SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs_q); | | 1453 | SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs_q); |
1454 | | | 1454 | |
1455 | sc->sc_txfree += txs->txs_ndescs; | | 1455 | sc->sc_txfree += txs->txs_ndescs; |
1456 | | | 1456 | |
1457 | if (txs->txs_mbuf == NULL) { | | 1457 | if (txs->txs_mbuf == NULL) { |
1458 | /* | | 1458 | /* |
1459 | * If we didn't have an mbuf, it was the setup | | 1459 | * If we didn't have an mbuf, it was the setup |
1460 | * packet. | | 1460 | * packet. |
1461 | */ | | 1461 | */ |
1462 | #ifdef DIAGNOSTIC | | 1462 | #ifdef DIAGNOSTIC |
1463 | if ((sc->sc_flags & TULIPF_DOING_SETUP) == 0) | | 1463 | if ((sc->sc_flags & TULIPF_DOING_SETUP) == 0) |
1464 | panic("tlp_txintr: null mbuf, not doing setup"); | | 1464 | panic("tlp_txintr: null mbuf, not doing setup"); |
1465 | #endif | | 1465 | #endif |
1466 | TULIP_CDSPSYNC(sc, BUS_DMASYNC_POSTWRITE); | | 1466 | TULIP_CDSPSYNC(sc, BUS_DMASYNC_POSTWRITE); |
1467 | sc->sc_flags &= ~TULIPF_DOING_SETUP; | | 1467 | sc->sc_flags &= ~TULIPF_DOING_SETUP; |
1468 | SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); | | 1468 | SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); |
1469 | continue; | | 1469 | continue; |
1470 | } | | 1470 | } |
1471 | | | 1471 | |
1472 | bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap, | | 1472 | bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap, |
1473 | 0, txs->txs_dmamap->dm_mapsize, | | 1473 | 0, txs->txs_dmamap->dm_mapsize, |
1474 | BUS_DMASYNC_POSTWRITE); | | 1474 | BUS_DMASYNC_POSTWRITE); |
1475 | bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); | | 1475 | bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); |
1476 | m_freem(txs->txs_mbuf); | | 1476 | m_freem(txs->txs_mbuf); |
1477 | txs->txs_mbuf = NULL; | | 1477 | txs->txs_mbuf = NULL; |
1478 | | | 1478 | |
1479 | SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); | | 1479 | SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); |
1480 | | | 1480 | |
1481 | /* | | 1481 | /* |
1482 | * Check for errors and collisions. | | 1482 | * Check for errors and collisions. |
1483 | */ | | 1483 | */ |
1484 | #ifdef TLP_STATS | | 1484 | #ifdef TLP_STATS |
1485 | if (txstat & TDSTAT_Tx_UF) | | 1485 | if (txstat & TDSTAT_Tx_UF) |
1486 | sc->sc_stats.ts_tx_uf++; | | 1486 | sc->sc_stats.ts_tx_uf++; |
1487 | if (txstat & TDSTAT_Tx_TO) | | 1487 | if (txstat & TDSTAT_Tx_TO) |
1488 | sc->sc_stats.ts_tx_to++; | | 1488 | sc->sc_stats.ts_tx_to++; |
1489 | if (txstat & TDSTAT_Tx_EC) | | 1489 | if (txstat & TDSTAT_Tx_EC) |
1490 | sc->sc_stats.ts_tx_ec++; | | 1490 | sc->sc_stats.ts_tx_ec++; |
1491 | if (txstat & TDSTAT_Tx_LC) | | 1491 | if (txstat & TDSTAT_Tx_LC) |
1492 | sc->sc_stats.ts_tx_lc++; | | 1492 | sc->sc_stats.ts_tx_lc++; |
1493 | #endif | | 1493 | #endif |
1494 | | | 1494 | net_stat_ref_t nsr = IF_STAT_GETREF(ifp); |
1495 | if (txstat & (TDSTAT_Tx_UF | TDSTAT_Tx_TO)) | | 1495 | if (txstat & (TDSTAT_Tx_UF | TDSTAT_Tx_TO)) |
1496 | ifp->if_oerrors++; | | 1496 | if_statinc_ref(nsr, if_oerrors); |
1497 | | | 1497 | |
1498 | if (txstat & TDSTAT_Tx_EC) | | 1498 | if (txstat & TDSTAT_Tx_EC) |
1499 | ifp->if_collisions += 16; | | 1499 | if_statadd_ref(nsr, if_collisions, 16); |
1500 | else | | 1500 | else |
1501 | ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat); | | 1501 | if_statadd_ref(nsr, if_collisions, |
| | | 1502 | TDSTAT_Tx_COLLISIONS(txstat)); |
1502 | if (txstat & TDSTAT_Tx_LC) | | 1503 | if (txstat & TDSTAT_Tx_LC) |
1503 | ifp->if_collisions++; | | 1504 | if_statinc_ref(nsr, if_collisions); |
1504 | | | 1505 | |
1505 | ifp->if_opackets++; | | 1506 | if_statinc_ref(nsr, if_opackets); |
| | | 1507 | IF_STAT_PUTREF(ifp); |
1506 | } | | 1508 | } |
1507 | | | 1509 | |
1508 | /* | | 1510 | /* |
1509 | * If there are no more pending transmissions, cancel the watchdog | | 1511 | * If there are no more pending transmissions, cancel the watchdog |
1510 | * timer. | | 1512 | * timer. |
1511 | */ | | 1513 | */ |
1512 | if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0) | | 1514 | if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0) |
1513 | ifp->if_timer = 0; | | 1515 | ifp->if_timer = 0; |
1514 | | | 1516 | |
1515 | /* | | 1517 | /* |
1516 | * If we have a receive filter setup pending, do it now. | | 1518 | * If we have a receive filter setup pending, do it now. |
1517 | */ | | 1519 | */ |
1518 | if (sc->sc_flags & TULIPF_WANT_SETUP) | | 1520 | if (sc->sc_flags & TULIPF_WANT_SETUP) |
1519 | (*sc->sc_filter_setup)(sc); | | 1521 | (*sc->sc_filter_setup)(sc); |
1520 | } | | 1522 | } |
1521 | | | 1523 | |
1522 | #ifdef TLP_STATS | | 1524 | #ifdef TLP_STATS |
1523 | void | | 1525 | void |
1524 | tlp_print_stats(struct tulip_softc *sc) | | 1526 | tlp_print_stats(struct tulip_softc *sc) |
1525 | { | | 1527 | { |
1526 | | | 1528 | |
1527 | printf("%s: tx_uf %lu, tx_to %lu, tx_ec %lu, tx_lc %lu\n", | | 1529 | printf("%s: tx_uf %lu, tx_to %lu, tx_ec %lu, tx_lc %lu\n", |
1528 | device_xname(sc->sc_dev), | | 1530 | device_xname(sc->sc_dev), |
1529 | sc->sc_stats.ts_tx_uf, sc->sc_stats.ts_tx_to, | | 1531 | sc->sc_stats.ts_tx_uf, sc->sc_stats.ts_tx_to, |
1530 | sc->sc_stats.ts_tx_ec, sc->sc_stats.ts_tx_lc); | | 1532 | sc->sc_stats.ts_tx_ec, sc->sc_stats.ts_tx_lc); |
1531 | } | | 1533 | } |
1532 | #endif | | 1534 | #endif |
1533 | | | 1535 | |
1534 | /* | | 1536 | /* |
1535 | * tlp_reset: | | 1537 | * tlp_reset: |
1536 | * | | 1538 | * |
1537 | * Perform a soft reset on the Tulip. | | 1539 | * Perform a soft reset on the Tulip. |
1538 | */ | | 1540 | */ |
1539 | void | | 1541 | void |
1540 | tlp_reset(struct tulip_softc *sc) | | 1542 | tlp_reset(struct tulip_softc *sc) |
1541 | { | | 1543 | { |
1542 | int i; | | 1544 | int i; |
1543 | | | 1545 | |
1544 | TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR); | | 1546 | TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR); |
1545 | | | 1547 | |
1546 | /* | | 1548 | /* |
1547 | * Xircom, ASIX and Conexant clones don't bring themselves | | 1549 | * Xircom, ASIX and Conexant clones don't bring themselves |
1548 | * out of reset automatically. | | 1550 | * out of reset automatically. |
1549 | * Instead, we have to wait at least 50 PCI cycles, and then | | 1551 | * Instead, we have to wait at least 50 PCI cycles, and then |
1550 | * clear SWR. | | 1552 | * clear SWR. |
1551 | */ | | 1553 | */ |
1552 | switch (sc->sc_chip) { | | 1554 | switch (sc->sc_chip) { |
1553 | case TULIP_CHIP_X3201_3: | | 1555 | case TULIP_CHIP_X3201_3: |
1554 | case TULIP_CHIP_AX88140: | | 1556 | case TULIP_CHIP_AX88140: |
1555 | case TULIP_CHIP_AX88141: | | 1557 | case TULIP_CHIP_AX88141: |
1556 | case TULIP_CHIP_RS7112: | | 1558 | case TULIP_CHIP_RS7112: |
1557 | delay(10); | | 1559 | delay(10); |
1558 | TULIP_WRITE(sc, CSR_BUSMODE, 0); | | 1560 | TULIP_WRITE(sc, CSR_BUSMODE, 0); |
1559 | break; | | 1561 | break; |
1560 | default: | | 1562 | default: |
1561 | break; | | 1563 | break; |
1562 | } | | 1564 | } |
1563 | | | 1565 | |
1564 | for (i = 0; i < 1000; i++) { | | 1566 | for (i = 0; i < 1000; i++) { |
1565 | /* | | 1567 | /* |
1566 | * Wait at least 50 PCI cycles for the reset to | | 1568 | * Wait at least 50 PCI cycles for the reset to |
1567 | * complete before peeking at the Tulip again. | | 1569 | * complete before peeking at the Tulip again. |
1568 | * 10 uSec is a bit longer than 50 PCI cycles | | 1570 | * 10 uSec is a bit longer than 50 PCI cycles |
1569 | * (at 33MHz), but it doesn't hurt have the extra | | 1571 | * (at 33MHz), but it doesn't hurt have the extra |
1570 | * wait. | | 1572 | * wait. |
1571 | */ | | 1573 | */ |
1572 | delay(10); | | 1574 | delay(10); |
1573 | if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0) | | 1575 | if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0) |
1574 | break; | | 1576 | break; |
1575 | } | | 1577 | } |
1576 | | | 1578 | |
1577 | if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR)) | | 1579 | if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR)) |
1578 | aprint_error_dev(sc->sc_dev, "reset failed to complete\n"); | | 1580 | aprint_error_dev(sc->sc_dev, "reset failed to complete\n"); |
1579 | | | 1581 | |
1580 | delay(1000); | | 1582 | delay(1000); |
1581 | | | 1583 | |
1582 | /* | | 1584 | /* |
1583 | * If the board has any GPIO reset sequences to issue, do them now. | | 1585 | * If the board has any GPIO reset sequences to issue, do them now. |
1584 | */ | | 1586 | */ |
1585 | if (sc->sc_reset != NULL) | | 1587 | if (sc->sc_reset != NULL) |
1586 | (*sc->sc_reset)(sc); | | 1588 | (*sc->sc_reset)(sc); |
1587 | } | | 1589 | } |
1588 | | | 1590 | |
1589 | /* | | 1591 | /* |
1590 | * tlp_init: [ ifnet interface function ] | | 1592 | * tlp_init: [ ifnet interface function ] |
1591 | * | | 1593 | * |
1592 | * Initialize the interface. Must be called at splnet(). | | 1594 | * Initialize the interface. Must be called at splnet(). |
1593 | */ | | 1595 | */ |
1594 | static int | | 1596 | static int |
1595 | tlp_init(struct ifnet *ifp) | | 1597 | tlp_init(struct ifnet *ifp) |
1596 | { | | 1598 | { |
1597 | struct tulip_softc *sc = ifp->if_softc; | | 1599 | struct tulip_softc *sc = ifp->if_softc; |
1598 | struct tulip_txsoft *txs; | | 1600 | struct tulip_txsoft *txs; |
1599 | struct tulip_rxsoft *rxs; | | 1601 | struct tulip_rxsoft *rxs; |
1600 | int i, error = 0; | | 1602 | int i, error = 0; |
1601 | | | 1603 | |
1602 | if ((error = tlp_enable(sc)) != 0) | | 1604 | if ((error = tlp_enable(sc)) != 0) |
1603 | goto out; | | 1605 | goto out; |
1604 | | | 1606 | |
1605 | /* | | 1607 | /* |
1606 | * Cancel any pending I/O. | | 1608 | * Cancel any pending I/O. |
1607 | */ | | 1609 | */ |
1608 | tlp_stop(ifp, 0); | | 1610 | tlp_stop(ifp, 0); |
1609 | | | 1611 | |
1610 | /* | | 1612 | /* |
1611 | * Initialize `opmode' to 0, and call the pre-init routine, if | | 1613 | * Initialize `opmode' to 0, and call the pre-init routine, if |
1612 | * any. This is required because the 2114x and some of the | | 1614 | * any. This is required because the 2114x and some of the |
1613 | * clones require that the media-related bits in `opmode' be | | 1615 | * clones require that the media-related bits in `opmode' be |
1614 | * set before performing a soft-reset in order to get internal | | 1616 | * set before performing a soft-reset in order to get internal |
1615 | * chip pathways are correct. Yay! | | 1617 | * chip pathways are correct. Yay! |
1616 | */ | | 1618 | */ |
1617 | sc->sc_opmode = 0; | | 1619 | sc->sc_opmode = 0; |
1618 | if (sc->sc_preinit != NULL) | | 1620 | if (sc->sc_preinit != NULL) |
1619 | (*sc->sc_preinit)(sc); | | 1621 | (*sc->sc_preinit)(sc); |
1620 | | | 1622 | |
1621 | /* | | 1623 | /* |
1622 | * Reset the Tulip to a known state. | | 1624 | * Reset the Tulip to a known state. |
1623 | */ | | 1625 | */ |
1624 | tlp_reset(sc); | | 1626 | tlp_reset(sc); |
1625 | | | 1627 | |
1626 | /* | | 1628 | /* |
1627 | * Initialize the BUSMODE register. | | 1629 | * Initialize the BUSMODE register. |
1628 | */ | | 1630 | */ |
1629 | sc->sc_busmode = BUSMODE_BAR; | | 1631 | sc->sc_busmode = BUSMODE_BAR; |
1630 | switch (sc->sc_chip) { | | 1632 | switch (sc->sc_chip) { |
1631 | case TULIP_CHIP_21140: | | 1633 | case TULIP_CHIP_21140: |
1632 | case TULIP_CHIP_21140A: | | 1634 | case TULIP_CHIP_21140A: |
1633 | case TULIP_CHIP_21142: | | 1635 | case TULIP_CHIP_21142: |
1634 | case TULIP_CHIP_21143: | | 1636 | case TULIP_CHIP_21143: |
1635 | case TULIP_CHIP_82C115: | | 1637 | case TULIP_CHIP_82C115: |
1636 | case TULIP_CHIP_MX98725: | | 1638 | case TULIP_CHIP_MX98725: |
1637 | /* | | 1639 | /* |
1638 | * If we're allowed to do so, use Memory Read Line | | 1640 | * If we're allowed to do so, use Memory Read Line |
1639 | * and Memory Read Multiple. | | 1641 | * and Memory Read Multiple. |
1640 | * | | 1642 | * |
1641 | * XXX Should we use Memory Write and Invalidate? | | 1643 | * XXX Should we use Memory Write and Invalidate? |
1642 | */ | | 1644 | */ |
1643 | if (sc->sc_flags & TULIPF_MRL) | | 1645 | if (sc->sc_flags & TULIPF_MRL) |
1644 | sc->sc_busmode |= BUSMODE_RLE; | | 1646 | sc->sc_busmode |= BUSMODE_RLE; |
1645 | if (sc->sc_flags & TULIPF_MRM) | | 1647 | if (sc->sc_flags & TULIPF_MRM) |
1646 | sc->sc_busmode |= BUSMODE_RME; | | 1648 | sc->sc_busmode |= BUSMODE_RME; |
1647 | #if 0 | | 1649 | #if 0 |
1648 | if (sc->sc_flags & TULIPF_MWI) | | 1650 | if (sc->sc_flags & TULIPF_MWI) |
1649 | sc->sc_busmode |= BUSMODE_WLE; | | 1651 | sc->sc_busmode |= BUSMODE_WLE; |
1650 | #endif | | 1652 | #endif |
1651 | break; | | 1653 | break; |
1652 | | | 1654 | |
1653 | case TULIP_CHIP_82C168: | | 1655 | case TULIP_CHIP_82C168: |
1654 | case TULIP_CHIP_82C169: | | 1656 | case TULIP_CHIP_82C169: |
1655 | sc->sc_busmode |= BUSMODE_PNIC_MBO; | | 1657 | sc->sc_busmode |= BUSMODE_PNIC_MBO; |
1656 | if (sc->sc_maxburst == 0) | | 1658 | if (sc->sc_maxburst == 0) |
1657 | sc->sc_maxburst = 16; | | 1659 | sc->sc_maxburst = 16; |
1658 | break; | | 1660 | break; |
1659 | | | 1661 | |
1660 | case TULIP_CHIP_AX88140: | | 1662 | case TULIP_CHIP_AX88140: |
1661 | case TULIP_CHIP_AX88141: | | 1663 | case TULIP_CHIP_AX88141: |
1662 | if (sc->sc_maxburst == 0) | | 1664 | if (sc->sc_maxburst == 0) |
1663 | sc->sc_maxburst = 16; | | 1665 | sc->sc_maxburst = 16; |
1664 | break; | | 1666 | break; |
1665 | | | 1667 | |
1666 | default: | | 1668 | default: |
1667 | /* Nothing. */ | | 1669 | /* Nothing. */ |
1668 | break; | | 1670 | break; |
1669 | } | | 1671 | } |
1670 | switch (sc->sc_cacheline) { | | 1672 | switch (sc->sc_cacheline) { |
1671 | default: | | 1673 | default: |
1672 | /* | | 1674 | /* |
1673 | * Note: We must *always* set these bits; a cache | | 1675 | * Note: We must *always* set these bits; a cache |
1674 | * alignment of 0 is RESERVED. | | 1676 | * alignment of 0 is RESERVED. |
1675 | */ | | 1677 | */ |
1676 | case 8: | | 1678 | case 8: |
1677 | sc->sc_busmode |= BUSMODE_CAL_8LW; | | 1679 | sc->sc_busmode |= BUSMODE_CAL_8LW; |
1678 | break; | | 1680 | break; |
1679 | case 16: | | 1681 | case 16: |
1680 | sc->sc_busmode |= BUSMODE_CAL_16LW; | | 1682 | sc->sc_busmode |= BUSMODE_CAL_16LW; |
1681 | break; | | 1683 | break; |
1682 | case 32: | | 1684 | case 32: |
1683 | sc->sc_busmode |= BUSMODE_CAL_32LW; | | 1685 | sc->sc_busmode |= BUSMODE_CAL_32LW; |
1684 | break; | | 1686 | break; |
1685 | } | | 1687 | } |
1686 | switch (sc->sc_maxburst) { | | 1688 | switch (sc->sc_maxburst) { |
1687 | case 1: | | 1689 | case 1: |
1688 | sc->sc_busmode |= BUSMODE_PBL_1LW; | | 1690 | sc->sc_busmode |= BUSMODE_PBL_1LW; |
1689 | break; | | 1691 | break; |
1690 | case 2: | | 1692 | case 2: |
1691 | sc->sc_busmode |= BUSMODE_PBL_2LW; | | 1693 | sc->sc_busmode |= BUSMODE_PBL_2LW; |
1692 | break; | | 1694 | break; |
1693 | case 4: | | 1695 | case 4: |
1694 | sc->sc_busmode |= BUSMODE_PBL_4LW; | | 1696 | sc->sc_busmode |= BUSMODE_PBL_4LW; |
1695 | break; | | 1697 | break; |
1696 | case 8: | | 1698 | case 8: |
1697 | sc->sc_busmode |= BUSMODE_PBL_8LW; | | 1699 | sc->sc_busmode |= BUSMODE_PBL_8LW; |
1698 | break; | | 1700 | break; |
1699 | case 16: | | 1701 | case 16: |
1700 | sc->sc_busmode |= BUSMODE_PBL_16LW; | | 1702 | sc->sc_busmode |= BUSMODE_PBL_16LW; |
1701 | break; | | 1703 | break; |
1702 | case 32: | | 1704 | case 32: |
1703 | sc->sc_busmode |= BUSMODE_PBL_32LW; | | 1705 | sc->sc_busmode |= BUSMODE_PBL_32LW; |
1704 | break; | | 1706 | break; |
1705 | default: | | 1707 | default: |
1706 | sc->sc_busmode |= BUSMODE_PBL_DEFAULT; | | 1708 | sc->sc_busmode |= BUSMODE_PBL_DEFAULT; |
1707 | break; | | 1709 | break; |
1708 | } | | 1710 | } |
1709 | #if BYTE_ORDER == BIG_ENDIAN | | 1711 | #if BYTE_ORDER == BIG_ENDIAN |
1710 | /* | | 1712 | /* |
1711 | * Can't use BUSMODE_BLE or BUSMODE_DBO; not all chips | | 1713 | * Can't use BUSMODE_BLE or BUSMODE_DBO; not all chips |
1712 | * support them, and even on ones that do, it doesn't | | 1714 | * support them, and even on ones that do, it doesn't |
1713 | * always work. So we always access descriptors with | | 1715 | * always work. So we always access descriptors with |
1714 | * little endian via htole32/le32toh. | | 1716 | * little endian via htole32/le32toh. |
1715 | */ | | 1717 | */ |
1716 | #endif | | 1718 | #endif |
1717 | /* | | 1719 | /* |
1718 | * Big-endian bus requires BUSMODE_BLE anyway. | | 1720 | * Big-endian bus requires BUSMODE_BLE anyway. |
1719 | * Also, BUSMODE_DBO is needed because we assume | | 1721 | * Also, BUSMODE_DBO is needed because we assume |
1720 | * descriptors are little endian. | | 1722 | * descriptors are little endian. |
1721 | */ | | 1723 | */ |
1722 | if (sc->sc_flags & TULIPF_BLE) | | 1724 | if (sc->sc_flags & TULIPF_BLE) |
1723 | sc->sc_busmode |= BUSMODE_BLE; | | 1725 | sc->sc_busmode |= BUSMODE_BLE; |
1724 | if (sc->sc_flags & TULIPF_DBO) | | 1726 | if (sc->sc_flags & TULIPF_DBO) |
1725 | sc->sc_busmode |= BUSMODE_DBO; | | 1727 | sc->sc_busmode |= BUSMODE_DBO; |
1726 | | | 1728 | |
1727 | /* | | 1729 | /* |
1728 | * Some chips have a broken bus interface. | | 1730 | * Some chips have a broken bus interface. |
1729 | */ | | 1731 | */ |
1730 | switch (sc->sc_chip) { | | 1732 | switch (sc->sc_chip) { |
1731 | case TULIP_CHIP_DM9102: | | 1733 | case TULIP_CHIP_DM9102: |
1732 | case TULIP_CHIP_DM9102A: | | 1734 | case TULIP_CHIP_DM9102A: |
1733 | sc->sc_busmode = 0; | | 1735 | sc->sc_busmode = 0; |
1734 | break; | | 1736 | break; |
1735 | | | 1737 | |
1736 | default: | | 1738 | default: |
1737 | /* Nothing. */ | | 1739 | /* Nothing. */ |
1738 | break; | | 1740 | break; |
1739 | } | | 1741 | } |
1740 | | | 1742 | |
1741 | TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode); | | 1743 | TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode); |
1742 | | | 1744 | |
1743 | /* | | 1745 | /* |
1744 | * Initialize the OPMODE register. We don't write it until | | 1746 | * Initialize the OPMODE register. We don't write it until |
1745 | * we're ready to begin the transmit and receive processes. | | 1747 | * we're ready to begin the transmit and receive processes. |
1746 | * | | 1748 | * |
1747 | * Media-related OPMODE bits are set in the media callbacks | | 1749 | * Media-related OPMODE bits are set in the media callbacks |
1748 | * for each specific chip/board. | | 1750 | * for each specific chip/board. |
1749 | */ | | 1751 | */ |
1750 | sc->sc_opmode |= OPMODE_SR | OPMODE_ST | | | 1752 | sc->sc_opmode |= OPMODE_SR | OPMODE_ST | |
1751 | sc->sc_txth[sc->sc_txthresh].txth_opmode; | | 1753 | sc->sc_txth[sc->sc_txthresh].txth_opmode; |
1752 | | | 1754 | |
1753 | /* | | 1755 | /* |
1754 | * Magical mystery initialization on the Macronix chips. | | 1756 | * Magical mystery initialization on the Macronix chips. |
1755 | * The MX98713 uses its own magic value, the rest share | | 1757 | * The MX98713 uses its own magic value, the rest share |
1756 | * a common one. | | 1758 | * a common one. |
1757 | */ | | 1759 | */ |
1758 | switch (sc->sc_chip) { | | 1760 | switch (sc->sc_chip) { |
1759 | case TULIP_CHIP_MX98713: | | 1761 | case TULIP_CHIP_MX98713: |
1760 | TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713); | | 1762 | TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713); |
1761 | break; | | 1763 | break; |
1762 | | | 1764 | |
1763 | case TULIP_CHIP_MX98713A: | | 1765 | case TULIP_CHIP_MX98713A: |
1764 | case TULIP_CHIP_MX98715: | | 1766 | case TULIP_CHIP_MX98715: |
1765 | case TULIP_CHIP_MX98715A: | | 1767 | case TULIP_CHIP_MX98715A: |
1766 | case TULIP_CHIP_MX98715AEC_X: | | 1768 | case TULIP_CHIP_MX98715AEC_X: |
1767 | case TULIP_CHIP_MX98725: | | 1769 | case TULIP_CHIP_MX98725: |
1768 | TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715); | | 1770 | TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715); |
1769 | break; | | 1771 | break; |
1770 | | | 1772 | |
1771 | default: | | 1773 | default: |
1772 | /* Nothing. */ | | 1774 | /* Nothing. */ |
1773 | break; | | 1775 | break; |
1774 | } | | 1776 | } |
1775 | | | 1777 | |
1776 | /* | | 1778 | /* |
1777 | * Initialize the transmit descriptor ring. | | 1779 | * Initialize the transmit descriptor ring. |
1778 | */ | | 1780 | */ |
1779 | memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs)); | | 1781 | memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs)); |
1780 | for (i = 0; i < TULIP_NTXDESC; i++) { | | 1782 | for (i = 0; i < TULIP_NTXDESC; i++) { |
1781 | struct tulip_desc *txd = &sc->sc_txdescs[i]; | | 1783 | struct tulip_desc *txd = &sc->sc_txdescs[i]; |
1782 | txd->td_ctl = htole32(sc->sc_tdctl_ch); | | 1784 | txd->td_ctl = htole32(sc->sc_tdctl_ch); |
1783 | txd->td_bufaddr2 = htole32(TULIP_CDTXADDR(sc, TULIP_NEXTTX(i))); | | 1785 | txd->td_bufaddr2 = htole32(TULIP_CDTXADDR(sc, TULIP_NEXTTX(i))); |
1784 | } | | 1786 | } |
1785 | sc->sc_txdescs[TULIP_NTXDESC - 1].td_ctl |= htole32(sc->sc_tdctl_er); | | 1787 | sc->sc_txdescs[TULIP_NTXDESC - 1].td_ctl |= htole32(sc->sc_tdctl_er); |
1786 | TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC, | | 1788 | TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC, |
1787 | BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); | | 1789 | BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); |
1788 | sc->sc_txfree = TULIP_NTXDESC; | | 1790 | sc->sc_txfree = TULIP_NTXDESC; |
1789 | sc->sc_txnext = 0; | | 1791 | sc->sc_txnext = 0; |
1790 | | | 1792 | |
1791 | /* | | 1793 | /* |
1792 | * Initialize the transmit job descriptors. | | 1794 | * Initialize the transmit job descriptors. |
1793 | */ | | 1795 | */ |
1794 | SIMPLEQ_INIT(&sc->sc_txfreeq); | | 1796 | SIMPLEQ_INIT(&sc->sc_txfreeq); |
1795 | SIMPLEQ_INIT(&sc->sc_txdirtyq); | | 1797 | SIMPLEQ_INIT(&sc->sc_txdirtyq); |
1796 | for (i = 0; i < TULIP_TXQUEUELEN; i++) { | | 1798 | for (i = 0; i < TULIP_TXQUEUELEN; i++) { |
1797 | txs = &sc->sc_txsoft[i]; | | 1799 | txs = &sc->sc_txsoft[i]; |
1798 | txs->txs_mbuf = NULL; | | 1800 | txs->txs_mbuf = NULL; |
1799 | SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); | | 1801 | SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); |
1800 | } | | 1802 | } |
1801 | | | 1803 | |
1802 | /* | | 1804 | /* |
1803 | * Initialize the receive descriptor and receive job | | 1805 | * Initialize the receive descriptor and receive job |
1804 | * descriptor rings. | | 1806 | * descriptor rings. |
1805 | */ | | 1807 | */ |
1806 | for (i = 0; i < TULIP_NRXDESC; i++) { | | 1808 | for (i = 0; i < TULIP_NRXDESC; i++) { |
1807 | rxs = &sc->sc_rxsoft[i]; | | 1809 | rxs = &sc->sc_rxsoft[i]; |
1808 | if (rxs->rxs_mbuf == NULL) { | | 1810 | if (rxs->rxs_mbuf == NULL) { |
1809 | if ((error = tlp_add_rxbuf(sc, i)) != 0) { | | 1811 | if ((error = tlp_add_rxbuf(sc, i)) != 0) { |
1810 | aprint_error_dev(sc->sc_dev, | | 1812 | aprint_error_dev(sc->sc_dev, |
1811 | "unable to allocate or map rx " | | 1813 | "unable to allocate or map rx " |
1812 | "buffer %d, error = %d\n", i, error); | | 1814 | "buffer %d, error = %d\n", i, error); |
1813 | /* | | 1815 | /* |
1814 | * XXX Should attempt to run with fewer receive | | 1816 | * XXX Should attempt to run with fewer receive |
1815 | * XXX buffers instead of just failing. | | 1817 | * XXX buffers instead of just failing. |
1816 | */ | | 1818 | */ |
1817 | tlp_rxdrain(sc); | | 1819 | tlp_rxdrain(sc); |
1818 | goto out; | | 1820 | goto out; |
1819 | } | | 1821 | } |
1820 | } else | | 1822 | } else |
1821 | TULIP_INIT_RXDESC(sc, i); | | 1823 | TULIP_INIT_RXDESC(sc, i); |
1822 | } | | 1824 | } |
1823 | sc->sc_rxptr = 0; | | 1825 | sc->sc_rxptr = 0; |
1824 | | | 1826 | |
1825 | /* | | 1827 | /* |
1826 | * Initialize the interrupt mask and enable interrupts. | | 1828 | * Initialize the interrupt mask and enable interrupts. |
1827 | */ | | 1829 | */ |
1828 | /* normal interrupts */ | | 1830 | /* normal interrupts */ |
1829 | sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS; | | 1831 | sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS; |
1830 | | | 1832 | |
1831 | /* abnormal interrupts */ | | 1833 | /* abnormal interrupts */ |
1832 | sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF | | | 1834 | sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF | |
1833 | STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS; | | 1835 | STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS; |
1834 | | | 1836 | |
1835 | sc->sc_rxint_mask = STATUS_RI | STATUS_RU | STATUS_RWT; | | 1837 | sc->sc_rxint_mask = STATUS_RI | STATUS_RU | STATUS_RWT; |
1836 | sc->sc_txint_mask = STATUS_TI | STATUS_UNF | STATUS_TJT; | | 1838 | sc->sc_txint_mask = STATUS_TI | STATUS_UNF | STATUS_TJT; |
1837 | | | 1839 | |
1838 | switch (sc->sc_chip) { | | 1840 | switch (sc->sc_chip) { |
1839 | case TULIP_CHIP_WB89C840F: | | 1841 | case TULIP_CHIP_WB89C840F: |
1840 | /* | | 1842 | /* |
1841 | * Clear bits that we don't want that happen to | | 1843 | * Clear bits that we don't want that happen to |
1842 | * overlap or don't exist. | | 1844 | * overlap or don't exist. |
1843 | */ | | 1845 | */ |
1844 | sc->sc_inten &= ~(STATUS_WINB_REI | STATUS_RWT); | | 1846 | sc->sc_inten &= ~(STATUS_WINB_REI | STATUS_RWT); |
1845 | break; | | 1847 | break; |
1846 | | | 1848 | |
1847 | default: | | 1849 | default: |
1848 | /* Nothing. */ | | 1850 | /* Nothing. */ |
1849 | break; | | 1851 | break; |
1850 | } | | 1852 | } |
1851 | | | 1853 | |
1852 | sc->sc_rxint_mask &= sc->sc_inten; | | 1854 | sc->sc_rxint_mask &= sc->sc_inten; |
1853 | sc->sc_txint_mask &= sc->sc_inten; | | 1855 | sc->sc_txint_mask &= sc->sc_inten; |
1854 | | | 1856 | |
1855 | TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); | | 1857 | TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); |
1856 | TULIP_WRITE(sc, CSR_STATUS, 0xffffffff); | | 1858 | TULIP_WRITE(sc, CSR_STATUS, 0xffffffff); |
1857 | | | 1859 | |
1858 | /* | | 1860 | /* |
1859 | * Give the transmit and receive rings to the Tulip. | | 1861 | * Give the transmit and receive rings to the Tulip. |
1860 | */ | | 1862 | */ |
1861 | TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext)); | | 1863 | TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext)); |
1862 | TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr)); | | 1864 | TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr)); |
1863 | | | 1865 | |
1864 | /* | | 1866 | /* |
1865 | * On chips that do this differently, set the station address. | | 1867 | * On chips that do this differently, set the station address. |
1866 | */ | | 1868 | */ |
1867 | switch (sc->sc_chip) { | | 1869 | switch (sc->sc_chip) { |
1868 | case TULIP_CHIP_WB89C840F: | | 1870 | case TULIP_CHIP_WB89C840F: |
1869 | { | | 1871 | { |
1870 | /* XXX Do this with stream writes? */ | | 1872 | /* XXX Do this with stream writes? */ |
1871 | bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0); | | 1873 | bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0); |
1872 | | | 1874 | |
1873 | for (i = 0; i < ETHER_ADDR_LEN; i++) { | | 1875 | for (i = 0; i < ETHER_ADDR_LEN; i++) { |
1874 | bus_space_write_1(sc->sc_st, sc->sc_sh, | | 1876 | bus_space_write_1(sc->sc_st, sc->sc_sh, |
1875 | cpa + i, CLLADDR(ifp->if_sadl)[i]); | | 1877 | cpa + i, CLLADDR(ifp->if_sadl)[i]); |
1876 | } | | 1878 | } |
1877 | break; | | 1879 | break; |
1878 | } | | 1880 | } |
1879 | | | 1881 | |
1880 | case TULIP_CHIP_AL981: | | 1882 | case TULIP_CHIP_AL981: |
1881 | case TULIP_CHIP_AN983: | | 1883 | case TULIP_CHIP_AN983: |
1882 | case TULIP_CHIP_AN985: | | 1884 | case TULIP_CHIP_AN985: |
1883 | { | | 1885 | { |
1884 | uint32_t reg; | | 1886 | uint32_t reg; |
1885 | const uint8_t *enaddr = CLLADDR(ifp->if_sadl); | | 1887 | const uint8_t *enaddr = CLLADDR(ifp->if_sadl); |
1886 | | | 1888 | |
1887 | reg = enaddr[0] | | | 1889 | reg = enaddr[0] | |
1888 | (enaddr[1] << 8) | | | 1890 | (enaddr[1] << 8) | |
1889 | (enaddr[2] << 16) | | | 1891 | (enaddr[2] << 16) | |
1890 | (enaddr[3] << 24); | | 1892 | (enaddr[3] << 24); |
1891 | bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR0, reg); | | 1893 | bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR0, reg); |
1892 | | | 1894 | |
1893 | reg = enaddr[4] | | | 1895 | reg = enaddr[4] | |
1894 | (enaddr[5] << 8); | | 1896 | (enaddr[5] << 8); |
1895 | bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR1, reg); | | 1897 | bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR1, reg); |
1896 | break; | | 1898 | break; |
1897 | } | | 1899 | } |
1898 | | | 1900 | |
1899 | case TULIP_CHIP_AX88140: | | 1901 | case TULIP_CHIP_AX88140: |
1900 | case TULIP_CHIP_AX88141: | | 1902 | case TULIP_CHIP_AX88141: |
1901 | { | | 1903 | { |
1902 | uint32_t reg; | | 1904 | uint32_t reg; |
1903 | const uint8_t *enaddr = CLLADDR(ifp->if_sadl); | | 1905 | const uint8_t *enaddr = CLLADDR(ifp->if_sadl); |
1904 | | | 1906 | |
1905 | reg = enaddr[0] | | | 1907 | reg = enaddr[0] | |
1906 | (enaddr[1] << 8) | | | 1908 | (enaddr[1] << 8) | |
1907 | (enaddr[2] << 16) | | | 1909 | (enaddr[2] << 16) | |
1908 | (enaddr[3] << 24); | | 1910 | (enaddr[3] << 24); |
1909 | TULIP_WRITE(sc, CSR_AX_FILTIDX, AX_FILTIDX_PAR0); | | 1911 | TULIP_WRITE(sc, CSR_AX_FILTIDX, AX_FILTIDX_PAR0); |
1910 | TULIP_WRITE(sc, CSR_AX_FILTDATA, reg); | | 1912 | TULIP_WRITE(sc, CSR_AX_FILTDATA, reg); |
1911 | | | 1913 | |
1912 | reg = enaddr[4] | (enaddr[5] << 8); | | 1914 | reg = enaddr[4] | (enaddr[5] << 8); |
1913 | TULIP_WRITE(sc, CSR_AX_FILTIDX, AX_FILTIDX_PAR1); | | 1915 | TULIP_WRITE(sc, CSR_AX_FILTIDX, AX_FILTIDX_PAR1); |
1914 | TULIP_WRITE(sc, CSR_AX_FILTDATA, reg); | | 1916 | TULIP_WRITE(sc, CSR_AX_FILTDATA, reg); |
1915 | break; | | 1917 | break; |
1916 | } | | 1918 | } |
1917 | | | 1919 | |
1918 | default: | | 1920 | default: |
1919 | /* Nothing. */ | | 1921 | /* Nothing. */ |
1920 | break; | | 1922 | break; |
1921 | } | | 1923 | } |
1922 | | | 1924 | |
1923 | /* | | 1925 | /* |
1924 | * Set the receive filter. This will start the transmit and | | 1926 | * Set the receive filter. This will start the transmit and |
1925 | * receive processes. | | 1927 | * receive processes. |
1926 | */ | | 1928 | */ |
1927 | (*sc->sc_filter_setup)(sc); | | 1929 | (*sc->sc_filter_setup)(sc); |
1928 | | | 1930 | |
1929 | /* | | 1931 | /* |
1930 | * Set the current media. | | 1932 | * Set the current media. |
1931 | */ | | 1933 | */ |
1932 | (void)(*sc->sc_mediasw->tmsw_set)(sc); | | 1934 | (void)(*sc->sc_mediasw->tmsw_set)(sc); |
1933 | | | 1935 | |
1934 | /* | | 1936 | /* |
1935 | * Start the receive process. | | 1937 | * Start the receive process. |
1936 | */ | | 1938 | */ |
1937 | TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); | | 1939 | TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); |
1938 | | | 1940 | |
1939 | if (sc->sc_tick != NULL) { | | 1941 | if (sc->sc_tick != NULL) { |
1940 | /* Start the one second clock. */ | | 1942 | /* Start the one second clock. */ |
1941 | callout_reset(&sc->sc_tick_callout, hz >> 3, sc->sc_tick, sc); | | 1943 | callout_reset(&sc->sc_tick_callout, hz >> 3, sc->sc_tick, sc); |
1942 | } | | 1944 | } |
1943 | | | 1945 | |
1944 | /* | | 1946 | /* |
1945 | * Note that the interface is now running. | | 1947 | * Note that the interface is now running. |
1946 | */ | | 1948 | */ |
1947 | ifp->if_flags |= IFF_RUNNING; | | 1949 | ifp->if_flags |= IFF_RUNNING; |
1948 | ifp->if_flags &= ~IFF_OACTIVE; | | 1950 | ifp->if_flags &= ~IFF_OACTIVE; |
1949 | sc->sc_if_flags = ifp->if_flags; | | 1951 | sc->sc_if_flags = ifp->if_flags; |
1950 | | | 1952 | |
1951 | out: | | 1953 | out: |
1952 | if (error) { | | 1954 | if (error) { |
1953 | ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); | | 1955 | ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); |
1954 | ifp->if_timer = 0; | | 1956 | ifp->if_timer = 0; |
1955 | printf("%s: interface not running\n", device_xname(sc->sc_dev)); | | 1957 | printf("%s: interface not running\n", device_xname(sc->sc_dev)); |
1956 | } | | 1958 | } |
1957 | return error; | | 1959 | return error; |
1958 | } | | 1960 | } |
1959 | | | 1961 | |
1960 | /* | | 1962 | /* |
1961 | * tlp_enable: | | 1963 | * tlp_enable: |
1962 | * | | 1964 | * |
1963 | * Enable the Tulip chip. | | 1965 | * Enable the Tulip chip. |
1964 | */ | | 1966 | */ |
1965 | static int | | 1967 | static int |
1966 | tlp_enable(struct tulip_softc *sc) | | 1968 | tlp_enable(struct tulip_softc *sc) |
1967 | { | | 1969 | { |
1968 | | | 1970 | |
1969 | if (TULIP_IS_ENABLED(sc) == 0 && sc->sc_enable != NULL) { | | 1971 | if (TULIP_IS_ENABLED(sc) == 0 && sc->sc_enable != NULL) { |
1970 | if ((*sc->sc_enable)(sc) != 0) { | | 1972 | if ((*sc->sc_enable)(sc) != 0) { |
1971 | aprint_error_dev(sc->sc_dev, "device enable failed\n"); | | 1973 | aprint_error_dev(sc->sc_dev, "device enable failed\n"); |
1972 | return EIO; | | 1974 | return EIO; |
1973 | } | | 1975 | } |
1974 | sc->sc_flags |= TULIPF_ENABLED; | | 1976 | sc->sc_flags |= TULIPF_ENABLED; |
1975 | } | | 1977 | } |
1976 | return 0; | | 1978 | return 0; |
1977 | } | | 1979 | } |
1978 | | | 1980 | |
1979 | /* | | 1981 | /* |
1980 | * tlp_disable: | | 1982 | * tlp_disable: |
1981 | * | | 1983 | * |
1982 | * Disable the Tulip chip. | | 1984 | * Disable the Tulip chip. |
1983 | */ | | 1985 | */ |
1984 | static void | | 1986 | static void |
1985 | tlp_disable(struct tulip_softc *sc) | | 1987 | tlp_disable(struct tulip_softc *sc) |
1986 | { | | 1988 | { |
1987 | | | 1989 | |
1988 | if (TULIP_IS_ENABLED(sc) && sc->sc_disable != NULL) { | | 1990 | if (TULIP_IS_ENABLED(sc) && sc->sc_disable != NULL) { |
1989 | (*sc->sc_disable)(sc); | | 1991 | (*sc->sc_disable)(sc); |
1990 | sc->sc_flags &= ~TULIPF_ENABLED; | | 1992 | sc->sc_flags &= ~TULIPF_ENABLED; |
1991 | } | | 1993 | } |
1992 | } | | 1994 | } |
1993 | | | 1995 | |
1994 | /* | | 1996 | /* |
1995 | * tlp_rxdrain: | | 1997 | * tlp_rxdrain: |
1996 | * | | 1998 | * |
1997 | * Drain the receive queue. | | 1999 | * Drain the receive queue. |
1998 | */ | | 2000 | */ |
1999 | static void | | 2001 | static void |
2000 | tlp_rxdrain(struct tulip_softc *sc) | | 2002 | tlp_rxdrain(struct tulip_softc *sc) |
2001 | { | | 2003 | { |
2002 | struct tulip_rxsoft *rxs; | | 2004 | struct tulip_rxsoft *rxs; |
2003 | int i; | | 2005 | int i; |
2004 | | | 2006 | |
2005 | for (i = 0; i < TULIP_NRXDESC; i++) { | | 2007 | for (i = 0; i < TULIP_NRXDESC; i++) { |
2006 | rxs = &sc->sc_rxsoft[i]; | | 2008 | rxs = &sc->sc_rxsoft[i]; |
2007 | if (rxs->rxs_mbuf != NULL) { | | 2009 | if (rxs->rxs_mbuf != NULL) { |
2008 | bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); | | 2010 | bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); |
2009 | m_freem(rxs->rxs_mbuf); | | 2011 | m_freem(rxs->rxs_mbuf); |
2010 | rxs->rxs_mbuf = NULL; | | 2012 | rxs->rxs_mbuf = NULL; |
2011 | } | | 2013 | } |
2012 | } | | 2014 | } |
2013 | } | | 2015 | } |
2014 | | | 2016 | |
2015 | /* | | 2017 | /* |
2016 | * tlp_stop: [ ifnet interface function ] | | 2018 | * tlp_stop: [ ifnet interface function ] |
2017 | * | | 2019 | * |
2018 | * Stop transmission on the interface. | | 2020 | * Stop transmission on the interface. |
2019 | */ | | 2021 | */ |
2020 | static void | | 2022 | static void |
2021 | tlp_stop(struct ifnet *ifp, int disable) | | 2023 | tlp_stop(struct ifnet *ifp, int disable) |
2022 | { | | 2024 | { |
2023 | struct tulip_softc *sc = ifp->if_softc; | | 2025 | struct tulip_softc *sc = ifp->if_softc; |
2024 | struct tulip_txsoft *txs; | | 2026 | struct tulip_txsoft *txs; |
2025 | | | 2027 | |
2026 | if (sc->sc_tick != NULL) { | | 2028 | if (sc->sc_tick != NULL) { |
2027 | /* Stop the one second clock. */ | | 2029 | /* Stop the one second clock. */ |
2028 | callout_stop(&sc->sc_tick_callout); | | 2030 | callout_stop(&sc->sc_tick_callout); |
2029 | } | | 2031 | } |
2030 | | | 2032 | |
2031 | if (sc->sc_flags & TULIPF_HAS_MII) { | | 2033 | if (sc->sc_flags & TULIPF_HAS_MII) { |
2032 | /* Down the MII. */ | | 2034 | /* Down the MII. */ |
2033 | mii_down(&sc->sc_mii); | | 2035 | mii_down(&sc->sc_mii); |
2034 | } | | 2036 | } |
2035 | | | 2037 | |
2036 | /* Disable interrupts. */ | | 2038 | /* Disable interrupts. */ |
2037 | TULIP_WRITE(sc, CSR_INTEN, 0); | | 2039 | TULIP_WRITE(sc, CSR_INTEN, 0); |
2038 | | | 2040 | |
2039 | /* Stop the transmit and receive processes. */ | | 2041 | /* Stop the transmit and receive processes. */ |
2040 | sc->sc_opmode = 0; | | 2042 | sc->sc_opmode = 0; |
2041 | TULIP_WRITE(sc, CSR_OPMODE, 0); | | 2043 | TULIP_WRITE(sc, CSR_OPMODE, 0); |
2042 | TULIP_WRITE(sc, CSR_RXLIST, 0); | | 2044 | TULIP_WRITE(sc, CSR_RXLIST, 0); |
2043 | TULIP_WRITE(sc, CSR_TXLIST, 0); | | 2045 | TULIP_WRITE(sc, CSR_TXLIST, 0); |
2044 | | | 2046 | |
2045 | /* | | 2047 | /* |
2046 | * Release any queued transmit buffers. | | 2048 | * Release any queued transmit buffers. |
2047 | */ | | 2049 | */ |
2048 | while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { | | 2050 | while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { |
2049 | SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs_q); | | 2051 | SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs_q); |
2050 | if (txs->txs_mbuf != NULL) { | | 2052 | if (txs->txs_mbuf != NULL) { |
2051 | bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); | | 2053 | bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); |
2052 | m_freem(txs->txs_mbuf); | | 2054 | m_freem(txs->txs_mbuf); |
2053 | txs->txs_mbuf = NULL; | | 2055 | txs->txs_mbuf = NULL; |
2054 | } | | 2056 | } |
2055 | SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); | | 2057 | SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); |
2056 | } | | 2058 | } |
2057 | | | 2059 | |
2058 | sc->sc_flags &= ~(TULIPF_WANT_SETUP | TULIPF_DOING_SETUP); | | 2060 | sc->sc_flags &= ~(TULIPF_WANT_SETUP | TULIPF_DOING_SETUP); |
2059 | | | 2061 | |
2060 | /* | | 2062 | /* |
2061 | * Mark the interface down and cancel the watchdog timer. | | 2063 | * Mark the interface down and cancel the watchdog timer. |
2062 | */ | | 2064 | */ |
2063 | ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); | | 2065 | ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); |
2064 | sc->sc_if_flags = ifp->if_flags; | | 2066 | sc->sc_if_flags = ifp->if_flags; |
2065 | ifp->if_timer = 0; | | 2067 | ifp->if_timer = 0; |
2066 | | | 2068 | |
2067 | /* | | 2069 | /* |
2068 | * Reset the chip (needed on some flavors to actually disable it). | | 2070 | * Reset the chip (needed on some flavors to actually disable it). |
2069 | */ | | 2071 | */ |
2070 | tlp_reset(sc); | | 2072 | tlp_reset(sc); |
2071 | | | 2073 | |
2072 | if (disable) { | | 2074 | if (disable) { |
2073 | tlp_rxdrain(sc); | | 2075 | tlp_rxdrain(sc); |
2074 | tlp_disable(sc); | | 2076 | tlp_disable(sc); |
2075 | } | | 2077 | } |
2076 | } | | 2078 | } |
2077 | | | 2079 | |
2078 | #define SROM_EMIT(sc, x) \ | | 2080 | #define SROM_EMIT(sc, x) \ |
2079 | do { \ | | 2081 | do { \ |
2080 | TULIP_WRITE((sc), CSR_MIIROM, (x)); \ | | 2082 | TULIP_WRITE((sc), CSR_MIIROM, (x)); \ |
2081 | delay(2); \ | | 2083 | delay(2); \ |
2082 | } while (0) | | 2084 | } while (0) |
2083 | | | 2085 | |
2084 | /* | | 2086 | /* |
2085 | * tlp_srom_idle: | | 2087 | * tlp_srom_idle: |
2086 | * | | 2088 | * |
2087 | * Put the SROM in idle state. | | 2089 | * Put the SROM in idle state. |
2088 | */ | | 2090 | */ |
2089 | static void | | 2091 | static void |
2090 | tlp_srom_idle(struct tulip_softc *sc) | | 2092 | tlp_srom_idle(struct tulip_softc *sc) |
2091 | { | | 2093 | { |
2092 | uint32_t miirom; | | 2094 | uint32_t miirom; |
2093 | int i; | | 2095 | int i; |
2094 | | | 2096 | |
2095 | miirom = MIIROM_SR; | | 2097 | miirom = MIIROM_SR; |
2096 | SROM_EMIT(sc, miirom); | | 2098 | SROM_EMIT(sc, miirom); |
2097 | | | 2099 | |
2098 | miirom |= MIIROM_RD; | | 2100 | miirom |= MIIROM_RD; |
2099 | SROM_EMIT(sc, miirom); | | 2101 | SROM_EMIT(sc, miirom); |
2100 | | | 2102 | |
2101 | miirom |= MIIROM_SROMCS; | | 2103 | miirom |= MIIROM_SROMCS; |
2102 | SROM_EMIT(sc, miirom); | | 2104 | SROM_EMIT(sc, miirom); |
2103 | | | 2105 | |
2104 | SROM_EMIT(sc, miirom | MIIROM_SROMSK); | | 2106 | SROM_EMIT(sc, miirom | MIIROM_SROMSK); |
2105 | | | 2107 | |
2106 | /* Strobe the clock 32 times. */ | | 2108 | /* Strobe the clock 32 times. */ |
2107 | for (i = 0; i < 32; i++) { | | 2109 | for (i = 0; i < 32; i++) { |
2108 | SROM_EMIT(sc, miirom); | | 2110 | SROM_EMIT(sc, miirom); |
2109 | SROM_EMIT(sc, miirom | MIIROM_SROMSK); | | 2111 | SROM_EMIT(sc, miirom | MIIROM_SROMSK); |
2110 | } | | 2112 | } |
2111 | | | 2113 | |
2112 | SROM_EMIT(sc, miirom); | | 2114 | SROM_EMIT(sc, miirom); |
2113 | | | 2115 | |
2114 | miirom &= ~MIIROM_SROMCS; | | 2116 | miirom &= ~MIIROM_SROMCS; |
2115 | SROM_EMIT(sc, miirom); | | 2117 | SROM_EMIT(sc, miirom); |
2116 | | | 2118 | |
2117 | SROM_EMIT(sc, 0); | | 2119 | SROM_EMIT(sc, 0); |
2118 | } | | 2120 | } |
2119 | | | 2121 | |
2120 | /* | | 2122 | /* |
2121 | * tlp_srom_size: | | 2123 | * tlp_srom_size: |
2122 | * | | 2124 | * |
2123 | * Determine the number of address bits in the SROM. | | 2125 | * Determine the number of address bits in the SROM. |
2124 | */ | | 2126 | */ |
2125 | static int | | 2127 | static int |
2126 | tlp_srom_size(struct tulip_softc *sc) | | 2128 | tlp_srom_size(struct tulip_softc *sc) |
2127 | { | | 2129 | { |
2128 | uint32_t miirom; | | 2130 | uint32_t miirom; |
2129 | int x; | | 2131 | int x; |
2130 | | | 2132 | |
2131 | /* Select the SROM. */ | | 2133 | /* Select the SROM. */ |
2132 | miirom = MIIROM_SR; | | 2134 | miirom = MIIROM_SR; |
2133 | SROM_EMIT(sc, miirom); | | 2135 | SROM_EMIT(sc, miirom); |
2134 | | | 2136 | |
2135 | miirom |= MIIROM_RD; | | 2137 | miirom |= MIIROM_RD; |
2136 | SROM_EMIT(sc, miirom); | | 2138 | SROM_EMIT(sc, miirom); |
2137 | | | 2139 | |
2138 | /* Send CHIP SELECT for one clock tick. */ | | 2140 | /* Send CHIP SELECT for one clock tick. */ |
2139 | miirom |= MIIROM_SROMCS; | | 2141 | miirom |= MIIROM_SROMCS; |
2140 | SROM_EMIT(sc, miirom); | | 2142 | SROM_EMIT(sc, miirom); |
2141 | | | 2143 | |
2142 | /* Shift in the READ opcode. */ | | 2144 | /* Shift in the READ opcode. */ |
2143 | for (x = 3; x > 0; x--) { | | 2145 | for (x = 3; x > 0; x--) { |
2144 | if (TULIP_SROM_OPC_READ & (1 << (x - 1))) | | 2146 | if (TULIP_SROM_OPC_READ & (1 << (x - 1))) |
2145 | miirom |= MIIROM_SROMDI; | | 2147 | miirom |= MIIROM_SROMDI; |
2146 | else | | 2148 | else |
2147 | miirom &= ~MIIROM_SROMDI; | | 2149 | miirom &= ~MIIROM_SROMDI; |
2148 | SROM_EMIT(sc, miirom); | | 2150 | SROM_EMIT(sc, miirom); |
2149 | SROM_EMIT(sc, miirom | MIIROM_SROMSK); | | 2151 | SROM_EMIT(sc, miirom | MIIROM_SROMSK); |
2150 | SROM_EMIT(sc, miirom); | | 2152 | SROM_EMIT(sc, miirom); |
2151 | } | | 2153 | } |
2152 | | | 2154 | |
2153 | /* Shift in address and look for dummy 0 bit. */ | | 2155 | /* Shift in address and look for dummy 0 bit. */ |
2154 | for (x = 1; x <= 12; x++) { | | 2156 | for (x = 1; x <= 12; x++) { |
2155 | miirom &= ~MIIROM_SROMDI; | | 2157 | miirom &= ~MIIROM_SROMDI; |
2156 | SROM_EMIT(sc, miirom); | | 2158 | SROM_EMIT(sc, miirom); |
2157 | SROM_EMIT(sc, miirom | MIIROM_SROMSK); | | 2159 | SROM_EMIT(sc, miirom | MIIROM_SROMSK); |
2158 | if (!TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) | | 2160 | if (!TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) |
2159 | break; | | 2161 | break; |
2160 | SROM_EMIT(sc, miirom); | | 2162 | SROM_EMIT(sc, miirom); |
2161 | } | | 2163 | } |
2162 | | | 2164 | |
2163 | /* Clear CHIP SELECT. */ | | 2165 | /* Clear CHIP SELECT. */ |
2164 | miirom &= ~MIIROM_SROMCS; | | 2166 | miirom &= ~MIIROM_SROMCS; |
2165 | SROM_EMIT(sc, miirom); | | 2167 | SROM_EMIT(sc, miirom); |
2166 | | | 2168 | |
2167 | /* Deselect the SROM. */ | | 2169 | /* Deselect the SROM. */ |
2168 | SROM_EMIT(sc, 0); | | 2170 | SROM_EMIT(sc, 0); |
2169 | | | 2171 | |
2170 | if (x < 4 || x > 12) { | | 2172 | if (x < 4 || x > 12) { |
2171 | aprint_debug_dev(sc->sc_dev, "broken MicroWire interface " | | 2173 | aprint_debug_dev(sc->sc_dev, "broken MicroWire interface " |
2172 | "detected; setting SROM size to 1Kb\n"); | | 2174 | "detected; setting SROM size to 1Kb\n"); |
2173 | return 6; | | 2175 | return 6; |
2174 | } else { | | 2176 | } else { |
2175 | if (tlp_srom_debug) | | 2177 | if (tlp_srom_debug) |
2176 | printf("%s: SROM size is 2^%d*16 bits (%d bytes)\n", | | 2178 | printf("%s: SROM size is 2^%d*16 bits (%d bytes)\n", |
2177 | device_xname(sc->sc_dev), x, (1 << (x + 4)) >> 3); | | 2179 | device_xname(sc->sc_dev), x, (1 << (x + 4)) >> 3); |
2178 | return x; | | 2180 | return x; |
2179 | } | | 2181 | } |
2180 | } | | 2182 | } |
2181 | | | 2183 | |
2182 | /* | | 2184 | /* |
2183 | * tlp_read_srom: | | 2185 | * tlp_read_srom: |
2184 | * | | 2186 | * |
2185 | * Read the Tulip SROM. | | 2187 | * Read the Tulip SROM. |
2186 | */ | | 2188 | */ |
2187 | int | | 2189 | int |
2188 | tlp_read_srom(struct tulip_softc *sc) | | 2190 | tlp_read_srom(struct tulip_softc *sc) |
2189 | { | | 2191 | { |
2190 | int size; | | 2192 | int size; |
2191 | uint32_t miirom; | | 2193 | uint32_t miirom; |
2192 | uint16_t datain; | | 2194 | uint16_t datain; |
2193 | int i, x; | | 2195 | int i, x; |
2194 | | | 2196 | |
2195 | tlp_srom_idle(sc); | | 2197 | tlp_srom_idle(sc); |
2196 | | | 2198 | |
2197 | sc->sc_srom_addrbits = tlp_srom_size(sc); | | 2199 | sc->sc_srom_addrbits = tlp_srom_size(sc); |
2198 | if (sc->sc_srom_addrbits == 0) | | 2200 | if (sc->sc_srom_addrbits == 0) |
2199 | return 0; | | 2201 | return 0; |
2200 | size = TULIP_ROM_SIZE(sc->sc_srom_addrbits); | | 2202 | size = TULIP_ROM_SIZE(sc->sc_srom_addrbits); |
2201 | sc->sc_srom = malloc(size, M_DEVBUF, M_WAITOK); | | 2203 | sc->sc_srom = malloc(size, M_DEVBUF, M_WAITOK); |
2202 | | | 2204 | |
2203 | /* Select the SROM. */ | | 2205 | /* Select the SROM. */ |
2204 | miirom = MIIROM_SR; | | 2206 | miirom = MIIROM_SR; |
2205 | SROM_EMIT(sc, miirom); | | 2207 | SROM_EMIT(sc, miirom); |
2206 | | | 2208 | |
2207 | miirom |= MIIROM_RD; | | 2209 | miirom |= MIIROM_RD; |
2208 | SROM_EMIT(sc, miirom); | | 2210 | SROM_EMIT(sc, miirom); |
2209 | | | 2211 | |
2210 | for (i = 0; i < size; i += 2) { | | 2212 | for (i = 0; i < size; i += 2) { |
2211 | /* Send CHIP SELECT for one clock tick. */ | | 2213 | /* Send CHIP SELECT for one clock tick. */ |
2212 | miirom |= MIIROM_SROMCS; | | 2214 | miirom |= MIIROM_SROMCS; |
2213 | SROM_EMIT(sc, miirom); | | 2215 | SROM_EMIT(sc, miirom); |
2214 | | | 2216 | |
2215 | /* Shift in the READ opcode. */ | | 2217 | /* Shift in the READ opcode. */ |
2216 | for (x = 3; x > 0; x--) { | | 2218 | for (x = 3; x > 0; x--) { |
2217 | if (TULIP_SROM_OPC_READ & (1 << (x - 1))) | | 2219 | if (TULIP_SROM_OPC_READ & (1 << (x - 1))) |
2218 | miirom |= MIIROM_SROMDI; | | 2220 | miirom |= MIIROM_SROMDI; |
2219 | else | | 2221 | else |
2220 | miirom &= ~MIIROM_SROMDI; | | 2222 | miirom &= ~MIIROM_SROMDI; |
2221 | SROM_EMIT(sc, miirom); | | 2223 | SROM_EMIT(sc, miirom); |
2222 | SROM_EMIT(sc, miirom | MIIROM_SROMSK); | | 2224 | SROM_EMIT(sc, miirom | MIIROM_SROMSK); |
2223 | SROM_EMIT(sc, miirom); | | 2225 | SROM_EMIT(sc, miirom); |
2224 | } | | 2226 | } |
2225 | | | 2227 | |
2226 | /* Shift in address. */ | | 2228 | /* Shift in address. */ |
2227 | for (x = sc->sc_srom_addrbits; x > 0; x--) { | | 2229 | for (x = sc->sc_srom_addrbits; x > 0; x--) { |
2228 | if (i & (1 << x)) | | 2230 | if (i & (1 << x)) |
2229 | miirom |= MIIROM_SROMDI; | | 2231 | miirom |= MIIROM_SROMDI; |
2230 | else | | 2232 | else |
2231 | miirom &= ~MIIROM_SROMDI; | | 2233 | miirom &= ~MIIROM_SROMDI; |
2232 | SROM_EMIT(sc, miirom); | | 2234 | SROM_EMIT(sc, miirom); |
2233 | SROM_EMIT(sc, miirom | MIIROM_SROMSK); | | 2235 | SROM_EMIT(sc, miirom | MIIROM_SROMSK); |
2234 | SROM_EMIT(sc, miirom); | | 2236 | SROM_EMIT(sc, miirom); |
2235 | } | | 2237 | } |
2236 | | | 2238 | |
2237 | /* Shift out data. */ | | 2239 | /* Shift out data. */ |
2238 | miirom &= ~MIIROM_SROMDI; | | 2240 | miirom &= ~MIIROM_SROMDI; |
2239 | datain = 0; | | 2241 | datain = 0; |
2240 | for (x = 16; x > 0; x--) { | | 2242 | for (x = 16; x > 0; x--) { |
2241 | SROM_EMIT(sc, miirom | MIIROM_SROMSK); | | 2243 | SROM_EMIT(sc, miirom | MIIROM_SROMSK); |
2242 | if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) | | 2244 | if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) |
2243 | datain |= (1 << (x - 1)); | | 2245 | datain |= (1 << (x - 1)); |
2244 | SROM_EMIT(sc, miirom); | | 2246 | SROM_EMIT(sc, miirom); |
2245 | } | | 2247 | } |
2246 | sc->sc_srom[i] = datain & 0xff; | | 2248 | sc->sc_srom[i] = datain & 0xff; |
2247 | sc->sc_srom[i + 1] = datain >> 8; | | 2249 | sc->sc_srom[i + 1] = datain >> 8; |
2248 | | | 2250 | |
2249 | /* Clear CHIP SELECT. */ | | 2251 | /* Clear CHIP SELECT. */ |
2250 | miirom &= ~MIIROM_SROMCS; | | 2252 | miirom &= ~MIIROM_SROMCS; |
2251 | SROM_EMIT(sc, miirom); | | 2253 | SROM_EMIT(sc, miirom); |
2252 | } | | 2254 | } |
2253 | | | 2255 | |
2254 | /* Deselect the SROM. */ | | 2256 | /* Deselect the SROM. */ |
2255 | SROM_EMIT(sc, 0); | | 2257 | SROM_EMIT(sc, 0); |
2256 | | | 2258 | |
2257 | /* ...and idle it. */ | | 2259 | /* ...and idle it. */ |
2258 | tlp_srom_idle(sc); | | 2260 | tlp_srom_idle(sc); |
2259 | | | 2261 | |
2260 | if (tlp_srom_debug) { | | 2262 | if (tlp_srom_debug) { |
2261 | printf("SROM CONTENTS:"); | | 2263 | printf("SROM CONTENTS:"); |
2262 | for (i = 0; i < size; i++) { | | 2264 | for (i = 0; i < size; i++) { |
2263 | if ((i % 8) == 0) | | 2265 | if ((i % 8) == 0) |
2264 | printf("\n\t"); | | 2266 | printf("\n\t"); |
2265 | printf("0x%02x ", sc->sc_srom[i]); | | 2267 | printf("0x%02x ", sc->sc_srom[i]); |
2266 | } | | 2268 | } |
2267 | printf("\n"); | | 2269 | printf("\n"); |
2268 | } | | 2270 | } |
2269 | | | 2271 | |
2270 | return 1; | | 2272 | return 1; |
2271 | } | | 2273 | } |
2272 | | | 2274 | |
2273 | #undef SROM_EMIT | | 2275 | #undef SROM_EMIT |
2274 | | | 2276 | |
2275 | /* | | 2277 | /* |
2276 | * tlp_add_rxbuf: | | 2278 | * tlp_add_rxbuf: |
2277 | * | | 2279 | * |
2278 | * Add a receive buffer to the indicated descriptor. | | 2280 | * Add a receive buffer to the indicated descriptor. |
2279 | */ | | 2281 | */ |
2280 | static int | | 2282 | static int |
2281 | tlp_add_rxbuf(struct tulip_softc *sc, int idx) | | 2283 | tlp_add_rxbuf(struct tulip_softc *sc, int idx) |
2282 | { | | 2284 | { |
2283 | struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx]; | | 2285 | struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx]; |
2284 | struct mbuf *m; | | 2286 | struct mbuf *m; |
2285 | int error; | | 2287 | int error; |
2286 | | | 2288 | |
2287 | MGETHDR(m, M_DONTWAIT, MT_DATA); | | 2289 | MGETHDR(m, M_DONTWAIT, MT_DATA); |
2288 | if (m == NULL) | | 2290 | if (m == NULL) |
2289 | return ENOBUFS; | | 2291 | return ENOBUFS; |
2290 | | | 2292 | |
2291 | MCLAIM(m, &sc->sc_ethercom.ec_rx_mowner); | | 2293 | MCLAIM(m, &sc->sc_ethercom.ec_rx_mowner); |
2292 | MCLGET(m, M_DONTWAIT); | | 2294 | MCLGET(m, M_DONTWAIT); |
2293 | if ((m->m_flags & M_EXT) == 0) { | | 2295 | if ((m->m_flags & M_EXT) == 0) { |
2294 | m_freem(m); | | 2296 | m_freem(m); |
2295 | return ENOBUFS; | | 2297 | return ENOBUFS; |
2296 | } | | 2298 | } |
2297 | | | 2299 | |
2298 | if (rxs->rxs_mbuf != NULL) | | 2300 | if (rxs->rxs_mbuf != NULL) |
2299 | bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); | | 2301 | bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); |
2300 | | | 2302 | |
2301 | rxs->rxs_mbuf = m; | | 2303 | rxs->rxs_mbuf = m; |
2302 | | | 2304 | |
2303 | error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap, | | 2305 | error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap, |
2304 | m->m_ext.ext_buf, m->m_ext.ext_size, NULL, | | 2306 | m->m_ext.ext_buf, m->m_ext.ext_size, NULL, |
2305 | BUS_DMA_READ | BUS_DMA_NOWAIT); | | 2307 | BUS_DMA_READ | BUS_DMA_NOWAIT); |
2306 | if (error) { | | 2308 | if (error) { |
2307 | aprint_error_dev(sc->sc_dev, | | 2309 | aprint_error_dev(sc->sc_dev, |
2308 | "can't load rx DMA map %d, error = %d\n", idx, error); | | 2310 | "can't load rx DMA map %d, error = %d\n", idx, error); |
2309 | panic("tlp_add_rxbuf"); /* XXX */ | | 2311 | panic("tlp_add_rxbuf"); /* XXX */ |
2310 | } | | 2312 | } |
2311 | | | 2313 | |
2312 | bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, | | 2314 | bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, |
2313 | rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); | | 2315 | rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); |
2314 | | | 2316 | |
2315 | TULIP_INIT_RXDESC(sc, idx); | | 2317 | TULIP_INIT_RXDESC(sc, idx); |
2316 | | | 2318 | |
2317 | return 0; | | 2319 | return 0; |
2318 | } | | 2320 | } |
2319 | | | 2321 | |
2320 | /* | | 2322 | /* |
2321 | * tlp_srom_crcok: | | 2323 | * tlp_srom_crcok: |
2322 | * | | 2324 | * |
2323 | * Check the CRC of the Tulip SROM. | | 2325 | * Check the CRC of the Tulip SROM. |
2324 | */ | | 2326 | */ |
2325 | int | | 2327 | int |
2326 | tlp_srom_crcok(const uint8_t *romdata) | | 2328 | tlp_srom_crcok(const uint8_t *romdata) |
2327 | { | | 2329 | { |
2328 | uint32_t crc; | | 2330 | uint32_t crc; |
2329 | | | 2331 | |
2330 | crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM); | | 2332 | crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM); |
2331 | crc = (crc & 0xffff) ^ 0xffff; | | 2333 | crc = (crc & 0xffff) ^ 0xffff; |
2332 | if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM)) | | 2334 | if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM)) |
2333 | return 1; | | 2335 | return 1; |
2334 | | | 2336 | |
2335 | /* | | 2337 | /* |
2336 | * Try an alternate checksum. | | 2338 | * Try an alternate checksum. |
2337 | */ | | 2339 | */ |
2338 | crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM1); | | 2340 | crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM1); |
2339 | crc = (crc & 0xffff) ^ 0xffff; | | 2341 | crc = (crc & 0xffff) ^ 0xffff; |
2340 | if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM1)) | | 2342 | if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM1)) |
2341 | return 1; | | 2343 | return 1; |
2342 | | | 2344 | |
2343 | return 0; | | 2345 | return 0; |
2344 | } | | 2346 | } |
2345 | | | 2347 | |
2346 | /* | | 2348 | /* |
2347 | * tlp_isv_srom: | | 2349 | * tlp_isv_srom: |
2348 | * | | 2350 | * |
2349 | * Check to see if the SROM is in the new standardized format. | | 2351 | * Check to see if the SROM is in the new standardized format. |
2350 | */ | | 2352 | */ |
2351 | int | | 2353 | int |
2352 | tlp_isv_srom(const uint8_t *romdata) | | 2354 | tlp_isv_srom(const uint8_t *romdata) |
2353 | { | | 2355 | { |
2354 | int i; | | 2356 | int i; |
2355 | uint16_t cksum; | | 2357 | uint16_t cksum; |
2356 | | | 2358 | |
2357 | if (tlp_srom_crcok(romdata)) { | | 2359 | if (tlp_srom_crcok(romdata)) { |
2358 | /* | | 2360 | /* |
2359 | * SROM CRC checks out; must be in the new format. | | 2361 | * SROM CRC checks out; must be in the new format. |
2360 | */ | | 2362 | */ |
2361 | return 1; | | 2363 | return 1; |
2362 | } | | 2364 | } |
2363 | | | 2365 | |
2364 | cksum = TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM); | | 2366 | cksum = TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM); |
2365 | if (cksum == 0xffff || cksum == 0) { | | 2367 | if (cksum == 0xffff || cksum == 0) { |
2366 | /* | | 2368 | /* |
2367 | * No checksum present. Check the SROM ID; 18 bytes of 0 | | 2369 | * No checksum present. Check the SROM ID; 18 bytes of 0 |
2368 | * followed by 1 (version) followed by the number of | | 2370 | * followed by 1 (version) followed by the number of |
2369 | * adapters which use this SROM (should be non-zero). | | 2371 | * adapters which use this SROM (should be non-zero). |
2370 | */ | | 2372 | */ |
2371 | for (i = 0; i < TULIP_ROM_SROM_FORMAT_VERION; i++) { | | 2373 | for (i = 0; i < TULIP_ROM_SROM_FORMAT_VERION; i++) { |
2372 | if (romdata[i] != 0) | | 2374 | if (romdata[i] != 0) |
2373 | return 0; | | 2375 | return 0; |
2374 | } | | 2376 | } |
2375 | if (romdata[TULIP_ROM_SROM_FORMAT_VERION] != 1) | | 2377 | if (romdata[TULIP_ROM_SROM_FORMAT_VERION] != 1) |
2376 | return 0; | | 2378 | return 0; |
2377 | if (romdata[TULIP_ROM_CHIP_COUNT] == 0) | | 2379 | if (romdata[TULIP_ROM_CHIP_COUNT] == 0) |
2378 | return 0; | | 2380 | return 0; |
2379 | return 1; | | 2381 | return 1; |
2380 | } | | 2382 | } |
2381 | | | 2383 | |
2382 | return 0; | | 2384 | return 0; |
2383 | } | | 2385 | } |
2384 | | | 2386 | |
2385 | /* | | 2387 | /* |
2386 | * tlp_isv_srom_enaddr: | | 2388 | * tlp_isv_srom_enaddr: |
2387 | * | | 2389 | * |
2388 | * Get the Ethernet address from an ISV SROM. | | 2390 | * Get the Ethernet address from an ISV SROM. |
2389 | */ | | 2391 | */ |
2390 | int | | 2392 | int |
2391 | tlp_isv_srom_enaddr(struct tulip_softc *sc, uint8_t *enaddr) | | 2393 | tlp_isv_srom_enaddr(struct tulip_softc *sc, uint8_t *enaddr) |
2392 | { | | 2394 | { |
2393 | int i, devcnt; | | 2395 | int i, devcnt; |
2394 | | | 2396 | |
2395 | if (tlp_isv_srom(sc->sc_srom) == 0) | | 2397 | if (tlp_isv_srom(sc->sc_srom) == 0) |
2396 | return 0; | | 2398 | return 0; |
2397 | | | 2399 | |
2398 | devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; | | 2400 | devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; |
2399 | for (i = 0; i < devcnt; i++) { | | 2401 | for (i = 0; i < devcnt; i++) { |
2400 | if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) | | 2402 | if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) |
2401 | break; | | 2403 | break; |
2402 | if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == | | 2404 | if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == |
2403 | sc->sc_devno) | | 2405 | sc->sc_devno) |
2404 | break; | | 2406 | break; |
2405 | } | | 2407 | } |
2406 | | | 2408 | |
2407 | if (i == devcnt) | | 2409 | if (i == devcnt) |
2408 | return 0; | | 2410 | return 0; |
2409 | | | 2411 | |
2410 | memcpy(enaddr, &sc->sc_srom[TULIP_ROM_IEEE_NETWORK_ADDRESS], | | 2412 | memcpy(enaddr, &sc->sc_srom[TULIP_ROM_IEEE_NETWORK_ADDRESS], |
2411 | ETHER_ADDR_LEN); | | 2413 | ETHER_ADDR_LEN); |
2412 | enaddr[5] += i; | | 2414 | enaddr[5] += i; |
2413 | | | 2415 | |
2414 | return 1; | | 2416 | return 1; |
2415 | } | | 2417 | } |
2416 | | | 2418 | |
2417 | /* | | 2419 | /* |
2418 | * tlp_parse_old_srom: | | 2420 | * tlp_parse_old_srom: |
2419 | * | | 2421 | * |
2420 | * Parse old-format SROMs. | | 2422 | * Parse old-format SROMs. |
2421 | * | | 2423 | * |
2422 | * This routine is largely lifted from Matt Thomas's `de' driver. | | 2424 | * This routine is largely lifted from Matt Thomas's `de' driver. |
2423 | */ | | 2425 | */ |
2424 | int | | 2426 | int |
2425 | tlp_parse_old_srom(struct tulip_softc *sc, uint8_t *enaddr) | | 2427 | tlp_parse_old_srom(struct tulip_softc *sc, uint8_t *enaddr) |
2426 | { | | 2428 | { |
2427 | static const uint8_t testpat[] = | | 2429 | static const uint8_t testpat[] = |
2428 | { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa }; | | 2430 | { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa }; |
2429 | int i; | | 2431 | int i; |
2430 | uint32_t cksum; | | 2432 | uint32_t cksum; |
2431 | | | 2433 | |
2432 | if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) { | | 2434 | if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) { |
2433 | /* | | 2435 | /* |
2434 | * Phobos G100 interfaces have the address at | | 2436 | * Phobos G100 interfaces have the address at |
2435 | * offsets 0 and 20, but each pair of bytes is | | 2437 | * offsets 0 and 20, but each pair of bytes is |
2436 | * swapped. | | 2438 | * swapped. |
2437 | */ | | 2439 | */ |
2438 | if (sc->sc_srom_addrbits == 6 && | | 2440 | if (sc->sc_srom_addrbits == 6 && |
2439 | sc->sc_srom[1] == 0x00 && | | 2441 | sc->sc_srom[1] == 0x00 && |
2440 | sc->sc_srom[0] == 0x60 && | | 2442 | sc->sc_srom[0] == 0x60 && |
2441 | sc->sc_srom[3] == 0xf5 && | | 2443 | sc->sc_srom[3] == 0xf5 && |
2442 | memcmp(&sc->sc_srom[0], &sc->sc_srom[20], 6) == 0) { | | 2444 | memcmp(&sc->sc_srom[0], &sc->sc_srom[20], 6) == 0) { |
2443 | for (i = 0; i < 6; i += 2) { | | 2445 | for (i = 0; i < 6; i += 2) { |
2444 | enaddr[i] = sc->sc_srom[i + 1]; | | 2446 | enaddr[i] = sc->sc_srom[i + 1]; |
2445 | enaddr[i + 1] = sc->sc_srom[i]; | | 2447 | enaddr[i + 1] = sc->sc_srom[i]; |
2446 | } | | 2448 | } |
2447 | return 1; | | 2449 | return 1; |
2448 | } | | 2450 | } |
2449 | | | 2451 | |
2450 | /* | | 2452 | /* |
2451 | * Phobos G130/G160 interfaces have the address at | | 2453 | * Phobos G130/G160 interfaces have the address at |
2452 | * offsets 20 and 84, but each pair of bytes is | | 2454 | * offsets 20 and 84, but each pair of bytes is |
2453 | * swapped. | | 2455 | * swapped. |
2454 | */ | | 2456 | */ |
2455 | if (sc->sc_srom_addrbits == 6 && | | 2457 | if (sc->sc_srom_addrbits == 6 && |
2456 | sc->sc_srom[21] == 0x00 && | | 2458 | sc->sc_srom[21] == 0x00 && |
2457 | sc->sc_srom[20] == 0x60 && | | 2459 | sc->sc_srom[20] == 0x60 && |
2458 | sc->sc_srom[23] == 0xf5 && | | 2460 | sc->sc_srom[23] == 0xf5 && |
2459 | memcmp(&sc->sc_srom[20], &sc->sc_srom[84], 6) == 0) { | | 2461 | memcmp(&sc->sc_srom[20], &sc->sc_srom[84], 6) == 0) { |
2460 | for (i = 0; i < 6; i += 2) { | | 2462 | for (i = 0; i < 6; i += 2) { |
2461 | enaddr[i] = sc->sc_srom[20 + i + 1]; | | 2463 | enaddr[i] = sc->sc_srom[20 + i + 1]; |
2462 | enaddr[i + 1] = sc->sc_srom[20 + i]; | | 2464 | enaddr[i + 1] = sc->sc_srom[20 + i]; |
2463 | } | | 2465 | } |
2464 | return 1; | | 2466 | return 1; |
2465 | } | | 2467 | } |
2466 | | | 2468 | |
2467 | /* | | 2469 | /* |
2468 | * Cobalt Networks interfaces simply have the address | | 2470 | * Cobalt Networks interfaces simply have the address |
2469 | * in the first six bytes. The rest is zeroed out | | 2471 | * in the first six bytes. The rest is zeroed out |
2470 | * on some models, but others contain unknown data. | | 2472 | * on some models, but others contain unknown data. |
2471 | */ | | 2473 | */ |
2472 | if (sc->sc_srom[0] == 0x00 && | | 2474 | if (sc->sc_srom[0] == 0x00 && |
2473 | sc->sc_srom[1] == 0x10 && | | 2475 | sc->sc_srom[1] == 0x10 && |
2474 | sc->sc_srom[2] == 0xe0) { | | 2476 | sc->sc_srom[2] == 0xe0) { |
2475 | memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); | | 2477 | memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); |
2476 | return 1; | | 2478 | return 1; |
2477 | } | | 2479 | } |
2478 | | | 2480 | |
2479 | /* | | 2481 | /* |
2480 | * Some vendors (e.g. ZNYX) don't use the standard | | 2482 | * Some vendors (e.g. ZNYX) don't use the standard |
2481 | * DEC Address ROM format, but rather just have an | | 2483 | * DEC Address ROM format, but rather just have an |
2482 | * Ethernet address in the first 6 bytes, maybe a | | 2484 | * Ethernet address in the first 6 bytes, maybe a |
2483 | * 2 byte checksum, and then all 0xff's. | | 2485 | * 2 byte checksum, and then all 0xff's. |
2484 | */ | | 2486 | */ |
2485 | for (i = 8; i < 32; i++) { | | 2487 | for (i = 8; i < 32; i++) { |
2486 | if (sc->sc_srom[i] != 0xff && | | 2488 | if (sc->sc_srom[i] != 0xff && |
2487 | sc->sc_srom[i] != 0) | | 2489 | sc->sc_srom[i] != 0) |
2488 | return 0; | | 2490 | return 0; |
2489 | } | | 2491 | } |
2490 | | | 2492 | |
2491 | /* | | 2493 | /* |
2492 | * Sanity check the Ethernet address: | | 2494 | * Sanity check the Ethernet address: |
2493 | * | | 2495 | * |
2494 | * - Make sure it's not multicast or locally | | 2496 | * - Make sure it's not multicast or locally |
2495 | * assigned | | 2497 | * assigned |
2496 | * - Make sure it has a non-0 OUI | | 2498 | * - Make sure it has a non-0 OUI |
2497 | */ | | 2499 | */ |
2498 | if (sc->sc_srom[0] & 3) | | 2500 | if (sc->sc_srom[0] & 3) |
2499 | return 0; | | 2501 | return 0; |
2500 | if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 && | | 2502 | if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 && |
2501 | sc->sc_srom[2] == 0) | | 2503 | sc->sc_srom[2] == 0) |
2502 | return 0; | | 2504 | return 0; |
2503 | | | 2505 | |
2504 | memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); | | 2506 | memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); |