Thu Mar 5 01:33:36 2020 UTC ()
ppc4xx_tlb_enter(): invalidate entry after clearing MSR for sure.


(rin)
diff -r1.81 -r1.82 src/sys/arch/powerpc/ibm4xx/pmap.c
cvs diff -r1.81 -r1.82 src/sys/arch/powerpc/ibm4xx/pmap.c (expand / switch to unified diff)

--- src/sys/arch/powerpc/ibm4xx/pmap.c 2020/03/05 01:31:27 1.81
+++ src/sys/arch/powerpc/ibm4xx/pmap.c 2020/03/05 01:33:36 1.82
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: pmap.c,v 1.81 2020/03/05 01:31:27 rin Exp $ */ 1/* $NetBSD: pmap.c,v 1.82 2020/03/05 01:33:36 rin Exp $ */
2 2
3/* 3/*
4 * Copyright 2001 Wasabi Systems, Inc. 4 * Copyright 2001 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -57,27 +57,27 @@ @@ -57,27 +57,27 @@
57 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 57 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 60 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
61 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 61 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
62 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 62 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
63 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 63 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
64 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 64 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
65 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 65 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
66 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 66 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 */ 67 */
68 68
69#include <sys/cdefs.h> 69#include <sys/cdefs.h>
70__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.81 2020/03/05 01:31:27 rin Exp $"); 70__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.82 2020/03/05 01:33:36 rin Exp $");
71 71
72#include <sys/param.h> 72#include <sys/param.h>
73#include <sys/cpu.h> 73#include <sys/cpu.h>
74#include <sys/device.h> 74#include <sys/device.h>
75#include <sys/kmem.h> 75#include <sys/kmem.h>
76#include <sys/pool.h> 76#include <sys/pool.h>
77#include <sys/proc.h> 77#include <sys/proc.h>
78#include <sys/queue.h> 78#include <sys/queue.h>
79#include <sys/systm.h> 79#include <sys/systm.h>
80 80
81#include <uvm/uvm.h> 81#include <uvm/uvm.h>
82 82
83#include <machine/powerpc.h> 83#include <machine/powerpc.h>
@@ -1311,28 +1311,28 @@ ppc4xx_tlb_enter(int ctx, vaddr_t va, u_ @@ -1311,28 +1311,28 @@ ppc4xx_tlb_enter(int ctx, vaddr_t va, u_
1311#ifdef DIAGNOSTIC 1311#ifdef DIAGNOSTIC
1312 if ((idx < tlb_nreserved) || (idx >= NTLB) || (idx & 63) == 0) { 1312 if ((idx < tlb_nreserved) || (idx >= NTLB) || (idx & 63) == 0) {
1313 panic("ppc4xx_tlb_enter: replacing entry %ld", idx); 1313 panic("ppc4xx_tlb_enter: replacing entry %ld", idx);
1314 } 1314 }
1315#endif 1315#endif
1316 1316
1317 tlb_info[idx].ti_va = (va & TLB_EPN_MASK); 1317 tlb_info[idx].ti_va = (va & TLB_EPN_MASK);
1318 tlb_info[idx].ti_ctx = ctx; 1318 tlb_info[idx].ti_ctx = ctx;
1319 tlb_info[idx].ti_flags = TLBF_USED | TLBF_REF; 1319 tlb_info[idx].ti_flags = TLBF_USED | TLBF_REF;
1320 1320
1321 __asm volatile( 1321 __asm volatile(
1322 "mfmsr %0;" /* Save MSR */ 1322 "mfmsr %0;" /* Save MSR */
1323 "li %1,0;" 1323 "li %1,0;"
1324 "tlbwe %1,%3,0;" /* Invalidate old entry. */ 
1325 "mtmsr %1;" /* Clear MSR */ 1324 "mtmsr %1;" /* Clear MSR */
 1325 "tlbwe %1,%3,0;" /* Invalidate old entry. */
1326 "mfpid %1;" /* Save old PID */ 1326 "mfpid %1;" /* Save old PID */
1327 "mtpid %2;" /* Load translation ctx */ 1327 "mtpid %2;" /* Load translation ctx */
1328 "sync; isync;" 1328 "sync; isync;"
1329 "tlbwe %4,%3,1; tlbwe %5,%3,0;" /* Set TLB */ 1329 "tlbwe %4,%3,1; tlbwe %5,%3,0;" /* Set TLB */
1330 "sync; isync;" 1330 "sync; isync;"
1331 "mtpid %1; mtmsr %0;" /* Restore PID and MSR */ 1331 "mtpid %1; mtmsr %0;" /* Restore PID and MSR */
1332 "sync; isync;" 1332 "sync; isync;"
1333 : "=&r" (msr), "=&r" (pid) 1333 : "=&r" (msr), "=&r" (pid)
1334 : "r" (ctx), "r" (idx), "r" (tl), "r" (th)); 1334 : "r" (ctx), "r" (idx), "r" (tl), "r" (th));
1335} 1335}
1336 1336
1337void 1337void
1338ppc4xx_tlb_init(void) 1338ppc4xx_tlb_init(void)