Wed Mar 25 06:02:09 2020 UTC ()

Trailing whitespace


(skrll)

diff -r1.25 -r1.26 src/sys/arch/arm/arm32/db_machdep.c

--- src/sys/arch/arm/arm32/db_machdep.c 2018/08/15 06:00:02	1.25
+++ src/sys/arch/arm/arm32/db_machdep.c 2020/03/25 06:02:09	1.26

 @@ -1,14 +1,14 @@
-/*	$NetBSD: db_machdep.c,v 1.25 2018/08/15 06:00:02 skrll Exp $	*/
+/*	$NetBSD: db_machdep.c,v 1.26 2020/03/25 06:02:09 skrll Exp $	*/
 /*
  * Copyright (c) 1996 Mark Brinicombe
+ *
  * Mach Operating System
  * Copyright (c) 1991,1990 Carnegie Mellon University
  * All Rights Reserved.
+ *
  * Permission to use, copy, modify and distribute this software and its
  * documentation is hereby granted, provided that both the copyright
  * notice and this permission notice appear in all copies of the
  * software, derivative works or modified versions, and any portions
  * thereof, and that both notices appear in supporting documentation.
 @@ -24,27 +24,27 @@
  *  Carnegie Mellon University
  *  Pittsburgh PA 15213-3890
+ *
  * any improvements or extensions that they make and grant Carnegie the
  * rights to redistribute these changes.
  */
 #ifdef _KERNEL_OPT
 #include "opt_cputypes.h"
 #include "opt_multiprocessor.h"
 #endif
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.25 2018/08/15 06:00:02 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.26 2020/03/25 06:02:09 skrll Exp $");
 #include <sys/param.h>
 #include <sys/cpu.h>
 #include <sys/proc.h>
 #include <sys/vnode.h>
 #include <sys/systm.h>
 #include <arm/arm32/db_machdep.h>
 #include <arm/cpufunc.h>
 #include <ddb/db_access.h>
 #include <ddb/db_sym.h>
 #include <ddb/db_output.h>
 @@ -198,27 +198,27 @@ static void
 tlb_print_asid(bool ng_p, tlb_asid_t asid)
+{
 	if (ng_p) {
 		db_printf(" %3d", asid);
 	} else {
 		db_printf(" ---");
+	}
+}
 struct db_tlbinfo {
 	vaddr_t (*dti_decode_vpn)(size_t, uint32_t, uint32_t);
 	void (*dti_print_header)(void);
 	void (*dti_print_entry)(size_t, size_t, uint32_t, uint32_t);
 	u_int dti_index;
 };
 #if defined(CPU_CORTEXA5)
 static void
 tlb_print_cortex_a5_header(void)
+{
 	tlb_print_common_header(" S TEX C B");
+}
 static vaddr_t
 tlb_decode_cortex_a5_vpn(size_t va_index, uint32_t d0, uint32_t d1)
+{
 	const uint64_t d = ((uint64_t)d1 << 32) | d0;