Tue Apr 14 18:11:35 2020 UTC ()
Regen for ticket #1529


(martin)
diff -r1.128.6.8 -r1.128.6.9 src/sys/dev/mii/miidevs.h
diff -r1.116.6.8 -r1.116.6.9 src/sys/dev/mii/miidevs_data.h
cvs diff -r1.128.6.8 -r1.128.6.9 src/sys/dev/mii/miidevs.h (switch to unified diff)

--- src/sys/dev/mii/miidevs.h 2019/11/25 15:57:49 1.128.6.8
+++ src/sys/dev/mii/miidevs.h 2020/04/14 18:11:35 1.128.6.9
@@ -1,617 +1,624 @@ @@ -1,617 +1,624 @@
1/* $NetBSD: miidevs.h,v 1.128.6.8 2019/11/25 15:57:49 martin Exp $ */ 1/* $NetBSD: miidevs.h,v 1.128.6.9 2020/04/14 18:11:35 martin Exp $ */
2 2
3/* 3/*
4 * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT. 4 * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
5 * 5 *
6 * generated from: 6 * generated from:
7 * NetBSD: miidevs,v 1.125.6.8 2019/11/25 15:57:23 martin Exp 7 * NetBSD: miidevs,v 1.125.6.9 2020/04/14 17:57:17 martin Exp
8 */ 8 */
9 9
10/*- 10/*-
11 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 11 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
12 * All rights reserved. 12 * All rights reserved.
13 * 13 *
14 * This code is derived from software contributed to The NetBSD Foundation 14 * This code is derived from software contributed to The NetBSD Foundation
15 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 15 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
16 * NASA Ames Research Center. 16 * NASA Ames Research Center.
17 * 17 *
18 * Redistribution and use in source and binary forms, with or without 18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions 19 * modification, are permitted provided that the following conditions
20 * are met: 20 * are met:
21 * 1. Redistributions of source code must retain the above copyright 21 * 1. Redistributions of source code must retain the above copyright
22 * notice, this list of conditions and the following disclaimer. 22 * notice, this list of conditions and the following disclaimer.
23 * 2. Redistributions in binary form must reproduce the above copyright 23 * 2. Redistributions in binary form must reproduce the above copyright
24 * notice, this list of conditions and the following disclaimer in the 24 * notice, this list of conditions and the following disclaimer in the
25 * documentation and/or other materials provided with the distribution. 25 * documentation and/or other materials provided with the distribution.
26 * 26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE. 37 * POSSIBILITY OF SUCH DAMAGE.
38 */ 38 */
39 39
40/* 40/*
41 * List of known MII OUIs. 41 * List of known MII OUIs.
42 * For a complete list see http://standards.ieee.org/regauth/oui/ 42 * For a complete list see http://standards.ieee.org/regauth/oui/
43 * 43 *
44 * XXX Vendors do obviously not agree how OUIs (24 bit) are mapped 44 * XXX Vendors do obviously not agree how OUIs (24 bit) are mapped
45 * to the 22 bits available in the id registers. 45 * to the 22 bits available in the id registers.
46 * IEEE 802.3u-1995, subclause 22.2.4.3.1, figure 22-12, depicts the right 46 * IEEE 802.3u-1995, subclause 22.2.4.3.1, figure 22-12, depicts the right
47 * mapping; the bit positions are defined in IEEE 802-1990, figure 5.2. 47 * mapping; the bit positions are defined in IEEE 802-1990, figure 5.2.
48 * (There is a formal 802.3 interpretation, number 1-07/98 of July 09 1998, 48 * (There is a formal 802.3 interpretation, number 1-07/98 of July 09 1998,
49 * about this.) 49 * about this.)
50 * The MII_OUI() macro in "miivar.h" reflects this. 50 * The MII_OUI() macro in "miivar.h" reflects this.
51 * If a vendor uses a different mapping, an "xx" prefixed OUI is defined here 51 * If a vendor uses a different mapping, an "xx" prefixed OUI is defined here
52 * which is mangled accordingly to compensate. 52 * which is mangled accordingly to compensate.
53 */ 53 */
54 54
55/* 55/*
56 * Use "make -f Makefile.miidevs" to regenerate miidevs.h and miidevs_data.h 56 * Use "make -f Makefile.miidevs" to regenerate miidevs.h and miidevs_data.h
57 */ 57 */
58 58
59#define MII_OUI_AMD 0x00001a /* Advanced Micro Devices */ 59#define MII_OUI_AMD 0x00001a /* Advanced Micro Devices */
60#define MII_OUI_TRIDIUM 0x0001f0 /* Tridium */ 60#define MII_OUI_TRIDIUM 0x0001f0 /* Tridium */
61#define MII_OUI_DATATRACK 0x0002c6 /* Data Track Technology */ 61#define MII_OUI_DATATRACK 0x0002c6 /* Data Track Technology */
62#define MII_OUI_AGERE 0x00053d /* Agere */ 62#define MII_OUI_AGERE 0x00053d /* Agere */
 63#define MII_OUI_QUAKE 0x000897 /* Quake Technologies */
63#define MII_OUI_BANKSPEED 0x0006b8 /* Bankspeed Pty */ 64#define MII_OUI_BANKSPEED 0x0006b8 /* Bankspeed Pty */
64#define MII_OUI_NETEXCELL 0x0008bb /* NetExcell */ 65#define MII_OUI_NETEXCELL 0x0008bb /* NetExcell */
65#define MII_OUI_NETAS 0x0009c3 /* Netas */ 66#define MII_OUI_NETAS 0x0009c3 /* Netas */
66#define MII_OUI_BROADCOM2 0x000af7 /* Broadcom Corporation */ 67#define MII_OUI_BROADCOM2 0x000af7 /* Broadcom Corporation */
 68#define MII_OUI_AELUROS 0x000b25 /* Aeluros */
67#define MII_OUI_RALINK 0x000c43 /* Ralink Technology */ 69#define MII_OUI_RALINK 0x000c43 /* Ralink Technology */
68#define MII_OUI_ASIX 0x000ec6 /* ASIX */ 70#define MII_OUI_ASIX 0x000ec6 /* ASIX */
69#define MII_OUI_BROADCOM 0x001018 /* Broadcom Corporation */ 71#define MII_OUI_BROADCOM 0x001018 /* Broadcom Corporation */
70#define MII_OUI_MICREL 0x0010a1 /* Micrel */ 72#define MII_OUI_MICREL 0x0010a1 /* Micrel */
71#define MII_OUI_ALTIMA 0x0010a9 /* Altima Communications */ 73#define MII_OUI_ALTIMA 0x0010a9 /* Altima Communications */
72#define MII_OUI_ENABLESEMI 0x0010dd /* Enable Semiconductor */ 74#define MII_OUI_ENABLESEMI 0x0010dd /* Enable Semiconductor */
73#define MII_OUI_SUNPLUS 0x001105 /* Sunplus Technology */ 75#define MII_OUI_SUNPLUS 0x001105 /* Sunplus Technology */
74#define MII_OUI_ATHEROS 0x001374 /* Atheros */ 
75#define MII_OUI_TERANETICS 0x0014a6 /* Teranetics */ 76#define MII_OUI_TERANETICS 0x0014a6 /* Teranetics */
76#define MII_OUI_RALINK2 0x0017a5 /* Ralink Technology */ 77#define MII_OUI_RALINK2 0x0017a5 /* Ralink Technology */
77#define MII_OUI_AQUANTIA 0x0017b6 /* Aquantia Corporation */ 78#define MII_OUI_AQUANTIA 0x0017b6 /* Aquantia Corporation */
78#define MII_OUI_BROADCOM3 0x001be9 /* Broadcom Corporation */ 79#define MII_OUI_BROADCOM3 0x001be9 /* Broadcom Corporation */
79#define MII_OUI_LEVEL1 0x00207b /* Level 1 */ 80#define MII_OUI_LEVEL1 0x00207b /* Level 1 */
80#define MII_OUI_VIA 0x004063 /* VIA Technologies */ 
81#define MII_OUI_MARVELL 0x005043 /* Marvell Semiconductor */ 81#define MII_OUI_MARVELL 0x005043 /* Marvell Semiconductor */
82#define MII_OUI_QUALSEMI 0x006051 /* Quality Semiconductor */ 82#define MII_OUI_QUALSEMI 0x006051 /* Quality Semiconductor */
83#define MII_OUI_AMLOGIC 0x006051 /* Amlogic */ 83#define MII_OUI_AMLOGIC 0x006051 /* Amlogic */
84#define MII_OUI_DAVICOM 0x00606e /* Davicom Semiconductor */ 84#define MII_OUI_DAVICOM 0x00606e /* Davicom Semiconductor */
85#define MII_OUI_SMSC 0x00800f /* SMSC */ 85#define MII_OUI_SMSC 0x00800f /* SMSC */
86#define MII_OUI_SEEQ 0x00a07d /* Seeq */ 86#define MII_OUI_SEEQ 0x00a07d /* Seeq */
87#define MII_OUI_ICS 0x00a0be /* Integrated Circuit Systems */ 87#define MII_OUI_ICS 0x00a0be /* Integrated Circuit Systems */
88#define MII_OUI_INTEL 0x00aa00 /* Intel */ 88#define MII_OUI_INTEL 0x00aa00 /* Intel */
89#define MII_OUI_TSC 0x00c039 /* TDK Semiconductor */ 89#define MII_OUI_TSC 0x00c039 /* TDK Semiconductor */
90#define MII_OUI_MYSON 0x00c0b4 /* Myson Technology */ 90#define MII_OUI_MYSON 0x00c0b4 /* Myson Technology */
91#define MII_OUI_ATTANSIC 0x00c82e /* Attansic Technology */ 91#define MII_OUI_ATTANSIC 0x00c82e /* Attansic Technology */
92#define MII_OUI_RDC 0x00d02d /* RDC Semiconductor */ 
93#define MII_OUI_JMICRON 0x00d831 /* JMicron */ 92#define MII_OUI_JMICRON 0x00d831 /* JMicron */
94#define MII_OUI_PMCSIERRA 0x00e004 /* PMC-Sierra */ 93#define MII_OUI_PMCSIERRA 0x00e004 /* PMC-Sierra */
95#define MII_OUI_SIS 0x00e006 /* Silicon Integrated Systems */ 94#define MII_OUI_SIS 0x00e006 /* Silicon Integrated Systems */
96#define MII_OUI_REALTEK 0x00e04c /* RealTek */ 95#define MII_OUI_REALTEK 0x00e04c /* RealTek */
97#define MII_OUI_ADMTEK 0x00e092 /* ADMtek */ 96#define MII_OUI_ADMTEK 0x00e092 /* ADMtek */
98#define MII_OUI_XAQTI 0x00e0ae /* XaQti Corp. */ 97#define MII_OUI_XAQTI 0x00e0ae /* XaQti Corp. */
99#define MII_OUI_NATSEMI 0x080017 /* National Semiconductor */ 98#define MII_OUI_NATSEMI 0x080017 /* National Semiconductor */
100#define MII_OUI_TI 0x080028 /* Texas Instruments */ 99#define MII_OUI_TI 0x080028 /* Texas Instruments */
101#define MII_OUI_BROADCOM4 0x18c086 /* Broadcom Corporation */ 100#define MII_OUI_BROADCOM4 0x18c086 /* Broadcom Corporation */
102#define MII_OUI_RENESAS 0x749050 /* Renesas */ 101#define MII_OUI_RENESAS 0x749050 /* Renesas */
103 102
104/* Unregistered or wrong OUI */ 103/* Unregistered or wrong OUI */
105#define MII_OUI_yyREALTEK 0x000004 /* Realtek */ 104#define MII_OUI_yyREALTEK 0x000004 /* Realtek */
106#define MII_OUI_yyAMD 0x000058 /* Advanced Micro Devices */ 105#define MII_OUI_yyAMD 0x000058 /* Advanced Micro Devices */
 106#define MII_OUI_xxVIA 0x0002c6 /* VIA Technologies */
107#define MII_OUI_xxMYSON 0x00032d /* Myson Technology */ 107#define MII_OUI_xxMYSON 0x00032d /* Myson Technology */
108#define MII_OUI_xxTSC 0x00039c /* TDK Semiconductor */ 108#define MII_OUI_xxTSC 0x00039c /* TDK Semiconductor */
109#define MII_OUI_xxASIX 0x000674 /* Asix Semiconductor */ 109#define MII_OUI_xxASIX 0x000674 /* Asix Semiconductor */
110#define MII_OUI_xxDAVICOM 0x000676 /* Davicom Semiconductor */ 110#define MII_OUI_xxDAVICOM 0x000676 /* Davicom Semiconductor */
111#define MII_OUI_xxAMLOGIC 0x00068a /* Amlogic */ 111#define MII_OUI_xxAMLOGIC 0x00068a /* Amlogic */
112#define MII_OUI_xxQUALSEMI 0x00068a /* Quality Semiconductor */ 112#define MII_OUI_xxQUALSEMI 0x00068a /* Quality Semiconductor */
113#define MII_OUI_xxREALTEK 0x000732 /* Realtek */ 113#define MII_OUI_xxREALTEK 0x000732 /* Realtek */
114#define MII_OUI_xxBROADCOM 0x000818 /* Broadcom Corporation */ 114#define MII_OUI_xxBROADCOM 0x000818 /* Broadcom Corporation */
115#define MII_OUI_xxPMCSIERRA 0x0009c0 /* PMC-Sierra */ 115#define MII_OUI_xxPMCSIERRA 0x0009c0 /* PMC-Sierra */
116#define MII_OUI_xxICPLUS 0x0009c3 /* IC Plus Corp. */ 116#define MII_OUI_xxICPLUS 0x0009c3 /* IC Plus Corp. */
117#define MII_OUI_xxMARVELL 0x000ac2 /* Marvell Semiconductor */ 117#define MII_OUI_xxMARVELL 0x000ac2 /* Marvell Semiconductor */
118#define MII_OUI_xxINTEL 0x001f00 /* Intel */ 118#define MII_OUI_xxINTEL 0x001f00 /* Intel */
119#define MII_OUI_xxBROADCOM_ALT1 0x0050ef /* Broadcom Corporation */ 119#define MII_OUI_xxBROADCOM_ALT1 0x0050ef /* Broadcom Corporation */
120#define MII_OUI_yyINTEL 0x005500 /* Intel */ 120#define MII_OUI_yyINTEL 0x005500 /* Intel */
121#define MII_OUI_yyASIX 0x007063 /* Asix Semiconductor */ 121#define MII_OUI_yyASIX 0x007063 /* Asix Semiconductor */
122#define MII_OUI_xxVITESSE 0x008083 /* Vitesse Semiconductor */ 122#define MII_OUI_xxVITESSE 0x008083 /* Vitesse Semiconductor */
123#define MII_OUI_xxPMCSIERRA2 0x009057 /* PMC-Sierra */ 123#define MII_OUI_xxPMCSIERRA2 0x009057 /* PMC-Sierra */
124#define MII_OUI_xxCICADA 0x00c08f /* Cicada Semiconductor */ 124#define MII_OUI_xxCICADA 0x00c08f /* Cicada Semiconductor */
 125#define MII_OUI_xxRDC 0x00d02d /* RDC Semiconductor */
125#define MII_OUI_xxNATSEMI 0x1000e8 /* National Semiconductor */ 126#define MII_OUI_xxNATSEMI 0x1000e8 /* National Semiconductor */
126#define MII_OUI_xxLEVEL1 0x782000 /* Level 1 */ 127#define MII_OUI_xxLEVEL1 0x782000 /* Level 1 */
127#define MII_OUI_xxXAQTI 0xace000 /* XaQti Corp. */ 128#define MII_OUI_xxXAQTI 0xace000 /* XaQti Corp. */
128 129
129/* 130/*
130 * List of known models. Grouped by oui. 131 * List of known models. Grouped by oui.
131 */ 132 */
132 133
133/* 134/*
134 * Agere PHYs 135 * Agere PHYs
135 */ 136 */
136#define MII_MODEL_AGERE_ET1011 0x0004 137#define MII_MODEL_AGERE_ET1011 0x0001
137#define MII_STR_AGERE_ET1011 "Agere ET1011 10/100/1000baseT PHY" 138#define MII_STR_AGERE_ET1011 "ET1011 10/100/1000baseT PHY"
 139#define MII_MODEL_AGERE_ET1011C 0x0004
 140#define MII_STR_AGERE_ET1011C "ET1011C 10/100/1000baseT PHY"
138 141
139/* Asix semiconductor PHYs */ 142/* Asix semiconductor PHYs */
140#define MII_MODEL_xxASIX_AX88X9X 0x0031 143#define MII_MODEL_xxASIX_AX88X9X 0x0031
141#define MII_STR_xxASIX_AX88X9X "Ax88x9x internal PHY" 144#define MII_STR_xxASIX_AX88X9X "Ax88x9x internal PHY"
142#define MII_MODEL_yyASIX_AX88772 0x0001 145#define MII_MODEL_yyASIX_AX88772 0x0001
143#define MII_STR_yyASIX_AX88772 "AX88772 internal PHY" 146#define MII_STR_yyASIX_AX88772 "AX88772 internal PHY"
144#define MII_MODEL_yyASIX_AX88772A 0x0006 147#define MII_MODEL_yyASIX_AX88772A 0x0006
145#define MII_STR_yyASIX_AX88772A "AX88772A internal PHY" 148#define MII_STR_yyASIX_AX88772A "AX88772A internal PHY"
146#define MII_MODEL_yyASIX_AX88772B 0x0008 149#define MII_MODEL_yyASIX_AX88772B 0x0008
147#define MII_STR_yyASIX_AX88772B "AX88772B internal PHY" 150#define MII_STR_yyASIX_AX88772B "AX88772B internal PHY"
148 151
149/* Altima Communications PHYs */ 152/* Altima Communications PHYs */
150/* Don't know the model for ACXXX */ 153/* Don't know the model for ACXXX */
151#define MII_MODEL_ALTIMA_ACXXX 0x0001 154#define MII_MODEL_ALTIMA_ACXXX 0x0001
152#define MII_STR_ALTIMA_ACXXX "ACXXX 10/100 media interface" 155#define MII_STR_ALTIMA_ACXXX "ACXXX 10/100 media interface"
153#define MII_MODEL_ALTIMA_AC101L 0x0012 156#define MII_MODEL_ALTIMA_AC101L 0x0012
154#define MII_STR_ALTIMA_AC101L "AC101L 10/100 media interface" 157#define MII_STR_ALTIMA_AC101L "AC101L 10/100 media interface"
155#define MII_MODEL_ALTIMA_AC101 0x0021 158#define MII_MODEL_ALTIMA_AC101 0x0021
156#define MII_STR_ALTIMA_AC101 "AC101 10/100 media interface" 159#define MII_STR_ALTIMA_AC101 "AC101 10/100 media interface"
157/* AMD Am79C87[45] have ALTIMA OUI */ 160/* AMD Am79C87[45] have ALTIMA OUI */
158#define MII_MODEL_ALTIMA_Am79C875 0x0014 161#define MII_MODEL_ALTIMA_Am79C875 0x0014
159#define MII_STR_ALTIMA_Am79C875 "Am79C875 10/100 media interface" 162#define MII_STR_ALTIMA_Am79C875 "Am79C875 10/100 media interface"
160#define MII_MODEL_ALTIMA_Am79C874 0x0021 163#define MII_MODEL_ALTIMA_Am79C874 0x0021
161#define MII_STR_ALTIMA_Am79C874 "Am79C874 10/100 media interface" 164#define MII_STR_ALTIMA_Am79C874 "Am79C874 10/100 media interface"
162 165
163/* Amlogic PHYs */ 166/* Amlogic PHYs */
164#define MII_MODEL_AMLOGIC_GXL 0x0000 167#define MII_MODEL_AMLOGIC_GXL 0x0000
165#define MII_STR_AMLOGIC_GXL "Meson GXL internal PHY" 168#define MII_STR_AMLOGIC_GXL "Meson GXL internal PHY"
166#define MII_MODEL_xxAMLOGIC_GXL 0x0000 169#define MII_MODEL_xxAMLOGIC_GXL 0x0000
167#define MII_STR_xxAMLOGIC_GXL "Meson GXL internal PHY" 170#define MII_STR_xxAMLOGIC_GXL "Meson GXL internal PHY"
168 171
169/* Atheros PHYs */ 172/* Attansic/Atheros PHYs */
170#define MII_MODEL_ATHEROS_F1 0x0001 
171#define MII_STR_ATHEROS_F1 "F1 10/100/1000 PHY" 
172#define MII_MODEL_ATHEROS_F2 0x0002 
173#define MII_STR_ATHEROS_F2 "F2 10/100 PHY" 
174 
175/* Attansic PHYs */ 
176#define MII_MODEL_ATTANSIC_L1 0x0001 173#define MII_MODEL_ATTANSIC_L1 0x0001
177#define MII_STR_ATTANSIC_L1 "L1 10/100/1000 PHY" 174#define MII_STR_ATTANSIC_L1 "L1 10/100/1000 PHY"
178#define MII_MODEL_ATTANSIC_L2 0x0002 175#define MII_MODEL_ATTANSIC_L2 0x0002
179#define MII_STR_ATTANSIC_L2 "L2 10/100 PHY" 176#define MII_STR_ATTANSIC_L2 "L2 10/100 PHY"
180#define MII_MODEL_ATTANSIC_AR8021 0x0004 177#define MII_MODEL_ATTANSIC_AR8021 0x0004
181#define MII_STR_ATTANSIC_AR8021 "Atheros AR8021 10/100/1000 PHY" 178#define MII_STR_ATTANSIC_AR8021 "Atheros AR8021 10/100/1000 PHY"
182#define MII_MODEL_ATTANSIC_AR8035 0x0007 179#define MII_MODEL_ATTANSIC_AR8035 0x0007
183#define MII_STR_ATTANSIC_AR8035 "Atheros AR8035 10/100/1000 PHY" 180#define MII_STR_ATTANSIC_AR8035 "Atheros AR8035 10/100/1000 PHY"
184 181
185/* Advanced Micro Devices PHYs */ 182/* Advanced Micro Devices PHYs */
186/* see Davicom DM9101 for Am79C873 */ 183/* see Davicom DM9101 for Am79C873 */
187#define MII_MODEL_yyAMD_79C972_10T 0x0001 184#define MII_MODEL_yyAMD_79C972_10T 0x0001
188#define MII_STR_yyAMD_79C972_10T "Am79C972 internal 10BASE-T interface" 185#define MII_STR_yyAMD_79C972_10T "Am79C972 internal 10BASE-T interface"
189#define MII_MODEL_yyAMD_79c973phy 0x0036 186#define MII_MODEL_yyAMD_79c973phy 0x0036
190#define MII_STR_yyAMD_79c973phy "Am79C973 internal 10/100 media interface" 187#define MII_STR_yyAMD_79c973phy "Am79C973 internal 10/100 media interface"
191#define MII_MODEL_yyAMD_79c901 0x0037 188#define MII_MODEL_yyAMD_79c901 0x0037
192#define MII_STR_yyAMD_79c901 "Am79C901 10BASE-T interface" 189#define MII_STR_yyAMD_79c901 "Am79C901 10BASE-T interface"
193#define MII_MODEL_yyAMD_79c901home 0x0039 190#define MII_MODEL_yyAMD_79c901home 0x0039
194#define MII_STR_yyAMD_79c901home "Am79C901 HomePNA 1.0 interface" 191#define MII_STR_yyAMD_79c901home "Am79C901 HomePNA 1.0 interface"
195 192
196/* Broadcom Corp. PHYs */ 193/* Broadcom Corp. PHYs */
197#define MII_MODEL_xxBROADCOM_3C905B 0x0012 194#define MII_MODEL_xxBROADCOM_3C905B 0x0012
198#define MII_STR_xxBROADCOM_3C905B "Broadcom 3c905B internal PHY" 195#define MII_STR_xxBROADCOM_3C905B "Broadcom 3c905B internal PHY"
199#define MII_MODEL_xxBROADCOM_3C905C 0x0017 196#define MII_MODEL_xxBROADCOM_3C905C 0x0017
200#define MII_STR_xxBROADCOM_3C905C "Broadcom 3c905C internal PHY" 197#define MII_STR_xxBROADCOM_3C905C "Broadcom 3c905C internal PHY"
201#define MII_MODEL_xxBROADCOM_BCM5221 0x001e 198#define MII_MODEL_xxBROADCOM_BCM5221 0x001e
202#define MII_STR_xxBROADCOM_BCM5221 "BCM5221 10/100 media interface" 199#define MII_STR_xxBROADCOM_BCM5221 "BCM5221 10/100 media interface"
203#define MII_MODEL_xxBROADCOM_BCM5201 0x0021 200#define MII_MODEL_xxBROADCOM_BCM5201 0x0021
204#define MII_STR_xxBROADCOM_BCM5201 "BCM5201 10/100 media interface" 201#define MII_STR_xxBROADCOM_BCM5201 "BCM5201 10/100 media interface"
205#define MII_MODEL_xxBROADCOM_BCM5214 0x0028 202#define MII_MODEL_xxBROADCOM_BCM5214 0x0028
206#define MII_STR_xxBROADCOM_BCM5214 "BCM5214 Quad 10/100 media interface" 203#define MII_STR_xxBROADCOM_BCM5214 "BCM5214 Quad 10/100 media interface"
207#define MII_MODEL_xxBROADCOM_BCM5222 0x0032 204#define MII_MODEL_xxBROADCOM_BCM5222 0x0032
208#define MII_STR_xxBROADCOM_BCM5222 "BCM5222 Dual 10/100 media interface" 205#define MII_STR_xxBROADCOM_BCM5222 "BCM5222 Dual 10/100 media interface"
209#define MII_MODEL_xxBROADCOM_BCM4401 0x0036 206#define MII_MODEL_xxBROADCOM_BCM4401 0x0036
210#define MII_STR_xxBROADCOM_BCM4401 "BCM4401 10/100 media interface" 207#define MII_STR_xxBROADCOM_BCM4401 "BCM4401 10/100 media interface"
211#define MII_MODEL_xxBROADCOM_BCM5365 0x0037 208#define MII_MODEL_xxBROADCOM_BCM5365 0x0037
212#define MII_STR_xxBROADCOM_BCM5365 "BCM5365 10/100 5-port PHY switch" 209#define MII_STR_xxBROADCOM_BCM5365 "BCM5365 10/100 5-port PHY switch"
213#define MII_MODEL_BROADCOM_BCM5400 0x0004 210#define MII_MODEL_BROADCOM_BCM5400 0x0004
214#define MII_STR_BROADCOM_BCM5400 "BCM5400 1000BASE-T media interface" 211#define MII_STR_BROADCOM_BCM5400 "BCM5400 1000BASE-T media interface"
215#define MII_MODEL_BROADCOM_BCM5401 0x0005 212#define MII_MODEL_BROADCOM_BCM5401 0x0005
216#define MII_STR_BROADCOM_BCM5401 "BCM5401 1000BASE-T media interface" 213#define MII_STR_BROADCOM_BCM5401 "BCM5401 1000BASE-T media interface"
217#define MII_MODEL_BROADCOM_BCM5402 0x0006 214#define MII_MODEL_BROADCOM_BCM5402 0x0006
218#define MII_STR_BROADCOM_BCM5402 "BCM5402 1000BASE-T media interface" 215#define MII_STR_BROADCOM_BCM5402 "BCM5402 1000BASE-T media interface"
219#define MII_MODEL_BROADCOM_BCM5411 0x0007 216#define MII_MODEL_BROADCOM_BCM5411 0x0007
220#define MII_STR_BROADCOM_BCM5411 "BCM5411 1000BASE-T media interface" 217#define MII_STR_BROADCOM_BCM5411 "BCM5411 1000BASE-T media interface"
221#define MII_MODEL_BROADCOM_BCM5404 0x0008 218#define MII_MODEL_BROADCOM_BCM5404 0x0008
222#define MII_STR_BROADCOM_BCM5404 "BCM5404 1000BASE-T media interface" 219#define MII_STR_BROADCOM_BCM5404 "BCM5404 1000BASE-T media interface"
223#define MII_MODEL_BROADCOM_BCM5424 0x000a 220#define MII_MODEL_BROADCOM_BCM5424 0x000a
224#define MII_STR_BROADCOM_BCM5424 "BCM5424/BCM5234 1000BASE-T media interface" 221#define MII_STR_BROADCOM_BCM5424 "BCM5424/BCM5234 1000BASE-T media interface"
225#define MII_MODEL_BROADCOM_BCM5464 0x000b 222#define MII_MODEL_BROADCOM_BCM5464 0x000b
226#define MII_STR_BROADCOM_BCM5464 "BCM5464 1000BASE-T media interface" 223#define MII_STR_BROADCOM_BCM5464 "BCM5464 1000BASE-T media interface"
227#define MII_MODEL_BROADCOM_BCM5461 0x000c 224#define MII_MODEL_BROADCOM_BCM5461 0x000c
228#define MII_STR_BROADCOM_BCM5461 "BCM5461 1000BASE-T media interface" 225#define MII_STR_BROADCOM_BCM5461 "BCM5461 1000BASE-T media interface"
229#define MII_MODEL_BROADCOM_BCM5462 0x000d 226#define MII_MODEL_BROADCOM_BCM5462 0x000d
230#define MII_STR_BROADCOM_BCM5462 "BCM5462 1000BASE-T media interface" 227#define MII_STR_BROADCOM_BCM5462 "BCM5462 1000BASE-T media interface"
231#define MII_MODEL_BROADCOM_BCM5421 0x000e 228#define MII_MODEL_BROADCOM_BCM5421 0x000e
232#define MII_STR_BROADCOM_BCM5421 "BCM5421 1000BASE-T media interface" 229#define MII_STR_BROADCOM_BCM5421 "BCM5421 1000BASE-T media interface"
233#define MII_MODEL_BROADCOM_BCM5752 0x0010 230#define MII_MODEL_BROADCOM_BCM5752 0x0010
234#define MII_STR_BROADCOM_BCM5752 "BCM5752 1000BASE-T media interface" 231#define MII_STR_BROADCOM_BCM5752 "BCM5752 1000BASE-T media interface"
235#define MII_MODEL_BROADCOM_BCM5701 0x0011 232#define MII_MODEL_BROADCOM_BCM5701 0x0011
236#define MII_STR_BROADCOM_BCM5701 "BCM5701 1000BASE-T media interface" 233#define MII_STR_BROADCOM_BCM5701 "BCM5701 1000BASE-T media interface"
237#define MII_MODEL_BROADCOM_BCM5706 0x0015 234#define MII_MODEL_BROADCOM_BCM5706 0x0015
238#define MII_STR_BROADCOM_BCM5706 "BCM5706 1000BASE-T/SX media interface" 235#define MII_STR_BROADCOM_BCM5706 "BCM5706 1000BASE-T/SX media interface"
239#define MII_MODEL_BROADCOM_BCM5703 0x0016 236#define MII_MODEL_BROADCOM_BCM5703 0x0016
240#define MII_STR_BROADCOM_BCM5703 "BCM5703 1000BASE-T media interface" 237#define MII_STR_BROADCOM_BCM5703 "BCM5703 1000BASE-T media interface"
241#define MII_MODEL_BROADCOM_BCM5750 0x0018 238#define MII_MODEL_BROADCOM_BCM5750 0x0018
242#define MII_STR_BROADCOM_BCM5750 "BCM5750 1000BASE-T media interface" 239#define MII_STR_BROADCOM_BCM5750 "BCM5750 1000BASE-T media interface"
243#define MII_MODEL_BROADCOM_BCM5704 0x0019 240#define MII_MODEL_BROADCOM_BCM5704 0x0019
244#define MII_STR_BROADCOM_BCM5704 "BCM5704 1000BASE-T media interface" 241#define MII_STR_BROADCOM_BCM5704 "BCM5704 1000BASE-T media interface"
245#define MII_MODEL_BROADCOM_BCM5705 0x001a 242#define MII_MODEL_BROADCOM_BCM5705 0x001a
246#define MII_STR_BROADCOM_BCM5705 "BCM5705 1000BASE-T media interface" 243#define MII_STR_BROADCOM_BCM5705 "BCM5705 1000BASE-T media interface"
247#define MII_MODEL_BROADCOM_BCM54K2 0x002e 244#define MII_MODEL_BROADCOM_BCM54K2 0x002e
248#define MII_STR_BROADCOM_BCM54K2 "BCM54K2 1000BASE-T media interface" 245#define MII_STR_BROADCOM_BCM54K2 "BCM54K2 1000BASE-T media interface"
249#define MII_MODEL_BROADCOM_BCM5714 0x0034 246#define MII_MODEL_BROADCOM_BCM5714 0x0034
250#define MII_STR_BROADCOM_BCM5714 "BCM5714 1000BASE-T/X media interface" 247#define MII_STR_BROADCOM_BCM5714 "BCM5714 1000BASE-T/X media interface"
251#define MII_MODEL_BROADCOM_BCM5780 0x0035 248#define MII_MODEL_BROADCOM_BCM5780 0x0035
252#define MII_STR_BROADCOM_BCM5780 "BCM5780 1000BASE-T/X media interface" 249#define MII_STR_BROADCOM_BCM5780 "BCM5780 1000BASE-T/X media interface"
253#define MII_MODEL_BROADCOM_BCM5708C 0x0036 250#define MII_MODEL_BROADCOM_BCM5708C 0x0036
254#define MII_STR_BROADCOM_BCM5708C "BCM5708C 1000BASE-T media interface" 251#define MII_STR_BROADCOM_BCM5708C "BCM5708C 1000BASE-T media interface"
255#define MII_MODEL_BROADCOM_BCM5466 0x003b 252#define MII_MODEL_BROADCOM_BCM5466 0x003b
256#define MII_STR_BROADCOM_BCM5466 "BCM5466 1000BASE-T media interface" 253#define MII_STR_BROADCOM_BCM5466 "BCM5466 1000BASE-T media interface"
257#define MII_MODEL_BROADCOM2_BCM5325 0x0003 254#define MII_MODEL_BROADCOM2_BCM5325 0x0003
258#define MII_STR_BROADCOM2_BCM5325 "BCM5325 10/100 5-port PHY switch" 255#define MII_STR_BROADCOM2_BCM5325 "BCM5325 10/100 5-port PHY switch"
259#define MII_MODEL_BROADCOM2_BCM5906 0x0004 256#define MII_MODEL_BROADCOM2_BCM5906 0x0004
260#define MII_STR_BROADCOM2_BCM5906 "BCM5906 10/100baseTX media interface" 257#define MII_STR_BROADCOM2_BCM5906 "BCM5906 10/100baseTX media interface"
261#define MII_MODEL_BROADCOM2_BCM5478 0x0008 258#define MII_MODEL_BROADCOM2_BCM5478 0x0008
262#define MII_STR_BROADCOM2_BCM5478 "BCM5478 1000BASE-T media interface" 259#define MII_STR_BROADCOM2_BCM5478 "BCM5478 1000BASE-T media interface"
263#define MII_MODEL_BROADCOM2_BCM5488 0x0009 260#define MII_MODEL_BROADCOM2_BCM5488 0x0009
264#define MII_STR_BROADCOM2_BCM5488 "BCM5488 1000BASE-T media interface" 261#define MII_STR_BROADCOM2_BCM5488 "BCM5488 1000BASE-T media interface"
265#define MII_MODEL_BROADCOM2_BCM5481 0x000a 262#define MII_MODEL_BROADCOM2_BCM5481 0x000a
266#define MII_STR_BROADCOM2_BCM5481 "BCM5481 1000BASE-T media interface" 263#define MII_STR_BROADCOM2_BCM5481 "BCM5481 1000BASE-T media interface"
267#define MII_MODEL_BROADCOM2_BCM5482 0x000b 264#define MII_MODEL_BROADCOM2_BCM5482 0x000b
268#define MII_STR_BROADCOM2_BCM5482 "BCM5482 1000BASE-T media interface" 265#define MII_STR_BROADCOM2_BCM5482 "BCM5482 1000BASE-T media interface"
269#define MII_MODEL_BROADCOM2_BCM5755 0x000c 266#define MII_MODEL_BROADCOM2_BCM5755 0x000c
270#define MII_STR_BROADCOM2_BCM5755 "BCM5755 1000BASE-T media interface" 267#define MII_STR_BROADCOM2_BCM5755 "BCM5755 1000BASE-T media interface"
271#define MII_MODEL_BROADCOM2_BCM5756 0x000d 268#define MII_MODEL_BROADCOM2_BCM5756 0x000d
272#define MII_STR_BROADCOM2_BCM5756 "BCM5756 1000BASE-T media interface XXX" 269#define MII_STR_BROADCOM2_BCM5756 "BCM5756 1000BASE-T media interface XXX"
273#define MII_MODEL_BROADCOM2_BCM5754 0x000e 270#define MII_MODEL_BROADCOM2_BCM5754 0x000e
274#define MII_STR_BROADCOM2_BCM5754 "BCM5754/5787 1000BASE-T media interface" 271#define MII_STR_BROADCOM2_BCM5754 "BCM5754/5787 1000BASE-T media interface"
275#define MII_MODEL_BROADCOM2_BCM5708S 0x0015 272#define MII_MODEL_BROADCOM2_BCM5708S 0x0015
276#define MII_STR_BROADCOM2_BCM5708S "BCM5708S 1000/2500baseSX PHY" 273#define MII_STR_BROADCOM2_BCM5708S "BCM5708S 1000/2500baseSX PHY"
277#define MII_MODEL_BROADCOM2_BCM5785 0x0016 274#define MII_MODEL_BROADCOM2_BCM5785 0x0016
278#define MII_STR_BROADCOM2_BCM5785 "BCM5785 1000BASE-T media interface" 275#define MII_STR_BROADCOM2_BCM5785 "BCM5785 1000BASE-T media interface"
279#define MII_MODEL_BROADCOM2_BCM5709CAX 0x002c 276#define MII_MODEL_BROADCOM2_BCM5709CAX 0x002c
280#define MII_STR_BROADCOM2_BCM5709CAX "BCM5709CAX 10/100/1000baseT PHY" 277#define MII_STR_BROADCOM2_BCM5709CAX "BCM5709CAX 10/100/1000baseT PHY"
281#define MII_MODEL_BROADCOM2_BCM5722 0x002d 278#define MII_MODEL_BROADCOM2_BCM5722 0x002d
282#define MII_STR_BROADCOM2_BCM5722 "BCM5722 1000BASE-T media interface" 279#define MII_STR_BROADCOM2_BCM5722 "BCM5722 1000BASE-T media interface"
283#define MII_MODEL_BROADCOM2_BCM5784 0x003a 280#define MII_MODEL_BROADCOM2_BCM5784 0x003a
284#define MII_STR_BROADCOM2_BCM5784 "BCM5784 10/100/1000baseT PHY" 281#define MII_STR_BROADCOM2_BCM5784 "BCM5784 10/100/1000baseT PHY"
285#define MII_MODEL_BROADCOM2_BCM5709C 0x003c 282#define MII_MODEL_BROADCOM2_BCM5709C 0x003c
286#define MII_STR_BROADCOM2_BCM5709C "BCM5709 10/100/1000baseT PHY" 283#define MII_STR_BROADCOM2_BCM5709C "BCM5709 10/100/1000baseT PHY"
287#define MII_MODEL_BROADCOM2_BCM5761 0x003d 284#define MII_MODEL_BROADCOM2_BCM5761 0x003d
288#define MII_STR_BROADCOM2_BCM5761 "BCM5761 10/100/1000baseT PHY" 285#define MII_STR_BROADCOM2_BCM5761 "BCM5761 10/100/1000baseT PHY"
289#define MII_MODEL_BROADCOM2_BCM5709S 0x003f 286#define MII_MODEL_BROADCOM2_BCM5709S 0x003f
290#define MII_STR_BROADCOM2_BCM5709S "BCM5709S 1000/2500baseSX PHY" 287#define MII_STR_BROADCOM2_BCM5709S "BCM5709S 1000/2500baseSX PHY"
291#define MII_MODEL_BROADCOM3_BCM57780 0x0019 288#define MII_MODEL_BROADCOM3_BCM57780 0x0019
292#define MII_STR_BROADCOM3_BCM57780 "BCM57780 1000BASE-T media interface" 289#define MII_STR_BROADCOM3_BCM57780 "BCM57780 1000BASE-T media interface"
293#define MII_MODEL_BROADCOM3_BCM5717C 0x0020 290#define MII_MODEL_BROADCOM3_BCM5717C 0x0020
294#define MII_STR_BROADCOM3_BCM5717C "BCM5717C 1000BASE-T media interface" 291#define MII_STR_BROADCOM3_BCM5717C "BCM5717C 1000BASE-T media interface"
295#define MII_MODEL_BROADCOM3_BCM5719C 0x0022 292#define MII_MODEL_BROADCOM3_BCM5719C 0x0022
296#define MII_STR_BROADCOM3_BCM5719C "BCM5719C 1000BASE-T media interface" 293#define MII_STR_BROADCOM3_BCM5719C "BCM5719C 1000BASE-T media interface"
297#define MII_MODEL_BROADCOM3_BCM57765 0x0024 294#define MII_MODEL_BROADCOM3_BCM57765 0x0024
298#define MII_STR_BROADCOM3_BCM57765 "BCM57765 1000BASE-T media interface" 295#define MII_STR_BROADCOM3_BCM57765 "BCM57765 1000BASE-T media interface"
299#define MII_MODEL_BROADCOM3_BCM53125 0x0032 296#define MII_MODEL_BROADCOM3_BCM53125 0x0032
300#define MII_STR_BROADCOM3_BCM53125 "BCM53125 1000BASE-T switch" 297#define MII_STR_BROADCOM3_BCM53125 "BCM53125 1000BASE-T switch"
301#define MII_MODEL_BROADCOM3_BCM5720C 0x0036 298#define MII_MODEL_BROADCOM3_BCM5720C 0x0036
302#define MII_STR_BROADCOM3_BCM5720C "BCM5720C 1000BASE-T media interface" 299#define MII_STR_BROADCOM3_BCM5720C "BCM5720C 1000BASE-T media interface"
 300#define MII_MODEL_BROADCOM4_BCM54213PE 0x000a
 301#define MII_STR_BROADCOM4_BCM54213PE "BCM54213PE 1000BASE-T media interface"
303#define MII_MODEL_BROADCOM4_BCM5725C 0x0038 302#define MII_MODEL_BROADCOM4_BCM5725C 0x0038
304#define MII_STR_BROADCOM4_BCM5725C "BCM5725C 1000BASE-T media interface" 303#define MII_STR_BROADCOM4_BCM5725C "BCM5725C 1000BASE-T media interface"
305#define MII_MODEL_xxBROADCOM_ALT1_BCM5906 0x0004 304#define MII_MODEL_xxBROADCOM_ALT1_BCM5906 0x0004
306#define MII_STR_xxBROADCOM_ALT1_BCM5906 "BCM5906 10/100baseTX media interface" 305#define MII_STR_xxBROADCOM_ALT1_BCM5906 "BCM5906 10/100baseTX media interface"
307 306
308/* Cicada Semiconductor PHYs (-> Vitesse -> Microsemi) */ 307/* Cicada Semiconductor PHYs (-> Vitesse -> Microsemi) */
309 308
310#define MII_MODEL_xxCICADA_CIS8201 0x0001 309#define MII_MODEL_xxCICADA_CIS8201 0x0001
311#define MII_STR_xxCICADA_CIS8201 "Cicada CIS8201 10/100/1000TX PHY" 310#define MII_STR_xxCICADA_CIS8201 "Cicada CIS8201 10/100/1000TX PHY"
312#define MII_MODEL_xxCICADA_CIS8204 0x0004 311#define MII_MODEL_xxCICADA_CIS8204 0x0004
313#define MII_STR_xxCICADA_CIS8204 "Cicada CIS8204 10/100/1000TX PHY" 312#define MII_STR_xxCICADA_CIS8204 "Cicada CIS8204 10/100/1000TX PHY"
314#define MII_MODEL_xxCICADA_VSC8211 0x000b 313#define MII_MODEL_xxCICADA_VSC8211 0x000b
315#define MII_STR_xxCICADA_VSC8211 "Cicada VSC8211 10/100/1000TX PHY" 314#define MII_STR_xxCICADA_VSC8211 "Cicada VSC8211 10/100/1000TX PHY"
316#define MII_MODEL_xxCICADA_VSC8221 0x0015 315#define MII_MODEL_xxCICADA_VSC8221 0x0015
317#define MII_STR_xxCICADA_VSC8221 "Vitesse VSC8221 10/100/1000BASE-T PHY" 316#define MII_STR_xxCICADA_VSC8221 "Vitesse VSC8221 10/100/1000BASE-T PHY"
318#define MII_MODEL_xxCICADA_VSC8224 0x0018 317#define MII_MODEL_xxCICADA_VSC8224 0x0018
319#define MII_STR_xxCICADA_VSC8224 "Vitesse VSC8224 10/100/1000BASE-T PHY" 318#define MII_STR_xxCICADA_VSC8224 "Vitesse VSC8224 10/100/1000BASE-T PHY"
320#define MII_MODEL_xxCICADA_CIS8201A 0x0020 319#define MII_MODEL_xxCICADA_CIS8201A 0x0020
321#define MII_STR_xxCICADA_CIS8201A "Cicada CIS8201 10/100/1000TX PHY" 320#define MII_STR_xxCICADA_CIS8201A "Cicada CIS8201 10/100/1000TX PHY"
322#define MII_MODEL_xxCICADA_CIS8201B 0x0021 321#define MII_MODEL_xxCICADA_CIS8201B 0x0021
323#define MII_STR_xxCICADA_CIS8201B "Cicada CIS8201 10/100/1000TX PHY" 322#define MII_STR_xxCICADA_CIS8201B "Cicada CIS8201 10/100/1000TX PHY"
324#define MII_MODEL_xxCICADA_VSC8234 0x0022 323#define MII_MODEL_xxCICADA_VSC8234 0x0022
325#define MII_STR_xxCICADA_VSC8234 "Vitesse VSC8234 10/100/1000TX PHY" 324#define MII_STR_xxCICADA_VSC8234 "Vitesse VSC8234 10/100/1000TX PHY"
326#define MII_MODEL_xxCICADA_VSC8244 0x002c 325#define MII_MODEL_xxCICADA_VSC8244 0x002c
327#define MII_STR_xxCICADA_VSC8244 "Vitesse VSC8244 Quad 10/100/1000BASE-T PHY" 326#define MII_STR_xxCICADA_VSC8244 "Vitesse VSC8244 Quad 10/100/1000BASE-T PHY"
328 327
329/* Davicom Semiconductor PHYs */ 328/* Davicom Semiconductor PHYs */
330/* AMD Am79C873 seems to be a relabeled DM9101 */ 329/* AMD Am79C873 seems to be a relabeled DM9101 */
331#define MII_MODEL_DAVICOM_DM9101 0x0000 330#define MII_MODEL_DAVICOM_DM9101 0x0000
332#define MII_STR_DAVICOM_DM9101 "DM9101 (AMD Am79C873) 10/100 media interface" 331#define MII_STR_DAVICOM_DM9101 "DM9101 (AMD Am79C873) 10/100 media interface"
333#define MII_MODEL_xxDAVICOM_DM9101 0x0000 332#define MII_MODEL_xxDAVICOM_DM9101 0x0000
334#define MII_STR_xxDAVICOM_DM9101 "DM9101 (AMD Am79C873) 10/100 media interface" 333#define MII_STR_xxDAVICOM_DM9101 "DM9101 (AMD Am79C873) 10/100 media interface"
335#define MII_MODEL_xxDAVICOM_DM9102 0x0004 334#define MII_MODEL_xxDAVICOM_DM9102 0x0004
336#define MII_STR_xxDAVICOM_DM9102 "DM9102 10/100 media interface" 335#define MII_STR_xxDAVICOM_DM9102 "DM9102 10/100 media interface"
337#define MII_MODEL_xxDAVICOM_DM9161 0x0008 336#define MII_MODEL_xxDAVICOM_DM9161 0x0008
338#define MII_STR_xxDAVICOM_DM9161 "DM9161 10/100 media interface" 337#define MII_STR_xxDAVICOM_DM9161 "DM9161 10/100 media interface"
339#define MII_MODEL_xxDAVICOM_DM9161A 0x000a 338#define MII_MODEL_xxDAVICOM_DM9161A 0x000a
340#define MII_STR_xxDAVICOM_DM9161A "DM9161A 10/100 media interface" 339#define MII_STR_xxDAVICOM_DM9161A "DM9161A 10/100 media interface"
341#define MII_MODEL_xxDAVICOM_DM9161B 0x000b 340#define MII_MODEL_xxDAVICOM_DM9161B 0x000b
342#define MII_STR_xxDAVICOM_DM9161B "DM9161[BC] 10/100 media interface" 341#define MII_STR_xxDAVICOM_DM9161B "DM9161[BC] 10/100 media interface"
343#define MII_MODEL_xxDAVICOM_DM9601 0x000c 342#define MII_MODEL_xxDAVICOM_DM9601 0x000c
344#define MII_STR_xxDAVICOM_DM9601 "DM9601 internal 10/100 media interface" 343#define MII_STR_xxDAVICOM_DM9601 "DM9601 internal 10/100 media interface"
345 344
346/* IC Plus Corp. PHYs */ 345/* IC Plus Corp. PHYs */
347#define MII_MODEL_xxICPLUS_IP100 0x0004 346#define MII_MODEL_xxICPLUS_IP100 0x0004
348#define MII_STR_xxICPLUS_IP100 "IP100 10/100 PHY" 347#define MII_STR_xxICPLUS_IP100 "IP100 10/100 PHY"
349#define MII_MODEL_xxICPLUS_IP101 0x0005 348#define MII_MODEL_xxICPLUS_IP101 0x0005
350#define MII_STR_xxICPLUS_IP101 "IP101 10/100 PHY" 349#define MII_STR_xxICPLUS_IP101 "IP101 10/100 PHY"
351#define MII_MODEL_xxICPLUS_IP1000A 0x0008 350#define MII_MODEL_xxICPLUS_IP1000A 0x0008
352#define MII_STR_xxICPLUS_IP1000A "IP1000A 10/100/1000 PHY" 351#define MII_STR_xxICPLUS_IP1000A "IP1000A 10/100/1000 PHY"
353#define MII_MODEL_xxICPLUS_IP1001 0x0019 352#define MII_MODEL_xxICPLUS_IP1001 0x0019
354#define MII_STR_xxICPLUS_IP1001 "IP1001 10/100/1000 PHY" 353#define MII_STR_xxICPLUS_IP1001 "IP1001 10/100/1000 PHY"
355 354
356/* Integrated Circuit Systems PHYs */ 355/* Integrated Circuit Systems PHYs */
357#define MII_MODEL_ICS_1889 0x0001 356#define MII_MODEL_ICS_1889 0x0001
358#define MII_STR_ICS_1889 "ICS1889 10/100 media interface" 357#define MII_STR_ICS_1889 "ICS1889 10/100 media interface"
359#define MII_MODEL_ICS_1890 0x0002 358#define MII_MODEL_ICS_1890 0x0002
360#define MII_STR_ICS_1890 "ICS1890 10/100 media interface" 359#define MII_STR_ICS_1890 "ICS1890 10/100 media interface"
361#define MII_MODEL_ICS_1892 0x0003 360#define MII_MODEL_ICS_1892 0x0003
362#define MII_STR_ICS_1892 "ICS1892 10/100 media interface" 361#define MII_STR_ICS_1892 "ICS1892 10/100 media interface"
363#define MII_MODEL_ICS_1893 0x0004 362#define MII_MODEL_ICS_1893 0x0004
364#define MII_STR_ICS_1893 "ICS1893 10/100 media interface" 363#define MII_STR_ICS_1893 "ICS1893 10/100 media interface"
365#define MII_MODEL_ICS_1893C 0x0005 364#define MII_MODEL_ICS_1893C 0x0005
366#define MII_STR_ICS_1893C "ICS1893C 10/100 media interface" 365#define MII_STR_ICS_1893C "ICS1893C 10/100 media interface"
367 366
368/* Intel PHYs */ 367/* Intel PHYs */
369#define MII_MODEL_xxINTEL_I82553 0x0000 368#define MII_MODEL_xxINTEL_I82553 0x0000
370#define MII_STR_xxINTEL_I82553 "i82553 10/100 media interface" 369#define MII_STR_xxINTEL_I82553 "i82553 10/100 media interface"
371#define MII_MODEL_yyINTEL_I82555 0x0015 370#define MII_MODEL_yyINTEL_I82555 0x0015
372#define MII_STR_yyINTEL_I82555 "i82555 10/100 media interface" 371#define MII_STR_yyINTEL_I82555 "i82555 10/100 media interface"
373#define MII_MODEL_yyINTEL_I82562EH 0x0017 372#define MII_MODEL_yyINTEL_I82562EH 0x0017
374#define MII_STR_yyINTEL_I82562EH "i82562EH HomePNA interface" 373#define MII_STR_yyINTEL_I82562EH "i82562EH HomePNA interface"
375#define MII_MODEL_yyINTEL_I82562G 0x0031 374#define MII_MODEL_yyINTEL_I82562G 0x0031
376#define MII_STR_yyINTEL_I82562G "i82562G 10/100 media interface" 375#define MII_STR_yyINTEL_I82562G "i82562G 10/100 media interface"
377#define MII_MODEL_yyINTEL_I82562EM 0x0032 376#define MII_MODEL_yyINTEL_I82562EM 0x0032
378#define MII_STR_yyINTEL_I82562EM "i82562EM 10/100 media interface" 377#define MII_STR_yyINTEL_I82562EM "i82562EM 10/100 media interface"
379#define MII_MODEL_yyINTEL_I82562ET 0x0033 378#define MII_MODEL_yyINTEL_I82562ET 0x0033
380#define MII_STR_yyINTEL_I82562ET "i82562ET 10/100 media interface" 379#define MII_STR_yyINTEL_I82562ET "i82562ET 10/100 media interface"
381#define MII_MODEL_yyINTEL_I82553 0x0035 380#define MII_MODEL_yyINTEL_I82553 0x0035
382#define MII_STR_yyINTEL_I82553 "i82553 10/100 media interface" 381#define MII_STR_yyINTEL_I82553 "i82553 10/100 media interface"
383#define MII_MODEL_yyINTEL_IGP01E1000 0x0038 382#define MII_MODEL_yyINTEL_IGP01E1000 0x0038
384#define MII_STR_yyINTEL_IGP01E1000 "Intel IGP01E1000 Gigabit PHY" 383#define MII_STR_yyINTEL_IGP01E1000 "Intel IGP01E1000 Gigabit PHY"
385#define MII_MODEL_yyINTEL_I82566 0x0039 384#define MII_MODEL_yyINTEL_I82566 0x0039
386#define MII_STR_yyINTEL_I82566 "i82566 10/100/1000 media interface" 385#define MII_STR_yyINTEL_I82566 "i82566 10/100/1000 media interface"
387#define MII_MODEL_INTEL_I82577 0x0005 386#define MII_MODEL_INTEL_I82577 0x0005
388#define MII_STR_INTEL_I82577 "i82577 10/100/1000 media interface" 387#define MII_STR_INTEL_I82577 "i82577 10/100/1000 media interface"
389#define MII_MODEL_INTEL_I82579 0x0009 388#define MII_MODEL_INTEL_I82579 0x0009
390#define MII_STR_INTEL_I82579 "i82579 10/100/1000 media interface" 389#define MII_STR_INTEL_I82579 "i82579 10/100/1000 media interface"
391#define MII_MODEL_INTEL_I217 0x000a 390#define MII_MODEL_INTEL_I217 0x000a
392#define MII_STR_INTEL_I217 "i217 10/100/1000 media interface" 391#define MII_STR_INTEL_I217 "i217 10/100/1000 media interface"
393#define MII_MODEL_INTEL_X540 0x0020 392#define MII_MODEL_INTEL_X540 0x0020
394#define MII_STR_INTEL_X540 "X540 100M/1G/10G media interface" 393#define MII_STR_INTEL_X540 "X540 100M/1G/10G media interface"
395#define MII_MODEL_INTEL_X550 0x0022 394#define MII_MODEL_INTEL_X550 0x0022
396#define MII_STR_INTEL_X550 "X550 100M/1G/10G media interface" 395#define MII_STR_INTEL_X550 "X550 100M/1G/10G media interface"
397#define MII_MODEL_INTEL_X557 0x0024 396#define MII_MODEL_INTEL_X557 0x0024
398#define MII_STR_INTEL_X557 "X557 100M/1G/10G media interface" 397#define MII_STR_INTEL_X557 "X557 100M/1G/10G media interface"
399#define MII_MODEL_INTEL_I82580 0x003a 398#define MII_MODEL_INTEL_I82580 0x003a
400#define MII_STR_INTEL_I82580 "82580 10/100/1000 media interface" 399#define MII_STR_INTEL_I82580 "82580 10/100/1000 media interface"
401#define MII_MODEL_INTEL_I350 0x003b 400#define MII_MODEL_INTEL_I350 0x003b
402#define MII_STR_INTEL_I350 "I350 10/100/1000 media interface" 401#define MII_STR_INTEL_I350 "I350 10/100/1000 media interface"
403#define MII_MODEL_xxMARVELL_I210 0x0000 402#define MII_MODEL_xxMARVELL_I210 0x0000
404#define MII_STR_xxMARVELL_I210 "I210 10/100/1000 media interface" 403#define MII_STR_xxMARVELL_I210 "I210 10/100/1000 media interface"
405#define MII_MODEL_xxMARVELL_I82563 0x000a 404#define MII_MODEL_xxMARVELL_I82563 0x000a
406#define MII_STR_xxMARVELL_I82563 "i82563 10/100/1000 media interface" 405#define MII_STR_xxMARVELL_I82563 "i82563 10/100/1000 media interface"
407#define MII_MODEL_ATTANSIC_I82578 0x0004 406#define MII_MODEL_ATTANSIC_I82578 0x0004
408#define MII_STR_ATTANSIC_I82578 "Intel 82578 10/100/1000 media interface" 407#define MII_STR_ATTANSIC_I82578 "Intel 82578 10/100/1000 media interface"
409 408
410 409
411/* JMicron PHYs */ 410/* JMicron PHYs */
412#define MII_MODEL_JMICRON_JMP211 0x0021 411#define MII_MODEL_JMICRON_JMP211 0x0021
413#define MII_STR_JMICRON_JMP211 "JMP211 10/100/1000 media interface" 412#define MII_STR_JMICRON_JMP211 "JMP211 10/100/1000 media interface"
414#define MII_MODEL_JMICRON_JMP202 0x0022 413#define MII_MODEL_JMICRON_JMP202 0x0022
415#define MII_STR_JMICRON_JMP202 "JMP202 10/100 media interface" 414#define MII_STR_JMICRON_JMP202 "JMP202 10/100 media interface"
416 415
417/* Level 1 PHYs */ 416/* Level 1 PHYs */
418#define MII_MODEL_xxLEVEL1_LXT970 0x0000 417#define MII_MODEL_xxLEVEL1_LXT970 0x0000
419#define MII_STR_xxLEVEL1_LXT970 "LXT970 10/100 media interface" 418#define MII_STR_xxLEVEL1_LXT970 "LXT970 10/100 media interface"
420#define MII_MODEL_LEVEL1_LXT1000_OLD 0x0003 419#define MII_MODEL_LEVEL1_LXT1000_OLD 0x0003
421#define MII_STR_LEVEL1_LXT1000_OLD "LXT1000 1000BASE-T media interface" 420#define MII_STR_LEVEL1_LXT1000_OLD "LXT1000 1000BASE-T media interface"
422#define MII_MODEL_LEVEL1_LXT974 0x0004 421#define MII_MODEL_LEVEL1_LXT974 0x0004
423#define MII_STR_LEVEL1_LXT974 "LXT974 10/100 Quad PHY" 422#define MII_STR_LEVEL1_LXT974 "LXT974 10/100 Quad PHY"
424#define MII_MODEL_LEVEL1_LXT975 0x0005 423#define MII_MODEL_LEVEL1_LXT975 0x0005
425#define MII_STR_LEVEL1_LXT975 "LXT975 10/100 Quad PHY" 424#define MII_STR_LEVEL1_LXT975 "LXT975 10/100 Quad PHY"
426#define MII_MODEL_LEVEL1_LXT1000 0x000c 425#define MII_MODEL_LEVEL1_LXT1000 0x000c
427#define MII_STR_LEVEL1_LXT1000 "LXT1000 1000BASE-T media interface" 426#define MII_STR_LEVEL1_LXT1000 "LXT1000 1000BASE-T media interface"
428#define MII_MODEL_LEVEL1_LXT971 0x000e 427#define MII_MODEL_LEVEL1_LXT971 0x000e
429#define MII_STR_LEVEL1_LXT971 "LXT971/2 10/100 media interface" 428#define MII_STR_LEVEL1_LXT971 "LXT971/2 10/100 media interface"
430#define MII_MODEL_LEVEL1_LXT973 0x0021 429#define MII_MODEL_LEVEL1_LXT973 0x0021
431#define MII_STR_LEVEL1_LXT973 "LXT973 10/100 Dual PHY" 430#define MII_STR_LEVEL1_LXT973 "LXT973 10/100 Dual PHY"
432 431
433/* Marvell Semiconductor PHYs */ 432/* Marvell Semiconductor PHYs */
434#define MII_MODEL_xxMARVELL_E1000 0x0000 433#define MII_MODEL_xxMARVELL_E1000 0x0000
435#define MII_STR_xxMARVELL_E1000 "Marvell 88E1000 Gigabit PHY" 434#define MII_STR_xxMARVELL_E1000 "Marvell 88E1000 Gigabit PHY"
436#define MII_MODEL_xxMARVELL_E1011 0x0002 435#define MII_MODEL_xxMARVELL_E1011 0x0002
437#define MII_STR_xxMARVELL_E1011 "Marvell 88E1011 Gigabit PHY" 436#define MII_STR_xxMARVELL_E1011 "Marvell 88E1011 Gigabit PHY"
438#define MII_MODEL_xxMARVELL_E1000_3 0x0003 437#define MII_MODEL_xxMARVELL_E1000_3 0x0003
439#define MII_STR_xxMARVELL_E1000_3 "Marvell 88E1000 Gigabit PHY" 438#define MII_STR_xxMARVELL_E1000_3 "Marvell 88E1000 Gigabit PHY"
440#define MII_MODEL_xxMARVELL_E1000S 0x0004 439#define MII_MODEL_xxMARVELL_E1000S 0x0004
441#define MII_STR_xxMARVELL_E1000S "Marvell 88E1000S Gigabit PHY" 440#define MII_STR_xxMARVELL_E1000S "Marvell 88E1000S Gigabit PHY"
442#define MII_MODEL_xxMARVELL_E1000_5 0x0005 441#define MII_MODEL_xxMARVELL_E1000_5 0x0005
443#define MII_STR_xxMARVELL_E1000_5 "Marvell 88E1000 Gigabit PHY" 442#define MII_STR_xxMARVELL_E1000_5 "Marvell 88E1000 Gigabit PHY"
444#define MII_MODEL_xxMARVELL_E1101 0x0006 443#define MII_MODEL_xxMARVELL_E1101 0x0006
445#define MII_STR_xxMARVELL_E1101 "Marvell 88E1101 Gigabit PHY" 444#define MII_STR_xxMARVELL_E1101 "Marvell 88E1101 Gigabit PHY"
446#define MII_MODEL_xxMARVELL_E3082 0x0008 445#define MII_MODEL_xxMARVELL_E3082 0x0008
447#define MII_STR_xxMARVELL_E3082 "Marvell 88E3082 10/100 Fast Ethernet PHY" 446#define MII_STR_xxMARVELL_E3082 "Marvell 88E3082 10/100 Fast Ethernet PHY"
448#define MII_MODEL_xxMARVELL_E1112 0x0009 447#define MII_MODEL_xxMARVELL_E1112 0x0009
449#define MII_STR_xxMARVELL_E1112 "Marvell 88E1112 Gigabit PHY" 448#define MII_STR_xxMARVELL_E1112 "Marvell 88E1112 Gigabit PHY"
450#define MII_MODEL_xxMARVELL_E1149 0x000b 449#define MII_MODEL_xxMARVELL_E1149 0x000b
451#define MII_STR_xxMARVELL_E1149 "Marvell 88E1149 Gigabit PHY" 450#define MII_STR_xxMARVELL_E1149 "Marvell 88E1149 Gigabit PHY"
452#define MII_MODEL_xxMARVELL_E1111 0x000c 451#define MII_MODEL_xxMARVELL_E1111 0x000c
453#define MII_STR_xxMARVELL_E1111 "Marvell 88E1111 Gigabit PHY" 452#define MII_STR_xxMARVELL_E1111 "Marvell 88E1111 Gigabit PHY"
454#define MII_MODEL_xxMARVELL_E1145 0x000d 453#define MII_MODEL_xxMARVELL_E1145 0x000d
455#define MII_STR_xxMARVELL_E1145 "Marvell 88E1145 Quad Gigabit PHY" 454#define MII_STR_xxMARVELL_E1145 "Marvell 88E1145 Quad Gigabit PHY"
456#define MII_MODEL_xxMARVELL_E6060 0x0010 455#define MII_MODEL_xxMARVELL_E6060 0x0010
457#define MII_STR_xxMARVELL_E6060 "Marvell 88E6060 6-Port 10/100 Fast Ethernet Switch" 456#define MII_STR_xxMARVELL_E6060 "Marvell 88E6060 6-Port 10/100 Fast Ethernet Switch"
458#define MII_MODEL_xxMARVELL_I347 0x001c 457#define MII_MODEL_xxMARVELL_I347 0x001c
459#define MII_STR_xxMARVELL_I347 "Intel I347-AT4 Gigabit PHY" 458#define MII_STR_xxMARVELL_I347 "Intel I347-AT4 Gigabit PHY"
460#define MII_MODEL_xxMARVELL_E1512 0x001d 459#define MII_MODEL_xxMARVELL_E1512 0x001d
461#define MII_STR_xxMARVELL_E1512 "Marvell 88E151[0248] Gigabit PHY" 460#define MII_STR_xxMARVELL_E1512 "Marvell 88E151[0248] Gigabit PHY"
462#define MII_MODEL_xxMARVELL_E1340M 0x001f 461#define MII_MODEL_xxMARVELL_E1340M 0x001f
463#define MII_STR_xxMARVELL_E1340M "Marvell 88E1340 Gigabit PHY" 462#define MII_STR_xxMARVELL_E1340M "Marvell 88E1340 Gigabit PHY"
464#define MII_MODEL_xxMARVELL_E1116 0x0021 463#define MII_MODEL_xxMARVELL_E1116 0x0021
465#define MII_STR_xxMARVELL_E1116 "Marvell 88E1116 Gigabit PHY" 464#define MII_STR_xxMARVELL_E1116 "Marvell 88E1116 Gigabit PHY"
466#define MII_MODEL_xxMARVELL_E1118 0x0022 465#define MII_MODEL_xxMARVELL_E1118 0x0022
467#define MII_STR_xxMARVELL_E1118 "Marvell 88E1118 Gigabit PHY" 466#define MII_STR_xxMARVELL_E1118 "Marvell 88E1118 Gigabit PHY"
468#define MII_MODEL_xxMARVELL_E1240 0x0023 467#define MII_MODEL_xxMARVELL_E1240 0x0023
469#define MII_STR_xxMARVELL_E1240 "Marvell 88E1240 Gigabit PHY" 468#define MII_STR_xxMARVELL_E1240 "Marvell 88E1240 Gigabit PHY"
470#define MII_MODEL_xxMARVELL_E1116R 0x0024 469#define MII_MODEL_xxMARVELL_E1116R 0x0024
471#define MII_STR_xxMARVELL_E1116R "Marvell 88E1116R Gigabit PHY" 470#define MII_STR_xxMARVELL_E1116R "Marvell 88E1116R Gigabit PHY"
472#define MII_MODEL_xxMARVELL_E1149R 0x0025 471#define MII_MODEL_xxMARVELL_E1149R 0x0025
473#define MII_STR_xxMARVELL_E1149R "Marvell 88E1149R Quad Gigabit PHY" 472#define MII_STR_xxMARVELL_E1149R "Marvell 88E1149R Quad Gigabit PHY"
474#define MII_MODEL_xxMARVELL_E3016 0x0026 473#define MII_MODEL_xxMARVELL_E3016 0x0026
475#define MII_STR_xxMARVELL_E3016 "Marvell 88E3016 10/100 Fast Ethernet PHY" 474#define MII_STR_xxMARVELL_E3016 "Marvell 88E3016 10/100 Fast Ethernet PHY"
476#define MII_MODEL_xxMARVELL_PHYG65G 0x0027 475#define MII_MODEL_xxMARVELL_PHYG65G 0x0027
477#define MII_STR_xxMARVELL_PHYG65G "Marvell PHYG65G Gigabit PHY" 476#define MII_STR_xxMARVELL_PHYG65G "Marvell PHYG65G Gigabit PHY"
478#define MII_MODEL_xxMARVELL_E1318S 0x0029 477#define MII_MODEL_xxMARVELL_E1318S 0x0029
479#define MII_STR_xxMARVELL_E1318S "Marvell 88E1318S Gigabit PHY" 478#define MII_STR_xxMARVELL_E1318S "Marvell 88E1318S Gigabit PHY"
480#define MII_MODEL_xxMARVELL_E1543 0x002a 479#define MII_MODEL_xxMARVELL_E1543 0x002a
481#define MII_STR_xxMARVELL_E1543 "Marvell 88E154[358] Alaska Quad Port Gb PHY" 480#define MII_STR_xxMARVELL_E1543 "Marvell 88E154[358] Alaska Quad Port Gb PHY"
482#define MII_MODEL_MARVELL_E1000_0 0x0000 481#define MII_MODEL_MARVELL_E1000_0 0x0000
483#define MII_STR_MARVELL_E1000_0 "Marvell 88E1000 Gigabit PHY" 482#define MII_STR_MARVELL_E1000_0 "Marvell 88E1000 Gigabit PHY"
484#define MII_MODEL_MARVELL_E1011 0x0002 483#define MII_MODEL_MARVELL_E1011 0x0002
485#define MII_STR_MARVELL_E1011 "Marvell 88E1011 Gigabit PHY" 484#define MII_STR_MARVELL_E1011 "Marvell 88E1011 Gigabit PHY"
486#define MII_MODEL_MARVELL_E1000_3 0x0003 485#define MII_MODEL_MARVELL_E1000_3 0x0003
487#define MII_STR_MARVELL_E1000_3 "Marvell 88E1000 Gigabit PHY" 486#define MII_STR_MARVELL_E1000_3 "Marvell 88E1000 Gigabit PHY"
488#define MII_MODEL_MARVELL_E1000_5 0x0005 487#define MII_MODEL_MARVELL_E1000_5 0x0005
489#define MII_STR_MARVELL_E1000_5 "Marvell 88E1000 Gigabit PHY" 488#define MII_STR_MARVELL_E1000_5 "Marvell 88E1000 Gigabit PHY"
490#define MII_MODEL_MARVELL_E1000_6 0x0006 489#define MII_MODEL_MARVELL_E1000_6 0x0006
491#define MII_STR_MARVELL_E1000_6 "Marvell 88E1000 Gigabit PHY" 490#define MII_STR_MARVELL_E1000_6 "Marvell 88E1000 Gigabit PHY"
492#define MII_MODEL_MARVELL_E1111 0x000c 491#define MII_MODEL_MARVELL_E1111 0x000c
493#define MII_STR_MARVELL_E1111 "Marvell 88E1111 Gigabit PHY" 492#define MII_STR_MARVELL_E1111 "Marvell 88E1111 Gigabit PHY"
494 493
495/* Micrel PHYs */ 494/* Micrel PHYs */
496#define MII_MODEL_MICREL_KSZ8081 0x0016 495#define MII_MODEL_MICREL_KSZ8081 0x0016
497#define MII_STR_MICREL_KSZ8081 "Micrel KSZ8081 10/100 PHY" 496#define MII_STR_MICREL_KSZ8081 "Micrel KSZ8081 10/100 PHY"
498#define MII_MODEL_MICREL_KSZ9021RNI 0x0021 497#define MII_MODEL_MICREL_KSZ9021RNI 0x0021
499#define MII_STR_MICREL_KSZ9021RNI "Micrel KSZ9021RNI 10/100/1000 PHY" 498#define MII_STR_MICREL_KSZ9021RNI "Micrel KSZ9021RNI 10/100/1000 PHY"
500#define MII_MODEL_MICREL_KSZ9031 0x0022 499#define MII_MODEL_MICREL_KSZ9031 0x0022
501#define MII_STR_MICREL_KSZ9031 "Micrel KSZ9031 10/100/1000 PHY" 500#define MII_STR_MICREL_KSZ9031 "Micrel KSZ9031 10/100/1000 PHY"
502 501
503/* Myson Technology PHYs */ 502/* Myson Technology PHYs */
504#define MII_MODEL_xxMYSON_MTD972 0x0000 503#define MII_MODEL_xxMYSON_MTD972 0x0000
505#define MII_STR_xxMYSON_MTD972 "MTD972 10/100 media interface" 504#define MII_STR_xxMYSON_MTD972 "MTD972 10/100 media interface"
506#define MII_MODEL_MYSON_MTD803 0x0000 505#define MII_MODEL_MYSON_MTD803 0x0000
507#define MII_STR_MYSON_MTD803 "MTD803 3-in-1 media interface" 506#define MII_STR_MYSON_MTD803 "MTD803 3-in-1 media interface"
508 507
509/* National Semiconductor PHYs */ 508/* National Semiconductor PHYs */
510#define MII_MODEL_xxNATSEMI_DP83840 0x0000 509#define MII_MODEL_xxNATSEMI_DP83840 0x0000
511#define MII_STR_xxNATSEMI_DP83840 "DP83840 10/100 media interface" 510#define MII_STR_xxNATSEMI_DP83840 "DP83840 10/100 media interface"
512#define MII_MODEL_xxNATSEMI_DP83843 0x0001 511#define MII_MODEL_xxNATSEMI_DP83843 0x0001
513#define MII_STR_xxNATSEMI_DP83843 "DP83843 10/100 media interface" 512#define MII_STR_xxNATSEMI_DP83843 "DP83843 10/100 media interface"
514#define MII_MODEL_xxNATSEMI_DP83815 0x0002 513#define MII_MODEL_xxNATSEMI_DP83815 0x0002
515#define MII_STR_xxNATSEMI_DP83815 "DP83815/DP83846A 10/100 media interface" 514#define MII_STR_xxNATSEMI_DP83815 "DP83815/DP83846A 10/100 media interface"
516#define MII_MODEL_xxNATSEMI_DP83847 0x0003 515#define MII_MODEL_xxNATSEMI_DP83847 0x0003
517#define MII_STR_xxNATSEMI_DP83847 "DP83847 10/100 media interface" 516#define MII_STR_xxNATSEMI_DP83847 "DP83847 10/100 media interface"
518#define MII_MODEL_xxNATSEMI_DP83891 0x0005 517#define MII_MODEL_xxNATSEMI_DP83891 0x0005
519#define MII_STR_xxNATSEMI_DP83891 "DP83891 1000BASE-T media interface" 518#define MII_STR_xxNATSEMI_DP83891 "DP83891 1000BASE-T media interface"
520#define MII_MODEL_xxNATSEMI_DP83861 0x0006 519#define MII_MODEL_xxNATSEMI_DP83861 0x0006
521#define MII_STR_xxNATSEMI_DP83861 "DP83861 1000BASE-T media interface" 520#define MII_STR_xxNATSEMI_DP83861 "DP83861 1000BASE-T media interface"
522#define MII_MODEL_xxNATSEMI_DP83865 0x0007 521#define MII_MODEL_xxNATSEMI_DP83865 0x0007
523#define MII_STR_xxNATSEMI_DP83865 "DP83865 1000BASE-T media interface" 522#define MII_STR_xxNATSEMI_DP83865 "DP83865 1000BASE-T media interface"
524#define MII_MODEL_xxNATSEMI_DP83849 0x000a 523#define MII_MODEL_xxNATSEMI_DP83849 0x000a
525#define MII_STR_xxNATSEMI_DP83849 "DP83849 10/100 media interface" 524#define MII_STR_xxNATSEMI_DP83849 "DP83849 10/100 media interface"
526 525
527/* PMC Sierra PHYs */ 526/* PMC Sierra PHYs */
528#define MII_MODEL_xxPMCSIERRA_PM8351 0x0000 527#define MII_MODEL_xxPMCSIERRA_PM8351 0x0000
529#define MII_STR_xxPMCSIERRA_PM8351 "PM8351 OctalPHY Gigabit interface" 528#define MII_STR_xxPMCSIERRA_PM8351 "PM8351 OctalPHY Gigabit interface"
530#define MII_MODEL_xxPMCSIERRA2_PM8352 0x0002 529#define MII_MODEL_xxPMCSIERRA2_PM8352 0x0002
531#define MII_STR_xxPMCSIERRA2_PM8352 "PM8352 OctalPHY Gigabit interface" 530#define MII_STR_xxPMCSIERRA2_PM8352 "PM8352 OctalPHY Gigabit interface"
532#define MII_MODEL_xxPMCSIERRA2_PM8353 0x0003 531#define MII_MODEL_xxPMCSIERRA2_PM8353 0x0003
533#define MII_STR_xxPMCSIERRA2_PM8353 "PM8353 QuadPHY Gigabit interface" 532#define MII_STR_xxPMCSIERRA2_PM8353 "PM8353 QuadPHY Gigabit interface"
534#define MII_MODEL_PMCSIERRA_PM8354 0x0004 533#define MII_MODEL_PMCSIERRA_PM8354 0x0004
535#define MII_STR_PMCSIERRA_PM8354 "PM8354 QuadPHY Gigabit interface" 534#define MII_STR_PMCSIERRA_PM8354 "PM8354 QuadPHY Gigabit interface"
536 535
537/* Quality Semiconductor PHYs */ 536/* Quality Semiconductor PHYs */
538#define MII_MODEL_xxQUALSEMI_QS6612 0x0000 537#define MII_MODEL_xxQUALSEMI_QS6612 0x0000
539#define MII_STR_xxQUALSEMI_QS6612 "QS6612 10/100 media interface" 538#define MII_STR_xxQUALSEMI_QS6612 "QS6612 10/100 media interface"
540 539
541/* RDC Semiconductor PHYs */ 540/* RDC Semiconductor PHYs */
542#define MII_MODEL_RDC_R6040 0x0003 541#define MII_MODEL_xxRDC_R6040 0x0003
543#define MII_STR_RDC_R6040 "R6040 10/100 media interface" 542#define MII_STR_xxRDC_R6040 "R6040 10/100 media interface"
 543#define MII_MODEL_xxRDC_R6040_2 0x0005
 544#define MII_STR_xxRDC_R6040_2 "R6040 10/100 media interface"
 545#define MII_MODEL_xxRDC_R6040_3 0x0006
 546#define MII_STR_xxRDC_R6040_3 "R6040 10/100 media interface"
544 547
545/* RealTek PHYs */ 548/* RealTek PHYs */
546#define MII_MODEL_xxREALTEK_RTL8169S 0x0011 549#define MII_MODEL_xxREALTEK_RTL8169S 0x0011
547#define MII_STR_xxREALTEK_RTL8169S "RTL8169S/8110S/8211 1000BASE-T media interface" 550#define MII_STR_xxREALTEK_RTL8169S "RTL8169S/8110S/8211 1000BASE-T media interface"
548#define MII_MODEL_yyREALTEK_RTL8201L 0x0020 551#define MII_MODEL_yyREALTEK_RTL8201L 0x0020
549#define MII_STR_yyREALTEK_RTL8201L "RTL8201L 10/100 media interface" 552#define MII_STR_yyREALTEK_RTL8201L "RTL8201L 10/100 media interface"
550#define MII_MODEL_REALTEK_RTL8251 0x0000 553#define MII_MODEL_REALTEK_RTL8251 0x0000
551#define MII_STR_REALTEK_RTL8251 "RTL8251 1000BASE-T media interface" 554#define MII_STR_REALTEK_RTL8251 "RTL8251 1000BASE-T media interface"
552#define MII_MODEL_REALTEK_RTL8201E 0x0008 555#define MII_MODEL_REALTEK_RTL8201E 0x0008
553#define MII_STR_REALTEK_RTL8201E "RTL8201E 10/100 media interface" 556#define MII_STR_REALTEK_RTL8201E "RTL8201E 10/100 media interface"
554#define MII_MODEL_REALTEK_RTL8169S 0x0011 557#define MII_MODEL_REALTEK_RTL8169S 0x0011
555#define MII_STR_REALTEK_RTL8169S "RTL8169S/8110S/8211 1000BASE-T media interface" 558#define MII_STR_REALTEK_RTL8169S "RTL8169S/8110S/8211 1000BASE-T media interface"
556 559
557/* Seeq PHYs */ 560/* Seeq PHYs */
558#define MII_MODEL_SEEQ_80220 0x0003 561#define MII_MODEL_SEEQ_80220 0x0003
559#define MII_STR_SEEQ_80220 "Seeq 80220 10/100 media interface" 562#define MII_STR_SEEQ_80220 "Seeq 80220 10/100 media interface"
560#define MII_MODEL_SEEQ_84220 0x0004 563#define MII_MODEL_SEEQ_84220 0x0004
561#define MII_STR_SEEQ_84220 "Seeq 84220 10/100 media interface" 564#define MII_STR_SEEQ_84220 "Seeq 84220 10/100 media interface"
562#define MII_MODEL_SEEQ_80225 0x0008 565#define MII_MODEL_SEEQ_80225 0x0008
563#define MII_STR_SEEQ_80225 "Seeq 80225 10/100 media interface" 566#define MII_STR_SEEQ_80225 "Seeq 80225 10/100 media interface"
564 567
565/* Silicon Integrated Systems PHYs */ 568/* Silicon Integrated Systems PHYs */
566#define MII_MODEL_SIS_900 0x0000 569#define MII_MODEL_SIS_900 0x0000
567#define MII_STR_SIS_900 "SiS 900 10/100 media interface" 570#define MII_STR_SIS_900 "SiS 900 10/100 media interface"
568 571
569/* SMSC PHYs */ 572/* SMSC PHYs */
570#define MII_MODEL_SMSC_LAN83C185 0x000a 573#define MII_MODEL_SMSC_LAN83C185 0x000a
571#define MII_STR_SMSC_LAN83C185 "SMSC LAN83C185 10/100 PHY" 574#define MII_STR_SMSC_LAN83C185 "SMSC LAN83C185 10/100 PHY"
572#define MII_MODEL_SMSC_LAN8700 0x000c 575#define MII_MODEL_SMSC_LAN8700 0x000c
573#define MII_STR_SMSC_LAN8700 "SMSC LAN8700 10/100 Ethernet Transceiver" 576#define MII_STR_SMSC_LAN8700 "SMSC LAN8700 10/100 Ethernet Transceiver"
574#define MII_MODEL_SMSC_LAN911X 0x000d 577#define MII_MODEL_SMSC_LAN911X 0x000d
575#define MII_STR_SMSC_LAN911X "SMSC LAN911X internal 10/100 PHY" 578#define MII_STR_SMSC_LAN911X "SMSC LAN911X internal 10/100 PHY"
576#define MII_MODEL_SMSC_LAN75XX 0x000e 579#define MII_MODEL_SMSC_LAN75XX 0x000e
577#define MII_STR_SMSC_LAN75XX "SMSC LAN75XX internal 10/100 PHY" 580#define MII_STR_SMSC_LAN75XX "SMSC LAN75XX internal 10/100 PHY"
578#define MII_MODEL_SMSC_LAN8710_LAN8720 0x000f 581#define MII_MODEL_SMSC_LAN8710_LAN8720 0x000f
579#define MII_STR_SMSC_LAN8710_LAN8720 "SMSC LAN8710/LAN8720 10/100 Ethernet Transceiver" 582#define MII_STR_SMSC_LAN8710_LAN8720 "SMSC LAN8710/LAN8720 10/100 Ethernet Transceiver"
580#define MII_MODEL_SMSC_LAN8740 0x0011 583#define MII_MODEL_SMSC_LAN8740 0x0011
581#define MII_STR_SMSC_LAN8740 "SMSC LAN8740 10/100 media interface" 584#define MII_STR_SMSC_LAN8740 "SMSC LAN8740 10/100 media interface"
582#define MII_MODEL_SMSC_LAN8741A 0x0012 585#define MII_MODEL_SMSC_LAN8741A 0x0012
583#define MII_STR_SMSC_LAN8741A "SMSC LAN8741A 10/100 media interface" 586#define MII_STR_SMSC_LAN8741A "SMSC LAN8741A 10/100 media interface"
584#define MII_MODEL_SMSC_LAN8742 0x0013 587#define MII_MODEL_SMSC_LAN8742 0x0013
585#define MII_STR_SMSC_LAN8742 "SMSC LAN8742 10/100 media interface" 588#define MII_STR_SMSC_LAN8742 "SMSC LAN8742 10/100 media interface"
586 589
 590/* Teranetics PHY */
 591#define MII_MODEL_TERANETICS_TN1010 0x0001
 592#define MII_STR_TERANETICS_TN1010 "Teranetics TN1010 10GBase-T PHY"
 593
587/* Texas Instruments PHYs */ 594/* Texas Instruments PHYs */
588#define MII_MODEL_TI_TLAN10T 0x0001 595#define MII_MODEL_TI_TLAN10T 0x0001
589#define MII_STR_TI_TLAN10T "ThunderLAN 10BASE-T media interface" 596#define MII_STR_TI_TLAN10T "ThunderLAN 10BASE-T media interface"
590#define MII_MODEL_TI_100VGPMI 0x0002 597#define MII_MODEL_TI_100VGPMI 0x0002
591#define MII_STR_TI_100VGPMI "ThunderLAN 100VG-AnyLan media interface" 598#define MII_STR_TI_100VGPMI "ThunderLAN 100VG-AnyLan media interface"
592#define MII_MODEL_TI_TNETE2101 0x0003 599#define MII_MODEL_TI_TNETE2101 0x0003
593#define MII_STR_TI_TNETE2101 "TNETE2101 media interface" 600#define MII_STR_TI_TNETE2101 "TNETE2101 media interface"
594 601
595/* TDK Semiconductor PHYs */ 602/* TDK Semiconductor PHYs */
596#define MII_MODEL_xxTSC_78Q2120 0x0014 603#define MII_MODEL_xxTSC_78Q2120 0x0014
597#define MII_STR_xxTSC_78Q2120 "78Q2120 10/100 media interface" 604#define MII_STR_xxTSC_78Q2120 "78Q2120 10/100 media interface"
598#define MII_MODEL_xxTSC_78Q2121 0x0015 605#define MII_MODEL_xxTSC_78Q2121 0x0015
599#define MII_STR_xxTSC_78Q2121 "78Q2121 100BASE-TX media interface" 606#define MII_STR_xxTSC_78Q2121 "78Q2121 100BASE-TX media interface"
600 607
601/* VIA Technologies PHYs */ 608/* VIA Technologies PHYs */
602#define MII_MODEL_VIA_VT6103 0x0032 609#define MII_MODEL_xxVIA_VT6103 0x0032
603#define MII_STR_VIA_VT6103 "VT6103 10/100 PHY" 610#define MII_STR_xxVIA_VT6103 "VT6103 10/100 PHY"
604#define MII_MODEL_VIA_VT6103_2 0x0034 611#define MII_MODEL_xxVIA_VT6103_2 0x0034
605#define MII_STR_VIA_VT6103_2 "VT6103 10/100 PHY" 612#define MII_STR_xxVIA_VT6103_2 "VT6103 10/100 PHY"
606 613
607/* Vitesse PHYs (Now Microsemi) */ 614/* Vitesse PHYs (Now Microsemi) */
608#define MII_MODEL_xxVITESSE_VSC8601 0x0002 615#define MII_MODEL_xxVITESSE_VSC8601 0x0002
609#define MII_STR_xxVITESSE_VSC8601 "VSC8601 10/100/1000 PHY" 616#define MII_STR_xxVITESSE_VSC8601 "VSC8601 10/100/1000 PHY"
610#define MII_MODEL_xxVITESSE_VSC8641 0x0003 617#define MII_MODEL_xxVITESSE_VSC8641 0x0003
611#define MII_STR_xxVITESSE_VSC8641 "Vitesse VSC8641 10/100/1000TX PHY" 618#define MII_STR_xxVITESSE_VSC8641 "Vitesse VSC8641 10/100/1000TX PHY"
612#define MII_MODEL_xxVITESSE_VSC8501 0x0013 619#define MII_MODEL_xxVITESSE_VSC8501 0x0013
613#define MII_STR_xxVITESSE_VSC8501 "Vitesse VSC8501 10/100/1000TX PHY" 620#define MII_STR_xxVITESSE_VSC8501 "Vitesse VSC8501 10/100/1000TX PHY"
614 621
615/* XaQti Corp. PHYs */ 622/* XaQti Corp. PHYs */
616#define MII_MODEL_xxXAQTI_XMACII 0x0000 623#define MII_MODEL_xxXAQTI_XMACII 0x0000
617#define MII_STR_xxXAQTI_XMACII "XaQti Corp. XMAC II gigabit interface" 624#define MII_STR_xxXAQTI_XMACII "XaQti Corp. XMAC II gigabit interface"
cvs diff -r1.116.6.8 -r1.116.6.9 src/sys/dev/mii/miidevs_data.h (switch to unified diff)

--- src/sys/dev/mii/miidevs_data.h 2019/11/25 15:57:49 1.116.6.8
+++ src/sys/dev/mii/miidevs_data.h 2020/04/14 18:11:35 1.116.6.9
@@ -1,249 +1,252 @@ @@ -1,249 +1,252 @@
1/* $NetBSD: miidevs_data.h,v 1.116.6.8 2019/11/25 15:57:49 martin Exp $ */ 1/* $NetBSD: miidevs_data.h,v 1.116.6.9 2020/04/14 18:11:35 martin Exp $ */
2 2
3/* 3/*
4 * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT. 4 * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
5 * 5 *
6 * generated from: 6 * generated from:
7 * NetBSD: miidevs,v 1.125.6.8 2019/11/25 15:57:23 martin Exp 7 * NetBSD: miidevs,v 1.125.6.9 2020/04/14 17:57:17 martin Exp
8 */ 8 */
9 9
10/*- 10/*-
11 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 11 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
12 * All rights reserved. 12 * All rights reserved.
13 * 13 *
14 * This code is derived from software contributed to The NetBSD Foundation 14 * This code is derived from software contributed to The NetBSD Foundation
15 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 15 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
16 * NASA Ames Research Center. 16 * NASA Ames Research Center.
17 * 17 *
18 * Redistribution and use in source and binary forms, with or without 18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions 19 * modification, are permitted provided that the following conditions
20 * are met: 20 * are met:
21 * 1. Redistributions of source code must retain the above copyright 21 * 1. Redistributions of source code must retain the above copyright
22 * notice, this list of conditions and the following disclaimer. 22 * notice, this list of conditions and the following disclaimer.
23 * 2. Redistributions in binary form must reproduce the above copyright 23 * 2. Redistributions in binary form must reproduce the above copyright
24 * notice, this list of conditions and the following disclaimer in the 24 * notice, this list of conditions and the following disclaimer in the
25 * documentation and/or other materials provided with the distribution. 25 * documentation and/or other materials provided with the distribution.
26 * 26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE. 37 * POSSIBILITY OF SUCH DAMAGE.
38 */ 38 */
39struct mii_knowndev mii_knowndevs[] = { 39struct mii_knowndev mii_knowndevs[] = {
40 { MII_OUI_AGERE, MII_MODEL_AGERE_ET1011, MII_STR_AGERE_ET1011 }, 40 { MII_OUI_AGERE, MII_MODEL_AGERE_ET1011, MII_STR_AGERE_ET1011 },
 41 { MII_OUI_AGERE, MII_MODEL_AGERE_ET1011C, MII_STR_AGERE_ET1011C },
41 { MII_OUI_xxASIX, MII_MODEL_xxASIX_AX88X9X, MII_STR_xxASIX_AX88X9X }, 42 { MII_OUI_xxASIX, MII_MODEL_xxASIX_AX88X9X, MII_STR_xxASIX_AX88X9X },
42 { MII_OUI_yyASIX, MII_MODEL_yyASIX_AX88772, MII_STR_yyASIX_AX88772 }, 43 { MII_OUI_yyASIX, MII_MODEL_yyASIX_AX88772, MII_STR_yyASIX_AX88772 },
43 { MII_OUI_yyASIX, MII_MODEL_yyASIX_AX88772A, MII_STR_yyASIX_AX88772A }, 44 { MII_OUI_yyASIX, MII_MODEL_yyASIX_AX88772A, MII_STR_yyASIX_AX88772A },
44 { MII_OUI_yyASIX, MII_MODEL_yyASIX_AX88772B, MII_STR_yyASIX_AX88772B }, 45 { MII_OUI_yyASIX, MII_MODEL_yyASIX_AX88772B, MII_STR_yyASIX_AX88772B },
45 { MII_OUI_ALTIMA, MII_MODEL_ALTIMA_ACXXX, MII_STR_ALTIMA_ACXXX }, 46 { MII_OUI_ALTIMA, MII_MODEL_ALTIMA_ACXXX, MII_STR_ALTIMA_ACXXX },
46 { MII_OUI_ALTIMA, MII_MODEL_ALTIMA_AC101L, MII_STR_ALTIMA_AC101L }, 47 { MII_OUI_ALTIMA, MII_MODEL_ALTIMA_AC101L, MII_STR_ALTIMA_AC101L },
47 { MII_OUI_ALTIMA, MII_MODEL_ALTIMA_AC101, MII_STR_ALTIMA_AC101 }, 48 { MII_OUI_ALTIMA, MII_MODEL_ALTIMA_AC101, MII_STR_ALTIMA_AC101 },
48 { MII_OUI_ALTIMA, MII_MODEL_ALTIMA_Am79C875, MII_STR_ALTIMA_Am79C875 }, 49 { MII_OUI_ALTIMA, MII_MODEL_ALTIMA_Am79C875, MII_STR_ALTIMA_Am79C875 },
49 { MII_OUI_ALTIMA, MII_MODEL_ALTIMA_Am79C874, MII_STR_ALTIMA_Am79C874 }, 50 { MII_OUI_ALTIMA, MII_MODEL_ALTIMA_Am79C874, MII_STR_ALTIMA_Am79C874 },
50 { MII_OUI_AMLOGIC, MII_MODEL_AMLOGIC_GXL, MII_STR_AMLOGIC_GXL }, 51 { MII_OUI_AMLOGIC, MII_MODEL_AMLOGIC_GXL, MII_STR_AMLOGIC_GXL },
51 { MII_OUI_xxAMLOGIC, MII_MODEL_xxAMLOGIC_GXL, MII_STR_xxAMLOGIC_GXL }, 52 { MII_OUI_xxAMLOGIC, MII_MODEL_xxAMLOGIC_GXL, MII_STR_xxAMLOGIC_GXL },
52 { MII_OUI_ATHEROS, MII_MODEL_ATHEROS_F1, MII_STR_ATHEROS_F1 }, 
53 { MII_OUI_ATHEROS, MII_MODEL_ATHEROS_F2, MII_STR_ATHEROS_F2 }, 
54 { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_L1, MII_STR_ATTANSIC_L1 }, 53 { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_L1, MII_STR_ATTANSIC_L1 },
55 { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_L2, MII_STR_ATTANSIC_L2 }, 54 { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_L2, MII_STR_ATTANSIC_L2 },
56 { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_AR8021, MII_STR_ATTANSIC_AR8021 }, 55 { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_AR8021, MII_STR_ATTANSIC_AR8021 },
57 { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_AR8035, MII_STR_ATTANSIC_AR8035 }, 56 { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_AR8035, MII_STR_ATTANSIC_AR8035 },
58 { MII_OUI_yyAMD, MII_MODEL_yyAMD_79C972_10T, MII_STR_yyAMD_79C972_10T }, 57 { MII_OUI_yyAMD, MII_MODEL_yyAMD_79C972_10T, MII_STR_yyAMD_79C972_10T },
59 { MII_OUI_yyAMD, MII_MODEL_yyAMD_79c973phy, MII_STR_yyAMD_79c973phy }, 58 { MII_OUI_yyAMD, MII_MODEL_yyAMD_79c973phy, MII_STR_yyAMD_79c973phy },
60 { MII_OUI_yyAMD, MII_MODEL_yyAMD_79c901, MII_STR_yyAMD_79c901 }, 59 { MII_OUI_yyAMD, MII_MODEL_yyAMD_79c901, MII_STR_yyAMD_79c901 },
61 { MII_OUI_yyAMD, MII_MODEL_yyAMD_79c901home, MII_STR_yyAMD_79c901home }, 60 { MII_OUI_yyAMD, MII_MODEL_yyAMD_79c901home, MII_STR_yyAMD_79c901home },
62 { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_3C905B, MII_STR_xxBROADCOM_3C905B }, 61 { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_3C905B, MII_STR_xxBROADCOM_3C905B },
63 { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_3C905C, MII_STR_xxBROADCOM_3C905C }, 62 { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_3C905C, MII_STR_xxBROADCOM_3C905C },
64 { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM5221, MII_STR_xxBROADCOM_BCM5221 }, 63 { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM5221, MII_STR_xxBROADCOM_BCM5221 },
65 { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM5201, MII_STR_xxBROADCOM_BCM5201 }, 64 { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM5201, MII_STR_xxBROADCOM_BCM5201 },
66 { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM5214, MII_STR_xxBROADCOM_BCM5214 }, 65 { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM5214, MII_STR_xxBROADCOM_BCM5214 },
67 { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM5222, MII_STR_xxBROADCOM_BCM5222 }, 66 { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM5222, MII_STR_xxBROADCOM_BCM5222 },
68 { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM4401, MII_STR_xxBROADCOM_BCM4401 }, 67 { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM4401, MII_STR_xxBROADCOM_BCM4401 },
69 { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM5365, MII_STR_xxBROADCOM_BCM5365 }, 68 { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM5365, MII_STR_xxBROADCOM_BCM5365 },
70 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5400, MII_STR_BROADCOM_BCM5400 }, 69 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5400, MII_STR_BROADCOM_BCM5400 },
71 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5401, MII_STR_BROADCOM_BCM5401 }, 70 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5401, MII_STR_BROADCOM_BCM5401 },
72 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5402, MII_STR_BROADCOM_BCM5402 }, 71 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5402, MII_STR_BROADCOM_BCM5402 },
73 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5411, MII_STR_BROADCOM_BCM5411 }, 72 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5411, MII_STR_BROADCOM_BCM5411 },
74 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5404, MII_STR_BROADCOM_BCM5404 }, 73 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5404, MII_STR_BROADCOM_BCM5404 },
75 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5424, MII_STR_BROADCOM_BCM5424 }, 74 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5424, MII_STR_BROADCOM_BCM5424 },
76 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5464, MII_STR_BROADCOM_BCM5464 }, 75 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5464, MII_STR_BROADCOM_BCM5464 },
77 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5461, MII_STR_BROADCOM_BCM5461 }, 76 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5461, MII_STR_BROADCOM_BCM5461 },
78 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5462, MII_STR_BROADCOM_BCM5462 }, 77 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5462, MII_STR_BROADCOM_BCM5462 },
79 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5421, MII_STR_BROADCOM_BCM5421 }, 78 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5421, MII_STR_BROADCOM_BCM5421 },
80 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5752, MII_STR_BROADCOM_BCM5752 }, 79 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5752, MII_STR_BROADCOM_BCM5752 },
81 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5701, MII_STR_BROADCOM_BCM5701 }, 80 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5701, MII_STR_BROADCOM_BCM5701 },
82 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5706, MII_STR_BROADCOM_BCM5706 }, 81 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5706, MII_STR_BROADCOM_BCM5706 },
83 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5703, MII_STR_BROADCOM_BCM5703 }, 82 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5703, MII_STR_BROADCOM_BCM5703 },
84 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5750, MII_STR_BROADCOM_BCM5750 }, 83 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5750, MII_STR_BROADCOM_BCM5750 },
85 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5704, MII_STR_BROADCOM_BCM5704 }, 84 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5704, MII_STR_BROADCOM_BCM5704 },
86 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5705, MII_STR_BROADCOM_BCM5705 }, 85 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5705, MII_STR_BROADCOM_BCM5705 },
87 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM54K2, MII_STR_BROADCOM_BCM54K2 }, 86 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM54K2, MII_STR_BROADCOM_BCM54K2 },
88 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5714, MII_STR_BROADCOM_BCM5714 }, 87 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5714, MII_STR_BROADCOM_BCM5714 },
89 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5780, MII_STR_BROADCOM_BCM5780 }, 88 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5780, MII_STR_BROADCOM_BCM5780 },
90 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5708C, MII_STR_BROADCOM_BCM5708C }, 89 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5708C, MII_STR_BROADCOM_BCM5708C },
91 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5466, MII_STR_BROADCOM_BCM5466 }, 90 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5466, MII_STR_BROADCOM_BCM5466 },
92 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5325, MII_STR_BROADCOM2_BCM5325 }, 91 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5325, MII_STR_BROADCOM2_BCM5325 },
93 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5906, MII_STR_BROADCOM2_BCM5906 }, 92 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5906, MII_STR_BROADCOM2_BCM5906 },
94 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5478, MII_STR_BROADCOM2_BCM5478 }, 93 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5478, MII_STR_BROADCOM2_BCM5478 },
95 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5488, MII_STR_BROADCOM2_BCM5488 }, 94 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5488, MII_STR_BROADCOM2_BCM5488 },
96 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5481, MII_STR_BROADCOM2_BCM5481 }, 95 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5481, MII_STR_BROADCOM2_BCM5481 },
97 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5482, MII_STR_BROADCOM2_BCM5482 }, 96 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5482, MII_STR_BROADCOM2_BCM5482 },
98 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5755, MII_STR_BROADCOM2_BCM5755 }, 97 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5755, MII_STR_BROADCOM2_BCM5755 },
99 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5756, MII_STR_BROADCOM2_BCM5756 }, 98 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5756, MII_STR_BROADCOM2_BCM5756 },
100 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5754, MII_STR_BROADCOM2_BCM5754 }, 99 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5754, MII_STR_BROADCOM2_BCM5754 },
101 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5708S, MII_STR_BROADCOM2_BCM5708S }, 100 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5708S, MII_STR_BROADCOM2_BCM5708S },
102 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5785, MII_STR_BROADCOM2_BCM5785 }, 101 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5785, MII_STR_BROADCOM2_BCM5785 },
103 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5709CAX, MII_STR_BROADCOM2_BCM5709CAX }, 102 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5709CAX, MII_STR_BROADCOM2_BCM5709CAX },
104 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5722, MII_STR_BROADCOM2_BCM5722 }, 103 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5722, MII_STR_BROADCOM2_BCM5722 },
105 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5784, MII_STR_BROADCOM2_BCM5784 }, 104 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5784, MII_STR_BROADCOM2_BCM5784 },
106 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5709C, MII_STR_BROADCOM2_BCM5709C }, 105 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5709C, MII_STR_BROADCOM2_BCM5709C },
107 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5761, MII_STR_BROADCOM2_BCM5761 }, 106 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5761, MII_STR_BROADCOM2_BCM5761 },
108 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5709S, MII_STR_BROADCOM2_BCM5709S }, 107 { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5709S, MII_STR_BROADCOM2_BCM5709S },
109 { MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM57780, MII_STR_BROADCOM3_BCM57780 }, 108 { MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM57780, MII_STR_BROADCOM3_BCM57780 },
110 { MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM5717C, MII_STR_BROADCOM3_BCM5717C }, 109 { MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM5717C, MII_STR_BROADCOM3_BCM5717C },
111 { MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM5719C, MII_STR_BROADCOM3_BCM5719C }, 110 { MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM5719C, MII_STR_BROADCOM3_BCM5719C },
112 { MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM57765, MII_STR_BROADCOM3_BCM57765 }, 111 { MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM57765, MII_STR_BROADCOM3_BCM57765 },
113 { MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM53125, MII_STR_BROADCOM3_BCM53125 }, 112 { MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM53125, MII_STR_BROADCOM3_BCM53125 },
114 { MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM5720C, MII_STR_BROADCOM3_BCM5720C }, 113 { MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM5720C, MII_STR_BROADCOM3_BCM5720C },
 114 { MII_OUI_BROADCOM4, MII_MODEL_BROADCOM4_BCM54213PE, MII_STR_BROADCOM4_BCM54213PE },
115 { MII_OUI_BROADCOM4, MII_MODEL_BROADCOM4_BCM5725C, MII_STR_BROADCOM4_BCM5725C }, 115 { MII_OUI_BROADCOM4, MII_MODEL_BROADCOM4_BCM5725C, MII_STR_BROADCOM4_BCM5725C },
116 { MII_OUI_xxBROADCOM_ALT1, MII_MODEL_xxBROADCOM_ALT1_BCM5906, MII_STR_xxBROADCOM_ALT1_BCM5906 }, 116 { MII_OUI_xxBROADCOM_ALT1, MII_MODEL_xxBROADCOM_ALT1_BCM5906, MII_STR_xxBROADCOM_ALT1_BCM5906 },
117 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CIS8201, MII_STR_xxCICADA_CIS8201 }, 117 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CIS8201, MII_STR_xxCICADA_CIS8201 },
118 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CIS8204, MII_STR_xxCICADA_CIS8204 }, 118 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CIS8204, MII_STR_xxCICADA_CIS8204 },
119 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8211, MII_STR_xxCICADA_VSC8211 }, 119 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8211, MII_STR_xxCICADA_VSC8211 },
120 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8221, MII_STR_xxCICADA_VSC8221 }, 120 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8221, MII_STR_xxCICADA_VSC8221 },
121 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8224, MII_STR_xxCICADA_VSC8224 }, 121 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8224, MII_STR_xxCICADA_VSC8224 },
122 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CIS8201A, MII_STR_xxCICADA_CIS8201A }, 122 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CIS8201A, MII_STR_xxCICADA_CIS8201A },
123 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CIS8201B, MII_STR_xxCICADA_CIS8201B }, 123 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CIS8201B, MII_STR_xxCICADA_CIS8201B },
124 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8234, MII_STR_xxCICADA_VSC8234 }, 124 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8234, MII_STR_xxCICADA_VSC8234 },
125 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8244, MII_STR_xxCICADA_VSC8244 }, 125 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8244, MII_STR_xxCICADA_VSC8244 },
126 { MII_OUI_DAVICOM, MII_MODEL_DAVICOM_DM9101, MII_STR_DAVICOM_DM9101 }, 126 { MII_OUI_DAVICOM, MII_MODEL_DAVICOM_DM9101, MII_STR_DAVICOM_DM9101 },
127 { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9101, MII_STR_xxDAVICOM_DM9101 }, 127 { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9101, MII_STR_xxDAVICOM_DM9101 },
128 { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9102, MII_STR_xxDAVICOM_DM9102 }, 128 { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9102, MII_STR_xxDAVICOM_DM9102 },
129 { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9161, MII_STR_xxDAVICOM_DM9161 }, 129 { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9161, MII_STR_xxDAVICOM_DM9161 },
130 { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9161A, MII_STR_xxDAVICOM_DM9161A }, 130 { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9161A, MII_STR_xxDAVICOM_DM9161A },
131 { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9161B, MII_STR_xxDAVICOM_DM9161B }, 131 { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9161B, MII_STR_xxDAVICOM_DM9161B },
132 { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9601, MII_STR_xxDAVICOM_DM9601 }, 132 { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9601, MII_STR_xxDAVICOM_DM9601 },
133 { MII_OUI_xxICPLUS, MII_MODEL_xxICPLUS_IP100, MII_STR_xxICPLUS_IP100 }, 133 { MII_OUI_xxICPLUS, MII_MODEL_xxICPLUS_IP100, MII_STR_xxICPLUS_IP100 },
134 { MII_OUI_xxICPLUS, MII_MODEL_xxICPLUS_IP101, MII_STR_xxICPLUS_IP101 }, 134 { MII_OUI_xxICPLUS, MII_MODEL_xxICPLUS_IP101, MII_STR_xxICPLUS_IP101 },
135 { MII_OUI_xxICPLUS, MII_MODEL_xxICPLUS_IP1000A, MII_STR_xxICPLUS_IP1000A }, 135 { MII_OUI_xxICPLUS, MII_MODEL_xxICPLUS_IP1000A, MII_STR_xxICPLUS_IP1000A },
136 { MII_OUI_xxICPLUS, MII_MODEL_xxICPLUS_IP1001, MII_STR_xxICPLUS_IP1001 }, 136 { MII_OUI_xxICPLUS, MII_MODEL_xxICPLUS_IP1001, MII_STR_xxICPLUS_IP1001 },
137 { MII_OUI_ICS, MII_MODEL_ICS_1889, MII_STR_ICS_1889 }, 137 { MII_OUI_ICS, MII_MODEL_ICS_1889, MII_STR_ICS_1889 },
138 { MII_OUI_ICS, MII_MODEL_ICS_1890, MII_STR_ICS_1890 }, 138 { MII_OUI_ICS, MII_MODEL_ICS_1890, MII_STR_ICS_1890 },
139 { MII_OUI_ICS, MII_MODEL_ICS_1892, MII_STR_ICS_1892 }, 139 { MII_OUI_ICS, MII_MODEL_ICS_1892, MII_STR_ICS_1892 },
140 { MII_OUI_ICS, MII_MODEL_ICS_1893, MII_STR_ICS_1893 }, 140 { MII_OUI_ICS, MII_MODEL_ICS_1893, MII_STR_ICS_1893 },
141 { MII_OUI_ICS, MII_MODEL_ICS_1893C, MII_STR_ICS_1893C }, 141 { MII_OUI_ICS, MII_MODEL_ICS_1893C, MII_STR_ICS_1893C },
142 { MII_OUI_xxINTEL, MII_MODEL_xxINTEL_I82553, MII_STR_xxINTEL_I82553 }, 142 { MII_OUI_xxINTEL, MII_MODEL_xxINTEL_I82553, MII_STR_xxINTEL_I82553 },
143 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82555, MII_STR_yyINTEL_I82555 }, 143 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82555, MII_STR_yyINTEL_I82555 },
144 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562EH, MII_STR_yyINTEL_I82562EH }, 144 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562EH, MII_STR_yyINTEL_I82562EH },
145 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562G, MII_STR_yyINTEL_I82562G }, 145 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562G, MII_STR_yyINTEL_I82562G },
146 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562EM, MII_STR_yyINTEL_I82562EM }, 146 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562EM, MII_STR_yyINTEL_I82562EM },
147 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562ET, MII_STR_yyINTEL_I82562ET }, 147 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562ET, MII_STR_yyINTEL_I82562ET },
148 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82553, MII_STR_yyINTEL_I82553 }, 148 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82553, MII_STR_yyINTEL_I82553 },
149 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_IGP01E1000, MII_STR_yyINTEL_IGP01E1000 }, 149 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_IGP01E1000, MII_STR_yyINTEL_IGP01E1000 },
150 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82566, MII_STR_yyINTEL_I82566 }, 150 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82566, MII_STR_yyINTEL_I82566 },
151 { MII_OUI_INTEL, MII_MODEL_INTEL_I82577, MII_STR_INTEL_I82577 }, 151 { MII_OUI_INTEL, MII_MODEL_INTEL_I82577, MII_STR_INTEL_I82577 },
152 { MII_OUI_INTEL, MII_MODEL_INTEL_I82579, MII_STR_INTEL_I82579 }, 152 { MII_OUI_INTEL, MII_MODEL_INTEL_I82579, MII_STR_INTEL_I82579 },
153 { MII_OUI_INTEL, MII_MODEL_INTEL_I217, MII_STR_INTEL_I217 }, 153 { MII_OUI_INTEL, MII_MODEL_INTEL_I217, MII_STR_INTEL_I217 },
154 { MII_OUI_INTEL, MII_MODEL_INTEL_X540, MII_STR_INTEL_X540 }, 154 { MII_OUI_INTEL, MII_MODEL_INTEL_X540, MII_STR_INTEL_X540 },
155 { MII_OUI_INTEL, MII_MODEL_INTEL_X550, MII_STR_INTEL_X550 }, 155 { MII_OUI_INTEL, MII_MODEL_INTEL_X550, MII_STR_INTEL_X550 },
156 { MII_OUI_INTEL, MII_MODEL_INTEL_X557, MII_STR_INTEL_X557 }, 156 { MII_OUI_INTEL, MII_MODEL_INTEL_X557, MII_STR_INTEL_X557 },
157 { MII_OUI_INTEL, MII_MODEL_INTEL_I82580, MII_STR_INTEL_I82580 }, 157 { MII_OUI_INTEL, MII_MODEL_INTEL_I82580, MII_STR_INTEL_I82580 },
158 { MII_OUI_INTEL, MII_MODEL_INTEL_I350, MII_STR_INTEL_I350 }, 158 { MII_OUI_INTEL, MII_MODEL_INTEL_I350, MII_STR_INTEL_I350 },
159 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_I210, MII_STR_xxMARVELL_I210 }, 159 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_I210, MII_STR_xxMARVELL_I210 },
160 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_I82563, MII_STR_xxMARVELL_I82563 }, 160 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_I82563, MII_STR_xxMARVELL_I82563 },
161 { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_I82578, MII_STR_ATTANSIC_I82578 }, 161 { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_I82578, MII_STR_ATTANSIC_I82578 },
162 { MII_OUI_JMICRON, MII_MODEL_JMICRON_JMP211, MII_STR_JMICRON_JMP211 }, 162 { MII_OUI_JMICRON, MII_MODEL_JMICRON_JMP211, MII_STR_JMICRON_JMP211 },
163 { MII_OUI_JMICRON, MII_MODEL_JMICRON_JMP202, MII_STR_JMICRON_JMP202 }, 163 { MII_OUI_JMICRON, MII_MODEL_JMICRON_JMP202, MII_STR_JMICRON_JMP202 },
164 { MII_OUI_xxLEVEL1, MII_MODEL_xxLEVEL1_LXT970, MII_STR_xxLEVEL1_LXT970 }, 164 { MII_OUI_xxLEVEL1, MII_MODEL_xxLEVEL1_LXT970, MII_STR_xxLEVEL1_LXT970 },
165 { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT1000_OLD, MII_STR_LEVEL1_LXT1000_OLD }, 165 { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT1000_OLD, MII_STR_LEVEL1_LXT1000_OLD },
166 { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT974, MII_STR_LEVEL1_LXT974 }, 166 { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT974, MII_STR_LEVEL1_LXT974 },
167 { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT975, MII_STR_LEVEL1_LXT975 }, 167 { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT975, MII_STR_LEVEL1_LXT975 },
168 { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT1000, MII_STR_LEVEL1_LXT1000 }, 168 { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT1000, MII_STR_LEVEL1_LXT1000 },
169 { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT971, MII_STR_LEVEL1_LXT971 }, 169 { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT971, MII_STR_LEVEL1_LXT971 },
170 { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT973, MII_STR_LEVEL1_LXT973 }, 170 { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT973, MII_STR_LEVEL1_LXT973 },
171 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1000, MII_STR_xxMARVELL_E1000 }, 171 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1000, MII_STR_xxMARVELL_E1000 },
172 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1011, MII_STR_xxMARVELL_E1011 }, 172 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1011, MII_STR_xxMARVELL_E1011 },
173 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1000_3, MII_STR_xxMARVELL_E1000_3 }, 173 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1000_3, MII_STR_xxMARVELL_E1000_3 },
174 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1000S, MII_STR_xxMARVELL_E1000S }, 174 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1000S, MII_STR_xxMARVELL_E1000S },
175 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1000_5, MII_STR_xxMARVELL_E1000_5 }, 175 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1000_5, MII_STR_xxMARVELL_E1000_5 },
176 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1101, MII_STR_xxMARVELL_E1101 }, 176 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1101, MII_STR_xxMARVELL_E1101 },
177 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E3082, MII_STR_xxMARVELL_E3082 }, 177 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E3082, MII_STR_xxMARVELL_E3082 },
178 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1112, MII_STR_xxMARVELL_E1112 }, 178 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1112, MII_STR_xxMARVELL_E1112 },
179 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1149, MII_STR_xxMARVELL_E1149 }, 179 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1149, MII_STR_xxMARVELL_E1149 },
180 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1111, MII_STR_xxMARVELL_E1111 }, 180 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1111, MII_STR_xxMARVELL_E1111 },
181 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1145, MII_STR_xxMARVELL_E1145 }, 181 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1145, MII_STR_xxMARVELL_E1145 },
182 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E6060, MII_STR_xxMARVELL_E6060 }, 182 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E6060, MII_STR_xxMARVELL_E6060 },
183 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_I347, MII_STR_xxMARVELL_I347 }, 183 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_I347, MII_STR_xxMARVELL_I347 },
184 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1512, MII_STR_xxMARVELL_E1512 }, 184 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1512, MII_STR_xxMARVELL_E1512 },
185 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1340M, MII_STR_xxMARVELL_E1340M }, 185 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1340M, MII_STR_xxMARVELL_E1340M },
186 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1116, MII_STR_xxMARVELL_E1116 }, 186 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1116, MII_STR_xxMARVELL_E1116 },
187 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1118, MII_STR_xxMARVELL_E1118 }, 187 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1118, MII_STR_xxMARVELL_E1118 },
188 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1240, MII_STR_xxMARVELL_E1240 }, 188 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1240, MII_STR_xxMARVELL_E1240 },
189 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1116R, MII_STR_xxMARVELL_E1116R }, 189 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1116R, MII_STR_xxMARVELL_E1116R },
190 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1149R, MII_STR_xxMARVELL_E1149R }, 190 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1149R, MII_STR_xxMARVELL_E1149R },
191 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E3016, MII_STR_xxMARVELL_E3016 }, 191 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E3016, MII_STR_xxMARVELL_E3016 },
192 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_PHYG65G, MII_STR_xxMARVELL_PHYG65G }, 192 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_PHYG65G, MII_STR_xxMARVELL_PHYG65G },
193 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1318S, MII_STR_xxMARVELL_E1318S }, 193 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1318S, MII_STR_xxMARVELL_E1318S },
194 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1543, MII_STR_xxMARVELL_E1543 }, 194 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1543, MII_STR_xxMARVELL_E1543 },
195 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1000_0, MII_STR_MARVELL_E1000_0 }, 195 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1000_0, MII_STR_MARVELL_E1000_0 },
196 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1011, MII_STR_MARVELL_E1011 }, 196 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1011, MII_STR_MARVELL_E1011 },
197 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1000_3, MII_STR_MARVELL_E1000_3 }, 197 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1000_3, MII_STR_MARVELL_E1000_3 },
198 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1000_5, MII_STR_MARVELL_E1000_5 }, 198 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1000_5, MII_STR_MARVELL_E1000_5 },
199 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1000_6, MII_STR_MARVELL_E1000_6 }, 199 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1000_6, MII_STR_MARVELL_E1000_6 },
200 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1111, MII_STR_MARVELL_E1111 }, 200 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1111, MII_STR_MARVELL_E1111 },
201 { MII_OUI_MICREL, MII_MODEL_MICREL_KSZ8081, MII_STR_MICREL_KSZ8081 }, 201 { MII_OUI_MICREL, MII_MODEL_MICREL_KSZ8081, MII_STR_MICREL_KSZ8081 },
202 { MII_OUI_MICREL, MII_MODEL_MICREL_KSZ9021RNI, MII_STR_MICREL_KSZ9021RNI }, 202 { MII_OUI_MICREL, MII_MODEL_MICREL_KSZ9021RNI, MII_STR_MICREL_KSZ9021RNI },
203 { MII_OUI_MICREL, MII_MODEL_MICREL_KSZ9031, MII_STR_MICREL_KSZ9031 }, 203 { MII_OUI_MICREL, MII_MODEL_MICREL_KSZ9031, MII_STR_MICREL_KSZ9031 },
204 { MII_OUI_xxMYSON, MII_MODEL_xxMYSON_MTD972, MII_STR_xxMYSON_MTD972 }, 204 { MII_OUI_xxMYSON, MII_MODEL_xxMYSON_MTD972, MII_STR_xxMYSON_MTD972 },
205 { MII_OUI_MYSON, MII_MODEL_MYSON_MTD803, MII_STR_MYSON_MTD803 }, 205 { MII_OUI_MYSON, MII_MODEL_MYSON_MTD803, MII_STR_MYSON_MTD803 },
206 { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83840, MII_STR_xxNATSEMI_DP83840 }, 206 { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83840, MII_STR_xxNATSEMI_DP83840 },
207 { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83843, MII_STR_xxNATSEMI_DP83843 }, 207 { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83843, MII_STR_xxNATSEMI_DP83843 },
208 { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83815, MII_STR_xxNATSEMI_DP83815 }, 208 { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83815, MII_STR_xxNATSEMI_DP83815 },
209 { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83847, MII_STR_xxNATSEMI_DP83847 }, 209 { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83847, MII_STR_xxNATSEMI_DP83847 },
210 { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83891, MII_STR_xxNATSEMI_DP83891 }, 210 { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83891, MII_STR_xxNATSEMI_DP83891 },
211 { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83861, MII_STR_xxNATSEMI_DP83861 }, 211 { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83861, MII_STR_xxNATSEMI_DP83861 },
212 { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83865, MII_STR_xxNATSEMI_DP83865 }, 212 { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83865, MII_STR_xxNATSEMI_DP83865 },
213 { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83849, MII_STR_xxNATSEMI_DP83849 }, 213 { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83849, MII_STR_xxNATSEMI_DP83849 },
214 { MII_OUI_xxPMCSIERRA, MII_MODEL_xxPMCSIERRA_PM8351, MII_STR_xxPMCSIERRA_PM8351 }, 214 { MII_OUI_xxPMCSIERRA, MII_MODEL_xxPMCSIERRA_PM8351, MII_STR_xxPMCSIERRA_PM8351 },
215 { MII_OUI_xxPMCSIERRA2, MII_MODEL_xxPMCSIERRA2_PM8352, MII_STR_xxPMCSIERRA2_PM8352 }, 215 { MII_OUI_xxPMCSIERRA2, MII_MODEL_xxPMCSIERRA2_PM8352, MII_STR_xxPMCSIERRA2_PM8352 },
216 { MII_OUI_xxPMCSIERRA2, MII_MODEL_xxPMCSIERRA2_PM8353, MII_STR_xxPMCSIERRA2_PM8353 }, 216 { MII_OUI_xxPMCSIERRA2, MII_MODEL_xxPMCSIERRA2_PM8353, MII_STR_xxPMCSIERRA2_PM8353 },
217 { MII_OUI_PMCSIERRA, MII_MODEL_PMCSIERRA_PM8354, MII_STR_PMCSIERRA_PM8354 }, 217 { MII_OUI_PMCSIERRA, MII_MODEL_PMCSIERRA_PM8354, MII_STR_PMCSIERRA_PM8354 },
218 { MII_OUI_xxQUALSEMI, MII_MODEL_xxQUALSEMI_QS6612, MII_STR_xxQUALSEMI_QS6612 }, 218 { MII_OUI_xxQUALSEMI, MII_MODEL_xxQUALSEMI_QS6612, MII_STR_xxQUALSEMI_QS6612 },
219 { MII_OUI_RDC, MII_MODEL_RDC_R6040, MII_STR_RDC_R6040 }, 219 { MII_OUI_xxRDC, MII_MODEL_xxRDC_R6040, MII_STR_xxRDC_R6040 },
 220 { MII_OUI_xxRDC, MII_MODEL_xxRDC_R6040_2, MII_STR_xxRDC_R6040_2 },
 221 { MII_OUI_xxRDC, MII_MODEL_xxRDC_R6040_3, MII_STR_xxRDC_R6040_3 },
220 { MII_OUI_xxREALTEK, MII_MODEL_xxREALTEK_RTL8169S, MII_STR_xxREALTEK_RTL8169S }, 222 { MII_OUI_xxREALTEK, MII_MODEL_xxREALTEK_RTL8169S, MII_STR_xxREALTEK_RTL8169S },
221 { MII_OUI_yyREALTEK, MII_MODEL_yyREALTEK_RTL8201L, MII_STR_yyREALTEK_RTL8201L }, 223 { MII_OUI_yyREALTEK, MII_MODEL_yyREALTEK_RTL8201L, MII_STR_yyREALTEK_RTL8201L },
222 { MII_OUI_REALTEK, MII_MODEL_REALTEK_RTL8251, MII_STR_REALTEK_RTL8251 }, 224 { MII_OUI_REALTEK, MII_MODEL_REALTEK_RTL8251, MII_STR_REALTEK_RTL8251 },
223 { MII_OUI_REALTEK, MII_MODEL_REALTEK_RTL8201E, MII_STR_REALTEK_RTL8201E }, 225 { MII_OUI_REALTEK, MII_MODEL_REALTEK_RTL8201E, MII_STR_REALTEK_RTL8201E },
224 { MII_OUI_REALTEK, MII_MODEL_REALTEK_RTL8169S, MII_STR_REALTEK_RTL8169S }, 226 { MII_OUI_REALTEK, MII_MODEL_REALTEK_RTL8169S, MII_STR_REALTEK_RTL8169S },
225 { MII_OUI_SEEQ, MII_MODEL_SEEQ_80220, MII_STR_SEEQ_80220 }, 227 { MII_OUI_SEEQ, MII_MODEL_SEEQ_80220, MII_STR_SEEQ_80220 },
226 { MII_OUI_SEEQ, MII_MODEL_SEEQ_84220, MII_STR_SEEQ_84220 }, 228 { MII_OUI_SEEQ, MII_MODEL_SEEQ_84220, MII_STR_SEEQ_84220 },
227 { MII_OUI_SEEQ, MII_MODEL_SEEQ_80225, MII_STR_SEEQ_80225 }, 229 { MII_OUI_SEEQ, MII_MODEL_SEEQ_80225, MII_STR_SEEQ_80225 },
228 { MII_OUI_SIS, MII_MODEL_SIS_900, MII_STR_SIS_900 }, 230 { MII_OUI_SIS, MII_MODEL_SIS_900, MII_STR_SIS_900 },
229 { MII_OUI_SMSC, MII_MODEL_SMSC_LAN83C185, MII_STR_SMSC_LAN83C185 }, 231 { MII_OUI_SMSC, MII_MODEL_SMSC_LAN83C185, MII_STR_SMSC_LAN83C185 },
230 { MII_OUI_SMSC, MII_MODEL_SMSC_LAN8700, MII_STR_SMSC_LAN8700 }, 232 { MII_OUI_SMSC, MII_MODEL_SMSC_LAN8700, MII_STR_SMSC_LAN8700 },
231 { MII_OUI_SMSC, MII_MODEL_SMSC_LAN911X, MII_STR_SMSC_LAN911X }, 233 { MII_OUI_SMSC, MII_MODEL_SMSC_LAN911X, MII_STR_SMSC_LAN911X },
232 { MII_OUI_SMSC, MII_MODEL_SMSC_LAN75XX, MII_STR_SMSC_LAN75XX }, 234 { MII_OUI_SMSC, MII_MODEL_SMSC_LAN75XX, MII_STR_SMSC_LAN75XX },
233 { MII_OUI_SMSC, MII_MODEL_SMSC_LAN8710_LAN8720, MII_STR_SMSC_LAN8710_LAN8720 }, 235 { MII_OUI_SMSC, MII_MODEL_SMSC_LAN8710_LAN8720, MII_STR_SMSC_LAN8710_LAN8720 },
234 { MII_OUI_SMSC, MII_MODEL_SMSC_LAN8740, MII_STR_SMSC_LAN8740 }, 236 { MII_OUI_SMSC, MII_MODEL_SMSC_LAN8740, MII_STR_SMSC_LAN8740 },
235 { MII_OUI_SMSC, MII_MODEL_SMSC_LAN8741A, MII_STR_SMSC_LAN8741A }, 237 { MII_OUI_SMSC, MII_MODEL_SMSC_LAN8741A, MII_STR_SMSC_LAN8741A },
236 { MII_OUI_SMSC, MII_MODEL_SMSC_LAN8742, MII_STR_SMSC_LAN8742 }, 238 { MII_OUI_SMSC, MII_MODEL_SMSC_LAN8742, MII_STR_SMSC_LAN8742 },
 239 { MII_OUI_TERANETICS, MII_MODEL_TERANETICS_TN1010, MII_STR_TERANETICS_TN1010 },
237 { MII_OUI_TI, MII_MODEL_TI_TLAN10T, MII_STR_TI_TLAN10T }, 240 { MII_OUI_TI, MII_MODEL_TI_TLAN10T, MII_STR_TI_TLAN10T },
238 { MII_OUI_TI, MII_MODEL_TI_100VGPMI, MII_STR_TI_100VGPMI }, 241 { MII_OUI_TI, MII_MODEL_TI_100VGPMI, MII_STR_TI_100VGPMI },
239 { MII_OUI_TI, MII_MODEL_TI_TNETE2101, MII_STR_TI_TNETE2101 }, 242 { MII_OUI_TI, MII_MODEL_TI_TNETE2101, MII_STR_TI_TNETE2101 },
240 { MII_OUI_xxTSC, MII_MODEL_xxTSC_78Q2120, MII_STR_xxTSC_78Q2120 }, 243 { MII_OUI_xxTSC, MII_MODEL_xxTSC_78Q2120, MII_STR_xxTSC_78Q2120 },
241 { MII_OUI_xxTSC, MII_MODEL_xxTSC_78Q2121, MII_STR_xxTSC_78Q2121 }, 244 { MII_OUI_xxTSC, MII_MODEL_xxTSC_78Q2121, MII_STR_xxTSC_78Q2121 },
242 { MII_OUI_VIA, MII_MODEL_VIA_VT6103, MII_STR_VIA_VT6103 }, 245 { MII_OUI_xxVIA, MII_MODEL_xxVIA_VT6103, MII_STR_xxVIA_VT6103 },
243 { MII_OUI_VIA, MII_MODEL_VIA_VT6103_2, MII_STR_VIA_VT6103_2 }, 246 { MII_OUI_xxVIA, MII_MODEL_xxVIA_VT6103_2, MII_STR_xxVIA_VT6103_2 },
244 { MII_OUI_xxVITESSE, MII_MODEL_xxVITESSE_VSC8601, MII_STR_xxVITESSE_VSC8601 }, 247 { MII_OUI_xxVITESSE, MII_MODEL_xxVITESSE_VSC8601, MII_STR_xxVITESSE_VSC8601 },
245 { MII_OUI_xxVITESSE, MII_MODEL_xxVITESSE_VSC8641, MII_STR_xxVITESSE_VSC8641 }, 248 { MII_OUI_xxVITESSE, MII_MODEL_xxVITESSE_VSC8641, MII_STR_xxVITESSE_VSC8641 },
246 { MII_OUI_xxVITESSE, MII_MODEL_xxVITESSE_VSC8501, MII_STR_xxVITESSE_VSC8501 }, 249 { MII_OUI_xxVITESSE, MII_MODEL_xxVITESSE_VSC8501, MII_STR_xxVITESSE_VSC8501 },
247 { MII_OUI_xxXAQTI, MII_MODEL_xxXAQTI_XMACII, MII_STR_xxXAQTI_XMACII }, 250 { MII_OUI_xxXAQTI, MII_MODEL_xxXAQTI_XMACII, MII_STR_xxXAQTI_XMACII },
248 { 0, 0, NULL } 251 { 0, 0, NULL }
249}; 252};