 @@ -1,14 +1,14 @@
-/*	$NetBSD: pmap.c,v 1.407 2020/04/17 11:21:06 skrll Exp $	*/
+/*	$NetBSD: pmap.c,v 1.408 2020/04/18 10:46:32 skrll Exp $	*/
 /*
  * Copyright 2003 Wasabi Systems, Inc.
  * All rights reserved.
+ *
  * Written by Steve C. Woodford for Wasabi Systems, Inc.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -169,111 +169,65 @@
  *       space for kernel use only. This would require re-linking all
  *       applications so that the text section starts above this 1MB
  *       boundary.
+ *
  *     o Tracking which VM space is resident in the cache/tlb has not yet
  *       been implemented for MP systems.
+ *
  *     o Finally, there is a pathological condition where two cpus running
  *       two separate processes (not lwps) which happen to share an L1
  *       can get into a fight over one or more L1 entries. This will result
  *       in a significant slow-down if both processes are in tight loops.
  */
 /*
  * Special compilation symbols
  * PMAP_DEBUG		- Build in pmap_debug_level code
  */
 /* Include header files */
 #include "opt_arm_debug.h"
 #include "opt_cpuoptions.h"
 #include "opt_pmap_debug.h"
 #include "opt_ddb.h"
 #include "opt_lockdebug.h"
 #include "opt_multiprocessor.h"
 #ifdef MULTIPROCESSOR
 #define _INTR_PRIVATE
 #endif
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.407 2020/04/17 11:21:06 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.408 2020/04/18 10:46:32 skrll Exp $");
 #include <sys/atomic.h>
 #include <sys/param.h>
 #include <sys/types.h>
 #include <sys/atomic.h>
 #include <sys/bus.h>
 #include <sys/cpu.h>
 #include <sys/intr.h>
 #include <sys/kernel.h>
 #include <sys/kernhist.h>
 #include <sys/kmem.h>
 #include <sys/pool.h>
 #include <sys/proc.h>
 #include <sys/sysctl.h>
 #include <sys/systm.h>
 #include <uvm/uvm.h>
 #include <uvm/pmap/pmap_pvt.h>
 #include <arm/locore.h>
 #ifdef DDB
 #include <arm/db_machdep.h>
 #endif
 //#define PMAP_DEBUG
 #ifdef PMAP_DEBUG
 /* XXX need to get rid of all refs to this */
 int pmap_debug_level = 0;
 /*
  * for switching to potentially finer grained debugging
  */
 #define	PDB_FOLLOW	0x0001
 #define	PDB_INIT	0x0002
 #define	PDB_ENTER	0x0004
 #define	PDB_REMOVE	0x0008
 #define	PDB_CREATE	0x0010
 #define	PDB_PTPAGE	0x0020
 #define	PDB_GROWKERN	0x0040
 #define	PDB_BITS	0x0080
 #define	PDB_COLLECT	0x0100
 #define	PDB_PROTECT	0x0200
 #define	PDB_MAP_L1	0x0400
 #define	PDB_BOOTSTRAP	0x1000
 #define	PDB_PARANOIA	0x2000
 #define	PDB_WIRING	0x4000
 #define	PDB_PVDUMP	0x8000
 #define	PDB_VAC		0x10000
 #define	PDB_KENTER	0x20000
 #define	PDB_KREMOVE	0x40000
 #define	PDB_EXEC	0x80000
 int debugmap = 1;
 int pmapdebug = 0;
 #define	NPDEBUG(_lev_,_stat_) \
 	if (pmapdebug & (_lev_)) \
         	((_stat_))
 #else	/* PMAP_DEBUG */
 #define NPDEBUG(_lev_,_stat_) /* Nothing */
 #endif	/* PMAP_DEBUG */
 #ifdef VERBOSE_INIT_ARM
 #define VPRINTF(...)	printf(__VA_ARGS__)
 #else
 #define VPRINTF(...)	__nothing
 #endif
 /*
  * pmap_kernel() points here
  */
 static struct pmap	kernel_pmap_store = {
 #ifndef ARM_MMU_EXTENDED
 	.pm_activated = true,
 	.pm_domain = PMAP_DOMAIN_KERNEL,
 @@ -798,37 +752,26 @@ static struct pool_allocator pmap_l1tt_a
  */
 vaddr_t virtual_avail;
 vaddr_t virtual_end;
 vaddr_t pmap_curmaxkvaddr;
 paddr_t avail_start;
 paddr_t avail_end;
 pv_addrqh_t pmap_boot_freeq = SLIST_HEAD_INITIALIZER(&pmap_boot_freeq);
 pv_addr_t kernelpages;
 pv_addr_t kernel_l1pt;
 pv_addr_t systempage;
 /* Function to set the debug level of the pmap code */
 #ifdef PMAP_DEBUG
 void
 pmap_debug(int level)
 	pmap_debug_level = level;
 	printf("pmap_debug: level=%d\n", pmap_debug_level);
 #endif	/* PMAP_DEBUG */
 #ifdef PMAP_CACHE_VIPT
 #define PMAP_VALIDATE_MD_PAGE(md)	\
 	KASSERTMSG(arm_cache_prefer_mask == 0 || (((md)->pvh_attrs & PVF_WRITE) == 0) == ((md)->urw_mappings + (md)->krw_mappings == 0), \
 	    "(md) %p: attrs=%#x urw=%u krw=%u", (md), \
 	    (md)->pvh_attrs, (md)->urw_mappings, (md)->krw_mappings);
 #endif /* PMAP_CACHE_VIPT */
 /*
  * A bunch of routines to conditionally flush the caches/TLB depending
  * on whether the specified pmap actually needs to be flushed at any
  * given time.
  */
 static inline void
 pmap_tlb_flush_SE(pmap_t pm, vaddr_t va, u_int flags)
 @@ -1008,30 +951,33 @@ pmap_pte_sync_current(pmap_t pm, pt_entr
 /*
  * pmap_enter_pv: enter a mapping onto a vm_page lst
+ *
  * => caller should hold the proper lock on pmap_main_lock
  * => caller should have pmap locked
  * => we will gain the lock on the vm_page and allocate the new pv_entry
  * => caller should adjust ptp's wire_count before calling
  * => caller should not adjust pmap's wire_count
  */
 static void
 pmap_enter_pv(struct vm_page_md *md, paddr_t pa, struct pv_entry *pv, pmap_t pm,
     vaddr_t va, u_int flags)
+{
-	struct pv_entry **pvp;
+	UVMHIST_FUNC(__func__);
 	UVMHIST_CALLARGS(maphist, "md %#jx pa %#jx pm %#jx va %#jx",
 	    (uintptr_t)md, (uintptr_t)pa, (uintptr_t)pm, va);
 	UVMHIST_LOG(maphist, "...pv %#jx flags %#jx",
 	    (uintptr_t)pv, flags, 0, 0);
-	NPDEBUG(PDB_PVDUMP,
+	struct pv_entry **pvp;
 	    printf("pmap_enter_pv: pm %p, md %p, flags 0x%x\n", pm, md, flags));
 	pv->pv_pmap = pm;
 	pv->pv_va = va;
 	pv->pv_flags = flags;
 	pvp = &SLIST_FIRST(&md->pvh_list);
 #ifdef PMAP_CACHE_VIPT
 	/*
 	 * Insert unmanaged entries, writeable first, at the head of
 	 * the pv list.
 	 */
 	if (__predict_true(!PV_IS_KENTRY_P(flags))) {
 		while (*pvp != NULL && PV_IS_KENTRY_P((*pvp)->pv_flags))
 @@ -1116,38 +1062,39 @@ pmap_find_pv(struct vm_page_md *md, pmap
 /*
  * pmap_remove_pv: try to remove a mapping from a pv_list
+ *
  * => caller should hold proper lock on pmap_main_lock
  * => pmap should be locked
  * => caller should hold lock on vm_page [so that attrs can be adjusted]
  * => caller should adjust ptp's wire_count and free PTP if needed
  * => caller should NOT adjust pmap's wire_count
  * => we return the removed pv
  */
 static struct pv_entry *
 pmap_remove_pv(struct vm_page_md *md, paddr_t pa, pmap_t pm, vaddr_t va)
+{
-	struct pv_entry *pv, **prevptr;
+	UVMHIST_FUNC(__func__);
 	UVMHIST_CALLARGS(maphist, "md %#jx pa %#jx pm %#jx va %#jx",
 	    (uintptr_t)md, (uintptr_t)pa, (uintptr_t)pm, va);
-	NPDEBUG(PDB_PVDUMP,
+	struct pv_entry *pv, **prevptr;
 	    printf("pmap_remove_pv: pm %p, md %p, va 0x%08lx\n", pm, md, va));
 	prevptr = &SLIST_FIRST(&md->pvh_list); /* prev pv_entry ptr */
 	pv = *prevptr;
 	while (pv) {
 		if (pv->pv_pmap == pm && pv->pv_va == va) {	/* match? */
-			NPDEBUG(PDB_PVDUMP, printf("pmap_remove_pv: pm %p, md "
+			UVMHIST_LOG(maphist, "pm %#jx md %#jx flags %#jx",
-			    "%p, flags 0x%x\n", pm, md, pv->pv_flags));
+			    (uintptr_t)pm, (uintptr_t)md, pv->pv_flags, 0);
 			if (pv->pv_flags & PVF_WIRED) {
 				--pm->pm_stats.wired_count;
+			}
 			*prevptr = SLIST_NEXT(pv, pv_link);	/* remove it! */
 			if (pm == pmap_kernel()) {
 				PMAPCOUNT(kernel_unmappings);
 				if (pv->pv_flags & PVF_WRITE)
 					md->krw_mappings--;
 				else
 					md->kro_mappings--;
 			} else {
 				if (pv->pv_flags & PVF_WRITE)
 					md->urw_mappings--;
 @@ -1212,35 +1159,38 @@ pmap_remove_pv(struct vm_page_md *md, pa
  * => caller should NOT adjust pmap's wire_count
  * => caller must call pmap_vac_me_harder() if writable status of a page
  *    may have changed.
  * => we return the old flags
+ *
  * Modify a physical-virtual mapping in the pv table
  */
 static u_int
 pmap_modify_pv(struct vm_page_md *md, paddr_t pa, pmap_t pm, vaddr_t va,
     u_int clr_mask, u_int set_mask)
+{
 	struct pv_entry *npv;
 	u_int flags, oflags;
 	UVMHIST_FUNC(__func__);
 	UVMHIST_CALLARGS(maphist, "md %#jx pa %#jx pm %#jx va %#jx",
 	    (uintptr_t)md, (uintptr_t)pa, (uintptr_t)pm, va);
 	UVMHIST_LOG(maphist, "... clr %#jx set %#jx", clr_mask, set_mask, 0, 0);
 	KASSERT(!PV_IS_KENTRY_P(clr_mask));
 	KASSERT(!PV_IS_KENTRY_P(set_mask));
-	if ((npv = pmap_find_pv(md, pm, va)) == NULL)
+	if ((npv = pmap_find_pv(md, pm, va)) == NULL) {
 		UVMHIST_LOG(maphist, "<--- done (not found)", 0, 0, 0, 0);
 		return 0;
+	}
 	NPDEBUG(PDB_PVDUMP,
 	    printf("pmap_modify_pv: pm %p, md %p, clr 0x%x, set 0x%x, flags 0x%x\n", pm, md, clr_mask, set_mask, npv->pv_flags));
 	/*
 	 * There is at least one VA mapping this page.
 	 */
 	if (clr_mask & (PVF_REF | PVF_MOD)) {
 		md->pvh_attrs |= set_mask & (PVF_REF | PVF_MOD);
 #if defined(PMAP_CACHE_VIPT) && !defined(ARM_MMU_EXTENDED)
 		if ((md->pvh_attrs & (PVF_DMOD|PVF_NC)) != PVF_NC)
 			md->pvh_attrs |= PVF_DIRTY;
 		KASSERT((md->pvh_attrs & PVF_DMOD) == 0 || (md->pvh_attrs & (PVF_DIRTY|PVF_NC)));
 #endif /* PMAP_CACHE_VIPT && !ARM_MMU_EXTENDED */
+	}
 @@ -1291,26 +1241,28 @@ pmap_modify_pv(struct vm_page_md *md, pa
 	if ((PV_IS_EXEC_P(flags) && !PV_IS_EXEC_P(md->pvh_attrs))
 	    || (PV_IS_EXEC_P(md->pvh_attrs)
 		|| (!(flags & PVF_WRITE) && (oflags & PVF_WRITE)))) {
 		pmap_syncicache_page(md, pa);
 		PMAPCOUNT(exec_synced_remap);
+	}
 #ifndef ARM_MMU_EXTENDED
 	KASSERT((md->pvh_attrs & PVF_DMOD) == 0 || (md->pvh_attrs & (PVF_DIRTY|PVF_NC)));
 #endif /* !ARM_MMU_EXTENDED */
 #endif /* PMAP_CACHE_VIPT */
 	PMAPCOUNT(remappings);
 	UVMHIST_LOG(maphist, "<--- done", 0, 0, 0, 0);
 	return oflags;
+}
 #if defined(ARM_MMU_EXTENDED)
 int
 pmap_maxproc_set(int nmaxproc)
+{
 	static const char pmap_l1ttpool_warnmsg[] =
 	    "WARNING: l1ttpool limit reached; increase kern.maxproc";
 	pool_cache_prime(&pmap_l1tt_cache, nmaxproc);
 @@ -2045,40 +1997,42 @@ pmap_vac_me_user(struct vm_page_md *md,
+			}
 			l2pte_set(ptep, npte, opte);
 			PTE_SYNC_CURRENT(pv->pv_pmap, ptep);
+		}
+	}
+}
 #endif
 #ifdef PMAP_CACHE_VIPT
 static void
 pmap_vac_me_harder(struct vm_page_md *md, paddr_t pa, pmap_t pm, vaddr_t va)
+{
 #ifndef ARM_MMU_EXTENDED
 	struct pv_entry *pv;
 	vaddr_t tst_mask;
 	bool bad_alias;
 	const u_int
 	    rw_mappings = md->urw_mappings + md->krw_mappings,
 	    ro_mappings = md->uro_mappings + md->kro_mappings;
 	/* do we need to do anything? */
 	if (arm_cache_prefer_mask == 0)
 		return;
-	NPDEBUG(PDB_VAC, printf("pmap_vac_me_harder: md=%p, pmap=%p va=%08lx\n",
+	UVMHIST_FUNC(__func__);
-	    md, pm, va));
+	UVMHIST_CALLARGS(maphist, "md %#jx pa %#jx pm %#jx va %#jx",
 	    (uintptr_t)md, (uintptr_t)pa, (uintptr_t)pm, va);
 	KASSERT(!va || pm);
 	KASSERT((md->pvh_attrs & PVF_DMOD) == 0 || (md->pvh_attrs & (PVF_DIRTY|PVF_NC)));
 	/* Already a conflict? */
 	if (__predict_false(md->pvh_attrs & PVF_NC)) {
 		/* just an add, things are already non-cached */
 		KASSERT(!(md->pvh_attrs & PVF_DIRTY));
 		KASSERT(!(md->pvh_attrs & PVF_MULTCLR));
 		bad_alias = false;
 		if (va) {
 			PMAPCOUNT(vac_color_none);
 			bad_alias = true;
 @@ -2356,29 +2310,29 @@ pmap_clearbit(struct vm_page_md *md, pad
 #ifdef PMAP_CACHE_VIPT
 	const bool want_syncicache = PV_IS_EXEC_P(md->pvh_attrs);
 	bool need_syncicache = false;
 #ifdef ARM_MMU_EXTENDED
 	const u_int execbits = (maskbits & PVF_EXEC) ? L2_XS_XN : 0;
 #else
 	const u_int execbits = 0;
 	bool need_vac_me_harder = false;
 #endif
 #else
 	const u_int execbits = 0;
 #endif
-	NPDEBUG(PDB_BITS,
+	UVMHIST_FUNC(__func__);
-	    printf("pmap_clearbit: md %p mask 0x%x\n",
+	UVMHIST_CALLARGS(maphist, "md %#jx pa %#jx maskbits %#jx",
-	    md, maskbits));
+	    (uintptr_t)md, pa, maskbits, 0);
 #ifdef PMAP_CACHE_VIPT
 	/*
 	 * If we might want to sync the I-cache and we've modified it,
 	 * then we know we definitely need to sync or discard it.
 	 */
 	if (want_syncicache) {
 		if (md->pvh_attrs & PVF_MOD) {
 			need_syncicache = true;
+		}
+	}
 #endif
 	KASSERT(pmap_page_locked_p(md));
 @@ -2451,29 +2405,28 @@ pmap_clearbit(struct vm_page_md *md, pad
 		pv->pv_flags &= ~maskbits;
 		struct l2_bucket * const l2b = pmap_get_l2_bucket(pm, va);
 		KASSERTMSG(l2b != NULL, "%#lx", va);
 		pt_entry_t * const ptep = &l2b->l2b_kva[l2pte_index(va)];
 		const pt_entry_t opte = *ptep;
 		pt_entry_t npte = opte | execbits;
 #ifdef ARM_MMU_EXTENDED
 		KASSERT((opte & L2_XS_nG) == (pm == pmap_kernel() ? 0 : L2_XS_nG));
 #endif
-		NPDEBUG(PDB_BITS,
+		UVMHIST_LOG(maphist, "pv %#jx pm %#jx va %#jx flag %#jx",
-		    printf( "%s: pv %p, pm %p, va 0x%08lx, flag 0x%x\n",
+		    (uintptr_t)pv, (uintptr_t)pm, va, oflags);
 			__func__, pv, pm, va, oflags));
 		if (maskbits & (PVF_WRITE|PVF_MOD)) {
 #ifdef PMAP_CACHE_VIVT
 			if ((oflags & PVF_NC)) {
 				/*
 				 * Entry is not cacheable:
+				 *
 				 * Don't turn caching on again if this is a
 				 * modified emulation. This would be
 				 * inconsitent with the settings created by
 				 * pmap_vac_me_harder(). Otherwise, it's safe
 				 * to re-enable cacheing.
+				 *
 @@ -2558,29 +2511,28 @@ pmap_clearbit(struct vm_page_md *md, pad
 		if (npte != opte) {
 			l2pte_reset(ptep);
 			PTE_SYNC(ptep);
 			/* Flush the TLB entry if a current pmap. */
 			pmap_tlb_flush_SE(pm, va, oflags);
 			l2pte_set(ptep, npte, 0);
 			PTE_SYNC(ptep);
+		}
 		pmap_release_pmap_lock(pm);
-		NPDEBUG(PDB_BITS,
+		UVMHIST_LOG(maphist, "pm %#jx va %#jx opte %#jx npte %#jx",
-		    printf("pmap_clearbit: pm %p va 0x%lx opte 0x%08x npte 0x%08x\n",
+		    (uintptr_t)pm, va, opte, npte);
 		    pm, va, opte, npte));
 		/* Move to next entry. */
 		pv = SLIST_NEXT(pv, pv_link);
+	}
 #if defined(PMAP_CACHE_VIPT)
 	/*
 	 * If we need to sync the I-cache and we haven't done it yet, do it.
 	 */
 	if (need_syncicache) {
 		pmap_syncicache_page(md, pa);
 		PMAPCOUNT(exec_synced_clearbit);
+	}
 @@ -2675,28 +2627,30 @@ pmap_clean_page(struct vm_page_md *md, b
 #ifdef PMAP_CACHE_VIPT
 /*
  * Sync a page with the I-cache.  Since this is a VIPT, we must pick the
  * right cache alias to make sure we flush the right stuff.
  */
 void
 pmap_syncicache_page(struct vm_page_md *md, paddr_t pa)
+{
 	pmap_t kpm = pmap_kernel();
 	const size_t way_size = arm_pcache.icache_type == CACHE_TYPE_PIPT
 	    ? PAGE_SIZE
 	    : arm_pcache.icache_way_size;
-	NPDEBUG(PDB_EXEC, printf("pmap_syncicache_page: md=%p (attrs=%#x)\n",
+	UVMHIST_FUNC(__func__);
-	    md, md->pvh_attrs));
+	UVMHIST_CALLARGS(maphist, "md %#jx pa %#jx (attrs=%#jx)",
 	    (uintptr_t)md, pa, md->pvh_attrs, 0);
 	/*
 	 * No need to clean the page if it's non-cached.
 	 */
 #ifndef ARM_MMU_EXTENDED
 	if (md->pvh_attrs & PVF_NC)
 		return;
 	KASSERT(arm_cache_prefer_mask == 0 || md->pvh_attrs & PVF_COLORED);
 #endif
 	pt_entry_t * const ptep = cpu_cdst_pte(0);
 	const vaddr_t dstp = cpu_cdstp(0);
 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
 	if (way_size <= PAGE_SIZE) {
 @@ -2750,26 +2704,30 @@ pmap_syncicache_page(struct vm_page_md *
 	PMAPCOUNT(exec_synced);
+}
 #ifndef ARM_MMU_EXTENDED
 void
 pmap_flush_page(struct vm_page_md *md, paddr_t pa, enum pmap_flush_op flush)
+{
 	vsize_t va_offset, end_va;
 	bool wbinv_p;
 	if (arm_cache_prefer_mask == 0)
 		return;
 	UVMHIST_FUNC(__func__);
 	UVMHIST_CALLARGS(maphist, "md %#jx pa %#jx op %#jx",
 	    (uintptr_t)md, pa, op, 0);
 	switch (flush) {
 	case PMAP_FLUSH_PRIMARY:
 		if (md->pvh_attrs & PVF_MULTCLR) {
 			va_offset = 0;
 			end_va = arm_cache_prefer_mask;
 			md->pvh_attrs &= ~PVF_MULTCLR;
 			PMAPCOUNT(vac_flush_lots);
 		} else {
 			va_offset = md->pvh_attrs & arm_cache_prefer_mask;
 			end_va = va_offset;
 			PMAPCOUNT(vac_flush_one);
+		}
 		/*
 @@ -2792,28 +2750,28 @@ pmap_flush_page(struct vm_page_md *md, p
 		/*
 		 * Mark that the page is no longer dirty.
 		 */
 		if ((md->pvh_attrs & PVF_DMOD) == 0)
 			md->pvh_attrs &= ~PVF_DIRTY;
 		PMAPCOUNT(vac_clean_one);
 		break;
 	default:
 		return;
+	}
 	KASSERT(!(md->pvh_attrs & PVF_NC));
-	NPDEBUG(PDB_VAC, printf("pmap_flush_page: md=%p (attrs=%#x)\n",
+	UVMHIST_LOg(maphist, "md %#jx (attrs=%#jx)",(uintptr_t)md,
-	    md, md->pvh_attrs));
+	    md->pvh_attrs);
 	const size_t scache_line_size = arm_scache.dcache_line_size;
 	for (; va_offset <= end_va; va_offset += PAGE_SIZE) {
 		pt_entry_t * const ptep = cpu_cdst_pte(va_offset);
 		const vaddr_t dstp = cpu_cdstp(va_offset);
 		const pt_entry_t opte = *ptep;
 		if (flush == PMAP_FLUSH_SECONDARY
 		    && va_offset == (md->pvh_attrs & arm_cache_prefer_mask))
 			continue;
 		pmap_tlb_flush_SE(pmap_kernel(), dstp, PVF_REF | PVF_EXEC);
 @@ -2873,29 +2831,28 @@ pmap_flush_page(struct vm_page_md *md, p
  *		Reflects back modify bits to the pager.
  */
 static void
 pmap_page_remove(struct vm_page_md *md, paddr_t pa)
+{
 	struct l2_bucket *l2b;
 	struct pv_entry *pv;
 	pt_entry_t *ptep;
 #ifndef ARM_MMU_EXTENDED
 	bool flush = false;
 #endif
 	u_int flags = 0;
-	NPDEBUG(PDB_FOLLOW,
+	UVMHIST_FUNC(__func__);
-	    printf("pmap_page_remove: md %p (0x%08lx)\n", md,
+	UVMHIST_CALLARGS(maphist, "md %#jx pa %#jx", (uintptr_t)md, pa, 0, 0);
 	    pa));
 	struct pv_entry **pvp = &SLIST_FIRST(&md->pvh_list);
 	pmap_acquire_page_lock(md);
 	if (*pvp == NULL) {
 #ifdef PMAP_CACHE_VIPT
 		/*
 		 * We *know* the page contents are about to be replaced.
 		 * Discard the exec contents
 		 */
 		if (PV_IS_EXEC_P(md->pvh_attrs))
 			PMAPCOUNT(exec_discarded_page_protect);
 		md->pvh_attrs &= ~PVF_EXEC;
 		PMAP_VALIDATE_MD_PAGE(md);
 @@ -4083,29 +4040,29 @@ pmap_pv_protect(paddr_t pa, vm_prot_t pr
+{
 	/* the only case is remove at the moment */
 	KASSERT(prot == VM_PROT_NONE);
 	pmap_pv_remove(pa);
+}
 void
 pmap_protect(pmap_t pm, vaddr_t sva, vaddr_t eva, vm_prot_t prot)
+{
 	struct l2_bucket *l2b;
 	vaddr_t next_bucket;
-	NPDEBUG(PDB_PROTECT,
+	UVMHIST_FUNC(__func__);
-	    printf("pmap_protect: pm %p sva 0x%lx eva 0x%lx prot 0x%x\n",
+	UVMHIST_CALLARGS(maphist, "pm %#jx va %#jx...#%jx prot %#jx",
-	    pm, sva, eva, prot));
+	    (uintptr_t)pm, sva, eva, prot);
 	if ((prot & VM_PROT_READ) == 0) {
 		pmap_remove(pm, sva, eva);
 		return;
+	}
 	if (prot & VM_PROT_WRITE) {
 		/*
 		 * If this is a read->write transition, just ignore it and let
 		 * uvm_fault() take care of it later.
 		 */
 		return;
+	}
 @@ -4200,29 +4157,29 @@ pmap_protect(pmap_t pm, vaddr_t sva, vad
 #endif
 	pmap_release_pmap_lock(pm);
+}
 void
 pmap_icache_sync_range(pmap_t pm, vaddr_t sva, vaddr_t eva)
+{
 	struct l2_bucket *l2b;
 	pt_entry_t *ptep;
 	vaddr_t next_bucket;
 	vsize_t page_size = trunc_page(sva) + PAGE_SIZE - sva;
-	NPDEBUG(PDB_EXEC,
+	UVMHIST_FUNC(__func__);
-	    printf("pmap_icache_sync_range: pm %p sva 0x%lx eva 0x%lx\n",
+	UVMHIST_CALLARGS(maphist, "pm %#jx va %#jx...#%jx",
-	    pm, sva, eva));
+	    (uintptr_t)pm, sva, eva, 0);
 	pmap_acquire_pmap_lock(pm);
 	while (sva < eva) {
 		next_bucket = L2_NEXT_BUCKET_VA(sva);
 		if (next_bucket > eva)
 			next_bucket = eva;
 		l2b = pmap_get_l2_bucket(pm, sva);
 		if (l2b == NULL) {
 			sva = next_bucket;
 			continue;
+		}
 @@ -4238,29 +4195,29 @@ pmap_icache_sync_range(pmap_t pm, vaddr_
+			}
+		}
+	}
 	pmap_release_pmap_lock(pm);
+}
 void
 pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
+{
 	struct vm_page_md *md = VM_PAGE_TO_MD(pg);
 	paddr_t pa = VM_PAGE_TO_PHYS(pg);
-	NPDEBUG(PDB_PROTECT,
+	UVMHIST_FUNC(__func__);
-	    printf("pmap_page_protect: md %p (0x%08lx), prot 0x%x\n",
+	UVMHIST_CALLARGS(maphist, "md %#jx pa %#jx prot %#jx",
-	    md, pa, prot));
+	    (uintptr_t)md, pa, prot, 0);
 	switch(prot) {
 	case VM_PROT_READ|VM_PROT_WRITE:
 #if defined(ARM_MMU_EXTENDED)
 		pmap_acquire_page_lock(md);
 		pmap_clearbit(md, pa, PVF_EXEC);
 		pmap_release_page_lock(md);
 		break;
 #endif
 	case VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE:
 		break;
 	case VM_PROT_READ:
 @@ -4856,27 +4813,28 @@ pmap_procwr(struct proc *p, vaddr_t va,
  * Function:	Clear the wired attribute for a map/virtual-address pair.
+ *
  * In/out conditions:
  *		The mapping must already exist in the pmap.
  */
 void
 pmap_unwire(pmap_t pm, vaddr_t va)
+{
 	struct l2_bucket *l2b;
 	pt_entry_t *ptep, pte;
 	struct vm_page *pg;
 	paddr_t pa;
-	NPDEBUG(PDB_WIRING, printf("pmap_unwire: pm %p, va 0x%08lx\n", pm, va));
+	UVMHIST_FUNC(__func__);
 	UVMHIST_CALLARGS(maphist, "pm %#jx va %#jx", (uintptr_t)pm, va, 0, 0);
 	pmap_acquire_pmap_lock(pm);
 	l2b = pmap_get_l2_bucket(pm, va);
 	KDASSERT(l2b != NULL);
 	ptep = &l2b->l2b_kva[l2pte_index(va)];
 	pte = *ptep;
 	/* Extract the physical address of the page */
 	pa = l2pte_pa(pte);
 	if ((pg = PHYS_TO_VM_PAGE(pa)) != NULL) {
 @@ -4917,29 +4875,26 @@ pmap_md_pdetab_activate(pmap_t pm, struc
 	cpu_setttb(pm->pm_l1_pa, pai->pai_asid);
 	/*
 	 * Now we can reenable tablewalks since the CONTEXTIDR and TTRB0
 	 * have been updated.
 	 */
 	arm_isb();
 	if (pm != pmap_kernel()) {
 		armreg_ttbcr_write(old_ttbcr & ~TTBCR_S_PD0);
+	}
 	cpu_cpwait();
 	UVMHIST_LOG(maphist, " pm %#jx pm->pm_l1_pa %08jx asid %ju... done",
 	    (uintptr_t)pm, pm->pm_l1_pa, pai->pai_asid, 0);
 	KASSERTMSG(ci->ci_pmap_asid_cur == pai->pai_asid, "%u vs %u",
 	    ci->ci_pmap_asid_cur, pai->pai_asid);
 	ci->ci_pmap_cur = pm;
+}
 void
 pmap_md_pdetab_deactivate(pmap_t pm)
+{
 	UVMHIST_FUNC(__func__);
 	UVMHIST_CALLARGS(maphist, "pm %#jx", (uintptr_t)pm, 0, 0, 0);
 	kpreempt_disable();
 @@ -5969,39 +5924,39 @@ pmap_grow_l2_bucket(pmap_t pm, vaddr_t v
 		l2b->l2b_l1slot = l1slot;
 		l2b->l2b_pa = pmap_kernel_l2ptp_phys;
 		pmap_kernel_l2ptp_kva += L2_TABLE_SIZE_REAL;
 		pmap_kernel_l2ptp_phys += L2_TABLE_SIZE_REAL;
+	}
 	return l2b;
+}
 vaddr_t
 pmap_growkernel(vaddr_t maxkvaddr)
+{
 	UVMHIST_FUNC(__func__);
 	UVMHIST_CALLARGS(maphist, "growing kernel from %#jx to %#jx\n",
 	    pmap_curmaxkvaddr, maxkvaddr, 0, 0);
 	pmap_t kpm = pmap_kernel();
 #ifndef ARM_MMU_EXTENDED
 	struct l1_ttable *l1;
 #endif
 	int s;
 	if (maxkvaddr <= pmap_curmaxkvaddr)
 		goto out;		/* we are OK */
 	NPDEBUG(PDB_GROWKERN,
 	    printf("pmap_growkernel: growing kernel from 0x%lx to 0x%lx\n",
 	    pmap_curmaxkvaddr, maxkvaddr));
 	KDASSERT(maxkvaddr <= virtual_end);
 	/*
 	 * whoops!   we need to add kernel PTPs
 	 */
 	s = splvm();	/* to be safe */
 	mutex_enter(&kpm_lock);
 	/* Map 1MB at a time */
 	size_t l1slot = l1pte_index(pmap_curmaxkvaddr);
 #ifdef ARM_MMU_EXTENDED
 	pd_entry_t * const spdep = &kpm->pm_l1[l1slot];