| @@ -1,99 +1,95 @@ | | | @@ -1,99 +1,95 @@ |
1 | /* $NetBSD: ipi.c,v 1.15 2020/07/06 09:34:18 rin Exp $ */ | | 1 | /* $NetBSD: ipi.c,v 1.16 2020/07/06 11:01:24 rin Exp $ */ |
2 | /*- | | 2 | /*- |
3 | * Copyright (c) 2007 The NetBSD Foundation, Inc. | | 3 | * Copyright (c) 2007 The NetBSD Foundation, Inc. |
4 | * All rights reserved. | | 4 | * All rights reserved. |
5 | * | | 5 | * |
6 | * This code is derived from software contributed to The NetBSD Foundation | | 6 | * This code is derived from software contributed to The NetBSD Foundation |
7 | * by Tim Rightnour | | 7 | * by Tim Rightnour |
8 | * | | 8 | * |
9 | * Redistribution and use in source and binary forms, with or without | | 9 | * Redistribution and use in source and binary forms, with or without |
10 | * modification, are permitted provided that the following conditions | | 10 | * modification, are permitted provided that the following conditions |
11 | * are met: | | 11 | * are met: |
12 | * 1. Redistributions of source code must retain the above copyright | | 12 | * 1. Redistributions of source code must retain the above copyright |
13 | * notice, this list of conditions and the following disclaimer. | | 13 | * notice, this list of conditions and the following disclaimer. |
14 | * 2. Redistributions in binary form must reproduce the above copyright | | 14 | * 2. Redistributions in binary form must reproduce the above copyright |
15 | * notice, this list of conditions and the following disclaimer in the | | 15 | * notice, this list of conditions and the following disclaimer in the |
16 | * documentation and/or other materials provided with the distribution. | | 16 | * documentation and/or other materials provided with the distribution. |
17 | * | | 17 | * |
18 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS | | 18 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
19 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | | 19 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
20 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | | 20 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
21 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS | | 21 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
22 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | | 22 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | | 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | | 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | | 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | | 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | | 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
28 | * POSSIBILITY OF SUCH DAMAGE. | | 28 | * POSSIBILITY OF SUCH DAMAGE. |
29 | */ | | 29 | */ |
30 | | | 30 | |
31 | #include <sys/cdefs.h> | | 31 | #include <sys/cdefs.h> |
32 | __KERNEL_RCSID(0, "$NetBSD: ipi.c,v 1.15 2020/07/06 09:34:18 rin Exp $"); | | 32 | __KERNEL_RCSID(0, "$NetBSD: ipi.c,v 1.16 2020/07/06 11:01:24 rin Exp $"); |
33 | | | 33 | |
34 | #ifdef _KERNEL_OPT | | 34 | #ifdef _KERNEL_OPT |
35 | #include "opt_altivec.h" | | | |
36 | #include "opt_interrupt.h" | | | |
37 | #include "opt_ipi.h" | | | |
38 | #include "opt_multiprocessor.h" | | 35 | #include "opt_multiprocessor.h" |
39 | #include "opt_pic.h" | | | |
40 | #endif | | 36 | #endif |
41 | | | 37 | |
42 | #include <sys/param.h> | | 38 | #include <sys/param.h> |
43 | #include <sys/kernel.h> | | 39 | #include <sys/kernel.h> |
44 | #include <sys/xcall.h> | | 40 | #include <sys/xcall.h> |
45 | #include <sys/ipi.h> | | 41 | #include <sys/ipi.h> |
46 | #include <sys/atomic.h> | | 42 | #include <sys/atomic.h> |
47 | #include <sys/cpu.h> | | 43 | #include <sys/cpu.h> |
48 | | | 44 | |
49 | #include <powerpc/psl.h> | | 45 | #include <powerpc/psl.h> |
50 | | | 46 | |
51 | #include <powerpc/pic/picvar.h> | | 47 | #include <powerpc/pic/picvar.h> |
52 | #include <powerpc/pic/ipivar.h> | | 48 | #include <powerpc/pic/ipivar.h> |
53 | | | 49 | |
54 | #ifdef MULTIPROCESSOR | | 50 | #ifdef MULTIPROCESSOR |
55 | | | 51 | |
56 | struct ipi_ops ipiops; | | 52 | struct ipi_ops ipiops; |
57 | | | 53 | |
58 | /* Process an actual IPI */ | | 54 | /* Process an actual IPI */ |
59 | | | 55 | |
60 | int | | 56 | int |
61 | ipi_intr(void *v) | | 57 | ipi_intr(void *v) |
62 | { | | 58 | { |
63 | struct cpu_info * const ci = curcpu(); | | 59 | struct cpu_info * const ci = curcpu(); |
64 | int cpu_id = cpu_index(ci); | | 60 | int cpu_id = cpu_index(ci); |
65 | int msr; | | 61 | int msr; |
66 | uint32_t ipi; | | 62 | uint32_t ipi; |
67 | | | 63 | |
68 | ci->ci_ev_ipi.ev_count++; | | 64 | ci->ci_ev_ipi.ev_count++; |
69 | ipi = atomic_swap_32(&ci->ci_pending_ipis, 0); | | 65 | ipi = atomic_swap_32(&ci->ci_pending_ipis, 0); |
70 | | | 66 | |
71 | if (ipi == IPI_NOMESG) | | 67 | if (ipi == IPI_NOMESG) |
72 | return 1; | | 68 | return 1; |
73 | | | 69 | |
74 | if (ipi & IPI_XCALL) | | 70 | if (ipi & IPI_XCALL) |
75 | xc_ipi_handler(); | | 71 | xc_ipi_handler(); |
76 | | | 72 | |
77 | if (ipi & IPI_GENERIC) | | 73 | if (ipi & IPI_GENERIC) |
78 | ipi_cpu_handler(); | | 74 | ipi_cpu_handler(); |
79 | | | 75 | |
80 | if (ipi & IPI_SUSPEND) | | 76 | if (ipi & IPI_SUSPEND) |
81 | cpu_pause(NULL); | | 77 | cpu_pause(NULL); |
82 | | | 78 | |
83 | if (ipi & IPI_AST) | | 79 | if (ipi & IPI_AST) |
84 | ci->ci_onproc->l_md.md_astpending = 1; | | 80 | ci->ci_onproc->l_md.md_astpending = 1; |
85 | | | 81 | |
86 | if (ipi & IPI_HALT) { | | 82 | if (ipi & IPI_HALT) { |
87 | struct cpuset_info * const csi = &cpuset_info; | | 83 | struct cpuset_info * const csi = &cpuset_info; |
88 | aprint_normal("halting CPU %d\n", cpu_id); | | 84 | aprint_normal("halting CPU %d\n", cpu_id); |
89 | kcpuset_set(csi->cpus_halted, cpu_id); | | 85 | kcpuset_set(csi->cpus_halted, cpu_id); |
90 | msr = (mfmsr() & ~PSL_EE) | PSL_POW; | | 86 | msr = (mfmsr() & ~PSL_EE) | PSL_POW; |
91 | for (;;) { | | 87 | for (;;) { |
92 | __asm volatile ("sync; isync"); | | 88 | __asm volatile ("sync; isync"); |
93 | mtmsr(msr); | | 89 | mtmsr(msr); |
94 | } | | 90 | } |
95 | } | | 91 | } |
96 | | | 92 | |
97 | return 1; | | 93 | return 1; |
98 | } | | 94 | } |
99 | #endif /*MULTIPROCESSOR*/ | | 95 | #endif /*MULTIPROCESSOR*/ |