| @@ -1,1762 +1,1762 @@ | | | @@ -1,1762 +1,1762 @@ |
1 | /* $NetBSD: auixp.c,v 1.47.2.1 2020/03/21 15:31:50 martin Exp $ */ | | 1 | /* $NetBSD: auixp.c,v 1.47.2.2 2020/07/07 10:46:27 martin Exp $ */ |
2 | | | 2 | |
3 | /* | | 3 | /* |
4 | * Copyright (c) 2004, 2005 Reinoud Zandijk <reinoud@netbsd.org> | | 4 | * Copyright (c) 2004, 2005 Reinoud Zandijk <reinoud@netbsd.org> |
5 | * All rights reserved. | | 5 | * All rights reserved. |
6 | * | | 6 | * |
7 | * Redistribution and use in source and binary forms, with or without | | 7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions | | 8 | * modification, are permitted provided that the following conditions |
9 | * are met: | | 9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright | | 10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. | | 11 | * notice, this list of conditions and the following disclaimer. |
12 | * 2. The name of the author may not be used to endorse or promote products | | 12 | * 2. The name of the author may not be used to endorse or promote products |
13 | * derived from this software without specific prior written permission. | | 13 | * derived from this software without specific prior written permission. |
14 | * 3. All advertising materials mentioning features or use of this software | | 14 | * 3. All advertising materials mentioning features or use of this software |
15 | * must display the following acknowledgement: | | 15 | * must display the following acknowledgement: |
16 | * This product includes software developed by the NetBSD | | 16 | * This product includes software developed by the NetBSD |
17 | * Foundation, Inc. and its contributors. | | 17 | * Foundation, Inc. and its contributors. |
18 | * 4. Neither the name of The NetBSD Foundation nor the names of its | | 18 | * 4. Neither the name of The NetBSD Foundation nor the names of its |
19 | * contributors may be used to endorse or promote products derived | | 19 | * contributors may be used to endorse or promote products derived |
20 | * from this software without specific prior written permission. | | 20 | * from this software without specific prior written permission. |
21 | * | | 21 | * |
22 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | | 22 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
23 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | | 23 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
24 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | | 24 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
25 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | | 25 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
26 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | | 26 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
27 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | | 27 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
28 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED | | 28 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
29 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | | 29 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
31 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | | 31 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
32 | * SUCH DAMAGE. | | 32 | * SUCH DAMAGE. |
33 | */ | | 33 | */ |
34 | | | 34 | |
35 | | | 35 | |
36 | /* | | 36 | /* |
37 | * NetBSD audio driver for ATI IXP-{150,200,...} audio driver hardware. | | 37 | * NetBSD audio driver for ATI IXP-{150,200,...} audio driver hardware. |
38 | * | | 38 | * |
39 | * Recording and playback has been tested OK on various sample rates and | | 39 | * Recording and playback has been tested OK on various sample rates and |
40 | * encodings. | | 40 | * encodings. |
41 | * | | 41 | * |
42 | * Known problems and issues : | | 42 | * Known problems and issues : |
43 | * - SPDIF is untested and needs some work still (LED stays off) | | 43 | * - SPDIF is untested and needs some work still (LED stays off) |
44 | * - 32 bit audio playback failed last time i tried but that might an AC'97 | | 44 | * - 32 bit audio playback failed last time i tried but that might an AC'97 |
45 | * codec support problem. | | 45 | * codec support problem. |
46 | * - 32 bit recording works but can't try out playing: see above. | | 46 | * - 32 bit recording works but can't try out playing: see above. |
47 | * - no suspend/resume support yet. | | 47 | * - no suspend/resume support yet. |
48 | * - multiple codecs are `supported' but not tested; the implemetation needs | | 48 | * - multiple codecs are `supported' but not tested; the implemetation needs |
49 | * some cleaning up. | | 49 | * some cleaning up. |
50 | */ | | 50 | */ |
51 | | | 51 | |
52 | #include <sys/cdefs.h> | | 52 | #include <sys/cdefs.h> |
53 | __KERNEL_RCSID(0, "$NetBSD: auixp.c,v 1.47.2.1 2020/03/21 15:31:50 martin Exp $"); | | 53 | __KERNEL_RCSID(0, "$NetBSD: auixp.c,v 1.47.2.2 2020/07/07 10:46:27 martin Exp $"); |
54 | | | 54 | |
55 | #include <sys/types.h> | | 55 | #include <sys/types.h> |
56 | #include <sys/errno.h> | | 56 | #include <sys/errno.h> |
57 | #include <sys/null.h> | | 57 | #include <sys/null.h> |
58 | #include <sys/param.h> | | 58 | #include <sys/param.h> |
59 | #include <sys/systm.h> | | 59 | #include <sys/systm.h> |
60 | #include <sys/kmem.h> | | 60 | #include <sys/kmem.h> |
61 | #include <sys/device.h> | | 61 | #include <sys/device.h> |
62 | #include <sys/conf.h> | | 62 | #include <sys/conf.h> |
63 | #include <sys/exec.h> | | 63 | #include <sys/exec.h> |
64 | #include <sys/select.h> | | 64 | #include <sys/select.h> |
65 | #include <sys/audioio.h> | | 65 | #include <sys/audioio.h> |
66 | #include <sys/queue.h> | | 66 | #include <sys/queue.h> |
67 | #include <sys/bus.h> | | 67 | #include <sys/bus.h> |
68 | #include <sys/intr.h> | | 68 | #include <sys/intr.h> |
69 | | | 69 | |
70 | #include <dev/audio/audio_if.h> | | 70 | #include <dev/audio/audio_if.h> |
71 | | | 71 | |
72 | #include <dev/ic/ac97var.h> | | 72 | #include <dev/ic/ac97var.h> |
73 | #include <dev/ic/ac97reg.h> | | 73 | #include <dev/ic/ac97reg.h> |
74 | | | 74 | |
75 | #include <dev/pci/pcidevs.h> | | 75 | #include <dev/pci/pcidevs.h> |
76 | #include <dev/pci/pcivar.h> | | 76 | #include <dev/pci/pcivar.h> |
77 | #include <dev/pci/auixpreg.h> | | 77 | #include <dev/pci/auixpreg.h> |
78 | #include <dev/pci/auixpvar.h> | | 78 | #include <dev/pci/auixpvar.h> |
79 | | | 79 | |
80 | | | 80 | |
81 | /* #define DEBUG_AUIXP */ | | 81 | /* #define DEBUG_AUIXP */ |
82 | | | 82 | |
83 | | | 83 | |
84 | /* why isn't this base address register not in the headerfile? */ | | 84 | /* why isn't this base address register not in the headerfile? */ |
85 | #define PCI_CBIO 0x10 | | 85 | #define PCI_CBIO 0x10 |
86 | | | 86 | |
87 | | | 87 | |
88 | /* macro's used */ | | 88 | /* macro's used */ |
89 | #define KERNADDR(p) ((void *)((p)->addr)) | | 89 | #define KERNADDR(p) ((void *)((p)->addr)) |
90 | #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) | | 90 | #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) |
91 | | | 91 | |
92 | | | 92 | |
93 | /* the differences might be irrelevant */ | | 93 | /* the differences might be irrelevant */ |
94 | enum { | | 94 | enum { |
95 | IXP_200, | | 95 | IXP_200, |
96 | IXP_300, | | 96 | IXP_300, |
97 | IXP_400 | | 97 | IXP_400 |
98 | }; | | 98 | }; |
99 | | | 99 | |
100 | | | 100 | |
101 | /* our `cards' */ | | 101 | /* our `cards' */ |
102 | static const struct auixp_card_type { | | 102 | static const struct auixp_card_type { |
103 | uint16_t pci_vendor_id; | | 103 | uint16_t pci_vendor_id; |
104 | uint16_t pci_product_id; | | 104 | uint16_t pci_product_id; |
105 | int type; | | 105 | int type; |
106 | } auixp_card_types[] = { | | 106 | } auixp_card_types[] = { |
107 | { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_AUDIO_200, IXP_200 }, | | 107 | { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_AUDIO_200, IXP_200 }, |
108 | { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_AUDIO_300, IXP_300 }, | | 108 | { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_AUDIO_300, IXP_300 }, |
109 | { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_AUDIO_400, IXP_400 }, | | 109 | { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_AUDIO_400, IXP_400 }, |
110 | { 0, 0, 0 } | | 110 | { 0, 0, 0 } |
111 | }; | | 111 | }; |
112 | | | 112 | |
113 | | | 113 | |
114 | struct audio_device auixp_device = { | | 114 | struct audio_device auixp_device = { |
115 | "ATI IXP audio", | | 115 | "ATI IXP audio", |
116 | "", | | 116 | "", |
117 | "auixp" | | 117 | "auixp" |
118 | }; | | 118 | }; |
119 | | | 119 | |
120 | /* | | 120 | /* |
121 | * current AC'97 driver only supports SPDIF outputting channel 3&4 i.e. STEREO | | 121 | * current AC'97 driver only supports SPDIF outputting channel 3&4 i.e. STEREO |
122 | */ | | 122 | */ |
123 | #define AUIXP_FORMAT(aumode, ch, chmask) \ | | 123 | #define AUIXP_FORMAT(aumode, ch, chmask) \ |
124 | { \ | | 124 | { \ |
125 | .mode = (aumode), \ | | 125 | .mode = (aumode), \ |
126 | .encoding = AUDIO_ENCODING_SLINEAR_LE, \ | | 126 | .encoding = AUDIO_ENCODING_SLINEAR_LE, \ |
127 | .validbits = 16, \ | | 127 | .validbits = 16, \ |
128 | .precision = 16, \ | | 128 | .precision = 16, \ |
129 | .channels = (ch), \ | | 129 | .channels = (ch), \ |
130 | .channel_mask = (chmask), \ | | 130 | .channel_mask = (chmask), \ |
131 | .frequency_type = 0, \ | | 131 | .frequency_type = 0, \ |
132 | .frequency = { 7000, 48000 }, \ | | 132 | .frequency = { 7000, 48000 }, \ |
133 | } | | 133 | } |
134 | static const struct audio_format auixp_formats[AUIXP_NFORMATS] = { | | 134 | static const struct audio_format auixp_formats[AUIXP_NFORMATS] = { |
135 | AUIXP_FORMAT(AUMODE_PLAY | AUMODE_RECORD, 2, AUFMT_STEREO), | | 135 | AUIXP_FORMAT(AUMODE_PLAY | AUMODE_RECORD, 2, AUFMT_STEREO), |
136 | AUIXP_FORMAT(AUMODE_PLAY , 4, AUFMT_SURROUND4), | | 136 | AUIXP_FORMAT(AUMODE_PLAY , 4, AUFMT_SURROUND4), |
137 | AUIXP_FORMAT(AUMODE_PLAY , 6, AUFMT_DOLBY_5_1), | | 137 | AUIXP_FORMAT(AUMODE_PLAY , 6, AUFMT_DOLBY_5_1), |
138 | }; | | 138 | }; |
139 | | | 139 | |
140 | /* codec detection constant indicating the interrupt flags */ | | 140 | /* codec detection constant indicating the interrupt flags */ |
141 | #define ALL_CODECS_NOT_READY \ | | 141 | #define ALL_CODECS_NOT_READY \ |
142 | (ATI_REG_ISR_CODEC0_NOT_READY |\ | | 142 | (ATI_REG_ISR_CODEC0_NOT_READY |\ |
143 | ATI_REG_ISR_CODEC1_NOT_READY |\ | | 143 | ATI_REG_ISR_CODEC1_NOT_READY |\ |
144 | ATI_REG_ISR_CODEC2_NOT_READY) | | 144 | ATI_REG_ISR_CODEC2_NOT_READY) |
145 | #define CODEC_CHECK_BITS (ALL_CODECS_NOT_READY|ATI_REG_ISR_NEW_FRAME) | | 145 | #define CODEC_CHECK_BITS (ALL_CODECS_NOT_READY|ATI_REG_ISR_NEW_FRAME) |
146 | | | 146 | |
147 | | | 147 | |
148 | /* autoconfig */ | | 148 | /* autoconfig */ |
149 | static int auixp_match(device_t, cfdata_t, void *); | | 149 | static int auixp_match(device_t, cfdata_t, void *); |
150 | static void auixp_attach(device_t, device_t, void *); | | 150 | static void auixp_attach(device_t, device_t, void *); |
151 | static int auixp_detach(device_t, int); | | 151 | static int auixp_detach(device_t, int); |
152 | | | 152 | |
153 | | | 153 | |
154 | /* audio(9) function prototypes */ | | 154 | /* audio(9) function prototypes */ |
155 | static int auixp_query_format(void *, audio_format_query_t *); | | 155 | static int auixp_query_format(void *, audio_format_query_t *); |
156 | static int auixp_set_format(void *, int, | | 156 | static int auixp_set_format(void *, int, |
157 | const audio_params_t *, const audio_params_t *, | | 157 | const audio_params_t *, const audio_params_t *, |
158 | audio_filter_reg_t *, audio_filter_reg_t *); | | 158 | audio_filter_reg_t *, audio_filter_reg_t *); |
159 | static int auixp_commit_settings(void *); | | 159 | static int auixp_commit_settings(void *); |
160 | static int auixp_round_blocksize(void *, int, int, const audio_params_t *); | | 160 | static int auixp_round_blocksize(void *, int, int, const audio_params_t *); |
161 | static int auixp_trigger_output(void *, void *, void *, int, | | 161 | static int auixp_trigger_output(void *, void *, void *, int, |
162 | void (*)(void *), | | 162 | void (*)(void *), |
163 | void *, const audio_params_t *); | | 163 | void *, const audio_params_t *); |
164 | static int auixp_trigger_input(void *, void *, void *, int, | | 164 | static int auixp_trigger_input(void *, void *, void *, int, |
165 | void (*)(void *), | | 165 | void (*)(void *), |
166 | void *, const audio_params_t *); | | 166 | void *, const audio_params_t *); |
167 | static int auixp_halt_output(void *); | | 167 | static int auixp_halt_output(void *); |
168 | static int auixp_halt_input(void *); | | 168 | static int auixp_halt_input(void *); |
169 | static int auixp_set_port(void *, mixer_ctrl_t *); | | 169 | static int auixp_set_port(void *, mixer_ctrl_t *); |
170 | static int auixp_get_port(void *, mixer_ctrl_t *); | | 170 | static int auixp_get_port(void *, mixer_ctrl_t *); |
171 | static int auixp_query_devinfo(void *, mixer_devinfo_t *); | | 171 | static int auixp_query_devinfo(void *, mixer_devinfo_t *); |
172 | static void * auixp_malloc(void *, int, size_t); | | 172 | static void * auixp_malloc(void *, int, size_t); |
173 | static void auixp_free(void *, void *, size_t); | | 173 | static void auixp_free(void *, void *, size_t); |
174 | static int auixp_getdev(void *, struct audio_device *); | | 174 | static int auixp_getdev(void *, struct audio_device *); |
175 | static size_t auixp_round_buffersize(void *, int, size_t); | | 175 | static size_t auixp_round_buffersize(void *, int, size_t); |
176 | static int auixp_get_props(void *); | | 176 | static int auixp_get_props(void *); |
177 | static int auixp_intr(void *); | | 177 | static int auixp_intr(void *); |
178 | static int auixp_allocmem(struct auixp_softc *, size_t, size_t, | | 178 | static int auixp_allocmem(struct auixp_softc *, size_t, size_t, |
179 | struct auixp_dma *); | | 179 | struct auixp_dma *); |
180 | static int auixp_freemem(struct auixp_softc *, struct auixp_dma *); | | 180 | static int auixp_freemem(struct auixp_softc *, struct auixp_dma *); |
181 | | | 181 | |
182 | /* Supporting subroutines */ | | 182 | /* Supporting subroutines */ |
183 | static int auixp_init(struct auixp_softc *); | | 183 | static int auixp_init(struct auixp_softc *); |
184 | static void auixp_autodetect_codecs(struct auixp_softc *); | | 184 | static void auixp_autodetect_codecs(struct auixp_softc *); |
185 | static void auixp_post_config(device_t); | | 185 | static void auixp_post_config(device_t); |
186 | | | 186 | |
187 | static void auixp_reset_aclink(struct auixp_softc *); | | 187 | static void auixp_reset_aclink(struct auixp_softc *); |
188 | static int auixp_attach_codec(void *, struct ac97_codec_if *); | | 188 | static int auixp_attach_codec(void *, struct ac97_codec_if *); |
189 | static int auixp_read_codec(void *, uint8_t, uint16_t *); | | 189 | static int auixp_read_codec(void *, uint8_t, uint16_t *); |
190 | static int auixp_write_codec(void *, uint8_t, uint16_t); | | 190 | static int auixp_write_codec(void *, uint8_t, uint16_t); |
191 | static int auixp_wait_for_codecs(struct auixp_softc *, const char *); | | 191 | static int auixp_wait_for_codecs(struct auixp_softc *, const char *); |
192 | static int auixp_reset_codec(void *); | | 192 | static int auixp_reset_codec(void *); |
193 | static enum ac97_host_flags auixp_flags_codec(void *); | | 193 | static enum ac97_host_flags auixp_flags_codec(void *); |
194 | | | 194 | |
195 | static void auixp_enable_dma(struct auixp_softc *, struct auixp_dma *); | | 195 | static void auixp_enable_dma(struct auixp_softc *, struct auixp_dma *); |
196 | static void auixp_disable_dma(struct auixp_softc *, struct auixp_dma *); | | 196 | static void auixp_disable_dma(struct auixp_softc *, struct auixp_dma *); |
197 | static void auixp_enable_interrupts(struct auixp_softc *); | | 197 | static void auixp_enable_interrupts(struct auixp_softc *); |
198 | static void auixp_disable_interrupts(struct auixp_softc *); | | 198 | static void auixp_disable_interrupts(struct auixp_softc *); |
199 | | | 199 | |
200 | | | 200 | |
201 | /* statics */ | | 201 | /* statics */ |
202 | static void auixp_link_daisychain(struct auixp_softc *, | | 202 | static void auixp_link_daisychain(struct auixp_softc *, |
203 | struct auixp_dma *, struct auixp_dma *, | | 203 | struct auixp_dma *, struct auixp_dma *, |
204 | int, int); | | 204 | int, int); |
205 | static int auixp_allocate_dma_chain(struct auixp_softc *, | | 205 | static int auixp_allocate_dma_chain(struct auixp_softc *, |
206 | struct auixp_dma **); | | 206 | struct auixp_dma **); |
207 | static void auixp_program_dma_chain(struct auixp_softc *, | | 207 | static void auixp_program_dma_chain(struct auixp_softc *, |
208 | struct auixp_dma *); | | 208 | struct auixp_dma *); |
209 | static void auixp_dma_update(struct auixp_softc *, struct auixp_dma *); | | 209 | static void auixp_dma_update(struct auixp_softc *, struct auixp_dma *); |
210 | static void auixp_update_busbusy(struct auixp_softc *); | | 210 | static void auixp_update_busbusy(struct auixp_softc *); |
211 | static void auixp_get_locks(void *, kmutex_t **, kmutex_t **); | | 211 | static void auixp_get_locks(void *, kmutex_t **, kmutex_t **); |
212 | | | 212 | |
213 | static bool auixp_resume(device_t, const pmf_qual_t *); | | 213 | static bool auixp_resume(device_t, const pmf_qual_t *); |
214 | | | 214 | |
215 | | | 215 | |
216 | #ifdef DEBUG_AUIXP | | 216 | #ifdef DEBUG_AUIXP |
217 | static struct auixp_softc *static_sc; | | 217 | static struct auixp_softc *static_sc; |
218 | static void auixp_dumpreg(void) __unused; | | 218 | static void auixp_dumpreg(void) __unused; |
219 | # define DPRINTF(x) printf x; | | 219 | # define DPRINTF(x) printf x; |
220 | #else | | 220 | #else |
221 | # define DPRINTF(x) | | 221 | # define DPRINTF(x) |
222 | #endif | | 222 | #endif |
223 | | | 223 | |
224 | | | 224 | |
225 | static const struct audio_hw_if auixp_hw_if = { | | 225 | static const struct audio_hw_if auixp_hw_if = { |
226 | .query_format = auixp_query_format, | | 226 | .query_format = auixp_query_format, |
227 | .set_format = auixp_set_format, | | 227 | .set_format = auixp_set_format, |
228 | .round_blocksize = auixp_round_blocksize, | | 228 | .round_blocksize = auixp_round_blocksize, |
229 | .commit_settings = auixp_commit_settings, | | 229 | .commit_settings = auixp_commit_settings, |
230 | .halt_output = auixp_halt_output, | | 230 | .halt_output = auixp_halt_output, |
231 | .halt_input = auixp_halt_input, | | 231 | .halt_input = auixp_halt_input, |
232 | .getdev = auixp_getdev, | | 232 | .getdev = auixp_getdev, |
233 | .set_port = auixp_set_port, | | 233 | .set_port = auixp_set_port, |
234 | .get_port = auixp_get_port, | | 234 | .get_port = auixp_get_port, |
235 | .query_devinfo = auixp_query_devinfo, | | 235 | .query_devinfo = auixp_query_devinfo, |
236 | .allocm = auixp_malloc, | | 236 | .allocm = auixp_malloc, |
237 | .freem = auixp_free, | | 237 | .freem = auixp_free, |
238 | .round_buffersize = auixp_round_buffersize, | | 238 | .round_buffersize = auixp_round_buffersize, |
239 | .get_props = auixp_get_props, | | 239 | .get_props = auixp_get_props, |
240 | .trigger_output = auixp_trigger_output, | | 240 | .trigger_output = auixp_trigger_output, |
241 | .trigger_input = auixp_trigger_input, | | 241 | .trigger_input = auixp_trigger_input, |
242 | .get_locks = auixp_get_locks, | | 242 | .get_locks = auixp_get_locks, |
243 | }; | | 243 | }; |
244 | | | 244 | |
245 | | | 245 | |
246 | CFATTACH_DECL_NEW(auixp, sizeof(struct auixp_softc), auixp_match, auixp_attach, | | 246 | CFATTACH_DECL_NEW(auixp, sizeof(struct auixp_softc), auixp_match, auixp_attach, |
247 | auixp_detach, NULL); | | 247 | auixp_detach, NULL); |
248 | | | 248 | |
249 | | | 249 | |
250 | /* | | 250 | /* |
251 | * audio(9) functions | | 251 | * audio(9) functions |
252 | */ | | 252 | */ |
253 | | | 253 | |
254 | static int | | 254 | static int |
255 | auixp_query_format(void *hdl, audio_format_query_t *afp) | | 255 | auixp_query_format(void *hdl, audio_format_query_t *afp) |
256 | { | | 256 | { |
257 | struct auixp_codec *co; | | 257 | struct auixp_codec *co; |
258 | struct auixp_softc *sc; | | 258 | struct auixp_softc *sc; |
259 | | | 259 | |
260 | co = (struct auixp_codec *) hdl; | | 260 | co = (struct auixp_codec *) hdl; |
261 | sc = co->sc; | | 261 | sc = co->sc; |
262 | return audio_query_format(sc->sc_formats, AUIXP_NFORMATS, afp); | | 262 | return audio_query_format(sc->sc_formats, AUIXP_NFORMATS, afp); |
263 | } | | 263 | } |
264 | | | 264 | |
265 | | | 265 | |
266 | static int | | 266 | static int |
267 | auixp_set_rate(struct auixp_codec *co, int mode, u_int srate) | | 267 | auixp_set_rate(struct auixp_codec *co, int mode, u_int srate) |
268 | { | | 268 | { |
269 | int ret; | | 269 | int ret; |
270 | u_int ratetmp; | | 270 | u_int ratetmp; |
271 | | | 271 | |
272 | ratetmp = srate; | | 272 | ratetmp = srate; |
273 | if (mode == AUMODE_RECORD) { | | 273 | if (mode == AUMODE_RECORD) { |
274 | ret = co->codec_if->vtbl->set_rate(co->codec_if, | | 274 | ret = co->codec_if->vtbl->set_rate(co->codec_if, |
275 | AC97_REG_PCM_LR_ADC_RATE, &ratetmp); | | 275 | AC97_REG_PCM_LR_ADC_RATE, &ratetmp); |
276 | return ret; | | 276 | return ret; |
277 | } | | 277 | } |
278 | | | 278 | |
279 | /* play mode */ | | 279 | /* play mode */ |
280 | ret = co->codec_if->vtbl->set_rate(co->codec_if, | | 280 | ret = co->codec_if->vtbl->set_rate(co->codec_if, |
281 | AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp); | | 281 | AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp); |
282 | if (ret) | | 282 | if (ret) |
283 | return ret; | | 283 | return ret; |
284 | | | 284 | |
285 | ratetmp = srate; | | 285 | ratetmp = srate; |
286 | ret = co->codec_if->vtbl->set_rate(co->codec_if, | | 286 | ret = co->codec_if->vtbl->set_rate(co->codec_if, |
287 | AC97_REG_PCM_SURR_DAC_RATE, &ratetmp); | | 287 | AC97_REG_PCM_SURR_DAC_RATE, &ratetmp); |
288 | if (ret) | | 288 | if (ret) |
289 | return ret; | | 289 | return ret; |
290 | | | 290 | |
291 | ratetmp = srate; | | 291 | ratetmp = srate; |
292 | ret = co->codec_if->vtbl->set_rate(co->codec_if, | | 292 | ret = co->codec_if->vtbl->set_rate(co->codec_if, |
293 | AC97_REG_PCM_LFE_DAC_RATE, &ratetmp); | | 293 | AC97_REG_PCM_LFE_DAC_RATE, &ratetmp); |
294 | return ret; | | 294 | return ret; |
295 | } | | 295 | } |
296 | | | 296 | |
297 | | | 297 | |
298 | /* commit setting and program ATI IXP chip */ | | 298 | /* commit setting and program ATI IXP chip */ |
299 | static int | | 299 | static int |
300 | auixp_commit_settings(void *hdl) | | 300 | auixp_commit_settings(void *hdl) |
301 | { | | 301 | { |
302 | struct auixp_codec *co; | | 302 | struct auixp_codec *co; |
303 | struct auixp_softc *sc; | | 303 | struct auixp_softc *sc; |
304 | bus_space_tag_t iot; | | 304 | bus_space_tag_t iot; |
305 | bus_space_handle_t ioh; | | 305 | bus_space_handle_t ioh; |
306 | struct audio_params *params; | | 306 | struct audio_params *params; |
307 | uint32_t value; | | 307 | uint32_t value; |
308 | | | 308 | |
309 | /* XXX would it be better to stop interrupts first? XXX */ | | 309 | /* XXX would it be better to stop interrupts first? XXX */ |
310 | co = (struct auixp_codec *) hdl; | | 310 | co = (struct auixp_codec *) hdl; |
311 | sc = co->sc; | | 311 | sc = co->sc; |
312 | iot = sc->sc_iot; | | 312 | iot = sc->sc_iot; |
313 | ioh = sc->sc_ioh; | | 313 | ioh = sc->sc_ioh; |
314 | | | 314 | |
315 | /* process input settings */ | | 315 | /* process input settings */ |
316 | params = &sc->sc_play_params; | | 316 | params = &sc->sc_play_params; |
317 | | | 317 | |
318 | /* set input interleaving (precision) */ | | 318 | /* set input interleaving (precision) */ |
319 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); | | 319 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
320 | value &= ~ATI_REG_CMD_INTERLEAVE_IN; | | 320 | value &= ~ATI_REG_CMD_INTERLEAVE_IN; |
321 | if (params->precision <= 16) | | 321 | if (params->precision <= 16) |
322 | value |= ATI_REG_CMD_INTERLEAVE_IN; | | 322 | value |= ATI_REG_CMD_INTERLEAVE_IN; |
323 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); | | 323 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
324 | | | 324 | |
325 | /* process output settings */ | | 325 | /* process output settings */ |
326 | params = &sc->sc_play_params; | | 326 | params = &sc->sc_play_params; |
327 | | | 327 | |
328 | value = bus_space_read_4(iot, ioh, ATI_REG_OUT_DMA_SLOT); | | 328 | value = bus_space_read_4(iot, ioh, ATI_REG_OUT_DMA_SLOT); |
329 | value &= ~ATI_REG_OUT_DMA_SLOT_MASK; | | 329 | value &= ~ATI_REG_OUT_DMA_SLOT_MASK; |
330 | | | 330 | |
331 | /* TODO SPDIF case for 8 channels */ | | 331 | /* TODO SPDIF case for 8 channels */ |
332 | switch (params->channels) { | | 332 | switch (params->channels) { |
333 | case 6: | | 333 | case 6: |
334 | value |= ATI_REG_OUT_DMA_SLOT_BIT(7) | | | 334 | value |= ATI_REG_OUT_DMA_SLOT_BIT(7) | |
335 | ATI_REG_OUT_DMA_SLOT_BIT(8); | | 335 | ATI_REG_OUT_DMA_SLOT_BIT(8); |
336 | /* fallthru */ | | 336 | /* fallthru */ |
337 | case 4: | | 337 | case 4: |
338 | value |= ATI_REG_OUT_DMA_SLOT_BIT(6) | | | 338 | value |= ATI_REG_OUT_DMA_SLOT_BIT(6) | |
339 | ATI_REG_OUT_DMA_SLOT_BIT(9); | | 339 | ATI_REG_OUT_DMA_SLOT_BIT(9); |
340 | /* fallthru */ | | 340 | /* fallthru */ |
341 | default: | | 341 | default: |
342 | value |= ATI_REG_OUT_DMA_SLOT_BIT(3) | | | 342 | value |= ATI_REG_OUT_DMA_SLOT_BIT(3) | |
343 | ATI_REG_OUT_DMA_SLOT_BIT(4); | | 343 | ATI_REG_OUT_DMA_SLOT_BIT(4); |
344 | break; | | 344 | break; |
345 | } | | 345 | } |
346 | /* set output threshold */ | | 346 | /* set output threshold */ |
347 | value |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT; | | 347 | value |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT; |
348 | bus_space_write_4(iot, ioh, ATI_REG_OUT_DMA_SLOT, value); | | 348 | bus_space_write_4(iot, ioh, ATI_REG_OUT_DMA_SLOT, value); |
349 | | | 349 | |
350 | /* set output interleaving (precision) */ | | 350 | /* set output interleaving (precision) */ |
351 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); | | 351 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
352 | value &= ~ATI_REG_CMD_INTERLEAVE_OUT; | | 352 | value &= ~ATI_REG_CMD_INTERLEAVE_OUT; |
353 | if (params->precision <= 16) | | 353 | if (params->precision <= 16) |
354 | value |= ATI_REG_CMD_INTERLEAVE_OUT; | | 354 | value |= ATI_REG_CMD_INTERLEAVE_OUT; |
355 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); | | 355 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
356 | | | 356 | |
357 | /* enable 6 channel reordering */ | | 357 | /* enable 6 channel reordering */ |
358 | value = bus_space_read_4(iot, ioh, ATI_REG_6CH_REORDER); | | 358 | value = bus_space_read_4(iot, ioh, ATI_REG_6CH_REORDER); |
359 | value &= ~ATI_REG_6CH_REORDER_EN; | | 359 | value &= ~ATI_REG_6CH_REORDER_EN; |
360 | if (params->channels == 6) | | 360 | if (params->channels == 6) |
361 | value |= ATI_REG_6CH_REORDER_EN; | | 361 | value |= ATI_REG_6CH_REORDER_EN; |
362 | bus_space_write_4(iot, ioh, ATI_REG_6CH_REORDER, value); | | 362 | bus_space_write_4(iot, ioh, ATI_REG_6CH_REORDER, value); |
363 | | | 363 | |
364 | if (sc->has_spdif) { | | 364 | if (sc->has_spdif) { |
365 | /* set SPDIF (if present) */ | | 365 | /* set SPDIF (if present) */ |
366 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); | | 366 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
367 | value &= ~ATI_REG_CMD_SPDF_CONFIG_MASK; | | 367 | value &= ~ATI_REG_CMD_SPDF_CONFIG_MASK; |
368 | value |= ATI_REG_CMD_SPDF_CONFIG_34; /* NetBSD AC'97 default */ | | 368 | value |= ATI_REG_CMD_SPDF_CONFIG_34; /* NetBSD AC'97 default */ |
369 | | | 369 | |
370 | /* XXX this prolly is not nessisary unless splitted XXX */ | | 370 | /* XXX this prolly is not nessisary unless splitted XXX */ |
371 | value &= ~ATI_REG_CMD_INTERLEAVE_SPDF; | | 371 | value &= ~ATI_REG_CMD_INTERLEAVE_SPDF; |
372 | if (params->precision <= 16) | | 372 | if (params->precision <= 16) |
373 | value |= ATI_REG_CMD_INTERLEAVE_SPDF; | | 373 | value |= ATI_REG_CMD_INTERLEAVE_SPDF; |
374 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); | | 374 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
375 | } | | 375 | } |
376 | | | 376 | |
377 | return 0; | | 377 | return 0; |
378 | } | | 378 | } |
379 | | | 379 | |
380 | | | 380 | |
381 | /* set audio properties in desired setting */ | | 381 | /* set audio properties in desired setting */ |
382 | static int | | 382 | static int |
383 | auixp_set_format(void *hdl, int setmode, | | 383 | auixp_set_format(void *hdl, int setmode, |
384 | const audio_params_t *play, const audio_params_t *rec, | | 384 | const audio_params_t *play, const audio_params_t *rec, |
385 | audio_filter_reg_t *pfil, audio_filter_reg_t *rfil) | | 385 | audio_filter_reg_t *pfil, audio_filter_reg_t *rfil) |
386 | { | | 386 | { |
387 | struct auixp_codec *co; | | 387 | struct auixp_codec *co; |
388 | struct auixp_softc *sc; | | 388 | struct auixp_softc *sc; |
389 | const audio_params_t *params; | | 389 | const audio_params_t *params; |
390 | int mode, index; | | 390 | int mode, index; |
391 | | | 391 | |
392 | /* | | 392 | /* |
393 | * In current NetBSD AC'97 implementation, SPDF is linked to channel 3 | | 393 | * In current NetBSD AC'97 implementation, SPDF is linked to channel 3 |
394 | * and 4 i.e. stereo output. | | 394 | * and 4 i.e. stereo output. |
395 | */ | | 395 | */ |
396 | | | 396 | |
397 | co = (struct auixp_codec *) hdl; | | 397 | co = (struct auixp_codec *) hdl; |
398 | sc = co->sc; | | 398 | sc = co->sc; |
399 | for (mode = AUMODE_RECORD; mode != -1; | | 399 | for (mode = AUMODE_RECORD; mode != -1; |
400 | mode = (mode == AUMODE_RECORD) ? AUMODE_PLAY : -1) { | | 400 | mode = (mode == AUMODE_RECORD) ? AUMODE_PLAY : -1) { |
401 | if ((setmode & mode) == 0) | | 401 | if ((setmode & mode) == 0) |
402 | continue; | | 402 | continue; |
403 | | | 403 | |
404 | params = (mode == AUMODE_PLAY) ? play : rec; | | 404 | params = (mode == AUMODE_PLAY) ? play : rec; |
405 | if (params == NULL) | | 405 | if (params == NULL) |
406 | continue; | | 406 | continue; |
407 | | | 407 | |
408 | index = audio_indexof_format(sc->sc_formats, AUIXP_NFORMATS, | | 408 | index = audio_indexof_format(sc->sc_formats, AUIXP_NFORMATS, |
409 | mode, params); | | 409 | mode, params); |
410 | | | 410 | |
411 | /* if variable speed and we can't set the desired rate, fail */ | | 411 | /* if variable speed and we can't set the desired rate, fail */ |
412 | if ((sc->sc_formats[index].frequency_type != 1) && | | 412 | if ((sc->sc_formats[index].frequency_type != 1) && |
413 | auixp_set_rate(co, mode, params->sample_rate)) | | 413 | auixp_set_rate(co, mode, params->sample_rate)) |
414 | return EINVAL; | | 414 | return EINVAL; |
415 | | | 415 | |
416 | /* preserve the settings */ | | 416 | /* preserve the settings */ |
417 | if (mode == AUMODE_PLAY) | | 417 | if (mode == AUMODE_PLAY) |
418 | sc->sc_play_params = *params; | | 418 | sc->sc_play_params = *params; |
419 | if (mode == AUMODE_RECORD) | | 419 | if (mode == AUMODE_RECORD) |
420 | sc->sc_rec_params = *params; | | 420 | sc->sc_rec_params = *params; |
421 | } | | 421 | } |
422 | | | 422 | |
423 | return 0; | | 423 | return 0; |
424 | } | | 424 | } |
425 | | | 425 | |
426 | | | 426 | |
427 | /* called to translate a requested blocksize to a hw-possible one */ | | 427 | /* called to translate a requested blocksize to a hw-possible one */ |
428 | static int | | 428 | static int |
429 | auixp_round_blocksize(void *hdl, int bs, int mode, | | 429 | auixp_round_blocksize(void *hdl, int bs, int mode, |
430 | const audio_params_t *param) | | 430 | const audio_params_t *param) |
431 | { | | 431 | { |
432 | | | 432 | |
433 | /* 256 kb possible */ | | 433 | /* 256 kb possible */ |
434 | if (bs > 0x10000) | | 434 | if (bs > 0x10000) |
435 | bs = 0x10000; /* 64 kb max */ | | 435 | bs = 0x10000; /* 64 kb max */ |
436 | bs = rounddown(bs, param->channels * param->precision / NBBY); | | 436 | bs = rounddown(bs, param->channels * param->precision / NBBY); |
437 | | | 437 | |
438 | return bs; | | 438 | return bs; |
439 | } | | 439 | } |
440 | | | 440 | |
441 | | | 441 | |
442 | /* | | 442 | /* |
443 | * allocate dma capable memory and record its information for later retrieval | | 443 | * allocate dma capable memory and record its information for later retrieval |
444 | * when we program the dma chain itself. The trigger routines passes on the | | 444 | * when we program the dma chain itself. The trigger routines passes on the |
445 | * kernel virtual address we return here as a reference to the mapping. | | 445 | * kernel virtual address we return here as a reference to the mapping. |
446 | */ | | 446 | */ |
447 | static void * | | 447 | static void * |
448 | auixp_malloc(void *hdl, int direction, size_t size) | | 448 | auixp_malloc(void *hdl, int direction, size_t size) |
449 | { | | 449 | { |
450 | struct auixp_codec *co; | | 450 | struct auixp_codec *co; |
451 | struct auixp_softc *sc; | | 451 | struct auixp_softc *sc; |
452 | struct auixp_dma *dma; | | 452 | struct auixp_dma *dma; |
453 | int error; | | 453 | int error; |
454 | | | 454 | |
455 | co = (struct auixp_codec *) hdl; | | 455 | co = (struct auixp_codec *) hdl; |
456 | sc = co->sc; | | 456 | sc = co->sc; |
457 | /* get us a auixp_dma structure */ | | 457 | /* get us a auixp_dma structure */ |
458 | dma = kmem_alloc(sizeof(*dma), KM_SLEEP); | | 458 | dma = kmem_alloc(sizeof(*dma), KM_SLEEP); |
459 | | | 459 | |
460 | /* get us a dma buffer itself */ | | 460 | /* get us a dma buffer itself */ |
461 | error = auixp_allocmem(sc, size, 16, dma); | | 461 | error = auixp_allocmem(sc, size, 16, dma); |
462 | if (error) { | | 462 | if (error) { |
463 | kmem_free(dma, sizeof(*dma)); | | 463 | kmem_free(dma, sizeof(*dma)); |
464 | aprint_error_dev(sc->sc_dev, "auixp_malloc: not enough memory\n"); | | 464 | aprint_error_dev(sc->sc_dev, "auixp_malloc: not enough memory\n"); |
465 | | | 465 | |
466 | return NULL; | | 466 | return NULL; |
467 | } | | 467 | } |
468 | SLIST_INSERT_HEAD(&sc->sc_dma_list, dma, dma_chain); | | 468 | SLIST_INSERT_HEAD(&sc->sc_dma_list, dma, dma_chain); |
469 | | | 469 | |
470 | DPRINTF(("auixp_malloc: returning kern %p, hw 0x%08x for %zd bytes " | | 470 | DPRINTF(("auixp_malloc: returning kern %p, hw 0x%08x for %zd bytes " |
471 | "in %d segs\n", KERNADDR(dma), (uint32_t) DMAADDR(dma), dma->size, | | 471 | "in %d segs\n", KERNADDR(dma), (uint32_t) DMAADDR(dma), dma->size, |
472 | dma->nsegs) | | 472 | dma->nsegs) |
473 | ); | | 473 | ); |
474 | | | 474 | |
475 | return KERNADDR(dma); | | 475 | return KERNADDR(dma); |
476 | } | | 476 | } |
477 | | | 477 | |
478 | | | 478 | |
479 | /* | | 479 | /* |
480 | * free and release dma capable memory we allocated before and remove its | | 480 | * free and release dma capable memory we allocated before and remove its |
481 | * recording | | 481 | * recording |
482 | */ | | 482 | */ |
483 | static void | | 483 | static void |
484 | auixp_free(void *hdl, void *addr, size_t size) | | 484 | auixp_free(void *hdl, void *addr, size_t size) |
485 | { | | 485 | { |
486 | struct auixp_codec *co; | | 486 | struct auixp_codec *co; |
487 | struct auixp_softc *sc; | | 487 | struct auixp_softc *sc; |
488 | struct auixp_dma *dma; | | 488 | struct auixp_dma *dma; |
489 | | | 489 | |
490 | co = (struct auixp_codec *) hdl; | | 490 | co = (struct auixp_codec *) hdl; |
491 | sc = co->sc; | | 491 | sc = co->sc; |
492 | SLIST_FOREACH(dma, &sc->sc_dma_list, dma_chain) { | | 492 | SLIST_FOREACH(dma, &sc->sc_dma_list, dma_chain) { |
493 | if (KERNADDR(dma) == addr) { | | 493 | if (KERNADDR(dma) == addr) { |
494 | SLIST_REMOVE(&sc->sc_dma_list, dma, auixp_dma, | | 494 | SLIST_REMOVE(&sc->sc_dma_list, dma, auixp_dma, |
495 | dma_chain); | | 495 | dma_chain); |
496 | auixp_freemem(sc, dma); | | 496 | auixp_freemem(sc, dma); |
497 | kmem_free(dma, sizeof(*dma)); | | 497 | kmem_free(dma, sizeof(*dma)); |
498 | return; | | 498 | return; |
499 | } | | 499 | } |
500 | } | | 500 | } |
501 | } | | 501 | } |
502 | | | 502 | |
503 | | | 503 | |
504 | static int | | 504 | static int |
505 | auixp_getdev(void *hdl, struct audio_device *ret) | | 505 | auixp_getdev(void *hdl, struct audio_device *ret) |
506 | { | | 506 | { |
507 | | | 507 | |
508 | *ret = auixp_device; | | 508 | *ret = auixp_device; |
509 | return 0; | | 509 | return 0; |
510 | } | | 510 | } |
511 | | | 511 | |
512 | | | 512 | |
513 | /* pass request to AC'97 codec code */ | | 513 | /* pass request to AC'97 codec code */ |
514 | static int | | 514 | static int |
515 | auixp_set_port(void *hdl, mixer_ctrl_t *mc) | | 515 | auixp_set_port(void *hdl, mixer_ctrl_t *mc) |
516 | { | | 516 | { |
517 | struct auixp_codec *co; | | 517 | struct auixp_codec *co; |
518 | | | 518 | |
519 | co = (struct auixp_codec *) hdl; | | 519 | co = (struct auixp_codec *) hdl; |
520 | return co->codec_if->vtbl->mixer_set_port(co->codec_if, mc); | | 520 | return co->codec_if->vtbl->mixer_set_port(co->codec_if, mc); |
521 | } | | 521 | } |
522 | | | 522 | |
523 | | | 523 | |
524 | /* pass request to AC'97 codec code */ | | 524 | /* pass request to AC'97 codec code */ |
525 | static int | | 525 | static int |
526 | auixp_get_port(void *hdl, mixer_ctrl_t *mc) | | 526 | auixp_get_port(void *hdl, mixer_ctrl_t *mc) |
527 | { | | 527 | { |
528 | struct auixp_codec *co; | | 528 | struct auixp_codec *co; |
529 | | | 529 | |
530 | co = (struct auixp_codec *) hdl; | | 530 | co = (struct auixp_codec *) hdl; |
531 | return co->codec_if->vtbl->mixer_get_port(co->codec_if, mc); | | 531 | return co->codec_if->vtbl->mixer_get_port(co->codec_if, mc); |
532 | } | | 532 | } |
533 | | | 533 | |
534 | /* pass request to AC'97 codec code */ | | 534 | /* pass request to AC'97 codec code */ |
535 | static int | | 535 | static int |
536 | auixp_query_devinfo(void *hdl, mixer_devinfo_t *di) | | 536 | auixp_query_devinfo(void *hdl, mixer_devinfo_t *di) |
537 | { | | 537 | { |
538 | struct auixp_codec *co; | | 538 | struct auixp_codec *co; |
539 | | | 539 | |
540 | co = (struct auixp_codec *) hdl; | | 540 | co = (struct auixp_codec *) hdl; |
541 | return co->codec_if->vtbl->query_devinfo(co->codec_if, di); | | 541 | return co->codec_if->vtbl->query_devinfo(co->codec_if, di); |
542 | } | | 542 | } |
543 | | | 543 | |
544 | | | 544 | |
545 | static size_t | | 545 | static size_t |
546 | auixp_round_buffersize(void *hdl, int direction, | | 546 | auixp_round_buffersize(void *hdl, int direction, |
547 | size_t bufsize) | | 547 | size_t bufsize) |
548 | { | | 548 | { |
549 | | | 549 | |
550 | /* XXX force maximum? i.e. 256 kb? */ | | 550 | /* XXX force maximum? i.e. 256 kb? */ |
551 | return bufsize; | | 551 | return bufsize; |
552 | } | | 552 | } |
553 | | | 553 | |
554 | | | 554 | |
555 | static int | | 555 | static int |
556 | auixp_get_props(void *hdl) | | 556 | auixp_get_props(void *hdl) |
557 | { | | 557 | { |
558 | | | 558 | |
559 | return AUDIO_PROP_PLAYBACK | AUDIO_PROP_CAPTURE | | | 559 | return AUDIO_PROP_PLAYBACK | AUDIO_PROP_CAPTURE | |
560 | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; | | 560 | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; |
561 | } | | 561 | } |
562 | | | 562 | |
563 | | | 563 | |
564 | /* | | 564 | /* |
565 | * A dma descriptor has dma->nsegs segments defined in dma->segs set up when | | 565 | * A dma descriptor has dma->nsegs segments defined in dma->segs set up when |
566 | * we claimed the memory. | | 566 | * we claimed the memory. |
567 | * | | 567 | * |
568 | * Due to our demand for one contiguous DMA area, we only have one segment. A | | 568 | * Due to our demand for one contiguous DMA area, we only have one segment. A |
569 | * c_dma structure is about 3 kb for the 256 entries we maximally program | | 569 | * c_dma structure is about 3 kb for the 256 entries we maximally program |
570 | * -arbitrary limit AFAIK- so all is most likely to be in one segment/page | | 570 | * -arbitrary limit AFAIK- so all is most likely to be in one segment/page |
571 | * anyway. | | 571 | * anyway. |
572 | * | | 572 | * |
573 | * XXX ought to implement fragmented dma area XXX | | 573 | * XXX ought to implement fragmented dma area XXX |
574 | * | | 574 | * |
575 | * Note that _v variables depict kernel virtual addresses, _p variables depict | | 575 | * Note that _v variables depict kernel virtual addresses, _p variables depict |
576 | * physical addresses. | | 576 | * physical addresses. |
577 | */ | | 577 | */ |
578 | static void | | 578 | static void |
579 | auixp_link_daisychain(struct auixp_softc *sc, | | 579 | auixp_link_daisychain(struct auixp_softc *sc, |
580 | struct auixp_dma *c_dma, struct auixp_dma *s_dma, | | 580 | struct auixp_dma *c_dma, struct auixp_dma *s_dma, |
581 | int blksize, int blocks) | | 581 | int blksize, int blocks) |
582 | { | | 582 | { |
583 | atiixp_dma_desc_t *caddr_v, *next_caddr_v; | | 583 | atiixp_dma_desc_t *caddr_v, *next_caddr_v; |
584 | uint32_t caddr_p, next_caddr_p, saddr_p; | | 584 | uint32_t caddr_p, next_caddr_p, saddr_p; |
585 | int i; | | 585 | int i; |
586 | | | 586 | |
587 | /* just make sure we are not changing when its running */ | | 587 | /* just make sure we are not changing when its running */ |
588 | auixp_disable_dma(sc, c_dma); | | 588 | auixp_disable_dma(sc, c_dma); |
589 | | | 589 | |
590 | /* setup dma chain start addresses */ | | 590 | /* setup dma chain start addresses */ |
591 | caddr_v = KERNADDR(c_dma); | | 591 | caddr_v = KERNADDR(c_dma); |
592 | caddr_p = DMAADDR(c_dma); | | 592 | caddr_p = DMAADDR(c_dma); |
593 | saddr_p = DMAADDR(s_dma); | | 593 | saddr_p = DMAADDR(s_dma); |
594 | | | 594 | |
595 | /* program the requested number of blocks */ | | 595 | /* program the requested number of blocks */ |
596 | for (i = 0; i < blocks; i++) { | | 596 | for (i = 0; i < blocks; i++) { |
597 | /* clear the block just in case */ | | 597 | /* clear the block just in case */ |
598 | memset(caddr_v, 0, sizeof(atiixp_dma_desc_t)); | | 598 | memset(caddr_v, 0, sizeof(atiixp_dma_desc_t)); |
599 | | | 599 | |
600 | /* round robin the chain dma addresses for its successor */ | | 600 | /* round robin the chain dma addresses for its successor */ |
601 | next_caddr_v = caddr_v + 1; | | 601 | next_caddr_v = caddr_v + 1; |
602 | next_caddr_p = caddr_p + sizeof(atiixp_dma_desc_t); | | 602 | next_caddr_p = caddr_p + sizeof(atiixp_dma_desc_t); |
603 | | | 603 | |
604 | if (i == blocks-1) { | | 604 | if (i == blocks-1) { |
605 | next_caddr_v = KERNADDR(c_dma); | | 605 | next_caddr_v = KERNADDR(c_dma); |
606 | next_caddr_p = DMAADDR(c_dma); | | 606 | next_caddr_p = DMAADDR(c_dma); |
607 | } | | 607 | } |
608 | | | 608 | |
609 | /* fill in the hardware dma chain descriptor in little-endian */ | | 609 | /* fill in the hardware dma chain descriptor in little-endian */ |
610 | caddr_v->addr = htole32(saddr_p); | | 610 | caddr_v->addr = htole32(saddr_p); |
611 | caddr_v->status = htole16(0); | | 611 | caddr_v->status = htole16(0); |
612 | caddr_v->size = htole16((blksize >> 2)); /* in dwords (!!!) */ | | 612 | caddr_v->size = htole16((blksize >> 2)); /* in dwords (!!!) */ |
613 | caddr_v->next = htole32(next_caddr_p); | | 613 | caddr_v->next = htole32(next_caddr_p); |
614 | | | 614 | |
615 | /* advance slot */ | | 615 | /* advance slot */ |
616 | saddr_p += blksize; /* XXX assuming contiguous XXX */ | | 616 | saddr_p += blksize; /* XXX assuming contiguous XXX */ |
617 | caddr_v = next_caddr_v; | | 617 | caddr_v = next_caddr_v; |
618 | caddr_p = next_caddr_p; | | 618 | caddr_p = next_caddr_p; |
619 | } | | 619 | } |
620 | } | | 620 | } |
621 | | | 621 | |
622 | | | 622 | |
623 | static int | | 623 | static int |
624 | auixp_allocate_dma_chain(struct auixp_softc *sc, struct auixp_dma **dmap) | | 624 | auixp_allocate_dma_chain(struct auixp_softc *sc, struct auixp_dma **dmap) |
625 | { | | 625 | { |
626 | struct auixp_dma *dma; | | 626 | struct auixp_dma *dma; |
627 | int error; | | 627 | int error; |
628 | | | 628 | |
629 | /* allocate keeper of dma area */ | | 629 | /* allocate keeper of dma area */ |
630 | *dmap = NULL; | | 630 | *dmap = NULL; |
631 | dma = kmem_zalloc(sizeof(struct auixp_dma), KM_SLEEP); | | 631 | dma = kmem_zalloc(sizeof(struct auixp_dma), KM_SLEEP); |
632 | | | 632 | |
633 | /* allocate for daisychain of IXP hardware-dma descriptors */ | | 633 | /* allocate for daisychain of IXP hardware-dma descriptors */ |
634 | error = auixp_allocmem(sc, DMA_DESC_CHAIN * sizeof(atiixp_dma_desc_t), | | 634 | error = auixp_allocmem(sc, DMA_DESC_CHAIN * sizeof(atiixp_dma_desc_t), |
635 | 16, dma); | | 635 | 16, dma); |
636 | if (error) { | | 636 | if (error) { |
637 | aprint_error_dev(sc->sc_dev, "can't malloc dma descriptor chain\n"); | | 637 | aprint_error_dev(sc->sc_dev, "can't malloc dma descriptor chain\n"); |
638 | kmem_free(dma, sizeof(*dma)); | | 638 | kmem_free(dma, sizeof(*dma)); |
639 | return ENOMEM; | | 639 | return ENOMEM; |
640 | } | | 640 | } |
641 | | | 641 | |
642 | /* return info and initialise structure */ | | 642 | /* return info and initialise structure */ |
643 | dma->intr = NULL; | | 643 | dma->intr = NULL; |
644 | dma->intrarg = NULL; | | 644 | dma->intrarg = NULL; |
645 | | | 645 | |
646 | *dmap = dma; | | 646 | *dmap = dma; |
647 | return 0; | | 647 | return 0; |
648 | } | | 648 | } |
649 | | | 649 | |
650 | | | 650 | |
651 | /* program dma chain in its link address descriptor */ | | 651 | /* program dma chain in its link address descriptor */ |
652 | static void | | 652 | static void |
653 | auixp_program_dma_chain(struct auixp_softc *sc, struct auixp_dma *dma) | | 653 | auixp_program_dma_chain(struct auixp_softc *sc, struct auixp_dma *dma) |
654 | { | | 654 | { |
655 | bus_space_tag_t iot; | | 655 | bus_space_tag_t iot; |
656 | bus_space_handle_t ioh; | | 656 | bus_space_handle_t ioh; |
657 | uint32_t value; | | 657 | uint32_t value; |
658 | | | 658 | |
659 | iot = sc->sc_iot; | | 659 | iot = sc->sc_iot; |
660 | ioh = sc->sc_ioh; | | 660 | ioh = sc->sc_ioh; |
661 | /* get hardware start address of DMA chain and set valid-flag in it */ | | 661 | /* get hardware start address of DMA chain and set valid-flag in it */ |
662 | /* XXX always at start? XXX */ | | 662 | /* XXX always at start? XXX */ |
663 | value = DMAADDR(dma); | | 663 | value = DMAADDR(dma); |
664 | value = value | ATI_REG_LINKPTR_EN; | | 664 | value = value | ATI_REG_LINKPTR_EN; |
665 | | | 665 | |
666 | /* reset linkpointer */ | | 666 | /* reset linkpointer */ |
667 | bus_space_write_4(iot, ioh, dma->linkptr, 0); | | 667 | bus_space_write_4(iot, ioh, dma->linkptr, 0); |
668 | | | 668 | |
669 | /* reset this DMA engine */ | | 669 | /* reset this DMA engine */ |
670 | auixp_disable_dma(sc, dma); | | 670 | auixp_disable_dma(sc, dma); |
671 | auixp_enable_dma(sc, dma); | | 671 | auixp_enable_dma(sc, dma); |
672 | | | 672 | |
673 | /* program new DMA linkpointer */ | | 673 | /* program new DMA linkpointer */ |
674 | bus_space_write_4(iot, ioh, dma->linkptr, value); | | 674 | bus_space_write_4(iot, ioh, dma->linkptr, value); |
675 | } | | 675 | } |
676 | | | 676 | |
677 | | | 677 | |
678 | /* called from interrupt code to signal end of one dma-slot */ | | 678 | /* called from interrupt code to signal end of one dma-slot */ |
679 | static void | | 679 | static void |
680 | auixp_dma_update(struct auixp_softc *sc, struct auixp_dma *dma) | | 680 | auixp_dma_update(struct auixp_softc *sc, struct auixp_dma *dma) |
681 | { | | 681 | { |
682 | | | 682 | |
683 | /* be very paranoid */ | | 683 | /* be very paranoid */ |
684 | if (!dma) | | 684 | if (!dma) |
685 | panic("%s: update: dma = NULL", device_xname(sc->sc_dev)); | | 685 | panic("%s: update: dma = NULL", device_xname(sc->sc_dev)); |
686 | if (!dma->intr) | | 686 | if (!dma->intr) |
687 | panic("%s: update: dma->intr = NULL", device_xname(sc->sc_dev)); | | 687 | panic("%s: update: dma->intr = NULL", device_xname(sc->sc_dev)); |
688 | | | 688 | |
689 | /* request more input from upper layer */ | | 689 | /* request more input from upper layer */ |
690 | (*dma->intr)(dma->intrarg); | | 690 | (*dma->intr)(dma->intrarg); |
691 | } | | 691 | } |
692 | | | 692 | |
693 | | | 693 | |
694 | /* | | 694 | /* |
695 | * The magic `busbusy' bit that needs to be set when dma is active; allowing | | 695 | * The magic `busbusy' bit that needs to be set when dma is active; allowing |
696 | * busmastering? | | 696 | * busmastering? |
697 | */ | | 697 | */ |
698 | static void | | 698 | static void |
699 | auixp_update_busbusy(struct auixp_softc *sc) | | 699 | auixp_update_busbusy(struct auixp_softc *sc) |
700 | { | | 700 | { |
701 | bus_space_tag_t iot; | | 701 | bus_space_tag_t iot; |
702 | bus_space_handle_t ioh; | | 702 | bus_space_handle_t ioh; |
703 | uint32_t value; | | 703 | uint32_t value; |
704 | int running; | | 704 | int running; |
705 | | | 705 | |
706 | iot = sc->sc_iot; | | 706 | iot = sc->sc_iot; |
707 | ioh = sc->sc_ioh; | | 707 | ioh = sc->sc_ioh; |
708 | /* set bus-busy flag when either recording or playing is performed */ | | 708 | /* set bus-busy flag when either recording or playing is performed */ |
709 | value = bus_space_read_4(iot, ioh, ATI_REG_IER); | | 709 | value = bus_space_read_4(iot, ioh, ATI_REG_IER); |
710 | value &= ~ATI_REG_IER_SET_BUS_BUSY; | | 710 | value &= ~ATI_REG_IER_SET_BUS_BUSY; |
711 | | | 711 | |
712 | running = ((sc->sc_output_dma->running) || (sc->sc_input_dma->running)); | | 712 | running = ((sc->sc_output_dma->running) || (sc->sc_input_dma->running)); |
713 | if (running) | | 713 | if (running) |
714 | value |= ATI_REG_IER_SET_BUS_BUSY; | | 714 | value |= ATI_REG_IER_SET_BUS_BUSY; |
715 | | | 715 | |
716 | bus_space_write_4(iot, ioh, ATI_REG_IER, value); | | 716 | bus_space_write_4(iot, ioh, ATI_REG_IER, value); |
717 | | | 717 | |
718 | } | | 718 | } |
719 | | | 719 | |
720 | | | 720 | |
721 | /* | | 721 | /* |
722 | * Called from upper audio layer to request playing audio, only called once; | | 722 | * Called from upper audio layer to request playing audio, only called once; |
723 | * audio is refilled by calling the intr() function when space is available | | 723 | * audio is refilled by calling the intr() function when space is available |
724 | * again. | | 724 | * again. |
725 | */ | | 725 | */ |
726 | /* XXX allmost literaly a copy of trigger-input; could be factorised XXX */ | | 726 | /* XXX allmost literaly a copy of trigger-input; could be factorised XXX */ |
727 | static int | | 727 | static int |
728 | auixp_trigger_output(void *hdl, void *start, void *end, int blksize, | | 728 | auixp_trigger_output(void *hdl, void *start, void *end, int blksize, |
729 | void (*intr)(void *), void *intrarg, const audio_params_t *param) | | 729 | void (*intr)(void *), void *intrarg, const audio_params_t *param) |
730 | { | | 730 | { |
731 | struct auixp_codec *co; | | 731 | struct auixp_codec *co; |
732 | struct auixp_softc *sc; | | 732 | struct auixp_softc *sc; |
733 | struct auixp_dma *chain_dma; | | 733 | struct auixp_dma *chain_dma; |
734 | struct auixp_dma *sound_dma; | | 734 | struct auixp_dma *sound_dma; |
735 | uint32_t blocks; | | 735 | uint32_t blocks; |
736 | | | 736 | |
737 | co = (struct auixp_codec *) hdl; | | 737 | co = (struct auixp_codec *) hdl; |
738 | sc = co->sc; | | 738 | sc = co->sc; |
739 | chain_dma = sc->sc_output_dma; | | 739 | chain_dma = sc->sc_output_dma; |
740 | /* add functions to call back */ | | 740 | /* add functions to call back */ |
741 | chain_dma->intr = intr; | | 741 | chain_dma->intr = intr; |
742 | chain_dma->intrarg = intrarg; | | 742 | chain_dma->intrarg = intrarg; |
743 | | | 743 | |
744 | /* | | 744 | /* |
745 | * Program output DMA chain with blocks from [start...end] with | | 745 | * Program output DMA chain with blocks from [start...end] with |
746 | * blksize fragments. | | 746 | * blksize fragments. |
747 | * | | 747 | * |
748 | * NOTE, we can assume its in one block since we asked for it to be in | | 748 | * NOTE, we can assume its in one block since we asked for it to be in |
749 | * one contiguous blob; XXX change this? XXX | | 749 | * one contiguous blob; XXX change this? XXX |
750 | */ | | 750 | */ |
751 | blocks = (size_t) (((char *) end) - ((char *) start)) / blksize; | | 751 | blocks = (size_t) (((char *) end) - ((char *) start)) / blksize; |
752 | | | 752 | |
753 | /* lookup `start' address in our list of DMA area's */ | | 753 | /* lookup `start' address in our list of DMA area's */ |
754 | SLIST_FOREACH(sound_dma, &sc->sc_dma_list, dma_chain) { | | 754 | SLIST_FOREACH(sound_dma, &sc->sc_dma_list, dma_chain) { |
755 | if (KERNADDR(sound_dma) == start) | | 755 | if (KERNADDR(sound_dma) == start) |
756 | break; | | 756 | break; |
757 | } | | 757 | } |
758 | | | 758 | |
759 | /* not ours ? then bail out */ | | 759 | /* not ours ? then bail out */ |
760 | if (!sound_dma) { | | 760 | if (!sound_dma) { |
761 | printf("%s: auixp_trigger_output: bad sound addr %p\n", | | 761 | printf("%s: auixp_trigger_output: bad sound addr %p\n", |
762 | device_xname(sc->sc_dev), start); | | 762 | device_xname(sc->sc_dev), start); |
763 | return EINVAL; | | 763 | return EINVAL; |
764 | } | | 764 | } |
765 | | | 765 | |
766 | /* link round-robin daisychain and program hardware */ | | 766 | /* link round-robin daisychain and program hardware */ |
767 | auixp_link_daisychain(sc, chain_dma, sound_dma, blksize, blocks); | | 767 | auixp_link_daisychain(sc, chain_dma, sound_dma, blksize, blocks); |
768 | auixp_program_dma_chain(sc, chain_dma); | | 768 | auixp_program_dma_chain(sc, chain_dma); |
769 | | | 769 | |
770 | /* mark we are now able to run now */ | | 770 | /* mark we are now able to run now */ |
771 | chain_dma->running = 1; | | 771 | chain_dma->running = 1; |
772 | | | 772 | |
773 | /* update bus-flags; XXX programs more flags XXX */ | | 773 | /* update bus-flags; XXX programs more flags XXX */ |
774 | auixp_update_busbusy(sc); | | 774 | auixp_update_busbusy(sc); |
775 | | | 775 | |
776 | /* callbacks happen in interrupt routine */ | | 776 | /* callbacks happen in interrupt routine */ |
777 | return 0; | | 777 | return 0; |
778 | } | | 778 | } |
779 | | | 779 | |
780 | | | 780 | |
781 | /* halt output of audio, just disable its dma and update bus state */ | | 781 | /* halt output of audio, just disable its dma and update bus state */ |
782 | static int | | 782 | static int |
783 | auixp_halt_output(void *hdl) | | 783 | auixp_halt_output(void *hdl) |
784 | { | | 784 | { |
785 | struct auixp_codec *co; | | 785 | struct auixp_codec *co; |
786 | struct auixp_softc *sc; | | 786 | struct auixp_softc *sc; |
787 | struct auixp_dma *dma; | | 787 | struct auixp_dma *dma; |
788 | | | 788 | |
789 | co = (struct auixp_codec *) hdl; | | 789 | co = (struct auixp_codec *) hdl; |
790 | sc = co->sc; | | 790 | sc = co->sc; |
791 | dma = sc->sc_output_dma; | | 791 | dma = sc->sc_output_dma; |
792 | auixp_disable_dma(sc, dma); | | 792 | auixp_disable_dma(sc, dma); |
793 | | | 793 | |
794 | dma->running = 0; | | 794 | dma->running = 0; |
795 | auixp_update_busbusy(sc); | | 795 | auixp_update_busbusy(sc); |
796 | | | 796 | |
797 | return 0; | | 797 | return 0; |
798 | } | | 798 | } |
799 | | | 799 | |
800 | | | 800 | |
801 | /* XXX allmost literaly a copy of trigger-output; could be factorised XXX */ | | 801 | /* XXX allmost literaly a copy of trigger-output; could be factorised XXX */ |
802 | static int | | 802 | static int |
803 | auixp_trigger_input(void *hdl, void *start, void *end, int blksize, | | 803 | auixp_trigger_input(void *hdl, void *start, void *end, int blksize, |
804 | void (*intr)(void *), void *intrarg, const audio_params_t *param) | | 804 | void (*intr)(void *), void *intrarg, const audio_params_t *param) |
805 | { | | 805 | { |
806 | struct auixp_codec *co; | | 806 | struct auixp_codec *co; |
807 | struct auixp_softc *sc; | | 807 | struct auixp_softc *sc; |
808 | struct auixp_dma *chain_dma; | | 808 | struct auixp_dma *chain_dma; |
809 | struct auixp_dma *sound_dma; | | 809 | struct auixp_dma *sound_dma; |
810 | uint32_t blocks; | | 810 | uint32_t blocks; |
811 | | | 811 | |
812 | co = (struct auixp_codec *) hdl; | | 812 | co = (struct auixp_codec *) hdl; |
813 | sc = co->sc; | | 813 | sc = co->sc; |
814 | chain_dma = sc->sc_input_dma; | | 814 | chain_dma = sc->sc_input_dma; |
815 | /* add functions to call back */ | | 815 | /* add functions to call back */ |
816 | chain_dma->intr = intr; | | 816 | chain_dma->intr = intr; |
817 | chain_dma->intrarg = intrarg; | | 817 | chain_dma->intrarg = intrarg; |
818 | | | 818 | |
819 | /* | | 819 | /* |
820 | * Program output DMA chain with blocks from [start...end] with | | 820 | * Program output DMA chain with blocks from [start...end] with |
821 | * blksize fragments. | | 821 | * blksize fragments. |
822 | * | | 822 | * |
823 | * NOTE, we can assume its in one block since we asked for it to be in | | 823 | * NOTE, we can assume its in one block since we asked for it to be in |
824 | * one contiguous blob; XXX change this? XXX | | 824 | * one contiguous blob; XXX change this? XXX |
825 | */ | | 825 | */ |
826 | blocks = (size_t) (((char *) end) - ((char *) start)) / blksize; | | 826 | blocks = (size_t) (((char *) end) - ((char *) start)) / blksize; |
827 | | | 827 | |
828 | /* lookup `start' address in our list of DMA area's */ | | 828 | /* lookup `start' address in our list of DMA area's */ |
829 | SLIST_FOREACH(sound_dma, &sc->sc_dma_list, dma_chain) { | | 829 | SLIST_FOREACH(sound_dma, &sc->sc_dma_list, dma_chain) { |
830 | if (KERNADDR(sound_dma) == start) | | 830 | if (KERNADDR(sound_dma) == start) |
831 | break; | | 831 | break; |
832 | } | | 832 | } |
833 | | | 833 | |
834 | /* not ours ? then bail out */ | | 834 | /* not ours ? then bail out */ |
835 | if (!sound_dma) { | | 835 | if (!sound_dma) { |
836 | printf("%s: auixp_trigger_input: bad sound addr %p\n", | | 836 | printf("%s: auixp_trigger_input: bad sound addr %p\n", |
837 | device_xname(sc->sc_dev), start); | | 837 | device_xname(sc->sc_dev), start); |
838 | return EINVAL; | | 838 | return EINVAL; |
839 | } | | 839 | } |
840 | | | 840 | |
841 | /* link round-robin daisychain and program hardware */ | | 841 | /* link round-robin daisychain and program hardware */ |
842 | auixp_link_daisychain(sc, chain_dma, sound_dma, blksize, blocks); | | 842 | auixp_link_daisychain(sc, chain_dma, sound_dma, blksize, blocks); |
843 | auixp_program_dma_chain(sc, chain_dma); | | 843 | auixp_program_dma_chain(sc, chain_dma); |
844 | | | 844 | |
845 | /* mark we are now able to run now */ | | 845 | /* mark we are now able to run now */ |
846 | chain_dma->running = 1; | | 846 | chain_dma->running = 1; |
847 | | | 847 | |
848 | /* update bus-flags; XXX programs more flags XXX */ | | 848 | /* update bus-flags; XXX programs more flags XXX */ |
849 | auixp_update_busbusy(sc); | | 849 | auixp_update_busbusy(sc); |
850 | | | 850 | |
851 | /* callbacks happen in interrupt routine */ | | 851 | /* callbacks happen in interrupt routine */ |
852 | return 0; | | 852 | return 0; |
853 | } | | 853 | } |
854 | | | 854 | |
855 | | | 855 | |
856 | /* halt sampling audio, just disable its dma and update bus state */ | | 856 | /* halt sampling audio, just disable its dma and update bus state */ |
857 | static int | | 857 | static int |
858 | auixp_halt_input(void *hdl) | | 858 | auixp_halt_input(void *hdl) |
859 | { | | 859 | { |
860 | struct auixp_codec *co; | | 860 | struct auixp_codec *co; |
861 | struct auixp_softc *sc; | | 861 | struct auixp_softc *sc; |
862 | struct auixp_dma *dma; | | 862 | struct auixp_dma *dma; |
863 | | | 863 | |
864 | co = (struct auixp_codec *) hdl; | | 864 | co = (struct auixp_codec *) hdl; |
865 | sc = co->sc; | | 865 | sc = co->sc; |
866 | dma = sc->sc_input_dma; | | 866 | dma = sc->sc_input_dma; |
867 | auixp_disable_dma(sc, dma); | | 867 | auixp_disable_dma(sc, dma); |
868 | | | 868 | |
869 | dma->running = 0; | | 869 | dma->running = 0; |
870 | auixp_update_busbusy(sc); | | 870 | auixp_update_busbusy(sc); |
871 | | | 871 | |
872 | return 0; | | 872 | return 0; |
873 | } | | 873 | } |
874 | | | 874 | |
875 | | | 875 | |
876 | /* | | 876 | /* |
877 | * IXP audio interrupt handler | | 877 | * IXP audio interrupt handler |
878 | * | | 878 | * |
879 | * note that we return the number of bits handled; the return value is not | | 879 | * note that we return the number of bits handled; the return value is not |
880 | * documentated but i saw it implemented in other drivers. Prolly returning a | | 880 | * documentated but i saw it implemented in other drivers. Prolly returning a |
881 | * value > 0 means "i've dealt with it" | | 881 | * value > 0 means "i've dealt with it" |
882 | * | | 882 | * |
883 | */ | | 883 | */ |
884 | static int | | 884 | static int |
885 | auixp_intr(void *softc) | | 885 | auixp_intr(void *softc) |
886 | { | | 886 | { |
887 | struct auixp_softc *sc; | | 887 | struct auixp_softc *sc; |
888 | bus_space_tag_t iot; | | 888 | bus_space_tag_t iot; |
889 | bus_space_handle_t ioh; | | 889 | bus_space_handle_t ioh; |
890 | uint32_t status, enable, detected_codecs; | | 890 | uint32_t status, enable, detected_codecs; |
891 | int ret; | | 891 | int ret; |
892 | | | 892 | |
893 | sc = softc; | | 893 | sc = softc; |
894 | mutex_spin_enter(&sc->sc_intr_lock); | | 894 | mutex_spin_enter(&sc->sc_intr_lock); |
895 | | | 895 | |
896 | iot = sc->sc_iot; | | 896 | iot = sc->sc_iot; |
897 | ioh = sc->sc_ioh; | | 897 | ioh = sc->sc_ioh; |
898 | ret = 0; | | 898 | ret = 0; |
899 | /* get status from the interrupt status register */ | | 899 | /* get status from the interrupt status register */ |
900 | status = bus_space_read_4(iot, ioh, ATI_REG_ISR); | | 900 | status = bus_space_read_4(iot, ioh, ATI_REG_ISR); |
901 | | | 901 | |
902 | if (status == 0) { | | 902 | if (status == 0) { |
903 | mutex_spin_exit(&sc->sc_intr_lock); | | 903 | mutex_spin_exit(&sc->sc_intr_lock); |
904 | return 0; | | 904 | return 0; |
905 | } | | 905 | } |
906 | | | 906 | |
907 | DPRINTF(("%s: (status = %x)\n", device_xname(sc->sc_dev), status)); | | 907 | DPRINTF(("%s: (status = %x)\n", device_xname(sc->sc_dev), status)); |
908 | | | 908 | |
909 | /* check DMA UPDATE flags for input & output */ | | 909 | /* check DMA UPDATE flags for input & output */ |
910 | if (status & ATI_REG_ISR_IN_STATUS) { | | 910 | if (status & ATI_REG_ISR_IN_STATUS) { |
911 | ret++; DPRINTF(("IN_STATUS\n")); | | 911 | ret++; DPRINTF(("IN_STATUS\n")); |
912 | auixp_dma_update(sc, sc->sc_input_dma); | | 912 | auixp_dma_update(sc, sc->sc_input_dma); |
913 | } | | 913 | } |
914 | if (status & ATI_REG_ISR_OUT_STATUS) { | | 914 | if (status & ATI_REG_ISR_OUT_STATUS) { |
915 | ret++; DPRINTF(("OUT_STATUS\n")); | | 915 | ret++; DPRINTF(("OUT_STATUS\n")); |
916 | auixp_dma_update(sc, sc->sc_output_dma); | | 916 | auixp_dma_update(sc, sc->sc_output_dma); |
917 | } | | 917 | } |
918 | | | 918 | |
919 | /* XXX XRUN flags not used/needed yet; should i implement it? XXX */ | | 919 | /* XXX XRUN flags not used/needed yet; should i implement it? XXX */ |
920 | /* acknowledge the interrupts nevertheless */ | | 920 | /* acknowledge the interrupts nevertheless */ |
921 | if (status & ATI_REG_ISR_IN_XRUN) { | | 921 | if (status & ATI_REG_ISR_IN_XRUN) { |
922 | ret++; DPRINTF(("IN_XRUN\n")); | | 922 | ret++; DPRINTF(("IN_XRUN\n")); |
923 | /* auixp_dma_xrun(sc, sc->sc_input_dma); */ | | 923 | /* auixp_dma_xrun(sc, sc->sc_input_dma); */ |
924 | } | | 924 | } |
925 | if (status & ATI_REG_ISR_OUT_XRUN) { | | 925 | if (status & ATI_REG_ISR_OUT_XRUN) { |
926 | ret++; DPRINTF(("OUT_XRUN\n")); | | 926 | ret++; DPRINTF(("OUT_XRUN\n")); |
927 | /* auixp_dma_xrun(sc, sc->sc_output_dma); */ | | 927 | /* auixp_dma_xrun(sc, sc->sc_output_dma); */ |
928 | } | | 928 | } |
929 | | | 929 | |
930 | /* check if we are looking for codec detection */ | | 930 | /* check if we are looking for codec detection */ |
931 | if (status & CODEC_CHECK_BITS) { | | 931 | if (status & CODEC_CHECK_BITS) { |
932 | ret++; | | 932 | ret++; |
933 | /* mark missing codecs as not ready */ | | 933 | /* mark missing codecs as not ready */ |
934 | detected_codecs = status & CODEC_CHECK_BITS; | | 934 | detected_codecs = status & CODEC_CHECK_BITS; |
935 | sc->sc_codec_not_ready_bits |= detected_codecs; | | 935 | sc->sc_codec_not_ready_bits |= detected_codecs; |
936 | | | 936 | |
937 | /* disable detected interrupt sources */ | | 937 | /* disable detected interrupt sources */ |
938 | enable = bus_space_read_4(iot, ioh, ATI_REG_IER); | | 938 | enable = bus_space_read_4(iot, ioh, ATI_REG_IER); |
939 | enable &= ~detected_codecs; | | 939 | enable &= ~detected_codecs; |
940 | bus_space_write_4(iot, ioh, ATI_REG_IER, enable); | | 940 | bus_space_write_4(iot, ioh, ATI_REG_IER, enable); |
941 | } | | 941 | } |
942 | | | 942 | |
943 | /* acknowledge interrupt sources */ | | 943 | /* acknowledge interrupt sources */ |
944 | bus_space_write_4(iot, ioh, ATI_REG_ISR, status); | | 944 | bus_space_write_4(iot, ioh, ATI_REG_ISR, status); |
945 | | | 945 | |
946 | mutex_spin_exit(&sc->sc_intr_lock); | | 946 | mutex_spin_exit(&sc->sc_intr_lock); |
947 | return ret; | | 947 | return ret; |
948 | } | | 948 | } |
949 | | | 949 | |
950 | | | 950 | |
951 | /* allocate memory for dma purposes; on failure of any of the steps, roll back */ | | 951 | /* allocate memory for dma purposes; on failure of any of the steps, roll back */ |
952 | static int | | 952 | static int |
953 | auixp_allocmem(struct auixp_softc *sc, size_t size, | | 953 | auixp_allocmem(struct auixp_softc *sc, size_t size, |
954 | size_t align, struct auixp_dma *dma) | | 954 | size_t align, struct auixp_dma *dma) |
955 | { | | 955 | { |
956 | int error; | | 956 | int error; |
957 | | | 957 | |
958 | /* remember size */ | | 958 | /* remember size */ |
959 | dma->size = size; | | 959 | dma->size = size; |
960 | | | 960 | |
961 | /* allocate DMA safe memory but in just one segment for now :( */ | | 961 | /* allocate DMA safe memory but in just one segment for now :( */ |
962 | error = bus_dmamem_alloc(sc->sc_dmat, dma->size, align, 0, | | 962 | error = bus_dmamem_alloc(sc->sc_dmat, dma->size, align, 0, |
963 | dma->segs, sizeof(dma->segs) / sizeof(dma->segs[0]), &dma->nsegs, | | 963 | dma->segs, sizeof(dma->segs) / sizeof(dma->segs[0]), &dma->nsegs, |
964 | BUS_DMA_WAITOK); | | 964 | BUS_DMA_WAITOK); |
965 | if (error) | | 965 | if (error) |
966 | return error; | | 966 | return error; |
967 | | | 967 | |
968 | /* | | 968 | /* |
969 | * map allocated memory into kernel virtual address space and keep it | | 969 | * map allocated memory into kernel virtual address space and keep it |
970 | * coherent with the CPU. | | 970 | * coherent with the CPU. |
971 | */ | | 971 | */ |
972 | error = bus_dmamem_map(sc->sc_dmat, dma->segs, dma->nsegs, dma->size, | | 972 | error = bus_dmamem_map(sc->sc_dmat, dma->segs, dma->nsegs, dma->size, |
973 | &dma->addr, BUS_DMA_WAITOK | BUS_DMA_COHERENT); | | 973 | &dma->addr, BUS_DMA_WAITOK | BUS_DMA_COHERENT); |
974 | if (error) | | 974 | if (error) |
975 | goto free; | | 975 | goto free; |
976 | | | 976 | |
977 | /* allocate associated dma handle and initialize it. */ | | 977 | /* allocate associated dma handle and initialize it. */ |
978 | error = bus_dmamap_create(sc->sc_dmat, dma->size, 1, dma->size, 0, | | 978 | error = bus_dmamap_create(sc->sc_dmat, dma->size, 1, dma->size, 0, |
979 | BUS_DMA_WAITOK, &dma->map); | | 979 | BUS_DMA_WAITOK, &dma->map); |
980 | if (error) | | 980 | if (error) |
981 | goto unmap; | | 981 | goto unmap; |
982 | | | 982 | |
983 | /* | | 983 | /* |
984 | * load the dma handle with mappings for a dma transfer; all pages | | 984 | * load the dma handle with mappings for a dma transfer; all pages |
985 | * need to be wired. | | 985 | * need to be wired. |
986 | */ | | 986 | */ |
987 | error = bus_dmamap_load(sc->sc_dmat, dma->map, dma->addr, dma->size, NULL, | | 987 | error = bus_dmamap_load(sc->sc_dmat, dma->map, dma->addr, dma->size, NULL, |
988 | BUS_DMA_WAITOK); | | 988 | BUS_DMA_WAITOK); |
989 | if (error) | | 989 | if (error) |
990 | goto destroy; | | 990 | goto destroy; |
991 | | | 991 | |
992 | return 0; | | 992 | return 0; |
993 | | | 993 | |
994 | destroy: | | 994 | destroy: |
995 | bus_dmamap_destroy(sc->sc_dmat, dma->map); | | 995 | bus_dmamap_destroy(sc->sc_dmat, dma->map); |
996 | unmap: | | 996 | unmap: |
997 | bus_dmamem_unmap(sc->sc_dmat, dma->addr, dma->size); | | 997 | bus_dmamem_unmap(sc->sc_dmat, dma->addr, dma->size); |
998 | free: | | 998 | free: |
999 | bus_dmamem_free(sc->sc_dmat, dma->segs, dma->nsegs); | | 999 | bus_dmamem_free(sc->sc_dmat, dma->segs, dma->nsegs); |
1000 | | | 1000 | |
1001 | return error; | | 1001 | return error; |
1002 | } | | 1002 | } |
1003 | | | 1003 | |
1004 | | | 1004 | |
1005 | /* undo dma mapping and release memory allocated */ | | 1005 | /* undo dma mapping and release memory allocated */ |
1006 | static int | | 1006 | static int |
1007 | auixp_freemem(struct auixp_softc *sc, struct auixp_dma *p) | | 1007 | auixp_freemem(struct auixp_softc *sc, struct auixp_dma *p) |
1008 | { | | 1008 | { |
1009 | | | 1009 | |
1010 | bus_dmamap_unload(sc->sc_dmat, p->map); | | 1010 | bus_dmamap_unload(sc->sc_dmat, p->map); |
1011 | bus_dmamap_destroy(sc->sc_dmat, p->map); | | 1011 | bus_dmamap_destroy(sc->sc_dmat, p->map); |
1012 | bus_dmamem_unmap(sc->sc_dmat, p->addr, p->size); | | 1012 | bus_dmamem_unmap(sc->sc_dmat, p->addr, p->size); |
1013 | bus_dmamem_free(sc->sc_dmat, p->segs, p->nsegs); | | 1013 | bus_dmamem_free(sc->sc_dmat, p->segs, p->nsegs); |
1014 | | | 1014 | |
1015 | return 0; | | 1015 | return 0; |
1016 | } | | 1016 | } |
1017 | | | 1017 | |
1018 | | | 1018 | |
1019 | /* | | 1019 | /* |
1020 | * Attachment section | | 1020 | * Attachment section |
1021 | */ | | 1021 | */ |
1022 | | | 1022 | |
1023 | /* Is it my hardware? */ | | 1023 | /* Is it my hardware? */ |
1024 | static int | | 1024 | static int |
1025 | auixp_match(device_t dev, cfdata_t match, void *aux) | | 1025 | auixp_match(device_t dev, cfdata_t match, void *aux) |
1026 | { | | 1026 | { |
1027 | struct pci_attach_args *pa; | | 1027 | struct pci_attach_args *pa; |
1028 | | | 1028 | |
1029 | pa = (struct pci_attach_args *)aux; | | 1029 | pa = (struct pci_attach_args *)aux; |
1030 | switch(PCI_VENDOR(pa->pa_id)) { | | 1030 | switch(PCI_VENDOR(pa->pa_id)) { |
1031 | case PCI_VENDOR_ATI: | | 1031 | case PCI_VENDOR_ATI: |
1032 | switch(PCI_PRODUCT(pa->pa_id)) { | | 1032 | switch(PCI_PRODUCT(pa->pa_id)) { |
1033 | case PCI_PRODUCT_ATI_IXP_AUDIO_200: | | 1033 | case PCI_PRODUCT_ATI_IXP_AUDIO_200: |
1034 | case PCI_PRODUCT_ATI_IXP_AUDIO_300: | | 1034 | case PCI_PRODUCT_ATI_IXP_AUDIO_300: |
1035 | case PCI_PRODUCT_ATI_IXP_AUDIO_400: | | 1035 | case PCI_PRODUCT_ATI_IXP_AUDIO_400: |
1036 | return 1; | | 1036 | return 1; |
1037 | } | | 1037 | } |
1038 | } | | 1038 | } |
1039 | | | 1039 | |
1040 | return 0; | | 1040 | return 0; |
1041 | } | | 1041 | } |
1042 | | | 1042 | |
1043 | | | 1043 | |
1044 | /* it is... now hook up and set up the resources we need */ | | 1044 | /* it is... now hook up and set up the resources we need */ |
1045 | static void | | 1045 | static void |
1046 | auixp_attach(device_t parent, device_t self, void *aux) | | 1046 | auixp_attach(device_t parent, device_t self, void *aux) |
1047 | { | | 1047 | { |
1048 | struct auixp_softc *sc; | | 1048 | struct auixp_softc *sc; |
1049 | struct pci_attach_args *pa; | | 1049 | struct pci_attach_args *pa; |
1050 | pcitag_t tag; | | 1050 | pcitag_t tag; |
1051 | pci_chipset_tag_t pc; | | 1051 | pci_chipset_tag_t pc; |
1052 | pci_intr_handle_t ih; | | 1052 | pci_intr_handle_t ih; |
1053 | const struct auixp_card_type *card; | | 1053 | const struct auixp_card_type *card; |
1054 | const char *intrstr; | | 1054 | const char *intrstr; |
1055 | uint32_t data; | | 1055 | uint32_t data; |
1056 | int error; | | 1056 | int error; |
1057 | char intrbuf[PCI_INTRSTR_LEN]; | | 1057 | char intrbuf[PCI_INTRSTR_LEN]; |
1058 | | | 1058 | |
1059 | sc = device_private(self); | | 1059 | sc = device_private(self); |
1060 | sc->sc_dev = self; | | 1060 | sc->sc_dev = self; |
1061 | pa = (struct pci_attach_args *)aux; | | 1061 | pa = (struct pci_attach_args *)aux; |
1062 | tag = pa->pa_tag; | | 1062 | tag = pa->pa_tag; |
1063 | pc = pa->pa_pc; | | 1063 | pc = pa->pa_pc; |
1064 | #ifdef DEBUG_AUIXP | | 1064 | #ifdef DEBUG_AUIXP |
1065 | static_sc = sc; | | 1065 | static_sc = sc; |
1066 | #endif | | 1066 | #endif |
1067 | | | 1067 | |
1068 | /* print information confirming attachment */ | | 1068 | /* print information confirming attachment */ |
1069 | pci_aprint_devinfo(pa, "Audio controller"); | | 1069 | pci_aprint_devinfo(pa, "Audio controller"); |
1070 | | | 1070 | |
1071 | /* set up details from our set of known `cards'/chips */ | | 1071 | /* set up details from our set of known `cards'/chips */ |
1072 | for (card = auixp_card_types; card->pci_vendor_id; card++) | | 1072 | for (card = auixp_card_types; card->pci_vendor_id; card++) |
1073 | if (PCI_VENDOR(pa->pa_id) == card->pci_vendor_id && | | 1073 | if (PCI_VENDOR(pa->pa_id) == card->pci_vendor_id && |
1074 | PCI_PRODUCT(pa->pa_id) == card->pci_product_id) { | | 1074 | PCI_PRODUCT(pa->pa_id) == card->pci_product_id) { |
1075 | sc->type = card->type; | | 1075 | sc->type = card->type; |
1076 | break; | | 1076 | break; |
1077 | } | | 1077 | } |
1078 | | | 1078 | |
1079 | /* device only has 32 bit non prefetchable memory */ | | 1079 | /* device only has 32 bit non prefetchable memory */ |
1080 | /* set MEM space access and enable the card's busmastering */ | | 1080 | /* set MEM space access and enable the card's busmastering */ |
1081 | data = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); | | 1081 | data = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); |
1082 | data |= (PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE); | | 1082 | data |= (PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE); |
1083 | pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, data); | | 1083 | pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, data); |
1084 | | | 1084 | |
1085 | /* map memory; its not sized -> what is the size? max PCI slot size? */ | | 1085 | /* map memory; its not sized -> what is the size? max PCI slot size? */ |
1086 | if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_MEM, 0, | | 1086 | if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_MEM, 0, |
1087 | &sc->sc_iot, &sc->sc_ioh, &sc->sc_iob, &sc->sc_ios)) { | | 1087 | &sc->sc_iot, &sc->sc_ioh, &sc->sc_iob, &sc->sc_ios)) { |
1088 | aprint_error_dev(sc->sc_dev, "can't map memory space\n"); | | 1088 | aprint_error_dev(sc->sc_dev, "can't map memory space\n"); |
1089 | return; | | 1089 | return; |
1090 | } | | 1090 | } |
1091 | | | 1091 | |
1092 | /* Initialize softc */ | | 1092 | /* Initialize softc */ |
1093 | sc->sc_tag = tag; | | 1093 | sc->sc_tag = tag; |
1094 | sc->sc_pct = pc; | | 1094 | sc->sc_pct = pc; |
1095 | sc->sc_dmat = pa->pa_dmat; | | 1095 | sc->sc_dmat = pa->pa_dmat; |
1096 | SLIST_INIT(&sc->sc_dma_list); | | 1096 | SLIST_INIT(&sc->sc_dma_list); |
1097 | | | 1097 | |
1098 | /* get us the auixp_dma structures */ | | 1098 | /* get us the auixp_dma structures */ |
1099 | auixp_allocate_dma_chain(sc, &sc->sc_output_dma); | | 1099 | auixp_allocate_dma_chain(sc, &sc->sc_output_dma); |
1100 | auixp_allocate_dma_chain(sc, &sc->sc_input_dma); | | 1100 | auixp_allocate_dma_chain(sc, &sc->sc_input_dma); |
1101 | | | 1101 | |
1102 | /* when that fails we are dead in the water */ | | 1102 | /* when that fails we are dead in the water */ |
1103 | if (!sc->sc_output_dma || !sc->sc_input_dma) | | 1103 | if (!sc->sc_output_dma || !sc->sc_input_dma) |
1104 | return; | | 1104 | return; |
1105 | | | 1105 | |
1106 | #if 0 | | 1106 | #if 0 |
1107 | /* could preliminary program DMA chain */ | | 1107 | /* could preliminary program DMA chain */ |
1108 | auixp_program_dma_chain(sc, sc->sc_output_dma); | | 1108 | auixp_program_dma_chain(sc, sc->sc_output_dma); |
1109 | auixp_program_dma_chain(sc, sc->sc_input_dma); | | 1109 | auixp_program_dma_chain(sc, sc->sc_input_dma); |
1110 | #endif | | 1110 | #endif |
1111 | | | 1111 | |
1112 | /* map interrupt on the pci bus */ | | 1112 | /* map interrupt on the pci bus */ |
1113 | if (pci_intr_map(pa, &ih)) { | | 1113 | if (pci_intr_map(pa, &ih)) { |
1114 | aprint_error_dev(sc->sc_dev, "can't map interrupt\n"); | | 1114 | aprint_error_dev(sc->sc_dev, "can't map interrupt\n"); |
1115 | return; | | 1115 | return; |
1116 | } | | 1116 | } |
1117 | | | 1117 | |
1118 | /* where are we connected at ? */ | | 1118 | /* where are we connected at ? */ |
1119 | intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); | | 1119 | intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); |
1120 | | | 1120 | |
1121 | mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); | | 1121 | mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); |
1122 | mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO); | | 1122 | mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO); |
1123 | | | 1123 | |
1124 | /* establish interrupt routine hookup at IPL_AUDIO level */ | | 1124 | /* establish interrupt routine hookup at IPL_AUDIO level */ |
1125 | sc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_AUDIO, auixp_intr, | | 1125 | sc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_AUDIO, auixp_intr, |
1126 | self, device_xname(self)); | | 1126 | sc, device_xname(self)); |
1127 | if (sc->sc_ih == NULL) { | | 1127 | if (sc->sc_ih == NULL) { |
1128 | aprint_error_dev(sc->sc_dev, "can't establish interrupt"); | | 1128 | aprint_error_dev(sc->sc_dev, "can't establish interrupt"); |
1129 | if (intrstr != NULL) | | 1129 | if (intrstr != NULL) |
1130 | aprint_error(" at %s", intrstr); | | 1130 | aprint_error(" at %s", intrstr); |
1131 | aprint_error("\n"); | | 1131 | aprint_error("\n"); |
1132 | return; | | 1132 | return; |
1133 | } | | 1133 | } |
1134 | aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr); | | 1134 | aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr); |
1135 | | | 1135 | |
1136 | /* power up chip */ | | 1136 | /* power up chip */ |
1137 | if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self, | | 1137 | if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self, |
1138 | pci_activate_null)) && error != EOPNOTSUPP) { | | 1138 | pci_activate_null)) && error != EOPNOTSUPP) { |
1139 | aprint_error_dev(sc->sc_dev, "cannot activate %d\n", | | 1139 | aprint_error_dev(sc->sc_dev, "cannot activate %d\n", |
1140 | error); | | 1140 | error); |
1141 | return; | | 1141 | return; |
1142 | } | | 1142 | } |
1143 | | | 1143 | |
1144 | /* init chip */ | | 1144 | /* init chip */ |
1145 | if (auixp_init(sc) == -1) { | | 1145 | if (auixp_init(sc) == -1) { |
1146 | aprint_error_dev(sc->sc_dev, | | 1146 | aprint_error_dev(sc->sc_dev, |
1147 | "auixp_attach: unable to initialize the card\n"); | | 1147 | "auixp_attach: unable to initialize the card\n"); |
1148 | return; | | 1148 | return; |
1149 | } | | 1149 | } |
1150 | | | 1150 | |
1151 | if (!pmf_device_register(self, NULL, auixp_resume)) | | 1151 | if (!pmf_device_register(self, NULL, auixp_resume)) |
1152 | aprint_error_dev(self, "couldn't establish power handler\n"); | | 1152 | aprint_error_dev(self, "couldn't establish power handler\n"); |
1153 | | | 1153 | |
1154 | /* | | 1154 | /* |
1155 | * delay further configuration of codecs and audio after interrupts | | 1155 | * delay further configuration of codecs and audio after interrupts |
1156 | * are enabled. | | 1156 | * are enabled. |
1157 | */ | | 1157 | */ |
1158 | config_interrupts(self, auixp_post_config); | | 1158 | config_interrupts(self, auixp_post_config); |
1159 | } | | 1159 | } |
1160 | | | 1160 | |
1161 | | | 1161 | |
1162 | /* called from autoconfigure system when interrupts are enabled */ | | 1162 | /* called from autoconfigure system when interrupts are enabled */ |
1163 | static void | | 1163 | static void |
1164 | auixp_post_config(device_t self) | | 1164 | auixp_post_config(device_t self) |
1165 | { | | 1165 | { |
1166 | struct auixp_softc *sc; | | 1166 | struct auixp_softc *sc; |
1167 | struct auixp_codec *codec; | | 1167 | struct auixp_codec *codec; |
1168 | int codec_nr; | | 1168 | int codec_nr; |
1169 | int i; | | 1169 | int i; |
1170 | | | 1170 | |
1171 | sc = device_private(self); | | 1171 | sc = device_private(self); |
1172 | /* detect the AC97 codecs */ | | 1172 | /* detect the AC97 codecs */ |
1173 | auixp_autodetect_codecs(sc); | | 1173 | auixp_autodetect_codecs(sc); |
1174 | | | 1174 | |
1175 | /* setup audio translation formats : following codec0 (!) */ | | 1175 | /* setup audio translation formats : following codec0 (!) */ |
1176 | codec = &sc->sc_codec[0]; | | 1176 | codec = &sc->sc_codec[0]; |
1177 | if (!codec->present) { | | 1177 | if (!codec->present) { |
1178 | /* nothing??? then invalidate all formats */ | | 1178 | /* nothing??? then invalidate all formats */ |
1179 | for (i = 0; i < AUIXP_NFORMATS; i++) { | | 1179 | for (i = 0; i < AUIXP_NFORMATS; i++) { |
1180 | AUFMT_INVALIDATE(&sc->sc_formats[i]); | | 1180 | AUFMT_INVALIDATE(&sc->sc_formats[i]); |
1181 | } | | 1181 | } |
1182 | return; | | 1182 | return; |
1183 | } | | 1183 | } |
1184 | | | 1184 | |
1185 | /* copy formats and invalidate entries not suitable for codec0 */ | | 1185 | /* copy formats and invalidate entries not suitable for codec0 */ |
1186 | memcpy(sc->sc_formats, auixp_formats, sizeof(auixp_formats)); | | 1186 | memcpy(sc->sc_formats, auixp_formats, sizeof(auixp_formats)); |
1187 | mutex_enter(&sc->sc_lock); | | 1187 | mutex_enter(&sc->sc_lock); |
1188 | sc->has_4ch = AC97_IS_4CH(codec->codec_if); | | 1188 | sc->has_4ch = AC97_IS_4CH(codec->codec_if); |
1189 | sc->has_6ch = AC97_IS_6CH(codec->codec_if); | | 1189 | sc->has_6ch = AC97_IS_6CH(codec->codec_if); |
1190 | sc->is_fixed = AC97_IS_FIXED_RATE(codec->codec_if); | | 1190 | sc->is_fixed = AC97_IS_FIXED_RATE(codec->codec_if); |
1191 | sc->has_spdif = AC97_HAS_SPDIF(codec->codec_if); | | 1191 | sc->has_spdif = AC97_HAS_SPDIF(codec->codec_if); |
1192 | mutex_exit(&sc->sc_lock); | | 1192 | mutex_exit(&sc->sc_lock); |
1193 | | | 1193 | |
1194 | for (i = 0; i < AUIXP_NFORMATS; i++) { | | 1194 | for (i = 0; i < AUIXP_NFORMATS; i++) { |
1195 | if (sc->is_fixed) { | | 1195 | if (sc->is_fixed) { |
1196 | sc->sc_formats[i].frequency_type = 1; | | 1196 | sc->sc_formats[i].frequency_type = 1; |
1197 | sc->sc_formats[i].frequency[0] = 48000; | | 1197 | sc->sc_formats[i].frequency[0] = 48000; |
1198 | } | | 1198 | } |
1199 | switch (sc->sc_formats[i].channels) { | | 1199 | switch (sc->sc_formats[i].channels) { |
1200 | case 4 : | | 1200 | case 4 : |
1201 | if (sc->has_4ch) | | 1201 | if (sc->has_4ch) |
1202 | break; | | 1202 | break; |
1203 | AUFMT_INVALIDATE(&sc->sc_formats[i]); | | 1203 | AUFMT_INVALIDATE(&sc->sc_formats[i]); |
1204 | break; | | 1204 | break; |
1205 | case 6 : | | 1205 | case 6 : |
1206 | if (sc->has_6ch) | | 1206 | if (sc->has_6ch) |
1207 | break; | | 1207 | break; |
1208 | AUFMT_INVALIDATE(&sc->sc_formats[i]); | | 1208 | AUFMT_INVALIDATE(&sc->sc_formats[i]); |
1209 | break; | | 1209 | break; |
1210 | default : | | 1210 | default : |
1211 | break; | | 1211 | break; |
1212 | } | | 1212 | } |
1213 | } | | 1213 | } |
1214 | | | 1214 | |
1215 | if (sc->has_spdif) { | | 1215 | if (sc->has_spdif) { |
1216 | aprint_normal_dev(sc->sc_dev, "codec spdif support detected but disabled " | | 1216 | aprint_normal_dev(sc->sc_dev, "codec spdif support detected but disabled " |
1217 | "for now\n"); | | 1217 | "for now\n"); |
1218 | sc->has_spdif = 0; | | 1218 | sc->has_spdif = 0; |
1219 | } | | 1219 | } |
1220 | | | 1220 | |
1221 | /* fill in the missing details about the dma channels. */ | | 1221 | /* fill in the missing details about the dma channels. */ |
1222 | /* for output */ | | 1222 | /* for output */ |
1223 | sc->sc_output_dma->linkptr = ATI_REG_OUT_DMA_LINKPTR; | | 1223 | sc->sc_output_dma->linkptr = ATI_REG_OUT_DMA_LINKPTR; |
1224 | sc->sc_output_dma->dma_enable_bit = ATI_REG_CMD_OUT_DMA_EN | | | 1224 | sc->sc_output_dma->dma_enable_bit = ATI_REG_CMD_OUT_DMA_EN | |
1225 | ATI_REG_CMD_SEND_EN; | | 1225 | ATI_REG_CMD_SEND_EN; |
1226 | /* have spdif? then this too! XXX not seeing LED yet! XXX */ | | 1226 | /* have spdif? then this too! XXX not seeing LED yet! XXX */ |
1227 | if (sc->has_spdif) | | 1227 | if (sc->has_spdif) |
1228 | sc->sc_output_dma->dma_enable_bit |= ATI_REG_CMD_SPDF_OUT_EN; | | 1228 | sc->sc_output_dma->dma_enable_bit |= ATI_REG_CMD_SPDF_OUT_EN; |
1229 | | | 1229 | |
1230 | /* and for input */ | | 1230 | /* and for input */ |
1231 | sc->sc_input_dma->linkptr = ATI_REG_IN_DMA_LINKPTR; | | 1231 | sc->sc_input_dma->linkptr = ATI_REG_IN_DMA_LINKPTR; |
1232 | sc->sc_input_dma->dma_enable_bit = ATI_REG_CMD_IN_DMA_EN | | | 1232 | sc->sc_input_dma->dma_enable_bit = ATI_REG_CMD_IN_DMA_EN | |
1233 | ATI_REG_CMD_RECEIVE_EN; | | 1233 | ATI_REG_CMD_RECEIVE_EN; |
1234 | | | 1234 | |
1235 | /* attach audio devices for all detected codecs */ | | 1235 | /* attach audio devices for all detected codecs */ |
1236 | /* XXX wise? look at other multiple-codec able chipsets XXX */ | | 1236 | /* XXX wise? look at other multiple-codec able chipsets XXX */ |
1237 | for (codec_nr = 0; codec_nr < ATI_IXP_CODECS; codec_nr++) { | | 1237 | for (codec_nr = 0; codec_nr < ATI_IXP_CODECS; codec_nr++) { |
1238 | codec = &sc->sc_codec[codec_nr]; | | 1238 | codec = &sc->sc_codec[codec_nr]; |
1239 | if (codec->present) | | 1239 | if (codec->present) |
1240 | audio_attach_mi(&auixp_hw_if, codec, sc->sc_dev); | | 1240 | audio_attach_mi(&auixp_hw_if, codec, sc->sc_dev); |
1241 | } | | 1241 | } |
1242 | | | 1242 | |
1243 | /* done! now enable all interrupts we can service */ | | 1243 | /* done! now enable all interrupts we can service */ |
1244 | auixp_enable_interrupts(sc); | | 1244 | auixp_enable_interrupts(sc); |
1245 | } | | 1245 | } |
1246 | | | 1246 | |
1247 | static void | | 1247 | static void |
1248 | auixp_enable_interrupts(struct auixp_softc *sc) | | 1248 | auixp_enable_interrupts(struct auixp_softc *sc) |
1249 | { | | 1249 | { |
1250 | bus_space_tag_t iot; | | 1250 | bus_space_tag_t iot; |
1251 | bus_space_handle_t ioh; | | 1251 | bus_space_handle_t ioh; |
1252 | uint32_t value; | | 1252 | uint32_t value; |
1253 | | | 1253 | |
1254 | iot = sc->sc_iot; | | 1254 | iot = sc->sc_iot; |
1255 | ioh = sc->sc_ioh; | | 1255 | ioh = sc->sc_ioh; |
1256 | | | 1256 | |
1257 | mutex_spin_enter(&sc->sc_intr_lock); | | 1257 | mutex_spin_enter(&sc->sc_intr_lock); |
1258 | | | 1258 | |
1259 | /* clear all pending */ | | 1259 | /* clear all pending */ |
1260 | bus_space_write_4(iot, ioh, ATI_REG_ISR, 0xffffffff); | | 1260 | bus_space_write_4(iot, ioh, ATI_REG_ISR, 0xffffffff); |
1261 | | | 1261 | |
1262 | /* enable all relevant interrupt sources we can handle */ | | 1262 | /* enable all relevant interrupt sources we can handle */ |
1263 | value = bus_space_read_4(iot, ioh, ATI_REG_IER); | | 1263 | value = bus_space_read_4(iot, ioh, ATI_REG_IER); |
1264 | | | 1264 | |
1265 | value |= ATI_REG_IER_IO_STATUS_EN; | | 1265 | value |= ATI_REG_IER_IO_STATUS_EN; |
1266 | #ifdef notyet | | 1266 | #ifdef notyet |
1267 | value |= ATI_REG_IER_IN_XRUN_EN; | | 1267 | value |= ATI_REG_IER_IN_XRUN_EN; |
1268 | value |= ATI_REG_IER_OUT_XRUN_EN; | | 1268 | value |= ATI_REG_IER_OUT_XRUN_EN; |
1269 | | | 1269 | |
1270 | value |= ATI_REG_IER_SPDIF_XRUN_EN; | | 1270 | value |= ATI_REG_IER_SPDIF_XRUN_EN; |
1271 | value |= ATI_REG_IER_SPDF_STATUS_EN; | | 1271 | value |= ATI_REG_IER_SPDF_STATUS_EN; |
1272 | #endif | | 1272 | #endif |
1273 | | | 1273 | |
1274 | bus_space_write_4(iot, ioh, ATI_REG_IER, value); | | 1274 | bus_space_write_4(iot, ioh, ATI_REG_IER, value); |
1275 | | | 1275 | |
1276 | mutex_spin_exit(&sc->sc_intr_lock); | | 1276 | mutex_spin_exit(&sc->sc_intr_lock); |
1277 | } | | 1277 | } |
1278 | | | 1278 | |
1279 | | | 1279 | |
1280 | static void | | 1280 | static void |
1281 | auixp_disable_interrupts(struct auixp_softc *sc) | | 1281 | auixp_disable_interrupts(struct auixp_softc *sc) |
1282 | { | | 1282 | { |
1283 | bus_space_tag_t iot; | | 1283 | bus_space_tag_t iot; |
1284 | bus_space_handle_t ioh; | | 1284 | bus_space_handle_t ioh; |
1285 | | | 1285 | |
1286 | iot = sc->sc_iot; | | 1286 | iot = sc->sc_iot; |
1287 | ioh = sc->sc_ioh; | | 1287 | ioh = sc->sc_ioh; |
1288 | | | 1288 | |
1289 | mutex_spin_enter(&sc->sc_intr_lock); | | 1289 | mutex_spin_enter(&sc->sc_intr_lock); |
1290 | | | 1290 | |
1291 | /* disable all interrupt sources */ | | 1291 | /* disable all interrupt sources */ |
1292 | bus_space_write_4(iot, ioh, ATI_REG_IER, 0); | | 1292 | bus_space_write_4(iot, ioh, ATI_REG_IER, 0); |
1293 | | | 1293 | |
1294 | /* clear all pending */ | | 1294 | /* clear all pending */ |
1295 | bus_space_write_4(iot, ioh, ATI_REG_ISR, 0xffffffff); | | 1295 | bus_space_write_4(iot, ioh, ATI_REG_ISR, 0xffffffff); |
1296 | | | 1296 | |
1297 | mutex_spin_exit(&sc->sc_intr_lock); | | 1297 | mutex_spin_exit(&sc->sc_intr_lock); |
1298 | } | | 1298 | } |
1299 | | | 1299 | |
1300 | | | 1300 | |
1301 | /* dismantle what we've set up by undoing setup */ | | 1301 | /* dismantle what we've set up by undoing setup */ |
1302 | static int | | 1302 | static int |
1303 | auixp_detach(device_t self, int flags) | | 1303 | auixp_detach(device_t self, int flags) |
1304 | { | | 1304 | { |
1305 | struct auixp_softc *sc; | | 1305 | struct auixp_softc *sc; |
1306 | | | 1306 | |
1307 | sc = device_private(self); | | 1307 | sc = device_private(self); |
1308 | /* XXX shouldn't we just reset the chip? XXX */ | | 1308 | /* XXX shouldn't we just reset the chip? XXX */ |
1309 | /* | | 1309 | /* |
1310 | * should we explicitly disable interrupt generation and acknowledge | | 1310 | * should we explicitly disable interrupt generation and acknowledge |
1311 | * what's left on? better be safe than sorry. | | 1311 | * what's left on? better be safe than sorry. |
1312 | */ | | 1312 | */ |
1313 | auixp_disable_interrupts(sc); | | 1313 | auixp_disable_interrupts(sc); |
1314 | | | 1314 | |
1315 | /* tear down .... */ | | 1315 | /* tear down .... */ |
1316 | config_detach(sc->sc_dev, flags); /* XXX OK? XXX */ | | 1316 | config_detach(sc->sc_dev, flags); /* XXX OK? XXX */ |
1317 | pmf_device_deregister(self); | | 1317 | pmf_device_deregister(self); |
1318 | | | 1318 | |
1319 | if (sc->sc_ih != NULL) | | 1319 | if (sc->sc_ih != NULL) |
1320 | pci_intr_disestablish(sc->sc_pct, sc->sc_ih); | | 1320 | pci_intr_disestablish(sc->sc_pct, sc->sc_ih); |
1321 | if (sc->sc_ios) | | 1321 | if (sc->sc_ios) |
1322 | bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios); | | 1322 | bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios); |
1323 | | | 1323 | |
1324 | mutex_destroy(&sc->sc_lock); | | 1324 | mutex_destroy(&sc->sc_lock); |
1325 | mutex_destroy(&sc->sc_intr_lock); | | 1325 | mutex_destroy(&sc->sc_intr_lock); |
1326 | | | 1326 | |
1327 | return 0; | | 1327 | return 0; |
1328 | } | | 1328 | } |
1329 | | | 1329 | |
1330 | | | 1330 | |
1331 | /* | | 1331 | /* |
1332 | * codec handling | | 1332 | * codec handling |
1333 | * | | 1333 | * |
1334 | * IXP audio support can have upto 3 codecs! are they chained ? or | | 1334 | * IXP audio support can have upto 3 codecs! are they chained ? or |
1335 | * alternative outlets with the same audio feed i.e. with different mixer | | 1335 | * alternative outlets with the same audio feed i.e. with different mixer |
1336 | * settings? XXX does NetBSD support more than one audio codec? XXX | | 1336 | * settings? XXX does NetBSD support more than one audio codec? XXX |
1337 | */ | | 1337 | */ |
1338 | | | 1338 | |
1339 | | | 1339 | |
1340 | static int | | 1340 | static int |
1341 | auixp_attach_codec(void *aux, struct ac97_codec_if *codec_if) | | 1341 | auixp_attach_codec(void *aux, struct ac97_codec_if *codec_if) |
1342 | { | | 1342 | { |
1343 | struct auixp_codec *ixp_codec; | | 1343 | struct auixp_codec *ixp_codec; |
1344 | | | 1344 | |
1345 | ixp_codec = aux; | | 1345 | ixp_codec = aux; |
1346 | ixp_codec->codec_if = codec_if; | | 1346 | ixp_codec->codec_if = codec_if; |
1347 | ixp_codec->present = 1; | | 1347 | ixp_codec->present = 1; |
1348 | | | 1348 | |
1349 | return 0; | | 1349 | return 0; |
1350 | } | | 1350 | } |
1351 | | | 1351 | |
1352 | | | 1352 | |
1353 | static int | | 1353 | static int |
1354 | auixp_read_codec(void *aux, uint8_t reg, uint16_t *result) | | 1354 | auixp_read_codec(void *aux, uint8_t reg, uint16_t *result) |
1355 | { | | 1355 | { |
1356 | struct auixp_codec *co; | | 1356 | struct auixp_codec *co; |
1357 | struct auixp_softc *sc; | | 1357 | struct auixp_softc *sc; |
1358 | bus_space_tag_t iot; | | 1358 | bus_space_tag_t iot; |
1359 | bus_space_handle_t ioh; | | 1359 | bus_space_handle_t ioh; |
1360 | uint32_t data; | | 1360 | uint32_t data; |
1361 | int timeout; | | 1361 | int timeout; |
1362 | | | 1362 | |
1363 | co = aux; | | 1363 | co = aux; |
1364 | sc = co->sc; | | 1364 | sc = co->sc; |
1365 | iot = sc->sc_iot; | | 1365 | iot = sc->sc_iot; |
1366 | ioh = sc->sc_ioh; | | 1366 | ioh = sc->sc_ioh; |
1367 | if (auixp_wait_for_codecs(sc, "read_codec")) | | 1367 | if (auixp_wait_for_codecs(sc, "read_codec")) |
1368 | return 0xffff; | | 1368 | return 0xffff; |
1369 | | | 1369 | |
1370 | /* build up command for reading codec register */ | | 1370 | /* build up command for reading codec register */ |
1371 | data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | | | 1371 | data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | |
1372 | ATI_REG_PHYS_OUT_ADDR_EN | | | 1372 | ATI_REG_PHYS_OUT_ADDR_EN | |
1373 | ATI_REG_PHYS_OUT_RW | | | 1373 | ATI_REG_PHYS_OUT_RW | |
1374 | co->codec_nr; | | 1374 | co->codec_nr; |
1375 | | | 1375 | |
1376 | bus_space_write_4(iot, ioh, ATI_REG_PHYS_OUT_ADDR, data); | | 1376 | bus_space_write_4(iot, ioh, ATI_REG_PHYS_OUT_ADDR, data); |
1377 | | | 1377 | |
1378 | if (auixp_wait_for_codecs(sc, "read_codec")) | | 1378 | if (auixp_wait_for_codecs(sc, "read_codec")) |
1379 | return 0xffff; | | 1379 | return 0xffff; |
1380 | | | 1380 | |
1381 | /* wait until codec info is clocked in */ | | 1381 | /* wait until codec info is clocked in */ |
1382 | timeout = 500; /* 500*2 usec -> 0.001 sec */ | | 1382 | timeout = 500; /* 500*2 usec -> 0.001 sec */ |
1383 | do { | | 1383 | do { |
1384 | data = bus_space_read_4(iot, ioh, ATI_REG_PHYS_IN_ADDR); | | 1384 | data = bus_space_read_4(iot, ioh, ATI_REG_PHYS_IN_ADDR); |
1385 | if (data & ATI_REG_PHYS_IN_READ_FLAG) { | | 1385 | if (data & ATI_REG_PHYS_IN_READ_FLAG) { |
1386 | DPRINTF(("read ac'97 codec reg 0x%x = 0x%08x\n", | | 1386 | DPRINTF(("read ac'97 codec reg 0x%x = 0x%08x\n", |
1387 | reg, data >> ATI_REG_PHYS_IN_DATA_SHIFT) | | 1387 | reg, data >> ATI_REG_PHYS_IN_DATA_SHIFT) |
1388 | ); | | 1388 | ); |
1389 | *result = data >> ATI_REG_PHYS_IN_DATA_SHIFT; | | 1389 | *result = data >> ATI_REG_PHYS_IN_DATA_SHIFT; |
1390 | return 0; | | 1390 | return 0; |
1391 | } | | 1391 | } |
1392 | DELAY(2); | | 1392 | DELAY(2); |
1393 | timeout--; | | 1393 | timeout--; |
1394 | } while (timeout > 0); | | 1394 | } while (timeout > 0); |
1395 | | | 1395 | |
1396 | if (reg < 0x7c) | | 1396 | if (reg < 0x7c) |
1397 | printf("%s: codec read timeout! (reg %x)\n", | | 1397 | printf("%s: codec read timeout! (reg %x)\n", |
1398 | device_xname(sc->sc_dev), reg); | | 1398 | device_xname(sc->sc_dev), reg); |
1399 | | | 1399 | |
1400 | return 0xffff; | | 1400 | return 0xffff; |
1401 | } | | 1401 | } |
1402 | | | 1402 | |
1403 | | | 1403 | |
1404 | static int | | 1404 | static int |
1405 | auixp_write_codec(void *aux, uint8_t reg, uint16_t data) | | 1405 | auixp_write_codec(void *aux, uint8_t reg, uint16_t data) |
1406 | { | | 1406 | { |
1407 | struct auixp_codec *co; | | 1407 | struct auixp_codec *co; |
1408 | struct auixp_softc *sc; | | 1408 | struct auixp_softc *sc; |
1409 | bus_space_tag_t iot; | | 1409 | bus_space_tag_t iot; |
1410 | bus_space_handle_t ioh; | | 1410 | bus_space_handle_t ioh; |
1411 | uint32_t value; | | 1411 | uint32_t value; |
1412 | | | 1412 | |
1413 | DPRINTF(("write ac'97 codec reg 0x%x = 0x%08x\n", reg, data)); | | 1413 | DPRINTF(("write ac'97 codec reg 0x%x = 0x%08x\n", reg, data)); |
1414 | co = aux; | | 1414 | co = aux; |
1415 | sc = co->sc; | | 1415 | sc = co->sc; |
1416 | iot = sc->sc_iot; | | 1416 | iot = sc->sc_iot; |
1417 | ioh = sc->sc_ioh; | | 1417 | ioh = sc->sc_ioh; |
1418 | if (auixp_wait_for_codecs(sc, "write_codec")) | | 1418 | if (auixp_wait_for_codecs(sc, "write_codec")) |
1419 | return -1; | | 1419 | return -1; |
1420 | | | 1420 | |
1421 | /* build up command for writing codec register */ | | 1421 | /* build up command for writing codec register */ |
1422 | value = (((uint32_t) data) << ATI_REG_PHYS_OUT_DATA_SHIFT) | | | 1422 | value = (((uint32_t) data) << ATI_REG_PHYS_OUT_DATA_SHIFT) | |
1423 | (((uint32_t) reg) << ATI_REG_PHYS_OUT_ADDR_SHIFT) | | | 1423 | (((uint32_t) reg) << ATI_REG_PHYS_OUT_ADDR_SHIFT) | |
1424 | ATI_REG_PHYS_OUT_ADDR_EN | | | 1424 | ATI_REG_PHYS_OUT_ADDR_EN | |
1425 | co->codec_nr; | | 1425 | co->codec_nr; |
1426 | | | 1426 | |
1427 | bus_space_write_4(iot, ioh, ATI_REG_PHYS_OUT_ADDR, value); | | 1427 | bus_space_write_4(iot, ioh, ATI_REG_PHYS_OUT_ADDR, value); |
1428 | | | 1428 | |
1429 | return 0; | | 1429 | return 0; |
1430 | } | | 1430 | } |
1431 | | | 1431 | |
1432 | | | 1432 | |
1433 | static int | | 1433 | static int |
1434 | auixp_reset_codec(void *aux) | | 1434 | auixp_reset_codec(void *aux) |
1435 | { | | 1435 | { |
1436 | | | 1436 | |
1437 | /* nothing to be done? */ | | 1437 | /* nothing to be done? */ |
1438 | return 0; | | 1438 | return 0; |
1439 | } | | 1439 | } |
1440 | | | 1440 | |
1441 | | | 1441 | |
1442 | static enum ac97_host_flags | | 1442 | static enum ac97_host_flags |
1443 | auixp_flags_codec(void *aux) | | 1443 | auixp_flags_codec(void *aux) |
1444 | { | | 1444 | { |
1445 | struct auixp_codec *ixp_codec; | | 1445 | struct auixp_codec *ixp_codec; |
1446 | | | 1446 | |
1447 | ixp_codec = aux; | | 1447 | ixp_codec = aux; |
1448 | return ixp_codec->codec_flags; | | 1448 | return ixp_codec->codec_flags; |
1449 | } | | 1449 | } |
1450 | | | 1450 | |
1451 | | | 1451 | |
1452 | static int | | 1452 | static int |
1453 | auixp_wait_for_codecs(struct auixp_softc *sc, const char *func) | | 1453 | auixp_wait_for_codecs(struct auixp_softc *sc, const char *func) |
1454 | { | | 1454 | { |
1455 | bus_space_tag_t iot; | | 1455 | bus_space_tag_t iot; |
1456 | bus_space_handle_t ioh; | | 1456 | bus_space_handle_t ioh; |
1457 | uint32_t value; | | 1457 | uint32_t value; |
1458 | int timeout; | | 1458 | int timeout; |
1459 | | | 1459 | |
1460 | iot = sc->sc_iot; | | 1460 | iot = sc->sc_iot; |
1461 | ioh = sc->sc_ioh; | | 1461 | ioh = sc->sc_ioh; |
1462 | /* wait until all codec transfers are done */ | | 1462 | /* wait until all codec transfers are done */ |
1463 | timeout = 500; /* 500*2 usec -> 0.001 sec */ | | 1463 | timeout = 500; /* 500*2 usec -> 0.001 sec */ |
1464 | do { | | 1464 | do { |
1465 | value = bus_space_read_4(iot, ioh, ATI_REG_PHYS_OUT_ADDR); | | 1465 | value = bus_space_read_4(iot, ioh, ATI_REG_PHYS_OUT_ADDR); |
1466 | if ((value & ATI_REG_PHYS_OUT_ADDR_EN) == 0) | | 1466 | if ((value & ATI_REG_PHYS_OUT_ADDR_EN) == 0) |
1467 | return 0; | | 1467 | return 0; |
1468 | | | 1468 | |
1469 | DELAY(2); | | 1469 | DELAY(2); |
1470 | timeout--; | | 1470 | timeout--; |
1471 | } while (timeout > 0); | | 1471 | } while (timeout > 0); |
1472 | | | 1472 | |
1473 | printf("%s: %s: timed out\n", func, device_xname(sc->sc_dev)); | | 1473 | printf("%s: %s: timed out\n", func, device_xname(sc->sc_dev)); |
1474 | return -1; | | 1474 | return -1; |
1475 | } | | 1475 | } |
1476 | | | 1476 | |
1477 | | | 1477 | |
1478 | | | 1478 | |
1479 | static void | | 1479 | static void |
1480 | auixp_autodetect_codecs(struct auixp_softc *sc) | | 1480 | auixp_autodetect_codecs(struct auixp_softc *sc) |
1481 | { | | 1481 | { |
1482 | bus_space_tag_t iot; | | 1482 | bus_space_tag_t iot; |
1483 | bus_space_handle_t ioh; | | 1483 | bus_space_handle_t ioh; |
1484 | struct auixp_codec *codec; | | 1484 | struct auixp_codec *codec; |
1485 | int timeout, codec_nr; | | 1485 | int timeout, codec_nr; |
1486 | | | 1486 | |
1487 | iot = sc->sc_iot; | | 1487 | iot = sc->sc_iot; |
1488 | ioh = sc->sc_ioh; | | 1488 | ioh = sc->sc_ioh; |
1489 | /* ATI IXP can have upto 3 codecs; mark all codecs as not existing */ | | 1489 | /* ATI IXP can have upto 3 codecs; mark all codecs as not existing */ |
1490 | sc->sc_codec_not_ready_bits = 0; | | 1490 | sc->sc_codec_not_ready_bits = 0; |
1491 | sc->sc_num_codecs = 0; | | 1491 | sc->sc_num_codecs = 0; |
1492 | | | 1492 | |
1493 | /* enable all codecs to interrupt as well as the new frame interrupt */ | | 1493 | /* enable all codecs to interrupt as well as the new frame interrupt */ |
1494 | bus_space_write_4(iot, ioh, ATI_REG_IER, CODEC_CHECK_BITS); | | 1494 | bus_space_write_4(iot, ioh, ATI_REG_IER, CODEC_CHECK_BITS); |
1495 | | | 1495 | |
1496 | /* wait for the interrupts to happen */ | | 1496 | /* wait for the interrupts to happen */ |
1497 | timeout = 100; /* 100.000 usec -> 0.1 sec */ | | 1497 | timeout = 100; /* 100.000 usec -> 0.1 sec */ |
1498 | | | 1498 | |
1499 | while (timeout > 0) { | | 1499 | while (timeout > 0) { |
1500 | DELAY(1000); | | 1500 | DELAY(1000); |
1501 | if (sc->sc_codec_not_ready_bits) | | 1501 | if (sc->sc_codec_not_ready_bits) |
1502 | break; | | 1502 | break; |
1503 | timeout--; | | 1503 | timeout--; |
1504 | } | | 1504 | } |
1505 | | | 1505 | |
1506 | if (timeout == 0) | | 1506 | if (timeout == 0) |
1507 | printf("%s: WARNING: timeout during codec detection; " | | 1507 | printf("%s: WARNING: timeout during codec detection; " |
1508 | "codecs might be present but haven't interrupted\n", | | 1508 | "codecs might be present but haven't interrupted\n", |
1509 | device_xname(sc->sc_dev)); | | 1509 | device_xname(sc->sc_dev)); |
1510 | | | 1510 | |
1511 | /* disable all interrupts for now */ | | 1511 | /* disable all interrupts for now */ |
1512 | auixp_disable_interrupts(sc); | | 1512 | auixp_disable_interrupts(sc); |
1513 | | | 1513 | |
1514 | /* Attach AC97 host interfaces */ | | 1514 | /* Attach AC97 host interfaces */ |
1515 | for (codec_nr = 0; codec_nr < ATI_IXP_CODECS; codec_nr++) { | | 1515 | for (codec_nr = 0; codec_nr < ATI_IXP_CODECS; codec_nr++) { |
1516 | codec = &sc->sc_codec[codec_nr]; | | 1516 | codec = &sc->sc_codec[codec_nr]; |
1517 | memset(codec, 0, sizeof(struct auixp_codec)); | | 1517 | memset(codec, 0, sizeof(struct auixp_codec)); |
1518 | | | 1518 | |
1519 | codec->sc = sc; | | 1519 | codec->sc = sc; |
1520 | codec->codec_nr = codec_nr; | | 1520 | codec->codec_nr = codec_nr; |
1521 | codec->present = 0; | | 1521 | codec->present = 0; |
1522 | | | 1522 | |
1523 | codec->host_if.arg = codec; | | 1523 | codec->host_if.arg = codec; |
1524 | codec->host_if.attach = auixp_attach_codec; | | 1524 | codec->host_if.attach = auixp_attach_codec; |
1525 | codec->host_if.read = auixp_read_codec; | | 1525 | codec->host_if.read = auixp_read_codec; |
1526 | codec->host_if.write = auixp_write_codec; | | 1526 | codec->host_if.write = auixp_write_codec; |
1527 | codec->host_if.reset = auixp_reset_codec; | | 1527 | codec->host_if.reset = auixp_reset_codec; |
1528 | codec->host_if.flags = auixp_flags_codec; | | 1528 | codec->host_if.flags = auixp_flags_codec; |
1529 | } | | 1529 | } |
1530 | | | 1530 | |
1531 | if (!(sc->sc_codec_not_ready_bits & ATI_REG_ISR_CODEC0_NOT_READY)) { | | 1531 | if (!(sc->sc_codec_not_ready_bits & ATI_REG_ISR_CODEC0_NOT_READY)) { |
1532 | /* codec 0 present */ | | 1532 | /* codec 0 present */ |
1533 | DPRINTF(("auixp : YAY! codec 0 present!\n")); | | 1533 | DPRINTF(("auixp : YAY! codec 0 present!\n")); |
1534 | if (ac97_attach(&sc->sc_codec[0].host_if, sc->sc_dev, | | 1534 | if (ac97_attach(&sc->sc_codec[0].host_if, sc->sc_dev, |
1535 | &sc->sc_lock) == 0) | | 1535 | &sc->sc_lock) == 0) |
1536 | sc->sc_num_codecs++; | | 1536 | sc->sc_num_codecs++; |
1537 | } | | 1537 | } |
1538 | | | 1538 | |
1539 | if (!(sc->sc_codec_not_ready_bits & ATI_REG_ISR_CODEC1_NOT_READY)) { | | 1539 | if (!(sc->sc_codec_not_ready_bits & ATI_REG_ISR_CODEC1_NOT_READY)) { |
1540 | /* codec 1 present */ | | 1540 | /* codec 1 present */ |
1541 | DPRINTF(("auixp : YAY! codec 1 present!\n")); | | 1541 | DPRINTF(("auixp : YAY! codec 1 present!\n")); |
1542 | if (ac97_attach(&sc->sc_codec[1].host_if, sc->sc_dev, | | 1542 | if (ac97_attach(&sc->sc_codec[1].host_if, sc->sc_dev, |
1543 | &sc->sc_lock) == 0) | | 1543 | &sc->sc_lock) == 0) |
1544 | sc->sc_num_codecs++; | | 1544 | sc->sc_num_codecs++; |
1545 | } | | 1545 | } |
1546 | | | 1546 | |
1547 | if (!(sc->sc_codec_not_ready_bits & ATI_REG_ISR_CODEC2_NOT_READY)) { | | 1547 | if (!(sc->sc_codec_not_ready_bits & ATI_REG_ISR_CODEC2_NOT_READY)) { |
1548 | /* codec 2 present */ | | 1548 | /* codec 2 present */ |
1549 | DPRINTF(("auixp : YAY! codec 2 present!\n")); | | 1549 | DPRINTF(("auixp : YAY! codec 2 present!\n")); |
1550 | if (ac97_attach(&sc->sc_codec[2].host_if, sc->sc_dev, | | 1550 | if (ac97_attach(&sc->sc_codec[2].host_if, sc->sc_dev, |
1551 | &sc->sc_lock) == 0) | | 1551 | &sc->sc_lock) == 0) |
1552 | sc->sc_num_codecs++; | | 1552 | sc->sc_num_codecs++; |
1553 | } | | 1553 | } |
1554 | | | 1554 | |
1555 | if (sc->sc_num_codecs == 0) { | | 1555 | if (sc->sc_num_codecs == 0) { |
1556 | printf("%s: no codecs detected or " | | 1556 | printf("%s: no codecs detected or " |
1557 | "no codecs managed to initialise\n", | | 1557 | "no codecs managed to initialise\n", |
1558 | device_xname(sc->sc_dev)); | | 1558 | device_xname(sc->sc_dev)); |
1559 | return; | | 1559 | return; |
1560 | } | | 1560 | } |
1561 | | | 1561 | |
1562 | } | | 1562 | } |
1563 | | | 1563 | |
1564 | | | 1564 | |
1565 | | | 1565 | |
1566 | /* initialisation routines */ | | 1566 | /* initialisation routines */ |
1567 | | | 1567 | |
1568 | static void | | 1568 | static void |
1569 | auixp_disable_dma(struct auixp_softc *sc, struct auixp_dma *dma) | | 1569 | auixp_disable_dma(struct auixp_softc *sc, struct auixp_dma *dma) |
1570 | { | | 1570 | { |
1571 | bus_space_tag_t iot; | | 1571 | bus_space_tag_t iot; |
1572 | bus_space_handle_t ioh; | | 1572 | bus_space_handle_t ioh; |
1573 | uint32_t value; | | 1573 | uint32_t value; |
1574 | | | 1574 | |
1575 | iot = sc->sc_iot; | | 1575 | iot = sc->sc_iot; |
1576 | ioh = sc->sc_ioh; | | 1576 | ioh = sc->sc_ioh; |
1577 | /* lets not stress the DMA engine more than nessisary */ | | 1577 | /* lets not stress the DMA engine more than nessisary */ |
1578 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); | | 1578 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1579 | if (value & dma->dma_enable_bit) { | | 1579 | if (value & dma->dma_enable_bit) { |
1580 | value &= ~dma->dma_enable_bit; | | 1580 | value &= ~dma->dma_enable_bit; |
1581 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); | | 1581 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
1582 | } | | 1582 | } |
1583 | } | | 1583 | } |
1584 | | | 1584 | |
1585 | | | 1585 | |
1586 | static void | | 1586 | static void |
1587 | auixp_enable_dma(struct auixp_softc *sc, struct auixp_dma *dma) | | 1587 | auixp_enable_dma(struct auixp_softc *sc, struct auixp_dma *dma) |
1588 | { | | 1588 | { |
1589 | bus_space_tag_t iot; | | 1589 | bus_space_tag_t iot; |
1590 | bus_space_handle_t ioh; | | 1590 | bus_space_handle_t ioh; |
1591 | uint32_t value; | | 1591 | uint32_t value; |
1592 | | | 1592 | |
1593 | iot = sc->sc_iot; | | 1593 | iot = sc->sc_iot; |
1594 | ioh = sc->sc_ioh; | | 1594 | ioh = sc->sc_ioh; |
1595 | /* lets not stress the DMA engine more than nessisary */ | | 1595 | /* lets not stress the DMA engine more than nessisary */ |
1596 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); | | 1596 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1597 | if (!(value & dma->dma_enable_bit)) { | | 1597 | if (!(value & dma->dma_enable_bit)) { |
1598 | value |= dma->dma_enable_bit; | | 1598 | value |= dma->dma_enable_bit; |
1599 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); | | 1599 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
1600 | } | | 1600 | } |
1601 | } | | 1601 | } |
1602 | | | 1602 | |
1603 | | | 1603 | |
1604 | static void | | 1604 | static void |
1605 | auixp_reset_aclink(struct auixp_softc *sc) | | 1605 | auixp_reset_aclink(struct auixp_softc *sc) |
1606 | { | | 1606 | { |
1607 | bus_space_tag_t iot; | | 1607 | bus_space_tag_t iot; |
1608 | bus_space_handle_t ioh; | | 1608 | bus_space_handle_t ioh; |
1609 | uint32_t value, timeout; | | 1609 | uint32_t value, timeout; |
1610 | | | 1610 | |
1611 | iot = sc->sc_iot; | | 1611 | iot = sc->sc_iot; |
1612 | ioh = sc->sc_ioh; | | 1612 | ioh = sc->sc_ioh; |
1613 | | | 1613 | |
1614 | /* if power is down, power it up */ | | 1614 | /* if power is down, power it up */ |
1615 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); | | 1615 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1616 | if (value & ATI_REG_CMD_POWERDOWN) { | | 1616 | if (value & ATI_REG_CMD_POWERDOWN) { |
1617 | printf("%s: powering up\n", device_xname(sc->sc_dev)); | | 1617 | printf("%s: powering up\n", device_xname(sc->sc_dev)); |
1618 | | | 1618 | |
1619 | /* explicitly enable power */ | | 1619 | /* explicitly enable power */ |
1620 | value &= ~ATI_REG_CMD_POWERDOWN; | | 1620 | value &= ~ATI_REG_CMD_POWERDOWN; |
1621 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); | | 1621 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
1622 | | | 1622 | |
1623 | /* have to wait at least 10 usec for it to initialise */ | | 1623 | /* have to wait at least 10 usec for it to initialise */ |
1624 | DELAY(20); | | 1624 | DELAY(20); |
1625 | }; | | 1625 | }; |
1626 | | | 1626 | |
1627 | printf("%s: soft resetting aclink\n", device_xname(sc->sc_dev)); | | 1627 | printf("%s: soft resetting aclink\n", device_xname(sc->sc_dev)); |
1628 | | | 1628 | |
1629 | /* perform a soft reset */ | | 1629 | /* perform a soft reset */ |
1630 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); | | 1630 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1631 | value |= ATI_REG_CMD_AC_SOFT_RESET; | | 1631 | value |= ATI_REG_CMD_AC_SOFT_RESET; |
1632 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); | | 1632 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
1633 | | | 1633 | |
1634 | /* need to read the CMD reg and wait aprox. 10 usec to init */ | | 1634 | /* need to read the CMD reg and wait aprox. 10 usec to init */ |
1635 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); | | 1635 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1636 | DELAY(20); | | 1636 | DELAY(20); |
1637 | | | 1637 | |
1638 | /* clear soft reset flag again */ | | 1638 | /* clear soft reset flag again */ |
1639 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); | | 1639 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1640 | value &= ~ATI_REG_CMD_AC_SOFT_RESET; | | 1640 | value &= ~ATI_REG_CMD_AC_SOFT_RESET; |
1641 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); | | 1641 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
1642 | | | 1642 | |
1643 | /* check if the ac-link is working; reset device otherwise */ | | 1643 | /* check if the ac-link is working; reset device otherwise */ |
1644 | timeout = 10; | | 1644 | timeout = 10; |
1645 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); | | 1645 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1646 | while (!(value & ATI_REG_CMD_ACLINK_ACTIVE)) { | | 1646 | while (!(value & ATI_REG_CMD_ACLINK_ACTIVE)) { |
1647 | printf("%s: not up; resetting aclink hardware\n", | | 1647 | printf("%s: not up; resetting aclink hardware\n", |
1648 | device_xname(sc->sc_dev)); | | 1648 | device_xname(sc->sc_dev)); |
1649 | | | 1649 | |
1650 | /* dip aclink reset but keep the acsync */ | | 1650 | /* dip aclink reset but keep the acsync */ |
1651 | value &= ~ATI_REG_CMD_AC_RESET; | | 1651 | value &= ~ATI_REG_CMD_AC_RESET; |
1652 | value |= ATI_REG_CMD_AC_SYNC; | | 1652 | value |= ATI_REG_CMD_AC_SYNC; |
1653 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); | | 1653 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
1654 | | | 1654 | |
1655 | /* need to read CMD again and wait again (clocking in issue?) */ | | 1655 | /* need to read CMD again and wait again (clocking in issue?) */ |
1656 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); | | 1656 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1657 | DELAY(20); | | 1657 | DELAY(20); |
1658 | | | 1658 | |
1659 | /* assert aclink reset again */ | | 1659 | /* assert aclink reset again */ |
1660 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); | | 1660 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1661 | value |= ATI_REG_CMD_AC_RESET; | | 1661 | value |= ATI_REG_CMD_AC_RESET; |
1662 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); | | 1662 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
1663 | | | 1663 | |
1664 | /* check if its active now */ | | 1664 | /* check if its active now */ |
1665 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); | | 1665 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1666 | | | 1666 | |
1667 | timeout--; | | 1667 | timeout--; |
1668 | if (timeout == 0) break; | | 1668 | if (timeout == 0) break; |
1669 | }; | | 1669 | }; |
1670 | | | 1670 | |
1671 | if (timeout == 0) { | | 1671 | if (timeout == 0) { |
1672 | printf("%s: giving up aclink reset\n", device_xname(sc->sc_dev)); | | 1672 | printf("%s: giving up aclink reset\n", device_xname(sc->sc_dev)); |
1673 | }; | | 1673 | }; |
1674 | if (timeout != 10) { | | 1674 | if (timeout != 10) { |
1675 | printf("%s: aclink hardware reset successful\n", | | 1675 | printf("%s: aclink hardware reset successful\n", |
1676 | device_xname(sc->sc_dev)); | | 1676 | device_xname(sc->sc_dev)); |
1677 | }; | | 1677 | }; |
1678 | | | 1678 | |
1679 | /* assert reset and sync for safety */ | | 1679 | /* assert reset and sync for safety */ |
1680 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); | | 1680 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1681 | value |= ATI_REG_CMD_AC_SYNC | ATI_REG_CMD_AC_RESET; | | 1681 | value |= ATI_REG_CMD_AC_SYNC | ATI_REG_CMD_AC_RESET; |
1682 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); | | 1682 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
1683 | } | | 1683 | } |
1684 | | | 1684 | |
1685 | | | 1685 | |
1686 | /* chip hard init */ | | 1686 | /* chip hard init */ |
1687 | static int | | 1687 | static int |
1688 | auixp_init(struct auixp_softc *sc) | | 1688 | auixp_init(struct auixp_softc *sc) |
1689 | { | | 1689 | { |
1690 | bus_space_tag_t iot; | | 1690 | bus_space_tag_t iot; |
1691 | bus_space_handle_t ioh; | | 1691 | bus_space_handle_t ioh; |
1692 | uint32_t value; | | 1692 | uint32_t value; |
1693 | | | 1693 | |
1694 | iot = sc->sc_iot; | | 1694 | iot = sc->sc_iot; |
1695 | ioh = sc->sc_ioh; | | 1695 | ioh = sc->sc_ioh; |
1696 | /* disable all interrupts and clear all sources */ | | 1696 | /* disable all interrupts and clear all sources */ |
1697 | auixp_disable_interrupts(sc); | | 1697 | auixp_disable_interrupts(sc); |
1698 | | | 1698 | |
1699 | /* clear all DMA enables (preserving rest of settings) */ | | 1699 | /* clear all DMA enables (preserving rest of settings) */ |
1700 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); | | 1700 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1701 | value &= ~( ATI_REG_CMD_IN_DMA_EN | | | 1701 | value &= ~( ATI_REG_CMD_IN_DMA_EN | |
1702 | ATI_REG_CMD_OUT_DMA_EN | | | 1702 | ATI_REG_CMD_OUT_DMA_EN | |
1703 | ATI_REG_CMD_SPDF_OUT_EN ); | | 1703 | ATI_REG_CMD_SPDF_OUT_EN ); |
1704 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); | | 1704 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
1705 | | | 1705 | |
1706 | /* Reset AC-link */ | | 1706 | /* Reset AC-link */ |
1707 | auixp_reset_aclink(sc); | | 1707 | auixp_reset_aclink(sc); |
1708 | | | 1708 | |
1709 | /* | | 1709 | /* |
1710 | * codecs get auto-detected later | | 1710 | * codecs get auto-detected later |
1711 | * | | 1711 | * |
1712 | * note: we are NOT enabling interrupts yet, no codecs have been | | 1712 | * note: we are NOT enabling interrupts yet, no codecs have been |
1713 | * detected yet nor is anything else set up | | 1713 | * detected yet nor is anything else set up |
1714 | */ | | 1714 | */ |
1715 | | | 1715 | |
1716 | return 0; | | 1716 | return 0; |
1717 | } | | 1717 | } |
1718 | | | 1718 | |
1719 | static bool | | 1719 | static bool |
1720 | auixp_resume(device_t dv, const pmf_qual_t *qual) | | 1720 | auixp_resume(device_t dv, const pmf_qual_t *qual) |
1721 | { | | 1721 | { |
1722 | struct auixp_softc *sc = device_private(dv); | | 1722 | struct auixp_softc *sc = device_private(dv); |
1723 | | | 1723 | |
1724 | mutex_enter(&sc->sc_lock); | | 1724 | mutex_enter(&sc->sc_lock); |
1725 | auixp_reset_codec(sc); | | 1725 | auixp_reset_codec(sc); |
1726 | delay(1000); | | 1726 | delay(1000); |
1727 | (sc->sc_codec[0].codec_if->vtbl->restore_ports)(sc->sc_codec[0].codec_if); | | 1727 | (sc->sc_codec[0].codec_if->vtbl->restore_ports)(sc->sc_codec[0].codec_if); |
1728 | mutex_exit(&sc->sc_lock); | | 1728 | mutex_exit(&sc->sc_lock); |
1729 | | | 1729 | |
1730 | return true; | | 1730 | return true; |
1731 | } | | 1731 | } |
1732 | | | 1732 | |
1733 | #ifdef DEBUG_AUIXP | | 1733 | #ifdef DEBUG_AUIXP |
1734 | | | 1734 | |
1735 | static void | | 1735 | static void |
1736 | auixp_dumpreg(void) | | 1736 | auixp_dumpreg(void) |
1737 | { | | 1737 | { |
1738 | struct auixp_softc *sc; | | 1738 | struct auixp_softc *sc; |
1739 | bus_space_tag_t iot; | | 1739 | bus_space_tag_t iot; |
1740 | bus_space_handle_t ioh; | | 1740 | bus_space_handle_t ioh; |
1741 | int i; | | 1741 | int i; |
1742 | | | 1742 | |
1743 | sc = static_sc; | | 1743 | sc = static_sc; |
1744 | iot = sc->sc_iot; | | 1744 | iot = sc->sc_iot; |
1745 | ioh = sc->sc_ioh; | | 1745 | ioh = sc->sc_ioh; |
1746 | printf("%s register dump:\n", device_xname(sc->sc_dev)); | | 1746 | printf("%s register dump:\n", device_xname(sc->sc_dev)); |
1747 | for (i = 0; i < 256; i+=4) { | | 1747 | for (i = 0; i < 256; i+=4) { |
1748 | printf("\t0x%02x: 0x%08x\n", i, bus_space_read_4(iot, ioh, i)); | | 1748 | printf("\t0x%02x: 0x%08x\n", i, bus_space_read_4(iot, ioh, i)); |
1749 | } | | 1749 | } |
1750 | printf("\n"); | | 1750 | printf("\n"); |
1751 | } | | 1751 | } |
1752 | #endif | | 1752 | #endif |
1753 | | | 1753 | |
1754 | static void | | 1754 | static void |
1755 | auixp_get_locks(void *addr, kmutex_t **intr, kmutex_t **proc) | | 1755 | auixp_get_locks(void *addr, kmutex_t **intr, kmutex_t **proc) |
1756 | { | | 1756 | { |
1757 | struct auixp_codec *co = addr; | | 1757 | struct auixp_codec *co = addr; |
1758 | struct auixp_softc *sc = co->sc; | | 1758 | struct auixp_softc *sc = co->sc; |
1759 | | | 1759 | |
1760 | *intr = &sc->sc_intr_lock; | | 1760 | *intr = &sc->sc_intr_lock; |
1761 | *proc = &sc->sc_lock; | | 1761 | *proc = &sc->sc_lock; |
1762 | } | | 1762 | } |