 @@ -1,14 +1,14 @@
-/* $NetBSD: if_ti.c,v 1.112 2019/07/09 08:46:59 msaitoh Exp $ */
+/* $NetBSD: if_ti.c,v 1.112.2.1 2020/07/15 17:16:59 martin Exp $ */
 /*
  * Copyright (c) 1997, 1998, 1999
  *	Bill Paul <wpaul@ctr.columbia.edu>.  All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -71,27 +71,27 @@
  * compiling it requires a GNU toolchain targeted for mips-sgi-irix5.3.
+ *
  * The following people deserve special thanks:
  * - Terry Murphy of 3Com, for providing a 3c985 Tigon 1 board
  *   for testing
  * - Raymond Lee of Netgear, for providing a pair of Netgear
  *   GA620 Tigon 2 boards for testing
  * - Ulf Zimmermann, for bringing the GA620 to my attention and
  *   convincing me to write this driver.
  * - Andrew Gallatin for providing FreeBSD/Alpha support.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_ti.c,v 1.112 2019/07/09 08:46:59 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_ti.c,v 1.112.2.1 2020/07/15 17:16:59 martin Exp $");
 #include "opt_inet.h"
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/sockio.h>
 #include <sys/mbuf.h>
 #include <sys/malloc.h>
 #include <sys/kernel.h>
 #include <sys/socket.h>
 #include <sys/queue.h>
 #include <sys/device.h>
 #include <sys/reboot.h>
 @@ -130,26 +130,28 @@ __KERNEL_RCSID(0, "$NetBSD: if_ti.c,v 1.
 static const struct ti_type ti_devs[] = {
 	{ PCI_VENDOR_ALTEON,	PCI_PRODUCT_ALTEON_ACENIC,
 		"Alteon AceNIC 1000BASE-SX Ethernet" },
 	{ PCI_VENDOR_ALTEON,	PCI_PRODUCT_ALTEON_ACENIC_COPPER,
 		"Alteon AceNIC 1000BASE-T Ethernet" },
 	{ PCI_VENDOR_3COM,	PCI_PRODUCT_3COM_3C985,
 		"3Com 3c985-SX Gigabit Ethernet" },
 	{ PCI_VENDOR_NETGEAR, PCI_PRODUCT_NETGEAR_GA620,
 		"Netgear GA620 1000BASE-SX Ethernet" },
 	{ PCI_VENDOR_NETGEAR, PCI_PRODUCT_NETGEAR_GA620T,
 		"Netgear GA620 1000BASE-T Ethernet" },
 	{ PCI_VENDOR_SGI, PCI_PRODUCT_SGI_TIGON,
 		"Silicon Graphics Gigabit Ethernet" },
 	{ PCI_VENDOR_DEC, PCI_PRODUCT_DEC_PN9000SX,
 		"Farallon PN9000SX Gigabit Ethernet" },
 	{ 0, 0, NULL }
 };
 static const struct ti_type *ti_type_match(struct pci_attach_args *);
 static int ti_probe(device_t, cfdata_t, void *);
 static void ti_attach(device_t, device_t, void *);
 static bool ti_shutdown(device_t, int);
 static void ti_txeof_tigon1(struct ti_softc *);
 static void ti_txeof_tigon2(struct ti_softc *);
 static void ti_rxeof(struct ti_softc *);
 static void ti_stats_update(struct ti_softc *);
 static int ti_encap_tigon1(struct ti_softc *, struct mbuf *, uint32_t *);
 @@ -206,27 +208,27 @@ CFATTACH_DECL_NEW(ti, sizeof(struct ti_s
  * Send an instruction or address to the EEPROM, check for ACK.
  */
 static uint32_t
 ti_eeprom_putbyte(struct ti_softc *sc, int byte)
+{
 	int i, ack = 0;
 	/*
 	 * Make sure we're in TX mode.
 	 */
 	TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN);
 	/*
-	 * Feed in each bit and stobe the clock.
+	 * Feed in each bit and strobe the clock.
 	 */
 	for (i = 0x80; i; i >>= 1) {
 		if (byte & i) {
 			TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT);
 		} else {
 			TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT);
+		}
 		DELAY(1);
 		TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
 		DELAY(1);
 		TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
+	}
 @@ -752,27 +754,27 @@ ti_newbuf_std(struct ti_softc *sc, int i
 	r->ti_flags = 0;
 	if (sc->ethercom.ec_if.if_capenable & IFCAP_CSUM_IPv4_Rx)
 		r->ti_flags |= TI_BDFLAG_IP_CKSUM;
 	if (sc->ethercom.ec_if.if_capenable &
 	    (IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx))
 		r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM;
 	r->ti_len = m_new->m_len; /* == ds_len */
 	r->ti_idx = i;
 	return (0);
+}
 /*
- * Intialize a mini receive ring descriptor. This only applies to
+ * Initialize a mini receive ring descriptor. This only applies to
  * the Tigon 2.
  */
 static int
 ti_newbuf_mini(struct ti_softc *sc, int i, struct mbuf *m, bus_dmamap_t dmamap)
+{
 	struct mbuf		*m_new = NULL;
 	struct ti_rx_desc	*r;
 	int error;
 	if (dmamap == NULL) {
 		/* if (m) panic() */
 		if ((error = bus_dmamap_create(sc->sc_dmat, MHLEN, 1,
 @@ -893,27 +895,27 @@ ti_newbuf_jumbo(struct ti_softc *sc, int
  * that's 1MB or memory, which is a lot. For now, we fill only the first
  * 256 ring entries and hope that our CPU is fast enough to keep up with
  * the NIC.
  */
 static int
 ti_init_rx_ring_std(struct ti_softc *sc)
+{
 	int		i;
 	struct ti_cmd_desc	cmd;
 	for (i = 0; i < TI_SSLOTS; i++) {
 		if (ti_newbuf_std(sc, i, NULL, 0) == ENOBUFS)
 			return (ENOBUFS);
 	};
 	TI_UPDATE_STDPROD(sc, i - 1);
 	sc->ti_std = i - 1;
 	return (0);
+}
 static void
 ti_free_rx_ring_std(struct ti_softc *sc)
+{
 	int		i;
 	for (i = 0; i < TI_STD_RX_RING_CNT; i++) {
 @@ -931,27 +933,27 @@ ti_free_rx_ring_std(struct ti_softc *sc)
 	return;
+}
 static int
 ti_init_rx_ring_jumbo(struct ti_softc *sc)
+{
 	int		i;
 	struct ti_cmd_desc	cmd;
 	for (i = 0; i < TI_JUMBO_RX_RING_CNT; i++) {
 		if (ti_newbuf_jumbo(sc, i, NULL) == ENOBUFS)
 			return (ENOBUFS);
 	};
 	TI_UPDATE_JUMBOPROD(sc, i - 1);
 	sc->ti_jumbo = i - 1;
 	return (0);
+}
 static void
 ti_free_rx_ring_jumbo(struct ti_softc *sc)
+{
 	int		i;
 	for (i = 0; i < TI_JUMBO_RX_RING_CNT; i++) {
 @@ -964,27 +966,27 @@ ti_free_rx_ring_jumbo(struct ti_softc *s
+	}
 	return;
+}
 static int
 ti_init_rx_ring_mini(struct ti_softc *sc)
+{
 	int		i;
 	for (i = 0; i < TI_MSLOTS; i++) {
 		if (ti_newbuf_mini(sc, i, NULL, 0) == ENOBUFS)
 			return (ENOBUFS);
 	};
 	TI_UPDATE_MINIPROD(sc, i - 1);
 	sc->ti_mini = i - 1;
 	return (0);
+}
 static void
 ti_free_rx_ring_mini(struct ti_softc *sc)
+{
 	int		i;
 	for (i = 0; i < TI_MINI_RX_RING_CNT; i++) {
 @@ -2016,30 +2018,28 @@ ti_rxeof(struct ti_softc *sc)
 					break;
 				default:
 					/* Nothing */;
+				}
+			}
 			break;
+		    }
 #endif
 		default:
 			/* Nothing. */
 			break;
+		}
-		if (cur_rx->ti_flags & TI_BDFLAG_VLAN_TAG) {
+		if (cur_rx->ti_flags & TI_BDFLAG_VLAN_TAG)
-			/* ti_vlan_tag also has the priority, trim it */
+			vlan_set_tag(m, cur_rx->ti_vlan_tag);
 			vlan_set_tag(m, cur_rx->ti_vlan_tag & 0x0fff);
 		if_percpuq_enqueue(ifp->if_percpuq, m);
+	}
 	/* Only necessary on the Tigon 1. */
 	if (sc->ti_hwrev == TI_HWREV_TIGON)
 		CSR_WRITE_4(sc, TI_GCR_RXRETURNCONS_IDX,
 		    sc->ti_rx_saved_considx);
 	TI_UPDATE_STDPROD(sc, sc->ti_std);
 	TI_UPDATE_MINIPROD(sc, sc->ti_mini);
 	TI_UPDATE_JUMBOPROD(sc, sc->ti_jumbo);
+}
 @@ -2195,27 +2195,27 @@ ti_stats_update(struct ti_softc *sc)
 	TI_CDSTATSSYNC(sc, BUS_DMASYNC_POSTREAD);
 	ifp->if_collisions +=
 	   (sc->ti_rdata->ti_info.ti_stats.dot3StatsSingleCollisionFrames +
 	   sc->ti_rdata->ti_info.ti_stats.dot3StatsMultipleCollisionFrames +
 	   sc->ti_rdata->ti_info.ti_stats.dot3StatsExcessiveCollisions +
 	   sc->ti_rdata->ti_info.ti_stats.dot3StatsLateCollisions) -
 	   ifp->if_collisions;
 	TI_CDSTATSSYNC(sc, BUS_DMASYNC_PREREAD);
+}
 /*
- * Encapsulate an mbuf chain in the tx ring  by coupling the mbuf data
+ * Encapsulate an mbuf chain in the tx ring by coupling the mbuf data
  * pointers to descriptors.
  */
 static int
 ti_encap_tigon1(struct ti_softc *sc, struct mbuf *m_head, uint32_t *txidx)
+{
 	struct ti_tx_desc	*f = NULL;
 	uint32_t		frag, cur, cnt = 0;
 	struct txdmamap_pool_entry *dma;
 	bus_dmamap_t dmamap;
 	int error, i;
 	uint16_t csum_flags = 0;
 	dma = SIMPLEQ_FIRST(&sc->txdma_list);
 @@ -2674,27 +2674,27 @@ ti_ifmedia_sts(struct ifnet *ifp, struct
 		if (media & TI_LNK_FULL_DUPLEX)
 			ifmr->ifm_active |= IFM_FDX;
 		if (media & TI_LNK_HALF_DUPLEX)
 			ifmr->ifm_active |= IFM_HDX;
+	}
 	sc->ethercom.ec_if.if_baudrate =
 	    ifmedia_baudrate(sc->ifmedia.ifm_media);
+}
 static int
 ti_ether_ioctl(struct ifnet *ifp, u_long cmd, void *data)
+{
-	struct ifaddr *ifa = (struct ifaddr *) data;
+	struct ifaddr *ifa = (struct ifaddr *)data;
 	struct ti_softc *sc = ifp->if_softc;
 	if ((ifp->if_flags & IFF_UP) == 0) {
 		ifp->if_flags |= IFF_UP;
 		ti_init(sc);
+	}
 	switch (cmd) {
 	case SIOCINITIFADDR:
 		switch (ifa->ifa_addr->sa_family) {
 #ifdef INET
 		case AF_INET:
 @@ -2707,27 +2707,27 @@ ti_ether_ioctl(struct ifnet *ifp, u_long
 		break;
 	default:
 		return (EINVAL);
+	}
 	return (0);
+}
 static int
 ti_ioctl(struct ifnet *ifp, u_long command, void *data)
+{
 	struct ti_softc		*sc = ifp->if_softc;
-	struct ifreq		*ifr = (struct ifreq *) data;
+	struct ifreq		*ifr = (struct ifreq *)data;
 	int			s, error = 0;
 	struct ti_cmd_desc	cmd;
 	s = splnet();
 	switch (command) {
 	case SIOCINITIFADDR:
 		error = ti_ether_ioctl(ifp, command, data);
 		break;
 	case SIOCSIFMTU:
 		if (ifr->ifr_mtu < ETHERMIN || ifr->ifr_mtu > ETHERMTU_JUMBO)
 			error = EINVAL;
 		else if ((error = ifioctl_common(ifp, command, data))

 @@ -1,14 +1,14 @@
-/* $NetBSD: if_tireg.h,v 1.21 2019/03/05 08:25:02 msaitoh Exp $ */
+/* $NetBSD: if_tireg.h,v 1.21.4.1 2020/07/15 17:16:59 martin Exp $ */
 /*
  * Copyright (c) 1997, 1998, 1999
  *	Bill Paul <wpaul@ctr.columbia.edu>.  All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -29,27 +29,27 @@
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  * THE POSSIBILITY OF SUCH DAMAGE.
+ *
  *	FreeBSD Id: if_tireg.h,v 1.9 1999/07/27 03:54:48 wpaul Exp
  */
 /*
  * Tigon register offsets. These are memory mapped registers
  * which can be accessed with the CSR_READ_4()/CSR_WRITE_4() macros.
  * Each register must be accessed using 32 bit operations.
+ *
- * All reegisters are accessed through a 16K shared memory block.
+ * All registers are accessed through a 16K shared memory block.
  * The first group of registers are actually copies of the PCI
  * configuration space registers.
  */
 /*
  * Tigon configuration and control registers.
  */
 #define TI_MISC_HOST_CTL		0x040
 #define TI_MISC_LOCAL_CTL		0x044
 #define TI_SEM_AB			0x048 /* Tigon 2 only */
 #define TI_MISC_CONF			0x050 /* Tigon 2 only */
 #define TI_TIMER_BITS			0x054
 #define TI_TIMERREF			0x058