Sun Jul 19 08:58:35 2020 UTC ()
KNF whitespace nits.


(simonb)
diff -r1.14 -r1.15 src/sys/arch/mips/cavium/octeon_cpunode.c

cvs diff -r1.14 -r1.15 src/sys/arch/mips/cavium/octeon_cpunode.c (expand / switch to unified diff)

--- src/sys/arch/mips/cavium/octeon_cpunode.c 2020/07/17 21:59:30 1.14
+++ src/sys/arch/mips/cavium/octeon_cpunode.c 2020/07/19 08:58:35 1.15
@@ -19,27 +19,27 @@ @@ -19,27 +19,27 @@
19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 * POSSIBILITY OF SUCH DAMAGE. 27 * POSSIBILITY OF SUCH DAMAGE.
28 */ 28 */
29#define __INTR_PRIVATE 29#define __INTR_PRIVATE
30#include <sys/cdefs.h> 30#include <sys/cdefs.h>
31 31
32__KERNEL_RCSID(0, "$NetBSD: octeon_cpunode.c,v 1.14 2020/07/17 21:59:30 jmcneill Exp $"); 32__KERNEL_RCSID(0, "$NetBSD: octeon_cpunode.c,v 1.15 2020/07/19 08:58:35 simonb Exp $");
33 33
34#include "locators.h" 34#include "locators.h"
35#include "cpunode.h" 35#include "cpunode.h"
36#include "opt_multiprocessor.h" 36#include "opt_multiprocessor.h"
37#include "opt_ddb.h" 37#include "opt_ddb.h"
38 38
39#include <sys/param.h> 39#include <sys/param.h>
40#include <sys/device.h> 40#include <sys/device.h>
41#include <sys/lwp.h> 41#include <sys/lwp.h>
42#include <sys/cpu.h> 42#include <sys/cpu.h>
43#include <sys/atomic.h> 43#include <sys/atomic.h>
44#include <sys/wdog.h> 44#include <sys/wdog.h>
45 45
@@ -90,27 +90,27 @@ cpunode_mainbus_print(void *aux, const c @@ -90,27 +90,27 @@ cpunode_mainbus_print(void *aux, const c
90 90
91 if (pnp) 91 if (pnp)
92 aprint_normal("%s", pnp); 92 aprint_normal("%s", pnp);
93 93
94 if (cnaa->cnaa_cpunum != CPUNODECF_CORE_DEFAULT) 94 if (cnaa->cnaa_cpunum != CPUNODECF_CORE_DEFAULT)
95 aprint_normal(" core %d", cnaa->cnaa_cpunum); 95 aprint_normal(" core %d", cnaa->cnaa_cpunum);
96 96
97 return UNCONF; 97 return UNCONF;
98} 98}
99 99
100int 100int
101cpunode_mainbus_match(device_t parent, cfdata_t cf, void *aux) 101cpunode_mainbus_match(device_t parent, cfdata_t cf, void *aux)
102{ 102{
103  103
104 return 1; 104 return 1;
105} 105}
106 106
107void 107void
108cpunode_mainbus_attach(device_t parent, device_t self, void *aux) 108cpunode_mainbus_attach(device_t parent, device_t self, void *aux)
109{ 109{
110 struct cpunode_softc * const sc = device_private(self); 110 struct cpunode_softc * const sc = device_private(self);
111 const uint64_t fuse = octeon_xkphys_read_8(CIU_FUSE); 111 const uint64_t fuse = octeon_xkphys_read_8(CIU_FUSE);
112 int cpunum = 0; 112 int cpunum = 0;
113 113
114 sc->sc_dev = self; 114 sc->sc_dev = self;
115 115
116 aprint_naive(": %u core%s\n", popcount64(fuse), fuse == 1 ? "" : "s"); 116 aprint_naive(": %u core%s\n", popcount64(fuse), fuse == 1 ? "" : "s");
@@ -213,26 +213,27 @@ octeon_cpu_init(struct cpu_info *ci) @@ -213,26 +213,27 @@ octeon_cpu_init(struct cpu_info *ci)
213 KASSERT(ok); 213 KASSERT(ok);
214 214
215 (void) splhigh(); // make sure interrupts are masked 215 (void) splhigh(); // make sure interrupts are masked
216 216
217 KASSERT((mipsNN_cp0_ebase_read() & MIPS_EBASE_CPUNUM) == ci->ci_cpuid); 217 KASSERT((mipsNN_cp0_ebase_read() & MIPS_EBASE_CPUNUM) == ci->ci_cpuid);
218 KASSERT(curcpu() == ci); 218 KASSERT(curcpu() == ci);
219 KASSERT(ci->ci_cpl == IPL_HIGH); 219 KASSERT(ci->ci_cpl == IPL_HIGH);
220 KASSERT((mips_cp0_status_read() & MIPS_INT_MASK) == 0); 220 KASSERT((mips_cp0_status_read() & MIPS_INT_MASK) == 0);
221} 221}
222 222
223static void 223static void
224octeon_cpu_run(struct cpu_info *ci) 224octeon_cpu_run(struct cpu_info *ci)
225{ 225{
 226
226 octeon_intr_init(ci); 227 octeon_intr_init(ci);
227 228
228 mips3_initclocks(); 229 mips3_initclocks();
229 KASSERTMSG(ci->ci_cpl == IPL_NONE, "cpl %d", ci->ci_cpl); 230 KASSERTMSG(ci->ci_cpl == IPL_NONE, "cpl %d", ci->ci_cpl);
230 KASSERT(mips_cp0_status_read() & MIPS_SR_INT_IE); 231 KASSERT(mips_cp0_status_read() & MIPS_SR_INT_IE);
231 232
232 aprint_normal("%s: ", device_xname(ci->ci_dev)); 233 aprint_normal("%s: ", device_xname(ci->ci_dev));
233 cpu_identify(ci->ci_dev); 234 cpu_identify(ci->ci_dev);
234} 235}
235#endif /* MULTIPROCESSOR */ 236#endif /* MULTIPROCESSOR */
236 237
237static void 238static void
238cpu_cpunode_attach_common(device_t self, struct cpu_info *ci) 239cpu_cpunode_attach_common(device_t self, struct cpu_info *ci)
@@ -392,32 +393,34 @@ wdog_cpunode_setmode(struct sysmon_wdog  @@ -392,32 +393,34 @@ wdog_cpunode_setmode(struct sysmon_wdog
392 cpu_name(ci), wdog, wdog_len); 393 cpu_name(ci), wdog, wdog_len);
393 mips3_sd(cpu->cpu_wdog, wdog); 394 mips3_sd(cpu->cpu_wdog, wdog);
394 } 395 }
395 sc->sc_wdog_armed = true; 396 sc->sc_wdog_armed = true;
396 kpreempt_enable(); 397 kpreempt_enable();
397 } 398 }
398 return 0; 399 return 0;
399} 400}
400 401
401static void 402static void
402wdog_cpunode_poke(void *arg) 403wdog_cpunode_poke(void *arg)
403{ 404{
404 struct cpu_softc *cpu = arg; 405 struct cpu_softc *cpu = arg;
 406
405 mips3_sd(cpu->cpu_pp_poke, 0); 407 mips3_sd(cpu->cpu_pp_poke, 0);
406} 408}
407 409
408static int 410static int
409wdog_cpunode_tickle(struct sysmon_wdog *smw) 411wdog_cpunode_tickle(struct sysmon_wdog *smw)
410{ 412{
 413
411 wdog_cpunode_poke(curcpu()->ci_softc); 414 wdog_cpunode_poke(curcpu()->ci_softc);
412#ifdef MULTIPROCESSOR 415#ifdef MULTIPROCESSOR
413 // We need to send IPIs to the other CPUs to poke their wdog. 416 // We need to send IPIs to the other CPUs to poke their wdog.
414 cpu_send_ipi(NULL, IPI_WDOG); 417 cpu_send_ipi(NULL, IPI_WDOG);
415#endif 418#endif
416 return 0; 419 return 0;
417} 420}
418 421
419int 422int
420wdog_cpunode_match(device_t parent, cfdata_t cf, void *aux) 423wdog_cpunode_match(device_t parent, cfdata_t cf, void *aux)
421{ 424{
422 struct cpunode_softc * const sc = device_private(parent); 425 struct cpunode_softc * const sc = device_private(parent);
423 struct cpunode_attach_args * const cnaa = aux; 426 struct cpunode_attach_args * const cnaa = aux;